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Remove regcache_raw_supply
[binutils.git] / gdb / mn10300-linux-tdep.c
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611889b1 1/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
155bd5d1 2
e2882c85 3 Copyright (C) 2003-2018 Free Software Foundation, Inc.
611889b1
KB		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
611889b1
KB		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
611889b1
KB		 19
20#include "defs.h"
21#include "gdbcore.h"
611889b1
KB		 22#include "regcache.h"
23#include "mn10300-tdep.h"
611889b1
KB		 24#include "bfd.h"
25#include "elf-bfd.h"
26#include "osabi.h"
27#include "regset.h"
696cc4a6 28#include "solib-svr4.h"
f9ec92b6
KB		 29#include "frame.h"
30#include "trad-frame.h"
31#include "tramp-frame.h"
a5ee0f0c 32#include "linux-tdep.h"
611889b1 33
611889b1
KB		 34/* Transliterated from <asm-mn10300/elf.h>... */
35#define MN10300_ELF_NGREG 28
36#define MN10300_ELF_NFPREG 32
37
38typedef gdb_byte mn10300_elf_greg_t[4];
39typedef mn10300_elf_greg_t mn10300_elf_gregset_t[MN10300_ELF_NGREG];
40
41typedef gdb_byte mn10300_elf_fpreg_t[4];
42typedef struct
43{
44 mn10300_elf_fpreg_t fpregs[MN10300_ELF_NFPREG];
45 gdb_byte fpcr[4];
46} mn10300_elf_fpregset_t;
47
48/* elf_gregset_t register indices stolen from include/asm-mn10300/ptrace.h. */
49#define MN10300_ELF_GREGSET_T_REG_INDEX_A3 0
50#define MN10300_ELF_GREGSET_T_REG_INDEX_A2 1
51#define MN10300_ELF_GREGSET_T_REG_INDEX_D3 2
52#define MN10300_ELF_GREGSET_T_REG_INDEX_D2 3
53#define MN10300_ELF_GREGSET_T_REG_INDEX_MCVF 4
54#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRL 5
55#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRH 6
56#define MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ 7
57#define MN10300_ELF_GREGSET_T_REG_INDEX_E1 8
58#define MN10300_ELF_GREGSET_T_REG_INDEX_E0 9
59#define MN10300_ELF_GREGSET_T_REG_INDEX_E7 10
60#define MN10300_ELF_GREGSET_T_REG_INDEX_E6 11
61#define MN10300_ELF_GREGSET_T_REG_INDEX_E5 12
62#define MN10300_ELF_GREGSET_T_REG_INDEX_E4 13
63#define MN10300_ELF_GREGSET_T_REG_INDEX_E3 14
64#define MN10300_ELF_GREGSET_T_REG_INDEX_E2 15
65#define MN10300_ELF_GREGSET_T_REG_INDEX_SP 16
66#define MN10300_ELF_GREGSET_T_REG_INDEX_LAR 17
67#define MN10300_ELF_GREGSET_T_REG_INDEX_LIR 18
68#define MN10300_ELF_GREGSET_T_REG_INDEX_MDR 19
69#define MN10300_ELF_GREGSET_T_REG_INDEX_A1 20
70#define MN10300_ELF_GREGSET_T_REG_INDEX_A0 21
71#define MN10300_ELF_GREGSET_T_REG_INDEX_D1 22
72#define MN10300_ELF_GREGSET_T_REG_INDEX_D0 23
73#define MN10300_ELF_GREGSET_T_REG_INDEX_ORIG_D0 24
74#define MN10300_ELF_GREGSET_T_REG_INDEX_EPSW 25
75#define MN10300_ELF_GREGSET_T_REG_INDEX_PC 26
76
77/* New gdbarch API for corefile registers.
78 Given a section name and size, create a struct reg object
79 with a supply_register and a collect_register method. */
80
025bb325 81/* Copy register value of REGNUM from regset to regcache.
611889b1
KB		 82 If REGNUM is -1, do this for all gp registers in regset. */
83
84static void
85am33_supply_gregset_method (const struct regset *regset,
86 struct regcache *regcache,
87 int regnum, const void *gregs, size_t len)
88{
611889b1
KB		 89 const mn10300_elf_greg_t *regp = (const mn10300_elf_greg_t *) gregs;
90 int i;
91
1528345d 92 gdb_assert (len >= sizeof (mn10300_elf_gregset_t));
611889b1
KB		 93
94 switch (regnum) {
95 case E_D0_REGNUM:
73e1c03f
SM		 96 regcache->raw_supply (E_D0_REGNUM,
97 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
611889b1
KB		 98 break;
99 case E_D1_REGNUM:
73e1c03f
SM		 100 regcache->raw_supply (E_D1_REGNUM,
101 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
611889b1
KB		 102 break;
103 case E_D2_REGNUM:
73e1c03f
SM		 104 regcache->raw_supply (E_D2_REGNUM,
105 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
611889b1
KB		 106 break;
107 case E_D3_REGNUM:
73e1c03f
SM		 108 regcache->raw_supply (E_D3_REGNUM,
109 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
611889b1
KB		 110 break;
111 case E_A0_REGNUM:
73e1c03f
SM		 112 regcache->raw_supply (E_A0_REGNUM,
113 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
611889b1
KB		 114 break;
115 case E_A1_REGNUM:
73e1c03f
SM		 116 regcache->raw_supply (E_A1_REGNUM,
117 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
611889b1
KB		 118 break;
119 case E_A2_REGNUM:
73e1c03f
SM		 120 regcache->raw_supply (E_A2_REGNUM,
121 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
611889b1
KB		 122 break;
123 case E_A3_REGNUM:
73e1c03f
SM		 124 regcache->raw_supply (E_A3_REGNUM,
125 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
611889b1
KB		 126 break;
127 case E_SP_REGNUM:
73e1c03f
SM		 128 regcache->raw_supply (E_SP_REGNUM,
129 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
611889b1
KB		 130 break;
131 case E_PC_REGNUM:
73e1c03f
SM		 132 regcache->raw_supply (E_PC_REGNUM,
133 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
611889b1
KB		 134 break;
135 case E_MDR_REGNUM:
73e1c03f
SM		 136 regcache->raw_supply (E_MDR_REGNUM,
137 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
611889b1
KB		 138 break;
139 case E_PSW_REGNUM:
73e1c03f
SM		 140 regcache->raw_supply (E_PSW_REGNUM,
141 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
611889b1
KB		 142 break;
143 case E_LIR_REGNUM:
73e1c03f
SM		 144 regcache->raw_supply (E_LIR_REGNUM,
145 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
611889b1
KB		 146 break;
147 case E_LAR_REGNUM:
73e1c03f
SM		 148 regcache->raw_supply (E_LAR_REGNUM,
149 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
611889b1
KB		 150 break;
151 case E_MDRQ_REGNUM:
73e1c03f
SM		 152 regcache->raw_supply (E_MDRQ_REGNUM,
153 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
611889b1
KB		 154 break;
155 case E_E0_REGNUM:
73e1c03f
SM		 156 regcache->raw_supply (E_E0_REGNUM,
157 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
611889b1
KB		 158 break;
159 case E_E1_REGNUM:
73e1c03f
SM		 160 regcache->raw_supply (E_E1_REGNUM,
161 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
611889b1
KB		 162 break;
163 case E_E2_REGNUM:
73e1c03f
SM		 164 regcache->raw_supply (E_E2_REGNUM,
165 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
611889b1
KB		 166 break;
167 case E_E3_REGNUM:
73e1c03f
SM		 168 regcache->raw_supply (E_E3_REGNUM,
169 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
611889b1
KB		 170 break;
171 case E_E4_REGNUM:
73e1c03f
SM		 172 regcache->raw_supply (E_E4_REGNUM,
173 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
611889b1
KB		 174 break;
175 case E_E5_REGNUM:
73e1c03f
SM		 176 regcache->raw_supply (E_E5_REGNUM,
177 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
611889b1
KB		 178 break;
179 case E_E6_REGNUM:
73e1c03f
SM		 180 regcache->raw_supply (E_E6_REGNUM,
181 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
611889b1
KB		 182 break;
183 case E_E7_REGNUM:
73e1c03f
SM		 184 regcache->raw_supply (E_E7_REGNUM,
185 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
611889b1
KB		 186 break;
187
188 /* ssp, msp, and usp are inaccessible. */
189 case E_E8_REGNUM:
146e6c5c 190 regcache->raw_supply_zeroed (E_E8_REGNUM);
611889b1
KB		 191 break;
192 case E_E9_REGNUM:
146e6c5c 193 regcache->raw_supply_zeroed (E_E9_REGNUM);
611889b1
KB		 194 break;
195 case E_E10_REGNUM:
146e6c5c 196 regcache->raw_supply_zeroed (E_E10_REGNUM);
611889b1
KB		 197 break;
198 case E_MCRH_REGNUM:
73e1c03f
SM		 199 regcache->raw_supply (E_MCRH_REGNUM,
200 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
611889b1
KB		 201 break;
202 case E_MCRL_REGNUM:
73e1c03f
SM		 203 regcache->raw_supply (E_MCRL_REGNUM,
204 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
611889b1
KB		 205 break;
206 case E_MCVF_REGNUM:
73e1c03f
SM		 207 regcache->raw_supply (E_MCVF_REGNUM,
208 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
611889b1
KB		 209 break;
210 case E_FPCR_REGNUM:
211 /* FPCR is numbered among the GP regs, but handled as an FP reg.
212 Do nothing. */
213 break;
214 case E_FPCR_REGNUM + 1:
215 /* The two unused registers beyond fpcr are inaccessible. */
146e6c5c 216 regcache->raw_supply_zeroed (E_FPCR_REGNUM + 1);
611889b1
KB		 217 break;
218 case E_FPCR_REGNUM + 2:
146e6c5c 219 regcache->raw_supply_zeroed (E_FPCR_REGNUM + 2);
611889b1
KB		 220 break;
221 default: /* An error, obviously, but should we error out? */
222 break;
223 case -1:
224 for (i = 0; i < MN10300_ELF_NGREG; i++)
225 am33_supply_gregset_method (regset, regcache, i, gregs, len);
226 break;
227 }
228 return;
229}
230
025bb325
MS		 231/* Copy fp register value of REGNUM from regset to regcache.
232 If REGNUM is -1, do this for all fp registers in regset. */
611889b1
KB		 233
234static void
235am33_supply_fpregset_method (const struct regset *regset,
236 struct regcache *regcache,
237 int regnum, const void *fpregs, size_t len)
238{
19ba03f4
SM		 239 const mn10300_elf_fpregset_t *fpregset
240 = (const mn10300_elf_fpregset_t *) fpregs;
611889b1 241
1528345d 242 gdb_assert (len >= sizeof (mn10300_elf_fpregset_t));
611889b1
KB		 243
244 if (regnum == -1)
245 {
246 int i;
247
248 for (i = 0; i < MN10300_ELF_NFPREG; i++)
249 am33_supply_fpregset_method (regset, regcache,
250 E_FS0_REGNUM + i, fpregs, len);
251 am33_supply_fpregset_method (regset, regcache,
252 E_FPCR_REGNUM, fpregs, len);
253 }
254 else if (regnum == E_FPCR_REGNUM)
73e1c03f 255 regcache->raw_supply (E_FPCR_REGNUM, &fpregset->fpcr);
025bb325
MS		 256 else if (E_FS0_REGNUM <= regnum
257 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
73e1c03f 258 regcache->raw_supply (regnum, &fpregset->fpregs[regnum - E_FS0_REGNUM]);
611889b1
KB		 259
260 return;
261}
262
263/* Copy register values from regcache to regset. */
264
265static void
266am33_collect_gregset_method (const struct regset *regset,
267 const struct regcache *regcache,
268 int regnum, void *gregs, size_t len)
269{
19ba03f4 270 mn10300_elf_gregset_t *regp = (gdb_byte (*)[28][4]) gregs;
611889b1
KB		 271 int i;
272
1528345d 273 gdb_assert (len >= sizeof (mn10300_elf_gregset_t));
611889b1
KB		 274
275 switch (regnum) {
276 case E_D0_REGNUM:
277 regcache_raw_collect (regcache, E_D0_REGNUM,
278 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
279 break;
280 case E_D1_REGNUM:
281 regcache_raw_collect (regcache, E_D1_REGNUM,
282 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
283 break;
284 case E_D2_REGNUM:
285 regcache_raw_collect (regcache, E_D2_REGNUM,
286 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
287 break;
288 case E_D3_REGNUM:
289 regcache_raw_collect (regcache, E_D3_REGNUM,
290 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
291 break;
292 case E_A0_REGNUM:
293 regcache_raw_collect (regcache, E_A0_REGNUM,
294 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
295 break;
296 case E_A1_REGNUM:
297 regcache_raw_collect (regcache, E_A1_REGNUM,
298 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
299 break;
300 case E_A2_REGNUM:
301 regcache_raw_collect (regcache, E_A2_REGNUM,
302 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
303 break;
304 case E_A3_REGNUM:
305 regcache_raw_collect (regcache, E_A3_REGNUM,
306 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
307 break;
308 case E_SP_REGNUM:
309 regcache_raw_collect (regcache, E_SP_REGNUM,
310 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
311 break;
312 case E_PC_REGNUM:
313 regcache_raw_collect (regcache, E_PC_REGNUM,
314 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
315 break;
316 case E_MDR_REGNUM:
317 regcache_raw_collect (regcache, E_MDR_REGNUM,
318 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
319 break;
320 case E_PSW_REGNUM:
321 regcache_raw_collect (regcache, E_PSW_REGNUM,
322 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
323 break;
324 case E_LIR_REGNUM:
325 regcache_raw_collect (regcache, E_LIR_REGNUM,
326 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
327 break;
328 case E_LAR_REGNUM:
329 regcache_raw_collect (regcache, E_LAR_REGNUM,
330 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
331 break;
332 case E_MDRQ_REGNUM:
333 regcache_raw_collect (regcache, E_MDRQ_REGNUM,
334 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
335 break;
336 case E_E0_REGNUM:
337 regcache_raw_collect (regcache, E_E0_REGNUM,
338 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
339 break;
340 case E_E1_REGNUM:
341 regcache_raw_collect (regcache, E_E1_REGNUM,
342 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
343 break;
344 case E_E2_REGNUM:
345 regcache_raw_collect (regcache, E_E2_REGNUM,
346 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
347 break;
348 case E_E3_REGNUM:
349 regcache_raw_collect (regcache, E_E3_REGNUM,
350 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
351 break;
352 case E_E4_REGNUM:
353 regcache_raw_collect (regcache, E_E4_REGNUM,
354 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
355 break;
356 case E_E5_REGNUM:
357 regcache_raw_collect (regcache, E_E5_REGNUM,
358 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
359 break;
360 case E_E6_REGNUM:
361 regcache_raw_collect (regcache, E_E6_REGNUM,
362 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
363 break;
364 case E_E7_REGNUM:
365 regcache_raw_collect (regcache, E_E7_REGNUM,
366 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
367 break;
368
369 /* ssp, msp, and usp are inaccessible. */
370 case E_E8_REGNUM:
371 /* The gregset struct has noplace to put this: do nothing. */
372 break;
373 case E_E9_REGNUM:
374 /* The gregset struct has noplace to put this: do nothing. */
375 break;
376 case E_E10_REGNUM:
377 /* The gregset struct has noplace to put this: do nothing. */
378 break;
379 case E_MCRH_REGNUM:
380 regcache_raw_collect (regcache, E_MCRH_REGNUM,
381 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
382 break;
383 case E_MCRL_REGNUM:
384 regcache_raw_collect (regcache, E_MCRL_REGNUM,
385 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
386 break;
387 case E_MCVF_REGNUM:
388 regcache_raw_collect (regcache, E_MCVF_REGNUM,
389 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
390 break;
391 case E_FPCR_REGNUM:
392 /* FPCR is numbered among the GP regs, but handled as an FP reg.
393 Do nothing. */
394 break;
395 case E_FPCR_REGNUM + 1:
396 /* The gregset struct has noplace to put this: do nothing. */
397 break;
398 case E_FPCR_REGNUM + 2:
399 /* The gregset struct has noplace to put this: do nothing. */
400 break;
401 default: /* An error, obviously, but should we error out? */
402 break;
403 case -1:
404 for (i = 0; i < MN10300_ELF_NGREG; i++)
405 am33_collect_gregset_method (regset, regcache, i, gregs, len);
406 break;
407 }
408 return;
409}
410
411/* Copy fp register values from regcache to regset. */
412
413static void
414am33_collect_fpregset_method (const struct regset *regset,
415 const struct regcache *regcache,
416 int regnum, void *fpregs, size_t len)
417{
19ba03f4 418 mn10300_elf_fpregset_t *fpregset = (mn10300_elf_fpregset_t *) fpregs;
611889b1 419
1528345d 420 gdb_assert (len >= sizeof (mn10300_elf_fpregset_t));
611889b1
KB		 421
422 if (regnum == -1)
423 {
424 int i;
425 for (i = 0; i < MN10300_ELF_NFPREG; i++)
426 am33_collect_fpregset_method (regset, regcache, E_FS0_REGNUM + i,
427 fpregs, len);
428 am33_collect_fpregset_method (regset, regcache,
429 E_FPCR_REGNUM, fpregs, len);
430 }
431 else if (regnum == E_FPCR_REGNUM)
9c9acae0 432 regcache_raw_collect (regcache, E_FPCR_REGNUM,
611889b1
KB		 433 &fpregset->fpcr);
434 else if (E_FS0_REGNUM <= regnum
435 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 436 regcache_raw_collect (regcache, regnum,
611889b1
KB		 437 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
438
439 return;
440}
441
24534243
AA		 442static const struct regset am33_gregset =
443 {
444 NULL, am33_supply_gregset_method, am33_collect_gregset_method
445 };
446
447static const struct regset am33_fpregset =
448 {
449 NULL, am33_supply_fpregset_method, am33_collect_fpregset_method
450 };
451
3636e608 452/* Iterate over core file register note sections. */
611889b1 453
3636e608
AA		 454static void
455am33_iterate_over_regset_sections (struct gdbarch *gdbarch,
456 iterate_over_regset_sections_cb *cb,
457 void *cb_data,
458 const struct regcache *regcache)
611889b1 459{
3636e608
AA		 460 cb (".reg", sizeof (mn10300_elf_gregset_t), &am33_gregset,
461 NULL, cb_data);
462 cb (".reg2", sizeof(mn10300_elf_fpregset_t), &am33_fpregset,
463 NULL, cb_data);
611889b1 464}
f9ec92b6
KB		 465\f
466static void
467am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 468 struct frame_info *this_frame,
f9ec92b6
KB		 469 struct trad_frame_cache *this_cache,
470 CORE_ADDR func);
471
472static const struct tramp_frame am33_linux_sigframe = {
473 SIGTRAMP_FRAME,
474 1,
475 {
476 /* mov 119,d0 */
477 { 0x2c, -1 },
478 { 0x77, -1 },
479 { 0x00, -1 },
480 /* syscall 0 */
481 { 0xf0, -1 },
482 { 0xe0, -1 },
483 { TRAMP_SENTINEL_INSN, -1 }
484 },
485 am33_linux_sigframe_cache_init
486};
487
488static const struct tramp_frame am33_linux_rt_sigframe = {
489 SIGTRAMP_FRAME,
490 1,
491 {
492 /* mov 173,d0 */
493 { 0x2c, -1 },
494 { 0xad, -1 },
495 { 0x00, -1 },
496 /* syscall 0 */
497 { 0xf0, -1 },
498 { 0xe0, -1 },
499 { TRAMP_SENTINEL_INSN, -1 }
500 },
501 am33_linux_sigframe_cache_init
502};
503
504/* Relevant struct definitions for signal handling...
505
506From arch/mn10300/kernel/sigframe.h:
507
508struct sigframe
509{
510 void (*pretcode)(void);
511 int sig;
e84605cd 512 struct sigcontext *psc;
f9ec92b6
KB		 513 struct sigcontext sc;
514 struct fpucontext fpuctx;
515 unsigned long extramask[_NSIG_WORDS-1];
516 char retcode[8];
517};
518
519struct rt_sigframe
520{
521 void (*pretcode)(void);
522 int sig;
523 struct siginfo *pinfo;
524 void *puc;
525 struct siginfo info;
526 struct ucontext uc;
527 struct fpucontext fpuctx;
528 char retcode[8];
529};
530
531From include/asm-mn10300/ucontext.h:
532
533struct ucontext {
534 unsigned long uc_flags;
535 struct ucontext *uc_link;
536 stack_t uc_stack;
537 struct sigcontext uc_mcontext;
538 sigset_t uc_sigmask;
539};
540
541From include/asm-mn10300/sigcontext.h:
542
543struct fpucontext {
544 unsigned long fs[32];
545 unsigned long fpcr;
546};
547
548struct sigcontext {
549 unsigned long d0;
550 unsigned long d1;
551 unsigned long d2;
552 unsigned long d3;
553 unsigned long a0;
554 unsigned long a1;
555 unsigned long a2;
556 unsigned long a3;
557 unsigned long e0;
558 unsigned long e1;
559 unsigned long e2;
560 unsigned long e3;
561 unsigned long e4;
562 unsigned long e5;
563 unsigned long e6;
564 unsigned long e7;
565 unsigned long lar;
566 unsigned long lir;
567 unsigned long mdr;
568 unsigned long mcvf;
569 unsigned long mcrl;
570 unsigned long mcrh;
571 unsigned long mdrq;
572 unsigned long sp;
573 unsigned long epsw;
574 unsigned long pc;
575 struct fpucontext *fpucontext;
576 unsigned long oldmask;
577}; */
578
579
580#define AM33_SIGCONTEXT_D0 0
581#define AM33_SIGCONTEXT_D1 4
582#define AM33_SIGCONTEXT_D2 8
583#define AM33_SIGCONTEXT_D3 12
584#define AM33_SIGCONTEXT_A0 16
585#define AM33_SIGCONTEXT_A1 20
586#define AM33_SIGCONTEXT_A2 24
587#define AM33_SIGCONTEXT_A3 28
588#define AM33_SIGCONTEXT_E0 32
589#define AM33_SIGCONTEXT_E1 36
590#define AM33_SIGCONTEXT_E2 40
591#define AM33_SIGCONTEXT_E3 44
592#define AM33_SIGCONTEXT_E4 48
593#define AM33_SIGCONTEXT_E5 52
594#define AM33_SIGCONTEXT_E6 56
595#define AM33_SIGCONTEXT_E7 60
596#define AM33_SIGCONTEXT_LAR 64
597#define AM33_SIGCONTEXT_LIR 68
598#define AM33_SIGCONTEXT_MDR 72
599#define AM33_SIGCONTEXT_MCVF 76
600#define AM33_SIGCONTEXT_MCRL 80
601#define AM33_SIGCONTEXT_MCRH 84
602#define AM33_SIGCONTEXT_MDRQ 88
603#define AM33_SIGCONTEXT_SP 92
604#define AM33_SIGCONTEXT_EPSW 96
605#define AM33_SIGCONTEXT_PC 100
606#define AM33_SIGCONTEXT_FPUCONTEXT 104
607
608
609static void
610am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 611 struct frame_info *this_frame,
f9ec92b6
KB		 612 struct trad_frame_cache *this_cache,
613 CORE_ADDR func)
614{
615 CORE_ADDR sc_base, fpubase;
616 int i;
611889b1 617
5366653e 618 sc_base = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
f9ec92b6
KB		 619 if (self == &am33_linux_sigframe)
620 {
621 sc_base += 8;
5366653e 622 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 623 }
624 else
625 {
626 sc_base += 12;
5366653e 627 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 628 sc_base += 20;
629 }
630
631 trad_frame_set_reg_addr (this_cache, E_D0_REGNUM,
632 sc_base + AM33_SIGCONTEXT_D0);
633 trad_frame_set_reg_addr (this_cache, E_D1_REGNUM,
634 sc_base + AM33_SIGCONTEXT_D1);
635 trad_frame_set_reg_addr (this_cache, E_D2_REGNUM,
636 sc_base + AM33_SIGCONTEXT_D2);
637 trad_frame_set_reg_addr (this_cache, E_D3_REGNUM,
638 sc_base + AM33_SIGCONTEXT_D3);
639
640 trad_frame_set_reg_addr (this_cache, E_A0_REGNUM,
641 sc_base + AM33_SIGCONTEXT_A0);
642 trad_frame_set_reg_addr (this_cache, E_A1_REGNUM,
643 sc_base + AM33_SIGCONTEXT_A1);
644 trad_frame_set_reg_addr (this_cache, E_A2_REGNUM,
645 sc_base + AM33_SIGCONTEXT_A2);
646 trad_frame_set_reg_addr (this_cache, E_A3_REGNUM,
647 sc_base + AM33_SIGCONTEXT_A3);
648
649 trad_frame_set_reg_addr (this_cache, E_E0_REGNUM,
650 sc_base + AM33_SIGCONTEXT_E0);
651 trad_frame_set_reg_addr (this_cache, E_E1_REGNUM,
652 sc_base + AM33_SIGCONTEXT_E1);
653 trad_frame_set_reg_addr (this_cache, E_E2_REGNUM,
654 sc_base + AM33_SIGCONTEXT_E2);
655 trad_frame_set_reg_addr (this_cache, E_E3_REGNUM,
656 sc_base + AM33_SIGCONTEXT_E3);
657 trad_frame_set_reg_addr (this_cache, E_E4_REGNUM,
658 sc_base + AM33_SIGCONTEXT_E4);
659 trad_frame_set_reg_addr (this_cache, E_E5_REGNUM,
660 sc_base + AM33_SIGCONTEXT_E5);
661 trad_frame_set_reg_addr (this_cache, E_E6_REGNUM,
662 sc_base + AM33_SIGCONTEXT_E6);
663 trad_frame_set_reg_addr (this_cache, E_E7_REGNUM,
664 sc_base + AM33_SIGCONTEXT_E7);
665
666 trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM,
667 sc_base + AM33_SIGCONTEXT_LAR);
668 trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM,
669 sc_base + AM33_SIGCONTEXT_LIR);
670 trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM,
671 sc_base + AM33_SIGCONTEXT_MDR);
672 trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM,
673 sc_base + AM33_SIGCONTEXT_MCVF);
674 trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM,
675 sc_base + AM33_SIGCONTEXT_MCRL);
676 trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM,
677 sc_base + AM33_SIGCONTEXT_MDRQ);
678
679 trad_frame_set_reg_addr (this_cache, E_SP_REGNUM,
680 sc_base + AM33_SIGCONTEXT_SP);
681 trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM,
682 sc_base + AM33_SIGCONTEXT_EPSW);
683 trad_frame_set_reg_addr (this_cache, E_PC_REGNUM,
684 sc_base + AM33_SIGCONTEXT_PC);
685
5366653e 686 fpubase = get_frame_memory_unsigned (this_frame,
025bb325
MS		 687 sc_base + AM33_SIGCONTEXT_FPUCONTEXT,
688 4);
f9ec92b6
KB		 689 if (fpubase)
690 {
691 for (i = 0; i < 32; i++)
692 {
693 trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i,
694 fpubase + 4 * i);
695 }
696 trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32);
697 }
698
699 trad_frame_set_id (this_cache, frame_id_build (sc_base, func));
700}
701\f
155bd5d1 702/* AM33 GNU/Linux osabi has been recognized.
611889b1
KB		 703 Now's our chance to register our corefile handling. */
704
705static void
a5ee0f0c 706am33_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
611889b1 707{
a5ee0f0c
PA		 708 linux_init_abi (info, gdbarch);
709
3636e608
AA		 710 set_gdbarch_iterate_over_regset_sections
711 (gdbarch, am33_iterate_over_regset_sections);
696cc4a6 712 set_solib_svr4_fetch_link_map_offsets
cf1f553f 713 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
f9ec92b6
KB		 714
715 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe);
716 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe);
611889b1
KB		 717}
718
719void
720_initialize_mn10300_linux_tdep (void)
721{
722 gdbarch_register_osabi (bfd_arch_mn10300, 0,
723 GDB_OSABI_LINUX, am33_linux_init_osabi);
724}
725
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