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755892d6 RP |
1 | /* Caching code. Typically used by remote back ends for |
2 | caching remote memory. | |
3 | ||
24418cfb | 4 | Copyright 1992, 1993, 1995, 1998 Free Software Foundation, Inc. |
755892d6 | 5 | |
45993f61 | 6 | This file is part of GDB. |
755892d6 | 7 | |
45993f61 SC |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
755892d6 | 12 | |
45993f61 SC |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
755892d6 | 17 | |
45993f61 SC |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
6c9638b4 | 20 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
755892d6 RP |
21 | |
22 | #include "defs.h" | |
23 | #include "dcache.h" | |
d538b510 | 24 | #include "gdbcmd.h" |
2b576293 | 25 | #include "gdb_string.h" |
b607efe7 | 26 | #include "gdbcore.h" |
92c6bf4d | 27 | |
45993f61 SC |
28 | /* |
29 | The data cache could lead to incorrect results because it doesn't know | |
30 | about volatile variables, thus making it impossible to debug | |
31 | functions which use memory mapped I/O devices. | |
677653a0 | 32 | |
45993f61 | 33 | set remotecache 0 |
755892d6 | 34 | |
45993f61 SC |
35 | In those cases. |
36 | ||
37 | In general the dcache speeds up performance, some speed improvement | |
38 | comes from the actual caching mechanism, but the major gain is in | |
39 | the reduction of the remote protocol overhead; instead of reading | |
40 | or writing a large area of memory in 4 byte requests, the cache | |
41 | bundles up the requests into 32 byte (actually LINE_SIZE) chunks. | |
42 | Reducing the overhead to an eighth of what it was. This is very | |
43 | obvious when displaying a large amount of data, | |
44 | ||
45 | eg, x/200x 0 | |
46 | ||
47 | caching | no yes | |
48 | ---------------------------- | |
49 | first time | 4 sec 2 sec improvement due to chunking | |
50 | second time | 4 sec 0 sec improvement due to caching | |
51 | ||
52 | The cache structure is unusual, we keep a number of cache blocks | |
53 | (DCACHE_SIZE) and each one caches a LINE_SIZEed area of memory. | |
54 | Within each line we remember the address of the line (always a | |
55 | multiple of the LINE_SIZE) and a vector of bytes over the range. | |
56 | There's another vector which contains the state of the bytes. | |
57 | ||
58 | ENTRY_BAD means that the byte is just plain wrong, and has no | |
59 | correspondence with anything else (as it would when the cache is | |
60 | turned on, but nothing has been done to it. | |
61 | ||
62 | ENTRY_DIRTY means that the byte has some data in it which should be | |
63 | written out to the remote target one day, but contains correct | |
64 | data. ENTRY_OK means that the data is the same in the cache as it | |
65 | is in remote memory. | |
66 | ||
67 | ||
68 | The ENTRY_DIRTY state is necessary because GDB likes to write large | |
69 | lumps of memory in small bits. If the caching mechanism didn't | |
70 | maintain the DIRTY information, then something like a two byte | |
71 | write would mean that the entire cache line would have to be read, | |
72 | the two bytes modified and then written out again. The alternative | |
73 | would be to not read in the cache line in the first place, and just | |
74 | write the two bytes directly into target memory. The trouble with | |
75 | that is that it really nails performance, because of the remote | |
76 | protocol overhead. This way, all those little writes are bundled | |
77 | up into an entire cache line write in one go, without having to | |
78 | read the cache line in the first place. | |
79 | ||
80 | ||
81 | */ | |
82 | ||
83 | ||
84 | /* This value regulates the number of cache blocks stored. | |
85 | Smaller values reduce the time spent searching for a cache | |
86 | line, and reduce memory requirements, but increase the risk | |
87 | of a line not being in memory */ | |
88 | ||
89 | #define DCACHE_SIZE 64 | |
90 | ||
91 | /* This value regulates the size of a cache line. Smaller values | |
92 | reduce the time taken to read a single byte, but reduce overall | |
93 | throughput. */ | |
94 | ||
95 | #define LINE_SIZE_POWER (5) | |
96 | #define LINE_SIZE (1 << LINE_SIZE_POWER) | |
97 | ||
98 | /* Each cache block holds LINE_SIZE bytes of data | |
9e58280a | 99 | starting at a multiple-of-LINE_SIZE address. */ |
755892d6 | 100 | |
45993f61 SC |
101 | #define LINE_SIZE_MASK ((LINE_SIZE - 1)) |
102 | #define XFORM(x) ((x) & LINE_SIZE_MASK) | |
103 | #define MASK(x) ((x) & ~LINE_SIZE_MASK) | |
104 | ||
105 | ||
106 | #define ENTRY_BAD 0 /* data at this byte is wrong */ | |
107 | #define ENTRY_DIRTY 1 /* data at this byte needs to be written back */ | |
108 | #define ENTRY_OK 2 /* data at this byte is same as in memory */ | |
109 | ||
110 | ||
111 | struct dcache_block | |
112 | { | |
113 | struct dcache_block *p; /* next in list */ | |
9391c997 | 114 | CORE_ADDR addr; /* Address for which data is recorded. */ |
6b14af2b | 115 | char data[LINE_SIZE]; /* bytes at given address */ |
45993f61 SC |
116 | unsigned char state[LINE_SIZE]; /* what state the data is in */ |
117 | ||
118 | /* whether anything in state is dirty - used to speed up the | |
119 | dirty scan. */ | |
120 | int anydirty; | |
121 | ||
122 | int refs; | |
123 | }; | |
124 | ||
125 | ||
126 | struct dcache_struct | |
127 | { | |
128 | /* Function to actually read the target memory. */ | |
129 | memxferfunc read_memory; | |
130 | ||
131 | /* Function to actually write the target memory */ | |
132 | memxferfunc write_memory; | |
133 | ||
134 | /* free list */ | |
135 | struct dcache_block *free_head; | |
136 | struct dcache_block *free_tail; | |
137 | ||
138 | /* in use list */ | |
139 | struct dcache_block *valid_head; | |
140 | struct dcache_block *valid_tail; | |
141 | ||
142 | /* The cache itself. */ | |
143 | struct dcache_block *the_cache; | |
144 | ||
145 | /* potentially, if the cache was enabled, and then turned off, and | |
146 | then turned on again, the stuff in it could be stale, so this is | |
147 | used to mark it */ | |
148 | int cache_has_stuff; | |
149 | } ; | |
150 | ||
24418cfb JM |
151 | static int dcache_poke_byte PARAMS ((DCACHE *dcache, CORE_ADDR addr, |
152 | char *ptr)); | |
a243a22f | 153 | |
24418cfb JM |
154 | static int dcache_peek_byte PARAMS ((DCACHE *dcache, CORE_ADDR addr, |
155 | char *ptr)); | |
a243a22f | 156 | |
24418cfb JM |
157 | static struct dcache_block *dcache_hit PARAMS ((DCACHE *dcache, |
158 | CORE_ADDR addr)); | |
a243a22f SG |
159 | |
160 | static int dcache_write_line PARAMS ((DCACHE *dcache,struct dcache_block *db)); | |
161 | ||
162 | static struct dcache_block *dcache_alloc PARAMS ((DCACHE *dcache)); | |
163 | ||
164 | static int dcache_writeback PARAMS ((DCACHE *dcache)); | |
165 | ||
166 | static void dcache_info PARAMS ((char *exp, int tty)); | |
167 | ||
24418cfb JM |
168 | void _initialize_dcache PARAMS ((void)); |
169 | ||
4930f0a7 | 170 | int remote_dcache = 0; |
45993f61 SC |
171 | |
172 | DCACHE *last_cache; /* Used by info dcache */ | |
173 | ||
174 | ||
755892d6 | 175 | /* Free all the data cache blocks, thus discarding all cached data. */ |
45993f61 | 176 | |
755892d6 RP |
177 | void |
178 | dcache_flush (dcache) | |
179 | DCACHE *dcache; | |
180 | { | |
45993f61 SC |
181 | int i; |
182 | dcache->valid_head = 0; | |
183 | dcache->valid_tail = 0; | |
184 | ||
185 | dcache->free_head = 0; | |
186 | dcache->free_tail = 0; | |
187 | ||
188 | for (i = 0; i < DCACHE_SIZE; i++) | |
189 | { | |
190 | struct dcache_block *db = dcache->the_cache + i; | |
191 | ||
192 | if (!dcache->free_head) | |
193 | dcache->free_head = db; | |
194 | else | |
195 | dcache->free_tail->p = db; | |
196 | dcache->free_tail = db; | |
197 | db->p = 0; | |
198 | } | |
755892d6 | 199 | |
45993f61 | 200 | dcache->cache_has_stuff = 0; |
d538b510 RP |
201 | |
202 | return; | |
755892d6 RP |
203 | } |
204 | ||
45993f61 SC |
205 | /* If addr is present in the dcache, return the address of the block |
206 | containing it. */ | |
a243a22f SG |
207 | |
208 | static struct dcache_block * | |
755892d6 RP |
209 | dcache_hit (dcache, addr) |
210 | DCACHE *dcache; | |
9391c997 | 211 | CORE_ADDR addr; |
755892d6 RP |
212 | { |
213 | register struct dcache_block *db; | |
214 | ||
755892d6 | 215 | /* Search all cache blocks for one that is at this address. */ |
45993f61 SC |
216 | db = dcache->valid_head; |
217 | ||
218 | while (db) | |
755892d6 | 219 | { |
45993f61 SC |
220 | if (MASK(addr) == db->addr) |
221 | { | |
222 | db->refs++; | |
223 | return db; | |
224 | } | |
225 | db = db->p; | |
755892d6 | 226 | } |
d538b510 | 227 | |
755892d6 RP |
228 | return NULL; |
229 | } | |
230 | ||
45993f61 SC |
231 | /* Make sure that anything in this line which needs to |
232 | be written is. */ | |
233 | ||
234 | static int | |
235 | dcache_write_line (dcache, db) | |
236 | DCACHE *dcache; | |
237 | register struct dcache_block *db; | |
755892d6 | 238 | { |
45993f61 SC |
239 | int s; |
240 | int e; | |
241 | s = 0; | |
242 | if (db->anydirty) | |
243 | { | |
244 | for (s = 0; s < LINE_SIZE; s++) | |
245 | { | |
246 | if (db->state[s] == ENTRY_DIRTY) | |
247 | { | |
248 | int len = 0; | |
249 | for (e = s ; e < LINE_SIZE; e++, len++) | |
250 | if (db->state[e] != ENTRY_DIRTY) | |
69c626a9 SC |
251 | break; |
252 | { | |
253 | /* all bytes from s..s+len-1 need to | |
254 | be written out */ | |
255 | int done = 0; | |
256 | while (done < len) { | |
257 | int t = dcache->write_memory (db->addr + s + done, | |
258 | db->data + s + done, | |
259 | len - done); | |
260 | if (t == 0) | |
261 | return 0; | |
262 | done += t; | |
263 | } | |
264 | memset (db->state + s, ENTRY_OK, len); | |
265 | s = e; | |
266 | } | |
45993f61 SC |
267 | } |
268 | } | |
269 | db->anydirty = 0; | |
270 | } | |
271 | return 1; | |
755892d6 RP |
272 | } |
273 | ||
45993f61 | 274 | |
755892d6 RP |
275 | /* Get a free cache block, put or keep it on the valid list, |
276 | and return its address. The caller should store into the block | |
277 | the address and data that it describes, then remque it from the | |
278 | free list and insert it into the valid list. This procedure | |
9e58280a RP |
279 | prevents errors from creeping in if a memory retrieval is |
280 | interrupted (which used to put garbage blocks in the valid | |
281 | list...). */ | |
a243a22f SG |
282 | |
283 | static struct dcache_block * | |
755892d6 RP |
284 | dcache_alloc (dcache) |
285 | DCACHE *dcache; | |
286 | { | |
287 | register struct dcache_block *db; | |
288 | ||
d538b510 | 289 | if (remote_dcache == 0) |
45993f61 | 290 | abort (); |
d538b510 | 291 | |
45993f61 | 292 | /* Take something from the free list */ |
6b14af2b FF |
293 | db = dcache->free_head; |
294 | if (db) | |
755892d6 | 295 | { |
45993f61 SC |
296 | dcache->free_head = db->p; |
297 | } | |
6b14af2b | 298 | else |
45993f61 | 299 | { |
6b14af2b | 300 | /* Nothing left on free list, so grab one from the valid list */ |
45993f61 SC |
301 | db = dcache->valid_head; |
302 | dcache->valid_head = db->p; | |
303 | ||
304 | dcache_write_line (dcache, db); | |
755892d6 RP |
305 | } |
306 | ||
45993f61 SC |
307 | /* append this line to end of valid list */ |
308 | if (!dcache->valid_head) | |
309 | dcache->valid_head = db; | |
310 | else | |
311 | dcache->valid_tail->p = db; | |
312 | dcache->valid_tail = db; | |
313 | db->p = 0; | |
314 | ||
315 | return db; | |
755892d6 RP |
316 | } |
317 | ||
45993f61 SC |
318 | /* Using the data cache DCACHE return the contents of the byte at |
319 | address ADDR in the remote machine. | |
320 | ||
321 | Returns 0 on error. */ | |
322 | ||
a243a22f | 323 | static int |
45993f61 | 324 | dcache_peek_byte (dcache, addr, ptr) |
755892d6 RP |
325 | DCACHE *dcache; |
326 | CORE_ADDR addr; | |
6b14af2b | 327 | char *ptr; |
755892d6 | 328 | { |
45993f61 SC |
329 | register struct dcache_block *db = dcache_hit (dcache, addr); |
330 | int ok=1; | |
331 | int done = 0; | |
332 | if (db == 0 | |
333 | || db->state[XFORM (addr)] == ENTRY_BAD) | |
755892d6 | 334 | { |
45993f61 SC |
335 | if (db) |
336 | { | |
337 | dcache_write_line (dcache, db); | |
338 | } | |
339 | else | |
755892d6 RP |
340 | db = dcache_alloc (dcache); |
341 | immediate_quit++; | |
9391c997 | 342 | db->addr = MASK (addr); |
45993f61 SC |
343 | while (done < LINE_SIZE) |
344 | { | |
345 | int try = | |
346 | (*dcache->read_memory) | |
347 | (db->addr + done, | |
6b14af2b | 348 | db->data + done, |
45993f61 SC |
349 | LINE_SIZE - done); |
350 | if (try == 0) | |
351 | return 0; | |
352 | done += try; | |
353 | } | |
755892d6 | 354 | immediate_quit--; |
45993f61 SC |
355 | |
356 | memset (db->state, ENTRY_OK, sizeof (db->data)); | |
357 | db->anydirty = 0; | |
755892d6 | 358 | } |
45993f61 SC |
359 | *ptr = db->data[XFORM (addr)]; |
360 | return ok; | |
755892d6 RP |
361 | } |
362 | ||
45993f61 SC |
363 | /* Writeback any dirty lines to the remote. */ |
364 | static int | |
365 | dcache_writeback (dcache) | |
366 | DCACHE *dcache; | |
367 | { | |
368 | struct dcache_block *db; | |
369 | ||
370 | db = dcache->valid_head; | |
371 | ||
372 | while (db) | |
d538b510 | 373 | { |
45993f61 SC |
374 | if (!dcache_write_line (dcache, db)) |
375 | return 0; | |
376 | db = db->p; | |
d538b510 | 377 | } |
45993f61 SC |
378 | return 1; |
379 | } | |
d538b510 | 380 | |
45993f61 SC |
381 | |
382 | /* Using the data cache DCACHE return the contents of the word at | |
383 | address ADDR in the remote machine. */ | |
384 | int | |
385 | dcache_fetch (dcache, addr) | |
386 | DCACHE *dcache; | |
387 | CORE_ADDR addr; | |
388 | { | |
389 | int res; | |
a243a22f SG |
390 | |
391 | if (dcache_xfer_memory (dcache, addr, (char *)&res, sizeof res, 0) != sizeof res) | |
392 | memory_error (EIO, addr); | |
393 | ||
45993f61 SC |
394 | return res; |
395 | } | |
396 | ||
397 | ||
398 | /* Write the byte at PTR into ADDR in the data cache. | |
399 | Return zero on write error. | |
400 | */ | |
401 | ||
a243a22f | 402 | static int |
45993f61 SC |
403 | dcache_poke_byte (dcache, addr, ptr) |
404 | DCACHE *dcache; | |
405 | CORE_ADDR addr; | |
406 | char *ptr; | |
407 | { | |
408 | register struct dcache_block *db = dcache_hit (dcache, addr); | |
409 | ||
410 | if (!db) | |
755892d6 RP |
411 | { |
412 | db = dcache_alloc (dcache); | |
45993f61 SC |
413 | db->addr = MASK (addr); |
414 | memset (db->state, ENTRY_BAD, sizeof (db->data)); | |
755892d6 RP |
415 | } |
416 | ||
45993f61 SC |
417 | db->data[XFORM (addr)] = *ptr; |
418 | db->state[XFORM (addr)] = ENTRY_DIRTY; | |
419 | db->anydirty = 1; | |
420 | return 1; | |
421 | } | |
755892d6 | 422 | |
45993f61 SC |
423 | /* Write the word at ADDR both in the data cache and in the remote machine. |
424 | Return zero on write error. | |
425 | */ | |
426 | ||
427 | int | |
428 | dcache_poke (dcache, addr, data) | |
429 | DCACHE *dcache; | |
430 | CORE_ADDR addr; | |
431 | int data; | |
432 | { | |
a243a22f SG |
433 | if (dcache_xfer_memory (dcache, addr, (char *)&data, sizeof data, 1) != sizeof data) |
434 | return 0; | |
435 | ||
436 | return dcache_writeback (dcache); | |
755892d6 RP |
437 | } |
438 | ||
45993f61 | 439 | |
755892d6 RP |
440 | /* Initialize the data cache. */ |
441 | DCACHE * | |
442 | dcache_init (reading, writing) | |
443 | memxferfunc reading; | |
444 | memxferfunc writing; | |
445 | { | |
45993f61 | 446 | int csize = sizeof (struct dcache_block) * DCACHE_SIZE; |
755892d6 RP |
447 | DCACHE *dcache; |
448 | ||
ac7a377f | 449 | dcache = (DCACHE *) xmalloc (sizeof (*dcache)); |
755892d6 RP |
450 | dcache->read_memory = reading; |
451 | dcache->write_memory = writing; | |
755892d6 | 452 | |
45993f61 SC |
453 | dcache->the_cache = (struct dcache_block *) xmalloc (csize); |
454 | memset (dcache->the_cache, 0, csize); | |
455 | ||
456 | dcache_flush (dcache); | |
457 | ||
458 | last_cache = dcache; | |
459 | return dcache; | |
460 | } | |
461 | ||
462 | /* Read or write LEN bytes from inferior memory at MEMADDR, transferring | |
463 | to or from debugger address MYADDR. Write to inferior if SHOULD_WRITE is | |
464 | nonzero. | |
465 | ||
466 | Returns length of data written or read; 0 for error. | |
467 | ||
468 | This routine is indended to be called by remote_xfer_ functions. */ | |
469 | ||
470 | int | |
471 | dcache_xfer_memory (dcache, memaddr, myaddr, len, should_write) | |
472 | DCACHE *dcache; | |
473 | CORE_ADDR memaddr; | |
474 | char *myaddr; | |
475 | int len; | |
476 | int should_write; | |
477 | { | |
478 | int i; | |
479 | ||
480 | if (remote_dcache) | |
481 | { | |
b607efe7 FF |
482 | int (*xfunc) PARAMS ((DCACHE *dcache, CORE_ADDR addr, char *ptr)); |
483 | xfunc = should_write ? dcache_poke_byte : dcache_peek_byte; | |
45993f61 SC |
484 | |
485 | for (i = 0; i < len; i++) | |
486 | { | |
487 | if (!xfunc (dcache, memaddr + i, myaddr + i)) | |
488 | return 0; | |
489 | } | |
490 | dcache->cache_has_stuff = 1; | |
491 | dcache_writeback (dcache); | |
492 | } | |
493 | else | |
494 | { | |
b607efe7 FF |
495 | memxferfunc xfunc; |
496 | xfunc = should_write ? dcache->write_memory : dcache->read_memory; | |
45993f61 SC |
497 | |
498 | if (dcache->cache_has_stuff) | |
499 | dcache_flush (dcache); | |
755892d6 | 500 | |
45993f61 SC |
501 | len = xfunc (memaddr, myaddr, len); |
502 | } | |
503 | return len; | |
504 | } | |
505 | ||
506 | static void | |
507 | dcache_info (exp, tty) | |
508 | char *exp; | |
509 | int tty; | |
510 | { | |
511 | struct dcache_block *p; | |
512 | ||
513 | if (!remote_dcache) | |
514 | { | |
515 | printf_filtered ("Dcache not enabled\n"); | |
516 | return; | |
517 | } | |
518 | printf_filtered ("Dcache enabled, line width %d, depth %d\n", | |
519 | LINE_SIZE, DCACHE_SIZE); | |
520 | ||
521 | printf_filtered ("Cache state:\n"); | |
522 | ||
523 | for (p = last_cache->valid_head; p; p = p->p) | |
524 | { | |
525 | int j; | |
526 | printf_filtered ("Line at %08xd, referenced %d times\n", | |
527 | p->addr, p->refs); | |
528 | ||
529 | for (j = 0; j < LINE_SIZE; j++) | |
6b14af2b | 530 | printf_filtered ("%02x", p->data[j] & 0xFF); |
45993f61 SC |
531 | printf_filtered ("\n"); |
532 | ||
533 | for (j = 0; j < LINE_SIZE; j++) | |
6b14af2b | 534 | printf_filtered (" %2x", p->state[j]); |
45993f61 SC |
535 | printf_filtered ("\n"); |
536 | } | |
755892d6 RP |
537 | } |
538 | ||
d538b510 | 539 | void |
45993f61 | 540 | _initialize_dcache () |
d538b510 RP |
541 | { |
542 | add_show_from_set | |
543 | (add_set_cmd ("remotecache", class_support, var_boolean, | |
544 | (char *) &remote_dcache, | |
545 | "\ | |
546 | Set cache use for remote targets.\n\ | |
547 | When on, use data caching for remote targets. For many remote targets\n\ | |
548 | this option can offer better throughput for reading target memory.\n\ | |
549 | Unfortunately, gdb does not currently know anything about volatile\n\ | |
550 | registers and thus data caching will produce incorrect results with\n\ | |
45993f61 | 551 | volatile registers are in use. By default, this option is on.", |
d538b510 RP |
552 | &setlist), |
553 | &showlist); | |
45993f61 SC |
554 | |
555 | add_info ("dcache", dcache_info, | |
556 | "Print information on the dcache performance."); | |
557 | ||
d538b510 | 558 | } |