]> Git Repo - binutils.git/blame - include/opcode/avr.h
* config/tc-avr.c: Use PARAMS macro in function declarations.
[binutils.git] / include / opcode / avr.h
CommitLineData
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1/* Opcode table for the Atmel AVR micro controllers.
2
3 Copyright 2000 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <[email protected]>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#define AVR_ISA_1200 0x0001 /* in the beginning there was ... */
21#define AVR_ISA_LPM 0x0002 /* device has LPM */
22#define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */
23#define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
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24#define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP and CALL
25 supported, no 8K wrap on RJMP and RCALL) */
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26#define AVR_ISA_MUL 0x0040 /* device has new core (MUL, MOVW, ...) */
27#define AVR_ISA_ELPM 0x0080 /* device has >64K program memory (ELPM) */
28#define AVR_ISA_ELPMX 0x0100 /* device has ELPM Rd,Z[+] (none yet) */
65aa24b6 29#define AVR_ISA_SPM 0x0200 /* device can program itself */
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30#define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */
31
32#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
33#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
65aa24b6 34#define AVR_ISA_M83 (AVR_ISA_2xxx | AVR_ISA_MUL | AVR_ISA_LPMX | AVR_ISA_SPM)
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35#define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA)
36#define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM)
37#define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_LPMX | AVR_ISA_SPM)
38#define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_LPMX)
39
40#define AVR_ISA_ALL 0xFFFF
41
42#define REGISTER_P(x) ((x) == 'r' \
43 || (x) == 'd' \
44 || (x) == 'w' \
45 || (x) == 'a' \
46 || (x) == 'v')
47
48/* constraint letters
49 r - any register
50 d - `ldi' register (r16-r31)
51 v - `movw' even register (r0, r2, ..., r28, r30)
52 a - `fmul' register (r16-r23)
53 w - `adiw' register (r24,r26,r28,r30)
54 e - pointer registers (X,Y,Z)
55 b - base pointer register and displacement ([YZ]+disp)
56 z - Z pointer register (for [e]lpm Rd,Z[+])
57 M - immediate value from 0 to 255
58 n - immediate value from 0 to 255 ( n = ~M ). Relocation impossible
59 s - immediate value from 0 to 7
60 P - Port address value from 0 to 64. (in, out)
61 p - Port address value from 0 to 32. (cbi, sbi, sbic, sbis)
62 K - immediate value from 0 to 64 (used in `adiw', `sbiw')
63 i - immediate value
64 l - signed pc relative offset from -64 to 63
65 L - signed pc relative offset from -2048 to 2047
66 h - absolut code address (call, jmp)
67 S - immediate value from 0 to 7 (S = s << 4)
68 ? - use this opcode entry if no parameters, else use next opcode entry
69*/
70
71AVR_INSN (clc, "", "1001010010001000", 1, AVR_ISA_1200, 0x9488)
72AVR_INSN (clh, "", "1001010011011000", 1, AVR_ISA_1200, 0x94d8)
73AVR_INSN (cli, "", "1001010011111000", 1, AVR_ISA_1200, 0x94f8)
74AVR_INSN (cln, "", "1001010010101000", 1, AVR_ISA_1200, 0x94a8)
75AVR_INSN (cls, "", "1001010011001000", 1, AVR_ISA_1200, 0x94c8)
76AVR_INSN (clt, "", "1001010011101000", 1, AVR_ISA_1200, 0x94e8)
77AVR_INSN (clv, "", "1001010010111000", 1, AVR_ISA_1200, 0x94b8)
78AVR_INSN (clz, "", "1001010010011000", 1, AVR_ISA_1200, 0x9498)
79AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509)
80AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409)
81AVR_INSN (lpm, "?", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8)
82AVR_INSN (lpm, "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004)
83AVR_INSN (elpm, "?", "1001010111011000", 1, AVR_ISA_ELPM, 0x95d8)
84AVR_INSN (elpm, "r,z", "1001000ddddd011+", 1, AVR_ISA_ELPMX,0x9006)
85AVR_INSN (nop, "", "0000000000000000", 1, AVR_ISA_1200, 0x0000)
86AVR_INSN (ret, "", "1001010100001000", 1, AVR_ISA_1200, 0x9508)
87AVR_INSN (reti, "", "1001010100011000", 1, AVR_ISA_1200, 0x9518)
88AVR_INSN (sec, "", "1001010000001000", 1, AVR_ISA_1200, 0x9408)
89AVR_INSN (seh, "", "1001010001011000", 1, AVR_ISA_1200, 0x9458)
90AVR_INSN (sei, "", "1001010001111000", 1, AVR_ISA_1200, 0x9478)
91AVR_INSN (sen, "", "1001010000101000", 1, AVR_ISA_1200, 0x9428)
92AVR_INSN (ses, "", "1001010001001000", 1, AVR_ISA_1200, 0x9448)
93AVR_INSN (set, "", "1001010001101000", 1, AVR_ISA_1200, 0x9468)
94AVR_INSN (sev, "", "1001010000111000", 1, AVR_ISA_1200, 0x9438)
95AVR_INSN (sez, "", "1001010000011000", 1, AVR_ISA_1200, 0x9418)
96AVR_INSN (sleep,"", "1001010110001000", 1, AVR_ISA_1200, 0x9588)
97AVR_INSN (wdr, "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8)
98AVR_INSN (spm, "", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
99
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100AVR_INSN (adc, "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
101AVR_INSN (add, "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
102AVR_INSN (and, "r,r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
103AVR_INSN (cp, "r,r", "000101rdddddrrrr", 1, AVR_ISA_1200, 0x1400)
104AVR_INSN (cpc, "r,r", "000001rdddddrrrr", 1, AVR_ISA_1200, 0x0400)
105AVR_INSN (cpse, "r,r", "000100rdddddrrrr", 1, AVR_ISA_1200, 0x1000)
106AVR_INSN (eor, "r,r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
107AVR_INSN (mov, "r,r", "001011rdddddrrrr", 1, AVR_ISA_1200, 0x2c00)
108AVR_INSN (mul, "r,r", "100111rdddddrrrr", 1, AVR_ISA_MUL, 0x9c00)
109AVR_INSN (or, "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800)
110AVR_INSN (sbc, "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800)
111AVR_INSN (sub, "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800)
112
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113AVR_INSN (clr, "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
114AVR_INSN (lsl, "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
115AVR_INSN (rol, "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
116AVR_INSN (tst, "r=r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
117
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118AVR_INSN (andi, "d,M", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
119 /*XXX special case*/
120AVR_INSN (cbr, "d,n", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
121AVR_INSN (cpi, "d,M", "0011KKKKddddKKKK", 1, AVR_ISA_1200, 0x3000)
122AVR_INSN (ldi, "d,M", "1110KKKKddddKKKK", 1, AVR_ISA_1200, 0xe000)
123AVR_INSN (ori, "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000)
124AVR_INSN (sbci, "d,M", "0100KKKKddddKKKK", 1, AVR_ISA_1200, 0x4000)
125AVR_INSN (sbr, "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000)
126AVR_INSN (subi, "d,M", "0101KKKKddddKKKK", 1, AVR_ISA_1200, 0x5000)
127
128AVR_INSN (sbrc, "r,s", "1111110rrrrr0sss", 1, AVR_ISA_1200, 0xfc00)
129AVR_INSN (sbrs, "r,s", "1111111rrrrr0sss", 1, AVR_ISA_1200, 0xfe00)
130AVR_INSN (bld, "r,s", "1111100ddddd0sss", 1, AVR_ISA_1200, 0xf800)
131AVR_INSN (bst, "r,s", "1111101ddddd0sss", 1, AVR_ISA_1200, 0xfa00)
132
133AVR_INSN (in, "r,P", "10110PPdddddPPPP", 1, AVR_ISA_1200, 0xb000)
134AVR_INSN (out, "P,r", "10111PPrrrrrPPPP", 1, AVR_ISA_1200, 0xb800)
135
136AVR_INSN (adiw, "w,K", "10010110KKddKKKK", 1, AVR_ISA_2xxx, 0x9600)
137AVR_INSN (sbiw, "w,K", "10010111KKddKKKK", 1, AVR_ISA_2xxx, 0x9700)
138
139AVR_INSN (cbi, "p,s", "10011000pppppsss", 1, AVR_ISA_1200, 0x9800)
140AVR_INSN (sbi, "p,s", "10011010pppppsss", 1, AVR_ISA_1200, 0x9a00)
141AVR_INSN (sbic, "p,s", "10011001pppppsss", 1, AVR_ISA_1200, 0x9900)
142AVR_INSN (sbis, "p,s", "10011011pppppsss", 1, AVR_ISA_1200, 0x9b00)
143
144AVR_INSN (brcc, "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400)
145AVR_INSN (brcs, "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000)
146AVR_INSN (breq, "l", "111100lllllll001", 1, AVR_ISA_1200, 0xf001)
147AVR_INSN (brge, "l", "111101lllllll100", 1, AVR_ISA_1200, 0xf404)
148AVR_INSN (brhc, "l", "111101lllllll101", 1, AVR_ISA_1200, 0xf405)
149AVR_INSN (brhs, "l", "111100lllllll101", 1, AVR_ISA_1200, 0xf005)
150AVR_INSN (brid, "l", "111101lllllll111", 1, AVR_ISA_1200, 0xf407)
151AVR_INSN (brie, "l", "111100lllllll111", 1, AVR_ISA_1200, 0xf007)
152AVR_INSN (brlo, "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000)
153AVR_INSN (brlt, "l", "111100lllllll100", 1, AVR_ISA_1200, 0xf004)
154AVR_INSN (brmi, "l", "111100lllllll010", 1, AVR_ISA_1200, 0xf002)
155AVR_INSN (brne, "l", "111101lllllll001", 1, AVR_ISA_1200, 0xf401)
156AVR_INSN (brpl, "l", "111101lllllll010", 1, AVR_ISA_1200, 0xf402)
157AVR_INSN (brsh, "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400)
158AVR_INSN (brtc, "l", "111101lllllll110", 1, AVR_ISA_1200, 0xf406)
159AVR_INSN (brts, "l", "111100lllllll110", 1, AVR_ISA_1200, 0xf006)
160AVR_INSN (brvc, "l", "111101lllllll011", 1, AVR_ISA_1200, 0xf403)
161AVR_INSN (brvs, "l", "111100lllllll011", 1, AVR_ISA_1200, 0xf003)
162
163AVR_INSN (brbc, "s,l", "111101lllllllsss", 1, AVR_ISA_1200, 0xf400)
164AVR_INSN (brbs, "s,l", "111100lllllllsss", 1, AVR_ISA_1200, 0xf000)
165
166AVR_INSN (rcall, "L", "1101LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xd000)
167AVR_INSN (rjmp, "L", "1100LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xc000)
168
169AVR_INSN (call, "h", "1001010hhhhh111h", 2, AVR_ISA_MEGA, 0x940e)
170AVR_INSN (jmp, "h", "1001010hhhhh110h", 2, AVR_ISA_MEGA, 0x940c)
171
172AVR_INSN (asr, "r", "1001010rrrrr0101", 1, AVR_ISA_1200, 0x9405)
173AVR_INSN (com, "r", "1001010rrrrr0000", 1, AVR_ISA_1200, 0x9400)
174AVR_INSN (dec, "r", "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a)
175AVR_INSN (inc, "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403)
176AVR_INSN (lsr, "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406)
177AVR_INSN (neg, "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401)
178AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f)
179AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f)
180AVR_INSN (ror, "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407)
181AVR_INSN (ser, "d", "11101111dddd1111", 1, AVR_ISA_1200, 0xef0f)
182AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402)
183
184AVR_INSN (bclr, "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488)
185AVR_INSN (bset, "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408)
186
187AVR_INSN (movw, "v,v", "00000001ddddrrrr", 1, AVR_ISA_MUL, 0x0100)
188AVR_INSN (muls, "d,d", "00000010ddddrrrr", 1, AVR_ISA_MUL, 0x0200)
189AVR_INSN (mulsu,"a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL, 0x0300)
190AVR_INSN (fmul, "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL, 0x0308)
191AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380)
192AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388)
65aa24b6 193
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194AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200)
195AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000)
196AVR_INSN (ldd, "r,b", "10o0oo0dddddbooo", 1, AVR_ISA_2xxx, 0x8000)
197AVR_INSN (std, "b,r", "10o0oo1rrrrrbooo", 1, AVR_ISA_2xxx, 0x8200)
198 /* ee = {X=11,Y=10,Z=00, 0) */
199AVR_INSN (ld, "r,e", "100!000dddddee-+", 1, AVR_ISA_1200, 0x8000)
200AVR_INSN (st, "e,r", "100!001rrrrree-+", 1, AVR_ISA_1200, 0x8200)
201
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202 /* these are for devices that don't exist yet */
203/* espm (0x95f8) removed in databook update, use spm with RAMPZ:Z */
204 /* >128K program memory (PC = EIND:Z) */
205AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519)
206AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419)
207
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