[binutils.git] / sim / mips / configure.in

dnl Process this file with autoconf to produce a configure script.
sinclude(../common/aclocal.m4)
AC_PREREQ(2.5)dnl
AC_INIT(Makefile.in)

SIM_AC_COMMON

dnl Options available in this module
SIM_AC_OPTION_INLINE()
SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
SIM_AC_OPTION_HOSTENDIAN
SIM_AC_OPTION_WARNINGS
SIM_AC_OPTION_RESERVED_BITS(1)

# DEPRECATED
#
# Instead of defining a `subtarget' macro, code should be checking
# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
# in question.
#
case "${target}" in
  mips64vr*-*-*)	SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
  mips*tx39*)           SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
  mipsisa32*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mipsisa64*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  *)                    SIM_SUBTARGET="";;
esac
AC_SUBST(SIM_SUBTARGET)


#
# Select the byte order of the target
#
mips_endian=
default_endian=
case "${target}" in
  mips64el*-*-*)	mips_endian=LITTLE_ENDIAN ;;
  mips64vr*el-*-*)      default_endian=LITTLE_ENDIAN ;;
  mips64*-*-*)          default_endian=BIG_ENDIAN ;;
  mips16*-*-*)          default_endian=BIG_ENDIAN ;;
  mipsisa32*-*-*)       default_endian=BIG_ENDIAN ;;
  mipsisa64*-*-*)       default_endian=BIG_ENDIAN ;;
  mips*-*-*)            default_endian=BIG_ENDIAN ;;
  *)                    default_endian=BIG_ENDIAN ;;
esac
SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)


#
# Select the bitsize of the target
#
mips_addr_bitsize=
case "${target}" in
  mips64*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
  mips16*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
  mipsisa32*-*-*)       mips_bitsize=32 ; mips_msb=31 ;;
  mipsisa64*-*-*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips*-*-*)            mips_bitsize=32 ; mips_msb=31 ;;
  *)                    mips_bitsize=64 ; mips_msb=63 ;;
esac
SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)


#
# Select the floating hardware support of the target
#
mips_fpu=HARDWARE_FLOATING_POINT
mips_fpu_bitsize=
case "${target}" in
  mips*tx39*)		mips_fpu=HARD_FLOATING_POINT
			mips_fpu_bitsize=32
			;;
  mips64*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
  mips16*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
  mipsisa32*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mipsisa64*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips*-*-*)            mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
  *)                    mips_fpu=HARD_FLOATING_POINT ;;
esac
SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)


#
# Select the level of SMP support
#
case "${target}" in
  *)                    mips_smp=0 ;;
esac
SIM_AC_OPTION_SMP($mips_smp)


#
# Select the IGEN architecture
#
sim_gen=IGEN
sim_igen_machine="-M mipsIV"
sim_m16_machine="-M mips16"
sim_igen_filter="32,64,f"
sim_m16_filter="16"
sim_mach_default="mips8000"

case "${target}" in
  mips*tx39*)		sim_gen=IGEN
			sim_igen_filter="32,f"
			sim_igen_machine="-M r3900"
			;;
  mips64vr43*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mipsIV"
			sim_mach_default="mips8000"
			;;
  mips64vr5*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M vr5000"
			sim_mach_default="mips5000"
			;;
  mips64vr41*)		sim_gen=M16
			sim_igen_machine="-M vr4100"
			sim_m16_machine="-M vr4100"
			sim_igen_filter="32,64,f"
			sim_m16_filter="16"
			sim_mach_default="mips4100"
                        ;;
  mips64vr-*-* | mips64vrel-*-*)
			sim_gen=MULTI
			sim_multi_configs="\
			  vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
			  vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
			  vr5000:mipsIV:32,64,f:mips4300,mips5000\
			  vr5400:mipsIV,vr5400:32,64,f:mips5400\
			  vr5500:mipsIV,vr5500:32,64,f:mips5500"
			sim_multi_default=mips5000
			;;
  mips64*-*-*)		sim_igen_filter="32,64,f"
			sim_gen=IGEN
			;;
  mips16*-*-*)		sim_gen=M16
			sim_igen_filter="32,64,f"
			sim_m16_filter="16"
			;;
  mipsisa32*-*-*)	sim_gen=IGEN
		        sim_igen_machine="-M mips32"
			sim_igen_filter="32,f"
			sim_mach_default="mipsisa32"
			;;
  mipsisa64sb1*-*-*)	sim_gen=IGEN
		        sim_igen_machine="-M mips64,sb1"
			sim_igen_filter="32,64,f"
			sim_mach_default="mips_sb1"
			;;
  mipsisa64*-*-*)	sim_gen=IGEN
		        sim_igen_machine="-M mips64,mips3d"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64"
			;;
  mips*lsi*)	        sim_gen=M16
			sim_igen_machine="-M mipsIII,mips16"
			sim_m16_machine="-M mips16,mipsIII"
			sim_igen_filter="32,f"
			sim_m16_filter="16"
			sim_mach_default="mips4000"
                        ;;
  mips*-*-*)		sim_gen=IGEN
			sim_igen_filter="32,f"
			;;
esac

# The MULTI generator can combine several simulation engines into one.
# executable.  A configuration which uses the MULTI should set two
# variables: ${sim_multi_configs} and ${sim_multi_default}.
#
# ${sim_multi_configs} is the list of engines to build.  Each
# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
# where:
#
# - NAME is a C-compatible prefix for the engine,
# - MACHINE is a -M argument,
# - FILTER is a -F argument, and
# - BFDMACHS is a comma-separated list of bfd machines that the
#     simulator can run.
#
# Each entry will have a separate simulation engine whose prefix is
# m32<NAME>.  If the machine list includes "mips16", there will also
# be a mips16 engine, prefix m16<NAME>.  The mips16 engine will be
# generated using the same machine list as the 32-bit version,
# but the filter will be "16" instead of FILTER.
#
# The simulator compares the bfd mach against BFDMACHS to decide
# which engine to use.  Entries in BFDMACHS should be bfd_mach
# values with "bfd_mach_" removed.  ${sim_multi_default} says
# which entry should be the default.
if test ${sim_gen} = MULTI; then

  # Simple sanity check.
  if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
    AC_MSG_ERROR(Error in configure.in: MULTI simulator not set up correctly)
  fi

  # Start in a known state.
  rm -f multi-include.h multi-run.c
  sim_multi_flags=
  sim_multi_src=
  sim_multi_obj=multi-run.o
  sim_multi_igen_configs=
  sim_seen_default=no

  cat << __EOF__ > multi-run.c
/* Main entry point for MULTI simulators.
   Copyright (C) 2003 Free Software Foundation, Inc.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.

   --

   This file was generated by sim/mips/configure.  */

#include "sim-main.h"
#include "multi-include.h"

#define SD sd
#define CPU cpu

void
sim_engine_run (SIM_DESC sd,
		int next_cpu_nr,
		int nr_cpus,
		int signal) /* ignore */
{
  int mach;

  if (STATE_ARCHITECTURE (sd) == NULL)
    mach = bfd_mach_${sim_multi_default};
  else
    mach = STATE_ARCHITECTURE (SD)->mach;

  switch (mach)
    {
__EOF__

  for fc in ${sim_multi_configs}; do

    # Split up the entry.  ${c} contains the first three elements.
    # Note: outer sqaure brackets are m4 quotes.
    c=`echo ${fc} | sed ['s/:[^:]*$//']`
    bfdmachs=`echo ${fc} | sed 's/.*://'`
    name=`echo ${c} | sed 's/:.*//'`
    machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
    filter=`echo ${c} | sed 's/.*://'`

    # Build the following lists:
    #
    #   sim_multi_flags: all -M and -F flags used by the simulator
    #   sim_multi_src: all makefile-generated source files
    #   sim_multi_obj: the objects for ${sim_multi_src}
    #   sim_multi_igen_configs: igen configuration strings.
    #
    # Each entry in ${sim_multi_igen_configs} is a prefix (m32
    # or m16) followed by the NAME, MACHINE and FILTER part of
    # the ${sim_multi_configs} entry.
    sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"

    # Check whether mips16 handling is needed.
    case ${c} in
      *:*mips16*:*)
	# Run igen twice, once for normal mode and once for mips16.
	ws="m32 m16"

	# The top-level function for the mips16 simulator is
	# in a file m16${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} m16${name}_run.c"
	sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16"
	;;
      *)
	ws=m32
	;;
    esac

    # Now add the list of igen-generated files to ${sim_multi_src}
    # and ${sim_multi_obj}.
    for w in ${ws}; do
      for base in engine icache idecode model semantics support; do
	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
	sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
      done
      sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
    done

    # Add an include for the engine.h file.  This file declares the
    # top-level foo_engine_run() function.
    echo "#include \"${w}${name}_engine.h\"" >> multi-include.h

    # Add case statements for this engine to sim_engine_run().
    for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
      echo "    case bfd_mach_${mach}:" >> multi-run.c
      if test ${mach} = ${sim_multi_default}; then
	echo "    default:" >> multi-run.c
	sim_seen_default=yes
      fi
    done
    echo "      ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
      >> multi-run.c
    echo "      break;" >> multi-run.c
  done

  # Check whether we added a 'default:' label.
  if test ${sim_seen_default} = no; then
    AC_MSG_ERROR(Error in configure.in: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
  fi

  cat << __EOF__ >> multi-run.c
    }
}

int
mips_mach_multi (SIM_DESC sd)
{
  if (STATE_ARCHITECTURE (sd) == NULL)
    return bfd_mach_${sim_multi_default};

  switch (STATE_ARCHITECTURE (SD)->mach)
    {
__EOF__

  # Add case statements for this engine to mips_mach_multi().
  for fc in ${sim_multi_configs}; do

    # Split up the entry.  ${c} contains the first three elements.
    # Note: outer sqaure brackets are m4 quotes.
    c=`echo ${fc} | sed ['s/:[^:]*$//']`
    bfdmachs=`echo ${fc} | sed 's/.*://'`

    for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
      echo "    case bfd_mach_${mach}:" >> multi-run.c
    done
  done

  cat << __EOF__ >> multi-run.c
      return (STATE_ARCHITECTURE (SD)->mach);
    default:
      return bfd_mach_${sim_multi_default};
    }
}
__EOF__

  SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
else
  # For clean-extra
  sim_multi_src=doesnt-exist.c

  if test x"${sim_mach_default}" = x""; then
    AC_MSG_ERROR(Error in configure.in: \${sim_mach_default} not defined)
  fi
  SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
fi
sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
sim_m16_flags=" -F ${sim_m16_filter}  ${sim_m16_machine}  ${sim_igen_smp}"
AC_SUBST(sim_igen_flags)
AC_SUBST(sim_m16_flags)
AC_SUBST(sim_gen)
AC_SUBST(sim_multi_flags)
AC_SUBST(sim_multi_igen_configs)
AC_SUBST(sim_multi_src)
AC_SUBST(sim_multi_obj)


#
# Add simulated hardware devices
#
hw_enabled=no
case "${target}" in
  mips*tx39*)
	hw_enabled=yes
	hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio" 
	mips_extra_objs="dv-sockser.o"
	SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
	;;
  *)
	mips_extra_objs="" 
	;;
esac
SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
AC_SUBST(mips_extra_objs)


# Choose simulator engine
case "${target}" in
  *)    mips_igen_engine="engine.o"
	;;
esac
AC_SUBST(mips_igen_engine)


AC_PATH_X
mips_extra_libs=""
AC_SUBST(mips_extra_libs)

AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
AC_CHECK_LIB(m, fabs)
AC_CHECK_FUNCS(aint anint sqrt)

SIM_AC_OUTPUT
Commit	Line	Data
c906108c SS	1	dnl Process this file with autoconf to produce a configure script.
	2	sinclude(../common/aclocal.m4)
	3	AC_PREREQ(2.5)dnl
	4	AC_INIT(Makefile.in)
	5
	6	SIM_AC_COMMON
	7
	8	dnl Options available in this module
	9	SIM_AC_OPTION_INLINE()
	10	SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
	11	SIM_AC_OPTION_HOSTENDIAN
	12	SIM_AC_OPTION_WARNINGS
e6c674b8	13	SIM_AC_OPTION_RESERVED_BITS(1)
c906108c SS	14
	15	# DEPRECATED
	16	#
	17	# Instead of defining a `subtarget' macro, code should be checking
	18	# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
	19	# in question.
	20	#
	21	case "${target}" in
4c54fc26	22	mips64vr--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
c906108c	23	mipstx39) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
1e799e28 CD	24	mipsisa32--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28 CD	25	mipsisa64--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
c906108c SS	26	*) SIM_SUBTARGET="";;
	27	esac
	28	AC_SUBST(SIM_SUBTARGET)
	29
	30
	31
	32	#
	33	# Select the byte order of the target
	34	#
	35	mips_endian=
	36	default_endian=
	37	case "${target}" in
	38	mips64el--*) mips_endian=LITTLE_ENDIAN ;;
7a292a7a	39	mips64vrel--*) default_endian=LITTLE_ENDIAN ;;
c906108c SS	40	mips64--*) default_endian=BIG_ENDIAN ;;
c906108c SS	41	mips16--*) default_endian=BIG_ENDIAN ;;
1e799e28 CD	42	mipsisa32--*) default_endian=BIG_ENDIAN ;;
1e799e28 CD	43	mipsisa64--*) default_endian=BIG_ENDIAN ;;
c906108c SS	44	mips--*) default_endian=BIG_ENDIAN ;;
	45	*) default_endian=BIG_ENDIAN ;;
	46	esac
	47	SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
	48
	49
	50
	51	#
	52	# Select the bitsize of the target
	53	#
	54	mips_addr_bitsize=
	55	case "${target}" in
	56	mips64--*) mips_bitsize=64 ; mips_msb=63 ;;
	57	mips16--*) mips_bitsize=64 ; mips_msb=63 ;;
1e799e28 CD	58	mipsisa32--*) mips_bitsize=32 ; mips_msb=31 ;;
1e799e28 CD	59	mipsisa64--*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	60	mips--*) mips_bitsize=32 ; mips_msb=31 ;;
	61	*) mips_bitsize=64 ; mips_msb=63 ;;
	62	esac
	63	SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
	64
	65
	66
	67	#
	68	# Select the floating hardware support of the target
	69	#
	70	mips_fpu=HARDWARE_FLOATING_POINT
	71	mips_fpu_bitsize=
	72	case "${target}" in
	73	mipstx39) mips_fpu=HARD_FLOATING_POINT
	74	mips_fpu_bitsize=32
	75	;;
	76	mips64--*) mips_fpu=HARD_FLOATING_POINT ;;
	77	mips16--*) mips_fpu=HARD_FLOATING_POINT ;;
1e799e28 CD	78	mipsisa32--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
1e799e28 CD	79	mipsisa64--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c SS	80	mips--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
	81	*) mips_fpu=HARD_FLOATING_POINT ;;
	82	esac
	83	SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
	84
	85
	86
	87	#
	88	# Select the level of SMP support
	89	#
	90	case "${target}" in
	91	*) mips_smp=0 ;;
	92	esac
	93	SIM_AC_OPTION_SMP($mips_smp)
	94
	95
	96
	97	#
	98	# Select the IGEN architecture
	99	#
	100	sim_gen=IGEN
	101	sim_igen_machine="-M mipsIV"
	102	sim_m16_machine="-M mips16"
	103	sim_igen_filter="32,64,f"
	104	sim_m16_filter="16"
4c54fc26 CD	105	sim_mach_default="mips8000"
4c54fc26 CD	106
c906108c SS	107	case "${target}" in
	108	mipstx39) sim_gen=IGEN
	109	sim_igen_filter="32,f"
	110	sim_igen_machine="-M r3900"
	111	;;
	112	mips64vr43--*) sim_gen=IGEN
	113	sim_igen_machine="-M mipsIV"
4c54fc26	114	sim_mach_default="mips8000"
c906108c SS	115	;;
	116	mips64vr5--*) sim_gen=IGEN
	117	sim_igen_machine="-M vr5000"
4c54fc26	118	sim_mach_default="mips5000"
c906108c SS	119	;;
	120	mips64vr41*) sim_gen=M16
	121	sim_igen_machine="-M vr4100"
	122	sim_m16_machine="-M vr4100"
	123	sim_igen_filter="32,64,f"
	124	sim_m16_filter="16"
4c54fc26	125	sim_mach_default="mips4100"
c906108c	126	;;
4c54fc26 CD	127	mips64vr-- \| mips64vrel--)
	128	sim_gen=MULTI
	129	sim_multi_configs="\
	130	vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
	131	vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
	132	vr5000:mipsIV:32,64,f:mips4300,mips5000\
	133	vr5400:mipsIV,vr5400:32,64,f:mips5400\
	134	vr5500:mipsIV,vr5500:32,64,f:mips5500"
	135	sim_multi_default=mips5000
	136	;;
c906108c SS	137	mips64--*) sim_igen_filter="32,64,f"
	138	sim_gen=IGEN
	139	;;
	140	mips16--*) sim_gen=M16
	141	sim_igen_filter="32,64,f"
	142	sim_m16_filter="16"
	143	;;
1e799e28 CD	144	mipsisa32--*) sim_gen=IGEN
	145	sim_igen_machine="-M mips32"
	146	sim_igen_filter="32,f"
4c54fc26	147	sim_mach_default="mipsisa32"
1e799e28	148	;;
7cbea089 CD	149	mipsisa64sb1--*) sim_gen=IGEN
	150	sim_igen_machine="-M mips64,sb1"
	151	sim_igen_filter="32,64,f"
4c54fc26	152	sim_mach_default="mips_sb1"
7cbea089	153	;;
1e799e28	154	mipsisa64--*) sim_gen=IGEN
e7e81181	155	sim_igen_machine="-M mips64,mips3d"
1e799e28	156	sim_igen_filter="32,64,f"
4c54fc26	157	sim_mach_default="mipsisa64"
1e799e28	158	;;
c906108c SS	159	mipslsi) sim_gen=M16
	160	sim_igen_machine="-M mipsIII,mips16"
	161	sim_m16_machine="-M mips16,mipsIII"
	162	sim_igen_filter="32,f"
	163	sim_m16_filter="16"
4c54fc26	164	sim_mach_default="mips4000"
c906108c SS	165	;;
	166	mips--*) sim_gen=IGEN
	167	sim_igen_filter="32,f"
	168	;;
	169	esac
4c54fc26 CD	170
	171	# The MULTI generator can combine several simulation engines into one.
	172	# executable. A configuration which uses the MULTI should set two
	173	# variables: ${sim_multi_configs} and ${sim_multi_default}.
	174	#
	175	# ${sim_multi_configs} is the list of engines to build. Each
	176	# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
	177	# where:
	178	#
	179	# - NAME is a C-compatible prefix for the engine,
	180	# - MACHINE is a -M argument,
	181	# - FILTER is a -F argument, and
	182	# - BFDMACHS is a comma-separated list of bfd machines that the
	183	# simulator can run.
	184	#
	185	# Each entry will have a separate simulation engine whose prefix is
	186	# m32<NAME>. If the machine list includes "mips16", there will also
	187	# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
	188	# generated using the same machine list as the 32-bit version,
	189	# but the filter will be "16" instead of FILTER.
	190	#
	191	# The simulator compares the bfd mach against BFDMACHS to decide
	192	# which engine to use. Entries in BFDMACHS should be bfd_mach
	193	# values with "bfd_mach_" removed. ${sim_multi_default} says
	194	# which entry should be the default.
	195	if test ${sim_gen} = MULTI; then
	196
	197	# Simple sanity check.
	198	if test -z "${sim_multi_configs}" \|\| test -z "${sim_multi_default}"; then
	199	AC_MSG_ERROR(Error in configure.in: MULTI simulator not set up correctly)
	200	fi
	201
	202	# Start in a known state.
	203	rm -f multi-include.h multi-run.c
	204	sim_multi_flags=
	205	sim_multi_src=
	206	sim_multi_obj=multi-run.o
	207	sim_multi_igen_configs=
	208	sim_seen_default=no
	209
	210	cat << __EOF__ > multi-run.c
	211	/* Main entry point for MULTI simulators.
	212	Copyright (C) 2003 Free Software Foundation, Inc.
	213
	214	This program is free software; you can redistribute it and/or modify
	215	it under the terms of the GNU General Public License as published by
	216	the Free Software Foundation; either version 2 of the License, or
	217	(at your option) any later version.
	218
	219	This program is distributed in the hope that it will be useful,
	220	but WITHOUT ANY WARRANTY; without even the implied warranty of
	221	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	222	GNU General Public License for more details.
	223
	224	You should have received a copy of the GNU General Public License
	225	along with this program; if not, write to the Free Software
	226	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	227
	228	--
	229
	230	This file was generated by sim/mips/configure. */
	231
	232	#include "sim-main.h"
	233	#include "multi-include.h"
234
235	#define SD sd
236	#define CPU cpu
237
238	void
239	sim_engine_run (SIM_DESC sd,
240	int next_cpu_nr,
241	int nr_cpus,
242	int signal) /* ignore */
243	{
244	int mach;
245
246	if (STATE_ARCHITECTURE (sd) == NULL)
247	mach = bfd_mach_${sim_multi_default};
248	else
249	mach = STATE_ARCHITECTURE (SD)->mach;
250
251	switch (mach)
252	{
253	__EOF__
254
255	for fc in ${sim_multi_configs}; do
256
257	# Split up the entry. ${c} contains the first three elements.
258	# Note: outer sqaure brackets are m4 quotes.
259	c=`echo ${fc} \| sed ['s/:[^:]*$//']`
260	bfdmachs=`echo ${fc} \| sed 's/.*://'`
261	name=`echo ${c} \| sed 's/:.*//'`
262	machine=`echo ${c} \| sed 's/.:\(.\):.*/\1/'`
263	filter=`echo ${c} \| sed 's/.*://'`
264
265	# Build the following lists:
266	#
267	# sim_multi_flags: all -M and -F flags used by the simulator
268	# sim_multi_src: all makefile-generated source files
269	# sim_multi_obj: the objects for ${sim_multi_src}
270	# sim_multi_igen_configs: igen configuration strings.
271	#
272	# Each entry in ${sim_multi_igen_configs} is a prefix (m32
273	# or m16) followed by the NAME, MACHINE and FILTER part of
274	# the ${sim_multi_configs} entry.
275	sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
276
277	# Check whether mips16 handling is needed.
278	case ${c} in
279	:mips16:)
280	# Run igen twice, once for normal mode and once for mips16.
281	ws="m32 m16"
282
283	# The top-level function for the mips16 simulator is
284	# in a file m16${name}_run.c, generated by the
285	# tmp-run-multi Makefile rule.
286	sim_multi_src="${sim_multi_src} m16${name}_run.c"
287	sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
288	sim_multi_flags="${sim_multi_flags} -F 16"
289	;;
290	*)
291	ws=m32
292	;;
293	esac
294
295	# Now add the list of igen-generated files to ${sim_multi_src}
296	# and ${sim_multi_obj}.
297	for w in ${ws}; do
298	for base in engine icache idecode model semantics support; do
299	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
300	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
301	sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
302	done
303	sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
304	done
305
306	# Add an include for the engine.h file. This file declares the
307	# top-level foo_engine_run() function.
308	echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
309
310	# Add case statements for this engine to sim_engine_run().
311	for mach in `echo ${bfdmachs} \| sed 's/,/ /g'`; do
312	echo " case bfd_mach_${mach}:" >> multi-run.c
313	if test ${mach} = ${sim_multi_default}; then
314	echo " default:" >> multi-run.c
315	sim_seen_default=yes
316	fi
317	done
318	echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
319	>> multi-run.c
320	echo " break;" >> multi-run.c
321	done
322
323	# Check whether we added a 'default:' label.
324	if test ${sim_seen_default} = no; then
325	AC_MSG_ERROR(Error in configure.in: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
326	fi
327
328	cat << __EOF__ >> multi-run.c
329	}
330	}
331
332	int
333	mips_mach_multi (SIM_DESC sd)
334	{
335	if (STATE_ARCHITECTURE (sd) == NULL)
336	return bfd_mach_${sim_multi_default};
337
338	switch (STATE_ARCHITECTURE (SD)->mach)
339	{
340	__EOF__
341
342	# Add case statements for this engine to mips_mach_multi().
343	for fc in ${sim_multi_configs}; do
344
345	# Split up the entry. ${c} contains the first three elements.
346	# Note: outer sqaure brackets are m4 quotes.
347	c=`echo ${fc} \| sed ['s/:[^:]*$//']`
348	bfdmachs=`echo ${fc} \| sed 's/.*://'`
349
350	for mach in `echo ${bfdmachs} \| sed 's/,/ /g'`; do
351	echo " case bfd_mach_${mach}:" >> multi-run.c
352	done
353	done
354
355	cat << __EOF__ >> multi-run.c
356	return (STATE_ARCHITECTURE (SD)->mach);
357	default:
358	return bfd_mach_${sim_multi_default};
359	}
360	}
361	__EOF__
362
363	SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
364	else
365	# For clean-extra
366	sim_multi_src=doesnt-exist.c
367
368	if test x"${sim_mach_default}" = x""; then
369	AC_MSG_ERROR(Error in configure.in: \${sim_mach_default} not defined)
370	fi
371	SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
372	fi
c906108c SS	373	sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
	374	sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
	375	AC_SUBST(sim_igen_flags)
	376	AC_SUBST(sim_m16_flags)
	377	AC_SUBST(sim_gen)
4c54fc26 CD	378	AC_SUBST(sim_multi_flags)
	379	AC_SUBST(sim_multi_igen_configs)
	380	AC_SUBST(sim_multi_src)
	381	AC_SUBST(sim_multi_obj)
c906108c SS	382
	383
	384	#
	385	# Add simulated hardware devices
	386	#
	387	hw_enabled=no
	388	case "${target}" in
	389	mipstx39)
	390	hw_enabled=yes
	391	hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
	392	mips_extra_objs="dv-sockser.o"
	393	SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
	394	;;
	395	*)
	396	mips_extra_objs=""
	397	;;
	398	esac
	399	SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
	400	AC_SUBST(mips_extra_objs)
	401
	402
	403	# Choose simulator engine
	404	case "${target}" in
	405	*) mips_igen_engine="engine.o"
	406	;;
	407	esac
	408	AC_SUBST(mips_igen_engine)
	409
	410
	411	AC_PATH_X
	412	mips_extra_libs=""
	413	AC_SUBST(mips_extra_libs)
	414
	415	AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
	416	AC_CHECK_LIB(m, fabs)
	417	AC_CHECK_FUNCS(aint anint sqrt)
	418
	419	SIM_AC_OUTPUT