[binutils.git] / opcodes / mips-dis.c

/* Print mips instructions for GDB, the GNU debugger, or for objdump.
   Copyright 1989, 1991, 1992 Free Software Foundation, Inc.
   Contributed by Nobuyuki Hikichi([email protected]).

This file is part of GDB.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include <ansidecl.h>
#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/mips.h"

/* Mips instructions are never longer than this many bytes.  */
#define MAXLEN 4
\f
/* FIXME: This should be shared with gdb somehow.  */
#define REGISTER_NAMES 	\
    {	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3", \
	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7", \
	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7", \
	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra", \
	"sr",	"lo",	"hi",	"bad",	"cause","pc",    \
	"f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
	"f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
	"f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
	"f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
	"fsr",  "fir",  "fp",   "inx",  "rand", "tlblo","ctxt", "tlbhi",\
	"epc",  "prid"\
    }

static CONST char * CONST reg_names[] = REGISTER_NAMES;
\f
/* subroutine */
static void
print_insn_arg (d, l, pc, info)
     const char *d;
     register unsigned long int l;
     bfd_vma pc;
     struct disassemble_info *info;
{
  int delta;

  switch (*d)
    {
    case ',':
    case '(':
    case ')':
      (*info->fprintf_func) (info->stream, "%c", *d);
      break;

    case 's':
    case 'b':
    case 'r':
    case 'v':
      (*info->fprintf_func) (info->stream, "$%s",
			     reg_names[(l >> OP_SH_RS) & OP_MASK_RS]);
      break;

    case 't':
    case 'w':
      (*info->fprintf_func) (info->stream, "$%s",
			     reg_names[(l >> OP_SH_RT) & OP_MASK_RT]);
      break;

    case 'i':
    case 'u':
      (*info->fprintf_func) (info->stream, "0x%x",
			(l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE);
      break;

    case 'j': /* same as i, but sign-extended */
    case 'o':
      delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
      if (delta & 0x8000)
	delta |= ~0xffff;
      (*info->fprintf_func) (info->stream, "%d",
			     delta);
      break;

    case 'h':
      (*info->fprintf_func) (info->stream, "0x%x",
			     (unsigned int) ((l >> OP_SH_PREFX)
					     & OP_MASK_PREFX));
      break;

    case 'k':
      (*info->fprintf_func) (info->stream, "0x%x",
			     (unsigned int) ((l >> OP_SH_CACHE)
					     & OP_MASK_CACHE));
      break;

    case 'a':
      (*info->print_address_func)
	(((pc & 0xF0000000) | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)),
	 info);
      break;

    case 'p':
      /* sign extend the displacement */
      delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
      if (delta & 0x8000)
	delta |= ~0xffff;
      (*info->print_address_func)
	((delta << 2) + pc + 4,
	 info);
      break;

    case 'd':
      (*info->fprintf_func) (info->stream, "$%s",
			     reg_names[(l >> OP_SH_RD) & OP_MASK_RD]);
      break;

    case 'z':
      (*info->fprintf_func) (info->stream, "$%s", reg_names[0]);
      break;

    case '<':
      (*info->fprintf_func) (info->stream, "0x%x",
			     (l >> OP_SH_SHAMT) & OP_MASK_SHAMT);
      break;

    case 'c':
      (*info->fprintf_func) (info->stream, "0x%x",
			     (l >> OP_SH_CODE) & OP_MASK_CODE);
      break;

    case 'C':
      (*info->fprintf_func) (info->stream, "0x%x",
			     (l >> OP_SH_COPZ) & OP_MASK_COPZ);
      break;

    case 'B':
      (*info->fprintf_func) (info->stream, "0x%x",
			     (l >> OP_SH_SYSCALL) & OP_MASK_SYSCALL);
      break;

    case 'S':
    case 'V':
      (*info->fprintf_func) (info->stream, "$f%d",
			     (l >> OP_SH_FS) & OP_MASK_FS);
      break;

    case 'T':
    case 'W':
      (*info->fprintf_func) (info->stream, "$f%d",
			     (l >> OP_SH_FT) & OP_MASK_FT);
      break;

    case 'D':
      (*info->fprintf_func) (info->stream, "$f%d",
			     (l >> OP_SH_FD) & OP_MASK_FD);
      break;

    case 'R':
      (*info->fprintf_func) (info->stream, "$f%d",
			     (l >> OP_SH_FR) & OP_MASK_FR);
      break;

    case 'E':
      (*info->fprintf_func) (info->stream, "$%d",
			     (l >> OP_SH_RT) & OP_MASK_RT);
      break;

    case 'G':
      (*info->fprintf_func) (info->stream, "$%d",
			     (l >> OP_SH_RD) & OP_MASK_RD);
      break;

    case 'N':
      (*info->fprintf_func) (info->stream, "$fcc%d",
			     (l >> OP_SH_BCC) & OP_MASK_BCC);
      break;

    case 'M':
      (*info->fprintf_func) (info->stream, "$fcc%d",
			     (l >> OP_SH_CCC) & OP_MASK_CCC);
      break;

    default:
      (*info->fprintf_func) (info->stream,
			     "# internal error, undefined modifier(%c)", *d);
      break;
    }
}
\f
/* Print the mips instruction at address MEMADDR in debugged memory,
   on using INFO.  Returns length of the instruction, in bytes, which is
   always 4.  BIGENDIAN must be 1 if this is big-endian code, 0 if
   this is little-endian code.  */

static int
_print_insn_mips (memaddr, word, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
     unsigned long int word;
{
  register const struct mips_opcode *op;
  static boolean init = 0;
  static const struct mips_opcode *mips_hash[OP_MASK_OP + 1];

  /* Build a hash table to shorten the search time.  */
  if (! init)
    {
      unsigned int i;

      for (i = 0; i <= OP_MASK_OP; i++)
	{
	  for (op = mips_opcodes; op < &mips_opcodes[NUMOPCODES]; op++)
	    {
	      if (op->pinfo == INSN_MACRO)
		continue;
	      if (i == ((op->match >> OP_SH_OP) & OP_MASK_OP))
		{
		  mips_hash[i] = op;
		  break;
		}
	    }
        }

      init = 1;
    }

  op = mips_hash[(word >> OP_SH_OP) & OP_MASK_OP];
  if (op != NULL)
    {
      for (; op < &mips_opcodes[NUMOPCODES]; op++)
	{
	  if (op->pinfo != INSN_MACRO && (word & op->mask) == op->match)
	    {
	      register const char *d;

	      (*info->fprintf_func) (info->stream, "%s", op->name);

	      d = op->args;
	      if (d != NULL)
		{
		  (*info->fprintf_func) (info->stream, " ");
		  for (; *d != '\0'; d++)
		    print_insn_arg (d, word, memaddr, info);
		}

	      return 4;
	    }
	}
    }

  /* Handle undefined instructions.  */
  (*info->fprintf_func) (info->stream, "0x%x", word);
  return 4;
}

int
print_insn_big_mips (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  bfd_byte buffer[4];
  int status = (*info->read_memory_func) (memaddr, buffer, 4, info);
  if (status == 0)
    return _print_insn_mips (memaddr, (unsigned long) bfd_getb32 (buffer), info);
  else
    {
      (*info->memory_error_func) (status, memaddr, info);
      return -1;
    }
}

int
print_insn_little_mips (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  bfd_byte buffer[4];
  int status = (*info->read_memory_func) (memaddr, buffer, 4, info);
  if (status == 0)
    return _print_insn_mips (memaddr, (unsigned long) bfd_getl32 (buffer), info);
  else
    {
      (*info->memory_error_func) (status, memaddr, info);
      return -1;
    }
}
Commit	Line	Data
d0ba1cea ILT	1	/* Print mips instructions for GDB, the GNU debugger, or for objdump.
	2	Copyright 1989, 1991, 1992 Free Software Foundation, Inc.
	3	Contributed by Nobuyuki Hikichi([email protected]).
	4
	5	This file is part of GDB.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2 of the License, or
	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
30b1724c	19	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
d0ba1cea	20
5d0734a7	21	#include <ansidecl.h>
d0ba1cea	22	#include "sysdep.h"
5d0734a7	23	#include "dis-asm.h"
d0ba1cea ILT	24	#include "opcode/mips.h"
d0ba1cea ILT	25
d0ba1cea ILT	26	/* Mips instructions are never longer than this many bytes. */
d0ba1cea ILT	27	#define MAXLEN 4
d0ba1cea ILT	28	\f
	29	/* FIXME: This should be shared with gdb somehow. */
	30	#define REGISTER_NAMES \
	31	{ "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
	32	"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
	33	"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
	34	"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
	35	"sr", "lo", "hi", "bad", "cause","pc", \
	36	"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
	37	"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
	38	"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
	39	"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
	40	"fsr", "fir", "fp", "inx", "rand", "tlblo","ctxt", "tlbhi",\
	41	"epc", "prid"\
	42	}
	43
	44	static CONST char * CONST reg_names[] = REGISTER_NAMES;
	45	\f
	46	/* subroutine */
5d0734a7 JK	47	static void
5d0734a7 JK	48	print_insn_arg (d, l, pc, info)
547998d2	49	const char *d;
5d0734a7	50	register unsigned long int l;
d0ba1cea	51	bfd_vma pc;
5d0734a7	52	struct disassemble_info *info;
d0ba1cea	53	{
fde326fb ILT	54	int delta;
fde326fb ILT	55
d0ba1cea ILT	56	switch (*d)
	57	{
	58	case ',':
	59	case '(':
	60	case ')':
5d0734a7	61	(info->fprintf_func) (info->stream, "%c", d);
d0ba1cea ILT	62	break;
	63
	64	case 's':
fde326fb ILT	65	case 'b':
	66	case 'r':
	67	case 'v':
5d0734a7 JK	68	(*info->fprintf_func) (info->stream, "$%s",
5d0734a7 JK	69	reg_names[(l >> OP_SH_RS) & OP_MASK_RS]);
d0ba1cea ILT	70	break;
	71
	72	case 't':
fde326fb	73	case 'w':
5d0734a7 JK	74	(*info->fprintf_func) (info->stream, "$%s",
5d0734a7 JK	75	reg_names[(l >> OP_SH_RT) & OP_MASK_RT]);
d0ba1cea ILT	76	break;
	77
	78	case 'i':
fde326fb	79	case 'u':
30b1724c	80	(*info->fprintf_func) (info->stream, "0x%x",
5d0734a7	81	(l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE);
d0ba1cea ILT	82	break;
	83
	84	case 'j': /* same as i, but sign-extended */
fde326fb ILT	85	case 'o':
	86	delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
	87	if (delta & 0x8000)
	88	delta \|= ~0xffff;
5d0734a7	89	(*info->fprintf_func) (info->stream, "%d",
fde326fb	90	delta);
d0ba1cea ILT	91	break;
d0ba1cea ILT	92
30b1724c ILT	93	case 'h':
	94	(*info->fprintf_func) (info->stream, "0x%x",
	95	(unsigned int) ((l >> OP_SH_PREFX)
	96	& OP_MASK_PREFX));
	97	break;
	98
	99	case 'k':
	100	(*info->fprintf_func) (info->stream, "0x%x",
	101	(unsigned int) ((l >> OP_SH_CACHE)
	102	& OP_MASK_CACHE));
	103	break;
	104
d0ba1cea	105	case 'a':
fde326fb ILT	106	(*info->print_address_func)
	107	(((pc & 0xF0000000) \| (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)),
	108	info);
d0ba1cea ILT	109	break;
d0ba1cea ILT	110
fde326fb ILT	111	case 'p':
	112	/* sign extend the displacement */
	113	delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
	114	if (delta & 0x8000)
	115	delta \|= ~0xffff;
	116	(*info->print_address_func)
	117	((delta << 2) + pc + 4,
	118	info);
d0ba1cea ILT	119	break;
	120
	121	case 'd':
5d0734a7 JK	122	(*info->fprintf_func) (info->stream, "$%s",
5d0734a7 JK	123	reg_names[(l >> OP_SH_RD) & OP_MASK_RD]);
d0ba1cea ILT	124	break;
d0ba1cea ILT	125
547998d2 ILT	126	case 'z':
	127	(*info->fprintf_func) (info->stream, "$%s", reg_names[0]);
	128	break;
	129
fde326fb	130	case '<':
5d0734a7 JK	131	(*info->fprintf_func) (info->stream, "0x%x",
5d0734a7 JK	132	(l >> OP_SH_SHAMT) & OP_MASK_SHAMT);
d0ba1cea ILT	133	break;
d0ba1cea ILT	134
fde326fb	135	case 'c':
5d0734a7 JK	136	(*info->fprintf_func) (info->stream, "0x%x",
5d0734a7 JK	137	(l >> OP_SH_CODE) & OP_MASK_CODE);
d0ba1cea ILT	138	break;
d0ba1cea ILT	139
fde326fb ILT	140	case 'C':
	141	(*info->fprintf_func) (info->stream, "0x%x",
	142	(l >> OP_SH_COPZ) & OP_MASK_COPZ);
	143	break;
	144
	145	case 'B':
	146	(*info->fprintf_func) (info->stream, "0x%x",
	147	(l >> OP_SH_SYSCALL) & OP_MASK_SYSCALL);
	148	break;
	149
d0ba1cea	150	case 'S':
fde326fb	151	case 'V':
5d0734a7 JK	152	(*info->fprintf_func) (info->stream, "$f%d",
5d0734a7 JK	153	(l >> OP_SH_FS) & OP_MASK_FS);
d0ba1cea ILT	154	break;
	155
	156	case 'T':
fde326fb	157	case 'W':
5d0734a7 JK	158	(*info->fprintf_func) (info->stream, "$f%d",
5d0734a7 JK	159	(l >> OP_SH_FT) & OP_MASK_FT);
d0ba1cea ILT	160	break;
	161
	162	case 'D':
5d0734a7 JK	163	(*info->fprintf_func) (info->stream, "$f%d",
5d0734a7 JK	164	(l >> OP_SH_FD) & OP_MASK_FD);
d0ba1cea ILT	165	break;
d0ba1cea ILT	166
30b1724c ILT	167	case 'R':
	168	(*info->fprintf_func) (info->stream, "$f%d",
	169	(l >> OP_SH_FR) & OP_MASK_FR);
	170	break;
	171
fde326fb ILT	172	case 'E':
	173	(*info->fprintf_func) (info->stream, "$%d",
	174	(l >> OP_SH_RT) & OP_MASK_RT);
	175	break;
	176
	177	case 'G':
	178	(*info->fprintf_func) (info->stream, "$%d",
	179	(l >> OP_SH_RD) & OP_MASK_RD);
	180	break;
	181
30b1724c ILT	182	case 'N':
	183	(*info->fprintf_func) (info->stream, "$fcc%d",
	184	(l >> OP_SH_BCC) & OP_MASK_BCC);
	185	break;
	186
	187	case 'M':
	188	(*info->fprintf_func) (info->stream, "$fcc%d",
	189	(l >> OP_SH_CCC) & OP_MASK_CCC);
	190	break;
	191
d0ba1cea	192	default:
5d0734a7 JK	193	(*info->fprintf_func) (info->stream,
5d0734a7 JK	194	"# internal error, undefined modifier(%c)", *d);
d0ba1cea ILT	195	break;
	196	}
	197	}
	198	\f
	199	/* Print the mips instruction at address MEMADDR in debugged memory,
5d0734a7	200	on using INFO. Returns length of the instruction, in bytes, which is
d0ba1cea ILT	201	always 4. BIGENDIAN must be 1 if this is big-endian code, 0 if
	202	this is little-endian code. */
	203
30b1724c	204	static int
5d0734a7	205	_print_insn_mips (memaddr, word, info)
d0ba1cea	206	bfd_vma memaddr;
5d0734a7 JK	207	struct disassemble_info *info;
5d0734a7 JK	208	unsigned long int word;
d0ba1cea	209	{
30b1724c ILT	210	register const struct mips_opcode *op;
	211	static boolean init = 0;
	212	static const struct mips_opcode *mips_hash[OP_MASK_OP + 1];
d0ba1cea	213
30b1724c ILT	214	/* Build a hash table to shorten the search time. */
30b1724c ILT	215	if (! init)
d0ba1cea	216	{
30b1724c ILT	217	unsigned int i;
	218
	219	for (i = 0; i <= OP_MASK_OP; i++)
fde326fb	220	{
30b1724c ILT	221	for (op = mips_opcodes; op < &mips_opcodes[NUMOPCODES]; op++)
	222	{
	223	if (op->pinfo == INSN_MACRO)
	224	continue;
	225	if (i == ((op->match >> OP_SH_OP) & OP_MASK_OP))
	226	{
	227	mips_hash[i] = op;
	228	break;
	229	}
	230	}
	231	}
	232
	233	init = 1;
d0ba1cea ILT	234	}
d0ba1cea ILT	235
30b1724c ILT	236	op = mips_hash[(word >> OP_SH_OP) & OP_MASK_OP];
30b1724c ILT	237	if (op != NULL)
d0ba1cea	238	{
30b1724c ILT	239	for (; op < &mips_opcodes[NUMOPCODES]; op++)
	240	{
	241	if (op->pinfo != INSN_MACRO && (word & op->mask) == op->match)
	242	{
	243	register const char *d;
	244
	245	(*info->fprintf_func) (info->stream, "%s", op->name);
	246
	247	d = op->args;
	248	if (d != NULL)
	249	{
	250	(*info->fprintf_func) (info->stream, " ");
	251	for (; *d != '\0'; d++)
	252	print_insn_arg (d, word, memaddr, info);
	253	}
	254
	255	return 4;
	256	}
	257	}
d0ba1cea ILT	258	}
d0ba1cea ILT	259
30b1724c ILT	260	/* Handle undefined instructions. */
30b1724c ILT	261	(*info->fprintf_func) (info->stream, "0x%x", word);
d0ba1cea ILT	262	return 4;
d0ba1cea ILT	263	}
5d0734a7 JK	264
	265	int
	266	print_insn_big_mips (memaddr, info)
	267	bfd_vma memaddr;
	268	struct disassemble_info *info;
	269	{
	270	bfd_byte buffer[4];
	271	int status = (*info->read_memory_func) (memaddr, buffer, 4, info);
	272	if (status == 0)
30b1724c	273	return _print_insn_mips (memaddr, (unsigned long) bfd_getb32 (buffer), info);
5d0734a7 JK	274	else
	275	{
	276	(*info->memory_error_func) (status, memaddr, info);
	277	return -1;
	278	}
	279	}
	280
	281	int
	282	print_insn_little_mips (memaddr, info)
	283	bfd_vma memaddr;
	284	struct disassemble_info *info;
	285	{
	286	bfd_byte buffer[4];
	287	int status = (*info->read_memory_func) (memaddr, buffer, 4, info);
	288	if (status == 0)
30b1724c	289	return _print_insn_mips (memaddr, (unsigned long) bfd_getl32 (buffer), info);
5d0734a7 JK	290	else
	291	{
	292	(*info->memory_error_func) (status, memaddr, info);
	293	return -1;
	294	}
	295	}