projects / binutils.git / blame
| Commit | Line | Data |
|---|---|---|
| 26f59a9e | 1 | /* This file defines the interface between the d10v simulator and gdb. |
| 4f1d9bd8 | 2 | Copyright 1999 Free Software Foundation, Inc. |
| 26f59a9e MM |
3 | |
| 4 | This file is part of GDB. | |
| 5 | ||
| 6 | This program is free software; you can redistribute it and/or modify | |
| 7 | it under the terms of the GNU General Public License as published by | |
| 8 | the Free Software Foundation; either version 2 of the License, or | |
| 9 | (at your option) any later version. | |
| 10 | ||
| 11 | This program is distributed in the hope that it will be useful, | |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | GNU General Public License for more details. | |
| 15 | ||
| 16 | You should have received a copy of the GNU General Public License | |
| 17 | along with this program; if not, write to the Free Software | |
| 18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
| 19 | ||
| 20 | #if !defined (SIM_D10V_H) | |
| 21 | #define SIM_D10V_H | |
| 22 | ||
| 23 | #ifdef __cplusplus | |
| 24 | extern "C" { // } | |
| 25 | #endif | |
| 26 | ||
| 27 | /* GDB interprets addresses as: | |
| 28 | ||
| 29 | 0x00xxxxxx: Physical unified memory segment (Unified memory) | |
| 30 | 0x01xxxxxx: Physical instruction memory segment (On-chip insn memory) | |
| 31 | 0x02xxxxxx: Physical data memory segment (On-chip data memory) | |
| 32 | 0x10xxxxxx: Logical data address segment (DMAP translated memory) | |
| 33 | 0x11xxxxxx: Logical instruction address segment (IMAP translated memory) | |
| 34 | ||
| 35 | The remote d10v board interprets addresses as: | |
| 36 | ||
| 37 | 0x00xxxxxx: Physical unified memory segment (Unified memory) | |
| 38 | 0x01xxxxxx: Physical instruction memory segment (On-chip insn memory) | |
| 39 | 0x02xxxxxx: Physical data memory segment (On-chip data memory) | |
| 40 | ||
| 41 | The following translate a virtual DMAP/IMAP offset into a physical | |
| 42 | memory segment assigning the translated address to PHYS. Since a | |
| 43 | memory access may cross a page boundrary the number of bytes for | |
| 44 | which the translation is applicable (or 0 for an invalid virtual | |
| 45 | offset) is returned. */ | |
| 46 | ||
| 47 | enum | |
| 48 | { | |
| 49 | SIM_D10V_MEMORY_UNIFIED = 0x00000000, | |
| 50 | SIM_D10V_MEMORY_INSN = 0x01000000, | |
| 51 | SIM_D10V_MEMORY_DATA = 0x02000000, | |
| 52 | SIM_D10V_MEMORY_DMAP = 0x10000000, | |
| 53 | SIM_D10V_MEMORY_IMAP = 0x11000000 | |
| 54 | }; | |
| 55 | ||
| 56 | extern unsigned long sim_d10v_translate_dmap_addr | |
| 57 | (unsigned long offset, | |
| 58 | int nr_bytes, | |
| 59 | unsigned long *phys, | |
| 60 | unsigned long (*dmap_register) (int reg_nr)); | |
| 61 | ||
| 62 | extern unsigned long sim_d10v_translate_imap_addr | |
| 63 | (unsigned long offset, | |
| 64 | int nr_bytes, | |
| 65 | unsigned long *phys, | |
| 66 | unsigned long (*imap_register) (int reg_nr)); | |
| 67 | ||
| 68 | extern unsigned long sim_d10v_translate_addr | |
| 69 | (unsigned long vaddr, | |
| 70 | int nr_bytes, | |
| 71 | unsigned long *phys, | |
| 72 | unsigned long (*dmap_register) (int reg_nr), | |
| 73 | unsigned long (*imap_register) (int reg_nr)); | |
| 74 | ||
| 75 | ||
| 76 | /* The simulator makes use of the following register information. */ | |
| 77 | ||
| 78 | enum | |
| 79 | { | |
| 80 | SIM_D10V_R0_REGNUM = 0, | |
| 81 | SIM_D10V_CR0_REGNUM = 16, | |
| 82 | SIM_D10V_A0_REGNUM = 32, | |
| 83 | SIM_D10V_SPI_REGNUM = 34, | |
| 84 | SIM_D10V_SPU_REGNUM = 35, | |
| 85 | SIM_D10V_IMAP0_REGNUM = 36, | |
| 86 | SIM_D10V_DMAP0_REGNUM = 38, | |
| 87 | SIM_D10V_TS2_DMAP_REGNUM = 40 | |
| 88 | }; | |
| 89 | ||
| 90 | enum | |
| 91 | { | |
| 92 | SIM_D10V_NR_R_REGS = 16, | |
| 93 | SIM_D10V_NR_A_REGS = 2, | |
| 94 | SIM_D10V_NR_IMAP_REGS = 2, | |
| 95 | SIM_D10V_NR_DMAP_REGS = 4, | |
| 96 | SIM_D10V_NR_CR_REGS = 16 | |
| 97 | }; | |
| 98 | ||
| 99 | #ifdef __cplusplus | |
| 100 | } | |
| 101 | #endif | |
| 102 | ||
| 103 | #endif |