[binutils.git] / gas / config / tc-xtensa.h

/* tc-xtensa.h -- Header file for tc-xtensa.c.
   Copyright (C) 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to the Free
   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
   02110-1301, USA.  */

#ifndef TC_XTENSA
#define TC_XTENSA 1

struct fix;

#ifndef OBJ_ELF
#error Xtensa support requires ELF object format
#endif

#include "xtensa-isa.h"
#include "xtensa-config.h"

#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE


/* Maximum number of opcode slots in a VLIW instruction.  */
#define MAX_SLOTS 15


/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
   RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
   in the fr_var field.  For the two exceptions, fr_var is a float value
   that records the frequency with which the following instruction is
   executed as a branch target.  The aligner uses this information to
   tell which targets are most important to be aligned.  */

enum xtensa_relax_statesE
{
  RELAX_XTENSA_NONE,

  RELAX_ALIGN_NEXT_OPCODE,
  /* Use the first opcode of the next fragment to determine the
     alignment requirements.  This is ONLY used for LOOPs currently.  */

  RELAX_CHECK_ALIGN_NEXT_OPCODE,
  /* The next non-empty frag contains a loop instruction.  Check to see
     if it is correctly aligned, but do not align it.  */

  RELAX_DESIRE_ALIGN_IF_TARGET,
  /* These are placed in front of labels and converted to either
     RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
     relaxation begins.  */

  RELAX_ADD_NOP_IF_A0_B_RETW,
  /* These are placed in front of conditional branches.  Before
     relaxation begins, they are turned into either NOPs for branches
     immediately followed by RETW or RETW.N or rs_fills of 0.  This is
     used to avoid a hardware bug in some early versions of the
     processor.  */

  RELAX_ADD_NOP_IF_PRE_LOOP_END,
  /* These are placed after JX instructions.  Before relaxation begins,
     they are turned into either NOPs, if the JX is one instruction
     before a loop end label, or rs_fills of 0.  This is used to avoid a
     hardware interlock issue prior to Xtensa version T1040.  */

  RELAX_ADD_NOP_IF_SHORT_LOOP,
  /* These are placed after LOOP instructions and turned into NOPs when:
     (1) there are less than 3 instructions in the loop; we place 2 of
     these in a row to add up to 2 NOPS in short loops; or (2) the
     instructions in the loop do not include a branch or jump.
     Otherwise they are turned into rs_fills of 0 before relaxation
     begins.  This is used to avoid hardware bug PR3830.  */

  RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
  /* These are placed after LOOP instructions and turned into NOPs if
     there are less than 12 bytes to the end of some other loop's end.
     Otherwise they are turned into rs_fills of 0 before relaxation
     begins.  This is used to avoid hardware bug PR3830.  */

  RELAX_DESIRE_ALIGN,
  /* The next fragment would like its first instruction to NOT cross an
     instruction fetch boundary.  */

  RELAX_MAYBE_DESIRE_ALIGN,
  /* The next fragment might like its first instruction to NOT cross an
     instruction fetch boundary.  These are placed after a branch that
     might be relaxed.  If the branch is relaxed, then this frag will be
     a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
     frag.  */

  RELAX_LOOP_END,
  /* This will be turned into a NOP or NOP.N if the previous instruction
     is expanded to negate a loop.  */

  RELAX_LOOP_END_ADD_NOP,
  /* When the code density option is available, this will generate a
     NOP.N marked RELAX_NARROW.  Otherwise, it will create an rs_fill
     fragment with a NOP in it.  */

  RELAX_LITERAL,
  /* Another fragment could generate an expansion here but has not yet.  */

  RELAX_LITERAL_NR,
  /* Expansion has been generated by an instruction that generates a
     literal.  However, the stretch has NOT been reported yet in this
     fragment.  */

  RELAX_LITERAL_FINAL,
  /* Expansion has been generated by an instruction that generates a
     literal.  */

  RELAX_LITERAL_POOL_BEGIN,
  RELAX_LITERAL_POOL_END,
  /* Technically these are not relaxations at all but mark a location
     to store literals later.  Note that fr_var stores the frchain for
     BEGIN frags and fr_var stores now_seg for END frags.  */

  RELAX_NARROW,
  /* The last instruction in this fragment (at->fr_opcode) can be
     freely replaced with a single wider instruction if a future
     alignment desires or needs it.  */

  RELAX_IMMED,
  /* The last instruction in this fragment (at->fr_opcode) contains
     an immediate or symbol.  If the value does not fit, relax the
     opcode using expansions from the relax table.  */

  RELAX_IMMED_STEP1,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded 1 step.  */

  RELAX_IMMED_STEP2,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded 2 steps.  */

  RELAX_IMMED_STEP3,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded 3 steps.  */

  RELAX_SLOTS,
  /* There are instructions within the last VLIW instruction that need
     relaxation.  Find the relaxation based on the slot info in
     xtensa_frag_type.  Relaxations that deal with particular opcodes
     are slot-based (e.g., converting a MOVI to an L32R).  Relaxations
     that deal with entire instructions, such as alignment, are not
     slot-based.  */

  RELAX_FILL_NOP,
  /* This marks the location of a pipeline stall.  We can fill these guys
     in for alignment of any size.  */

  RELAX_UNREACHABLE,
  /* This marks the location as unreachable.  The assembler may widen or
     narrow this area to meet alignment requirements of nearby
     instructions.  */

  RELAX_MAYBE_UNREACHABLE,
  /* This marks the location as possibly unreachable.  These are placed
     after a branch that may be relaxed into a branch and jump. If the
     branch is relaxed, then this frag will be converted to a
     RELAX_UNREACHABLE frag.  */

  RELAX_ORG,
  /* This marks the location as having previously been an rs_org frag.  
     rs_org frags are converted to fill-zero frags immediately after
     relaxation.  However, we need to remember where they were so we can
     prevent the linker from changing the size of any frag between the
     section start and the org frag.  */

  RELAX_NONE
};

/* This is used as a stopper to bound the number of steps that
   can be taken.  */
#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)

struct xtensa_frag_type
{
  /* Info about the current state of assembly, e.g., transform,
     absolute_literals, etc.  These need to be passed to the backend and
     then to the object file.

     When is_assembly_state_set is false, the frag inherits some of the
     state settings from the previous frag in this segment.  Because it
     is not possible to intercept all fragment closures (frag_more and
     frag_append_1_char can close a frag), we use a pass after initial
     assembly to fill in the assembly states.  */

  unsigned int is_assembly_state_set : 1;
  unsigned int is_no_density : 1;
  unsigned int is_no_transform : 1;
  unsigned int use_longcalls : 1;
  unsigned int use_absolute_literals : 1;

  /* Inhibits relaxation of machine-dependent alignment frags the
     first time through a relaxation....  */
  unsigned int relax_seen : 1;

  /* Information that is needed in the object file and set when known.  */
  unsigned int is_literal : 1;
  unsigned int is_loop_target : 1;
  unsigned int is_branch_target : 1;
  unsigned int is_insn : 1;
  unsigned int is_unreachable : 1;

  unsigned int is_specific_opcode : 1; /* also implies no_transform */

  unsigned int is_align : 1;
  unsigned int is_text_align : 1;
  unsigned int alignment : 5;

  /* A frag with this bit set is the first in a loop that actually
     contains an instruction.  */
  unsigned int is_first_loop_insn : 1;

  /* A frag with this bit set is a branch that we are using to
     align branch targets as if it were a normal narrow instruction.  */
  unsigned int is_aligning_branch : 1;

  /* For text fragments that can generate literals at relax time, this
     variable points to the frag where the literal will be stored.  For
     literal frags, this variable points to the nearest literal pool
     location frag.  This literal frag will be moved to after this
     location.  For RELAX_LITERAL_POOL_BEGIN frags, this field points
     to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
     frag, to make moving frags for this literal pool efficient.  */
  fragS *literal_frag;

  /* The destination segment for literal frags.  (Note that this is only
     valid after xtensa_move_literals.)  This field is also used for
     LITERAL_POOL_END frags.  */
  segT lit_seg;

  /* Frag chain for LITERAL_POOL_BEGIN frags.  */
  struct frchain *lit_frchain;

  /* For the relaxation scheme, some literal fragments can have their
     expansions modified by an instruction that relaxes.  */
  int text_expansion[MAX_SLOTS];
  int literal_expansion[MAX_SLOTS];
  int unreported_expansion;

  /* For text fragments that can generate literals at relax time:  */
  fragS *literal_frags[MAX_SLOTS];
  enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
  symbolS *slot_symbols[MAX_SLOTS];
  offsetT slot_offsets[MAX_SLOTS];

  /* The global aligner needs to walk backward through the list of
     frags.  This field is only valid after xtensa_end.  */
  fragS *fr_prev;
};


/* For VLIW support, we need to know what slot a fixup applies to.  */
typedef struct xtensa_fix_data_struct
{
  int slot;
  symbolS *X_add_symbol;
  offsetT X_add_number;
} xtensa_fix_data;


/* Structure to record xtensa-specific symbol information.  */
typedef struct xtensa_symfield_type
{
  unsigned int is_loop_target : 1;
  unsigned int is_branch_target : 1;
  symbolS *next_expr_symbol;
} xtensa_symfield_type;


/* Structure for saving information about a block of property data
   for frags that have the same flags.   The forward reference is
   in this header file.  The actual definition is in tc-xtensa.c.  */
struct xtensa_block_info_struct;
typedef struct xtensa_block_info_struct xtensa_block_info;


/* Property section types.  */
typedef enum
{
  xt_literal_sec,
  xt_prop_sec,
  max_xt_sec
} xt_section_type;

typedef struct xtensa_segment_info_struct
{
  fragS *literal_pool_loc;
  xtensa_block_info *blocks[max_xt_sec];
} xtensa_segment_info;


extern const char *xtensa_target_format (void);
extern void xtensa_init_fix_data (struct fix *);
extern void xtensa_frag_init (fragS *);
extern int xtensa_force_relocation (struct fix *);
extern int xtensa_validate_fix_sub (struct fix *);
extern void xtensa_frob_label (struct symbol *);
extern void xtensa_end (void);
extern void xtensa_post_relax_hook (void);
extern void xtensa_file_arch_init (bfd *);
extern void xtensa_flush_pending_output (void);
extern bfd_boolean xtensa_fix_adjustable (struct fix *);
extern void xtensa_symbol_new_hook (symbolS *);
extern long xtensa_relax_frag (fragS *, long, int *);
extern void xtensa_elf_section_change_hook (void);
extern int xtensa_unrecognized_line (int);
extern bfd_boolean xtensa_check_inside_bundle (void);
extern void xtensa_handle_align (fragS *);
extern char *xtensa_section_rename (char *);

#define TARGET_FORMAT			xtensa_target_format ()
#define TARGET_ARCH			bfd_arch_xtensa
#define TC_SEGMENT_INFO_TYPE		xtensa_segment_info
#define TC_SYMFIELD_TYPE                struct xtensa_symfield_type
#define TC_FIX_TYPE			xtensa_fix_data
#define TC_INIT_FIX_DATA(x)		xtensa_init_fix_data (x)
#define TC_FRAG_TYPE			struct xtensa_frag_type
#define TC_FRAG_INIT(frag)		xtensa_frag_init (frag)
#define TC_FORCE_RELOCATION(fix)	xtensa_force_relocation (fix)
#define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
  (! SEG_NORMAL (seg) || xtensa_force_relocation (fix))
#define	TC_VALIDATE_FIX_SUB(fix)	xtensa_validate_fix_sub (fix)
#define NO_PSEUDO_DOT			xtensa_check_inside_bundle ()
#define tc_canonicalize_symbol_name(s)	xtensa_section_rename (s)
#define tc_canonicalize_section_name(s)	xtensa_section_rename (s)
#define tc_init_after_args()		xtensa_file_arch_init (stdoutput)
#define tc_fix_adjustable(fix)		xtensa_fix_adjustable (fix)
#define tc_frob_label(sym)		xtensa_frob_label (sym)
#define tc_unrecognized_line(ch)	xtensa_unrecognized_line (ch)
#define tc_symbol_new_hook(sym)		xtensa_symbol_new_hook (sym)
#define md_do_align(a,b,c,d,e)		xtensa_flush_pending_output ()
#define md_elf_section_change_hook	xtensa_elf_section_change_hook
#define md_end				xtensa_end
#define md_flush_pending_output()	xtensa_flush_pending_output ()
#define md_operand(x)
#define TEXT_SECTION_NAME		xtensa_section_rename (".text")
#define DATA_SECTION_NAME		xtensa_section_rename (".data")
#define BSS_SECTION_NAME		xtensa_section_rename (".bss")
#define HANDLE_ALIGN(fragP)		xtensa_handle_align (fragP)
#define MAX_MEM_FOR_RS_ALIGN_CODE	1


/* The renumber_section function must be mapped over all the sections
   after calling xtensa_post_relax_hook.  That function is static in
   write.c so it cannot be called from xtensa_post_relax_hook itself.  */

#define md_post_relax_hook \
  do \
    { \
      int i = 0; \
      xtensa_post_relax_hook (); \
      bfd_map_over_sections (stdoutput, renumber_sections, &i); \
    } \
  while (0)


/* Because xtensa relaxation can insert a new literal into the middle of
   fragment and thus require re-running the relaxation pass on the
   section, we need an explicit flag here.  We explicitly use the name
   "stretched" here to avoid changing the source code in write.c.  */

#define md_relax_frag(segment, fragP, stretch) \
  xtensa_relax_frag (fragP, stretch, &stretched)

/* Only allow call frame debug info optimization when linker relaxation is
   not enabled as otherwise we could generate the DWARF directives without
   the relocs necessary to patch them up.  */
#define md_allow_eh_opt (linkrelax == 0)

#define LOCAL_LABELS_FB 1
#define WORKING_DOT_WORD 1
#define DOUBLESLASH_LINE_COMMENTS
#define TC_HANDLES_FX_DONE
#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
#define TC_LINKRELAX_FIXUP(SEG) 0
#define MD_APPLY_SYM_VALUE(FIX) 0
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0

/* Use line number format that is amenable to linker relaxation.  */
#define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)


/* Resource reservation info functions.  */

/* Returns the number of copies of a particular unit.  */
typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);

/* Returns the number of units the opcode uses.  */
typedef int (*opcode_num_units_func) (void *, xtensa_opcode);

/* Given an opcode and an index into the opcode's funcUnit list,
   returns the unit used for the index.  */
typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);

/* Given an opcode and an index into the opcode's funcUnit list,
   returns the cycle during which the unit is used.  */
typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);

/* The above typedefs parameterize the resource_table so that the
   optional scheduler doesn't need its own resource reservation system.

   For simple resource checking, which is all that happens normally,
   the functions will be as follows (with some wrapping to make the
   interface more convenient):

   unit_num_copies_func = xtensa_funcUnit_num_copies
   opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
   opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
   opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage

   Of course the optional scheduler has its own reservation table
   and functions.  */

int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);

typedef struct
{
  void *data;
  int cycles;
  int allocated_cycles;
  int num_units;
  unit_num_copies_func unit_num_copies;
  opcode_num_units_func opcode_num_units;
  opcode_funcUnit_use_unit_func opcode_unit_use;
  opcode_funcUnit_use_stage_func opcode_unit_stage;
  unsigned char **units;
} resource_table;

resource_table *new_resource_table
  (void *, int, int, unit_num_copies_func, opcode_num_units_func,
   opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
void resize_resource_table (resource_table *, int);
void clear_resource_table (resource_table *);
bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
void reserve_resources (resource_table *, xtensa_opcode, int);
void release_resources (resource_table *, xtensa_opcode, int);

#endif /* TC_XTENSA */
Commit	Line	Data
e0001a05	1	/* tc-xtensa.h -- Header file for tc-xtensa.c.
58502fec	2	Copyright (C) 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
e0001a05 NC	3
	4	This file is part of GAS, the GNU Assembler.
	5
	6	GAS is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
ec2655a6	8	the Free Software Foundation; either version 3, or (at your option)
e0001a05 NC	9	any later version.
	10
	11	GAS is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with GAS; see the file COPYING. If not, write to the Free
4b4da160 NC	18	Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
4b4da160 NC	19	02110-1301, USA. */
e0001a05 NC	20
	21	#ifndef TC_XTENSA
	22	#define TC_XTENSA 1
	23
e0001a05	24	struct fix;
e0001a05	25
e0001a05 NC	26	#ifndef OBJ_ELF
	27	#error Xtensa support requires ELF object format
	28	#endif
	29
43cd72b9	30	#include "xtensa-isa.h"
e0001a05 NC	31	#include "xtensa-config.h"
	32
	33	#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
	34
	35
43cd72b9	36	/* Maximum number of opcode slots in a VLIW instruction. */
b08b5071	37	#define MAX_SLOTS 15
43cd72b9 BW	38
	39
	40	/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
	41	RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
	42	in the fr_var field. For the two exceptions, fr_var is a float value
	43	that records the frequency with which the following instruction is
	44	executed as a branch target. The aligner uses this information to
	45	tell which targets are most important to be aligned. */
	46
	47	enum xtensa_relax_statesE
	48	{
58502fec BW	49	RELAX_XTENSA_NONE,
58502fec BW	50
43cd72b9 BW	51	RELAX_ALIGN_NEXT_OPCODE,
	52	/* Use the first opcode of the next fragment to determine the
	53	alignment requirements. This is ONLY used for LOOPs currently. */
	54
	55	RELAX_CHECK_ALIGN_NEXT_OPCODE,
	56	/* The next non-empty frag contains a loop instruction. Check to see
	57	if it is correctly aligned, but do not align it. */
	58
	59	RELAX_DESIRE_ALIGN_IF_TARGET,
	60	/* These are placed in front of labels and converted to either
	61	RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
	62	relaxation begins. */
	63
	64	RELAX_ADD_NOP_IF_A0_B_RETW,
	65	/* These are placed in front of conditional branches. Before
	66	relaxation begins, they are turned into either NOPs for branches
	67	immediately followed by RETW or RETW.N or rs_fills of 0. This is
	68	used to avoid a hardware bug in some early versions of the
	69	processor. */
	70
	71	RELAX_ADD_NOP_IF_PRE_LOOP_END,
	72	/* These are placed after JX instructions. Before relaxation begins,
	73	they are turned into either NOPs, if the JX is one instruction
	74	before a loop end label, or rs_fills of 0. This is used to avoid a
	75	hardware interlock issue prior to Xtensa version T1040. */
	76
	77	RELAX_ADD_NOP_IF_SHORT_LOOP,
	78	/* These are placed after LOOP instructions and turned into NOPs when:
	79	(1) there are less than 3 instructions in the loop; we place 2 of
	80	these in a row to add up to 2 NOPS in short loops; or (2) the
	81	instructions in the loop do not include a branch or jump.
	82	Otherwise they are turned into rs_fills of 0 before relaxation
	83	begins. This is used to avoid hardware bug PR3830. */
	84
	85	RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
	86	/* These are placed after LOOP instructions and turned into NOPs if
	87	there are less than 12 bytes to the end of some other loop's end.
	88	Otherwise they are turned into rs_fills of 0 before relaxation
	89	begins. This is used to avoid hardware bug PR3830. */
	90
	91	RELAX_DESIRE_ALIGN,
	92	/* The next fragment would like its first instruction to NOT cross an
	93	instruction fetch boundary. */
	94
	95	RELAX_MAYBE_DESIRE_ALIGN,
	96	/* The next fragment might like its first instruction to NOT cross an
	97	instruction fetch boundary. These are placed after a branch that
	98	might be relaxed. If the branch is relaxed, then this frag will be
	99	a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
	100	frag. */
	101
	102	RELAX_LOOP_END,
	103	/* This will be turned into a NOP or NOP.N if the previous instruction
	104	is expanded to negate a loop. */
	105
	106	RELAX_LOOP_END_ADD_NOP,
	107	/* When the code density option is available, this will generate a
	108	NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
	109	fragment with a NOP in it. */
	110
	111	RELAX_LITERAL,
	112	/* Another fragment could generate an expansion here but has not yet. */
	113
	114	RELAX_LITERAL_NR,
115	/* Expansion has been generated by an instruction that generates a
116	literal. However, the stretch has NOT been reported yet in this
117	fragment. */
118
119	RELAX_LITERAL_FINAL,
120	/* Expansion has been generated by an instruction that generates a
121	literal. */
122
123	RELAX_LITERAL_POOL_BEGIN,
124	RELAX_LITERAL_POOL_END,
125	/* Technically these are not relaxations at all but mark a location
126	to store literals later. Note that fr_var stores the frchain for
127	BEGIN frags and fr_var stores now_seg for END frags. */
128
129	RELAX_NARROW,
130	/* The last instruction in this fragment (at->fr_opcode) can be
131	freely replaced with a single wider instruction if a future
132	alignment desires or needs it. */
133
134	RELAX_IMMED,
135	/* The last instruction in this fragment (at->fr_opcode) contains
b81bf389 BW	136	an immediate or symbol. If the value does not fit, relax the
b81bf389 BW	137	opcode using expansions from the relax table. */
c138bc38	138
43cd72b9 BW	139	RELAX_IMMED_STEP1,
43cd72b9 BW	140	/* The last instruction in this fragment (at->fr_opcode) contains a
b81bf389	141	literal. It has already been expanded 1 step. */
43cd72b9 BW	142
	143	RELAX_IMMED_STEP2,
	144	/* The last instruction in this fragment (at->fr_opcode) contains a
b81bf389 BW	145	literal. It has already been expanded 2 steps. */
	146
	147	RELAX_IMMED_STEP3,
	148	/* The last instruction in this fragment (at->fr_opcode) contains a
	149	literal. It has already been expanded 3 steps. */
43cd72b9 BW	150
	151	RELAX_SLOTS,
	152	/* There are instructions within the last VLIW instruction that need
	153	relaxation. Find the relaxation based on the slot info in
	154	xtensa_frag_type. Relaxations that deal with particular opcodes
	155	are slot-based (e.g., converting a MOVI to an L32R). Relaxations
	156	that deal with entire instructions, such as alignment, are not
	157	slot-based. */
	158
	159	RELAX_FILL_NOP,
	160	/* This marks the location of a pipeline stall. We can fill these guys
	161	in for alignment of any size. */
	162
	163	RELAX_UNREACHABLE,
	164	/* This marks the location as unreachable. The assembler may widen or
	165	narrow this area to meet alignment requirements of nearby
	166	instructions. */
	167
	168	RELAX_MAYBE_UNREACHABLE,
	169	/* This marks the location as possibly unreachable. These are placed
	170	after a branch that may be relaxed into a branch and jump. If the
c138bc38	171	branch is relaxed, then this frag will be converted to a
43cd72b9 BW	172	RELAX_UNREACHABLE frag. */
43cd72b9 BW	173
99ded152 BW	174	RELAX_ORG,
	175	/* This marks the location as having previously been an rs_org frag.
	176	rs_org frags are converted to fill-zero frags immediately after
	177	relaxation. However, we need to remember where they were so we can
	178	prevent the linker from changing the size of any frag between the
	179	section start and the org frag. */
	180
43cd72b9 BW	181	RELAX_NONE
	182	};
	183
	184	/* This is used as a stopper to bound the number of steps that
	185	can be taken. */
b81bf389	186	#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)
43cd72b9	187
e0001a05 NC	188	struct xtensa_frag_type
e0001a05 NC	189	{
43cd72b9 BW	190	/* Info about the current state of assembly, e.g., transform,
	191	absolute_literals, etc. These need to be passed to the backend and
	192	then to the object file.
	193
	194	When is_assembly_state_set is false, the frag inherits some of the
	195	state settings from the previous frag in this segment. Because it
	196	is not possible to intercept all fragment closures (frag_more and
	197	frag_append_1_char can close a frag), we use a pass after initial
	198	assembly to fill in the assembly states. */
	199
	200	unsigned int is_assembly_state_set : 1;
	201	unsigned int is_no_density : 1;
	202	unsigned int is_no_transform : 1;
7c834684	203	unsigned int use_longcalls : 1;
43cd72b9 BW	204	unsigned int use_absolute_literals : 1;
	205
	206	/* Inhibits relaxation of machine-dependent alignment frags the
	207	first time through a relaxation.... */
	208	unsigned int relax_seen : 1;
	209
0fa77c95	210	/* Information that is needed in the object file and set when known. */
43cd72b9 BW	211	unsigned int is_literal : 1;
	212	unsigned int is_loop_target : 1;
	213	unsigned int is_branch_target : 1;
	214	unsigned int is_insn : 1;
	215	unsigned int is_unreachable : 1;
e0001a05	216
43cd72b9	217	unsigned int is_specific_opcode : 1; /* also implies no_transform */
e0001a05	218
43cd72b9 BW	219	unsigned int is_align : 1;
	220	unsigned int is_text_align : 1;
	221	unsigned int alignment : 5;
	222
	223	/* A frag with this bit set is the first in a loop that actually
	224	contains an instruction. */
	225	unsigned int is_first_loop_insn : 1;
e0001a05	226
b5e4a23d BW	227	/* A frag with this bit set is a branch that we are using to
	228	align branch targets as if it were a normal narrow instruction. */
	229	unsigned int is_aligning_branch : 1;
	230
e0001a05 NC	231	/* For text fragments that can generate literals at relax time, this
	232	variable points to the frag where the literal will be stored. For
	233	literal frags, this variable points to the nearest literal pool
	234	location frag. This literal frag will be moved to after this
c48aaca0 BW	235	location. For RELAX_LITERAL_POOL_BEGIN frags, this field points
	236	to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
	237	frag, to make moving frags for this literal pool efficient. */
e0001a05 NC	238	fragS *literal_frag;
	239
	240	/* The destination segment for literal frags. (Note that this is only
dd49a749 BW	241	valid after xtensa_move_literals.) This field is also used for
dd49a749 BW	242	LITERAL_POOL_END frags. */
e0001a05 NC	243	segT lit_seg;
e0001a05 NC	244
dd49a749 BW	245	/* Frag chain for LITERAL_POOL_BEGIN frags. */
	246	struct frchain *lit_frchain;
	247
e0001a05 NC	248	/* For the relaxation scheme, some literal fragments can have their
e0001a05 NC	249	expansions modified by an instruction that relaxes. */
43cd72b9 BW	250	int text_expansion[MAX_SLOTS];
	251	int literal_expansion[MAX_SLOTS];
	252	int unreported_expansion;
	253
	254	/* For text fragments that can generate literals at relax time: */
	255	fragS *literal_frags[MAX_SLOTS];
	256	enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
	257	symbolS *slot_symbols[MAX_SLOTS];
43cd72b9 BW	258	offsetT slot_offsets[MAX_SLOTS];
	259
	260	/* The global aligner needs to walk backward through the list of
	261	frags. This field is only valid after xtensa_end. */
	262	fragS *fr_prev;
e0001a05 NC	263	};
e0001a05 NC	264
43cd72b9 BW	265
	266	/* For VLIW support, we need to know what slot a fixup applies to. */
	267	typedef struct xtensa_fix_data_struct
	268	{
	269	int slot;
	270	symbolS *X_add_symbol;
	271	offsetT X_add_number;
	272	} xtensa_fix_data;
	273
	274
	275	/* Structure to record xtensa-specific symbol information. */
	276	typedef struct xtensa_symfield_type
e0001a05	277	{
43cd72b9 BW	278	unsigned int is_loop_target : 1;
43cd72b9 BW	279	unsigned int is_branch_target : 1;
6a7eedfe	280	symbolS *next_expr_symbol;
43cd72b9 BW	281	} xtensa_symfield_type;
	282
	283
	284	/* Structure for saving information about a block of property data
	285	for frags that have the same flags. The forward reference is
	286	in this header file. The actual definition is in tc-xtensa.c. */
	287	struct xtensa_block_info_struct;
	288	typedef struct xtensa_block_info_struct xtensa_block_info;
	289
e0001a05	290
43cd72b9	291	/* Property section types. */
e0001a05 NC	292	typedef enum
e0001a05 NC	293	{
e0001a05	294	xt_literal_sec,
43cd72b9	295	xt_prop_sec,
e0001a05 NC	296	max_xt_sec
	297	} xt_section_type;
	298
	299	typedef struct xtensa_segment_info_struct
	300	{
	301	fragS *literal_pool_loc;
	302	xtensa_block_info *blocks[max_xt_sec];
	303	} xtensa_segment_info;
	304
e0001a05	305
7fa3d080 BW	306	extern const char *xtensa_target_format (void);
	307	extern void xtensa_init_fix_data (struct fix *);
	308	extern void xtensa_frag_init (fragS *);
	309	extern int xtensa_force_relocation (struct fix *);
30f725a1	310	extern int xtensa_validate_fix_sub (struct fix *);
7fa3d080 BW	311	extern void xtensa_frob_label (struct symbol *);
	312	extern void xtensa_end (void);
	313	extern void xtensa_post_relax_hook (void);
	314	extern void xtensa_file_arch_init (bfd *);
	315	extern void xtensa_flush_pending_output (void);
	316	extern bfd_boolean xtensa_fix_adjustable (struct fix *);
	317	extern void xtensa_symbol_new_hook (symbolS *);
	318	extern long xtensa_relax_frag (fragS , long, int );
	319	extern void xtensa_elf_section_change_hook (void);
	320	extern int xtensa_unrecognized_line (int);
	321	extern bfd_boolean xtensa_check_inside_bundle (void);
	322	extern void xtensa_handle_align (fragS *);
9456465c	323	extern char xtensa_section_rename (char );
e0001a05 NC	324
	325	#define TARGET_FORMAT xtensa_target_format ()
	326	#define TARGET_ARCH bfd_arch_xtensa
	327	#define TC_SEGMENT_INFO_TYPE xtensa_segment_info
43cd72b9 BW	328	#define TC_SYMFIELD_TYPE struct xtensa_symfield_type
	329	#define TC_FIX_TYPE xtensa_fix_data
	330	#define TC_INIT_FIX_DATA(x) xtensa_init_fix_data (x)
e0001a05 NC	331	#define TC_FRAG_TYPE struct xtensa_frag_type
e0001a05 NC	332	#define TC_FRAG_INIT(frag) xtensa_frag_init (frag)
43cd72b9	333	#define TC_FORCE_RELOCATION(fix) xtensa_force_relocation (fix)
30f725a1 BW	334	#define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
	335	(! SEG_NORMAL (seg) \|\| xtensa_force_relocation (fix))
	336	#define TC_VALIDATE_FIX_SUB(fix) xtensa_validate_fix_sub (fix)
43cd72b9	337	#define NO_PSEUDO_DOT xtensa_check_inside_bundle ()
e0001a05	338	#define tc_canonicalize_symbol_name(s) xtensa_section_rename (s)
9456465c	339	#define tc_canonicalize_section_name(s) xtensa_section_rename (s)
e0001a05 NC	340	#define tc_init_after_args() xtensa_file_arch_init (stdoutput)
	341	#define tc_fix_adjustable(fix) xtensa_fix_adjustable (fix)
	342	#define tc_frob_label(sym) xtensa_frob_label (sym)
43cd72b9	343	#define tc_unrecognized_line(ch) xtensa_unrecognized_line (ch)
6a7eedfe	344	#define tc_symbol_new_hook(sym) xtensa_symbol_new_hook (sym)
43cd72b9 BW	345	#define md_do_align(a,b,c,d,e) xtensa_flush_pending_output ()
43cd72b9 BW	346	#define md_elf_section_change_hook xtensa_elf_section_change_hook
e0001a05 NC	347	#define md_end xtensa_end
	348	#define md_flush_pending_output() xtensa_flush_pending_output ()
	349	#define md_operand(x)
	350	#define TEXT_SECTION_NAME xtensa_section_rename (".text")
	351	#define DATA_SECTION_NAME xtensa_section_rename (".data")
	352	#define BSS_SECTION_NAME xtensa_section_rename (".bss")
43cd72b9	353	#define HANDLE_ALIGN(fragP) xtensa_handle_align (fragP)
cf523b8e	354	#define MAX_MEM_FOR_RS_ALIGN_CODE 1
e0001a05 NC	355
	356
	357	/* The renumber_section function must be mapped over all the sections
	358	after calling xtensa_post_relax_hook. That function is static in
	359	write.c so it cannot be called from xtensa_post_relax_hook itself. */
	360
	361	#define md_post_relax_hook \
	362	do \
	363	{ \
	364	int i = 0; \
	365	xtensa_post_relax_hook (); \
	366	bfd_map_over_sections (stdoutput, renumber_sections, &i); \
	367	} \
	368	while (0)
	369
	370
	371	/* Because xtensa relaxation can insert a new literal into the middle of
	372	fragment and thus require re-running the relaxation pass on the
	373	section, we need an explicit flag here. We explicitly use the name
	374	"stretched" here to avoid changing the source code in write.c. */
	375
	376	#define md_relax_frag(segment, fragP, stretch) \
	377	xtensa_relax_frag (fragP, stretch, &stretched)
	378
ee6365aa BW	379	/* Only allow call frame debug info optimization when linker relaxation is
	380	not enabled as otherwise we could generate the DWARF directives without
	381	the relocs necessary to patch them up. */
	382	#define md_allow_eh_opt (linkrelax == 0)
e0001a05 NC	383
	384	#define LOCAL_LABELS_FB 1
	385	#define WORKING_DOT_WORD 1
	386	#define DOUBLESLASH_LINE_COMMENTS
	387	#define TC_HANDLES_FX_DONE
	388	#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
43cd72b9	389	#define TC_LINKRELAX_FIXUP(SEG) 0
e0001a05	390	#define MD_APPLY_SYM_VALUE(FIX) 0
43cd72b9 BW	391	#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
43cd72b9 BW	392
1737851b BW	393	/* Use line number format that is amenable to linker relaxation. */
	394	#define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)
	395
43cd72b9 BW	396
	397	/* Resource reservation info functions. */
	398
	399	/* Returns the number of copies of a particular unit. */
	400	typedef int (unit_num_copies_func) (void , xtensa_funcUnit);
	401
	402	/* Returns the number of units the opcode uses. */
	403	typedef int (opcode_num_units_func) (void , xtensa_opcode);
	404
c138bc38	405	/* Given an opcode and an index into the opcode's funcUnit list,
43cd72b9 BW	406	returns the unit used for the index. */
	407	typedef int (opcode_funcUnit_use_unit_func) (void , xtensa_opcode, int);
	408
c138bc38	409	/* Given an opcode and an index into the opcode's funcUnit list,
43cd72b9 BW	410	returns the cycle during which the unit is used. */
	411	typedef int (opcode_funcUnit_use_stage_func) (void , xtensa_opcode, int);
	412
c138bc38	413	/* The above typedefs parameterize the resource_table so that the
43cd72b9	414	optional scheduler doesn't need its own resource reservation system.
c138bc38 BW	415
	416	For simple resource checking, which is all that happens normally,
	417	the functions will be as follows (with some wrapping to make the
	418	interface more convenient):
43cd72b9 BW	419
	420	unit_num_copies_func = xtensa_funcUnit_num_copies
	421	opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
	422	opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
	423	opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
	424
c138bc38	425	Of course the optional scheduler has its own reservation table
43cd72b9 BW	426	and functions. */
43cd72b9 BW	427
7fa3d080 BW	428	int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
7fa3d080 BW	429	int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
43cd72b9 BW	430
	431	typedef struct
	432	{
	433	void *data;
	434	int cycles;
	435	int allocated_cycles;
	436	int num_units;
	437	unit_num_copies_func unit_num_copies;
	438	opcode_num_units_func opcode_num_units;
	439	opcode_funcUnit_use_unit_func opcode_unit_use;
	440	opcode_funcUnit_use_stage_func opcode_unit_stage;
0bf60745	441	unsigned char **units;
43cd72b9 BW	442	} resource_table;
43cd72b9 BW	443
c138bc38 BW	444	resource_table *new_resource_table
c138bc38 BW	445	(void *, int, int, unit_num_copies_func, opcode_num_units_func,
7fa3d080 BW	446	opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
	447	void resize_resource_table (resource_table *, int);
	448	void clear_resource_table (resource_table *);
	449	bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
	450	void reserve_resources (resource_table *, xtensa_opcode, int);
	451	void release_resources (resource_table *, xtensa_opcode, int);
e0001a05	452
e0001a05	453	#endif /* TC_XTENSA */