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* hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
[binutils.git] / opcodes / hppa-dis.c
CommitLineData
112087ed
KR		 1/* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
3
4 Contributed by the Center for Software Science at the
5 University of Utah ([email protected]).
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20
17068960 21#include <ansidecl.h>
112087ed 22#include "sysdep.h"
17068960 23#include "dis-asm.h"
112087ed
KR		 24#include "opcode/hppa.h"
25
26/* Initializer for an array of names of registers.
27 There should be NUM_REGS strings in this initializer. */
28
29#define REGISTER_NAMES \
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
32 "r20", "r21", "r22", "arg3", "arg2", "arg1", "arg0", "dp", "ret0", "ret1", \
33 "sp", "r31", "sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", \
34 "eiem", "iir", "isr", "ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", \
35 "sr3", "sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", "cr13", \
36 "cr24", "cr25", "cr26", "mpsfu_high", "mpsfu_low", "mpsfu_ovflo", "pad", \
37 "fpsr", "fpe1", "fpe2", "fpe3", "fpe4", "fpe5", "fpe6", "fpe7", \
38 "fp4", "fp5", "fp6", "fp7", "fp8", \
39 "fp9", "fp10", "fp11", "fp12", "fp13", "fp14", "fp15", \
40 "fp16", "fp17", "fp18", "fp19", "fp20", "fp21", "fp22", "fp23", \
41 "fp24", "fp25", "fp26", "fp27", "fp28", "fp29", "fp30", "fp31"}
42
43static const char *const reg_names[] = REGISTER_NAMES;
44
45typedef unsigned int CORE_ADDR;
46
47/* Get at various relevent fields of an instruction word. */
48
49#define MASK_5 0x1f
50#define MASK_11 0x7ff
51#define MASK_14 0x3fff
52#define MASK_21 0x1fffff
53
54/* This macro gets bit fields using HP's numbering (MSB = 0) */
55
56#define GET_FIELD(X, FROM, TO) \
57 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
58
59/* Some of these have been converted to 2-d arrays because they
60 consume less storage this way. If the maintenance becomes a
61 problem, convert them back to const 1-d pointer arrays. */
62static const char control_reg[][6] = {
63 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
64 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
65 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
66 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
67 "tr4", "tr5", "tr6", "tr7"
68};
69
70static const char compare_cond_names[][5] = {
71 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv",
72 ",od", ",tr", ",<>", ",>=", ",>", ",>>=",
73 ",>>", ",nsv", ",ev"
74};
75static const char add_cond_names[][5] = {
76 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv",
77 ",od", ",tr", ",<>", ",>=", ",>", ",uv",
78 ",vnz", ",nsv", ",ev"
79};
80static const char *const logical_cond_names[] = {
81 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
82 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
83static const char *const unit_cond_names[] = {
84 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
85 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
86};
87static const char shift_cond_names[][4] = {
88 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
89};
90static const char index_compl_names[][4] = {"", ",m", ",s", ",sm"};
91static const char short_ldst_compl_names[][4] = {"", ",ma", "", ",mb"};
92static const char *const short_bytes_compl_names[] = {
93 "", ",b,m", ",e", ",e,m"
94};
17068960 95static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
112087ed
KR		 96static const char float_comp_names[][8] =
97{
98 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
99 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
100 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
101 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
102};
103
104/* For a bunch of different instructions form an index into a
105 completer name table. */
106#define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
107 GET_FIELD (insn, 18, 18) << 1)
108
109#define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
110 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
111
112/* Utility function to print registers. Put these first, so gcc's function
113 inlining can do its stuff. */
114
115#define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
116
117static void
118fput_reg (reg, info)
119 unsigned reg;
120 disassemble_info *info;
121{
122 (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
123}
124
125static void
126fput_reg_r (reg, info)
127 unsigned reg;
128 disassemble_info *info;
129{
130 (*info->fprintf_func) (info->stream, "%sR", reg ? reg_names[reg] : "r0");
131}
132
133static void
134fput_creg (reg, info)
135 unsigned reg;
136 disassemble_info *info;
137{
138 (*info->fprintf_func) (info->stream, control_reg[reg]);
139}
140
141/* print constants with sign */
142
143static void
144fput_const (num, info)
145 unsigned num;
146 disassemble_info *info;
147{
148 if ((int)num < 0)
149 (*info->fprintf_func) (info->stream, "-%x", -(int)num);
150 else
151 (*info->fprintf_func) (info->stream, "%x", num);
152}
153
154/* Routines to extract various sized constants out of hppa
155 instructions. */
156
157/* This assumes that no garbage lies outside of the lower bits of
158 value. */
159
160static int
161sign_extend (val, bits)
162 unsigned val, bits;
163{
164 return (int)(val >> (bits - 1) ? (-1 << bits) | val : val);
165}
166
167/* For many immediate values the sign bit is the low bit! */
168
169static int
170low_sign_extend (val, bits)
171 unsigned val, bits;
172{
173 return (int)((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
174}
175/* extract the immediate field from a ld{bhw}s instruction */
176
177#if 0 /* not used */
178static unsigned
179get_field (val, from, to)
180 unsigned val, from, to;
181{
182 val = val >> (31 - to);
183 return val & ((1 << (32 - from)) - 1);
184}
185
186static unsigned
187set_field (val, from, to, new_val)
188 unsigned *val, from, to, new_val;
189{
190 unsigned mask = ~((1 << (to - from + 1)) << (31 - from));
191 return *val = (*val & mask) | (new_val << (31 - from));
192}
193#endif
194
195/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
196static int
197extract_3 (word)
198 unsigned word;
199{
200 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
201}
202
203static int
204extract_5_load (word)
205 unsigned word;
206{
207 return low_sign_extend (word >> 16 & MASK_5, 5);
208}
209
210/* extract the immediate field from a st{bhw}s instruction */
211static int
212extract_5_store (word)
213 unsigned word;
214{
215 return low_sign_extend (word & MASK_5, 5);
216}
217
218/* extract the immediate field from a break instruction */
219static unsigned
220extract_5r_store (word)
221 unsigned word;
222{
223 return (word & MASK_5);
224}
225
226/* extract the immediate field from a {sr}sm instruction */
227static unsigned
228extract_5R_store (word)
229 unsigned word;
230{
231 return (word >> 16 & MASK_5);
232}
233
234/* extract the immediate field from a bb instruction */
235static unsigned
236extract_5Q_store (word)
237 unsigned word;
238{
239 return (word >> 21 & MASK_5);
240}
241
242/* extract an 11 bit immediate field */
243static int
244extract_11 (word)
245 unsigned word;
246{
247 return low_sign_extend (word & MASK_11, 11);
248}
249
250/* extract a 14 bit immediate field */
251static int
252extract_14 (word)
253 unsigned word;
254{
255 return low_sign_extend (word & MASK_14, 14);
256}
257
258#if 0
259/* deposit a 14 bit constant in a word */
260static unsigned
261deposit_14 (opnd, word)
262 int opnd;
263 unsigned word;
264{
265 unsigned sign = (opnd < 0 ? 1 : 0);
266
267 return word | ((unsigned)opnd << 1 & MASK_14) | sign;
268}
269#endif
270
271/* extract a 21 bit constant */
272
273static int
274extract_21 (word)
275 unsigned word;
276{
277 int val;
278
279 word &= MASK_21;
280 word <<= 11;
281 val = GET_FIELD (word, 20, 20);
282 val <<= 11;
283 val |= GET_FIELD (word, 9, 19);
284 val <<= 2;
285 val |= GET_FIELD (word, 5, 6);
286 val <<= 5;
287 val |= GET_FIELD (word, 0, 4);
288 val <<= 2;
289 val |= GET_FIELD (word, 7, 8);
290 return sign_extend (val, 21) << 11;
291}
292
293#if 0
294/* deposit a 21 bit constant in a word. Although 21 bit constants are
295 usually the top 21 bits of a 32 bit constant, we assume that only
296 the low 21 bits of opnd are relevant */
297
298static unsigned
299deposit_21 (opnd, word)
300 unsigned opnd, word;
301{
302 unsigned val = 0;
303
304 val |= GET_FIELD (opnd, 11 + 14, 11 + 18);
305 val <<= 2;
306 val |= GET_FIELD (opnd, 11 + 12, 11 + 13);
307 val <<= 2;
308 val |= GET_FIELD (opnd, 11 + 19, 11 + 20);
309 val <<= 11;
310 val |= GET_FIELD (opnd, 11 + 1, 11 + 11);
311 val <<= 1;
312 val |= GET_FIELD (opnd, 11 + 0, 11 + 0);
313 return word | val;
314}
315#endif
316
317/* extract a 12 bit constant from branch instructions */
318
319static int
320extract_12 (word)
321 unsigned word;
322{
323 return sign_extend (GET_FIELD (word, 19, 28) |
324 GET_FIELD (word, 29, 29) << 10 |
325 (word & 0x1) << 11, 12) << 2;
326}
327
328/* extract a 17 bit constant from branch instructions, returning the
329 19 bit signed value. */
330
331static int
332extract_17 (word)
333 unsigned word;
334{
335 return sign_extend (GET_FIELD (word, 19, 28) |
336 GET_FIELD (word, 29, 29) << 10 |
337 GET_FIELD (word, 11, 15) << 11 |
338 (word & 0x1) << 16, 17) << 2;
339}
340
341/* Print one instruction. */
342int
343print_insn_hppa (memaddr, info)
344 bfd_vma memaddr;
345 disassemble_info *info;
346{
347 unsigned int insn, i, op;
348 FILE *stream = info->stream;
349
350 {
351 int status =
352 (*info->read_memory_func) (memaddr, (bfd_byte*) &insn, sizeof (insn),
353 info);
354 if (status != 0)
355 {
356 (*info->memory_error_func) (status, memaddr, info);
357 return -1;
358 }
359 }
360
361 for (i = 0; i < NUMOPCODES; ++i)
362 {
363 const struct pa_opcode *opcode = &pa_opcodes[i];
364 if ((insn & opcode->mask) == opcode->match)
365 {
366 register const char *s;
367
368 (*info->fprintf_func) (info->stream, "%s", opcode->name);
369
5aef7c67 370 if (!strchr ("cCY<?!@-+&U>~nZFIMad", opcode->args[0]))
112087ed
KR		 371 (*info->fprintf_func) (info->stream, " ");
372 for (s = opcode->args; *s != '\0'; ++s)
373 {
374 switch (*s)
375 {
376 case 'x':
377 fput_reg (GET_FIELD (insn, 11, 15), info);
378 break;
379 case 'X':
380 if (GET_FIELD (insn, 25, 25))
381 fput_reg_r (GET_FIELD (insn, 11, 15), info);
382 else
383 fput_reg (GET_FIELD (insn, 11, 15), info);
384 break;
385 case 'b':
386 fput_reg (GET_FIELD (insn, 6, 10), info);
387 break;
388 case '^':
389 fput_creg (GET_FIELD (insn, 6, 10), info);
390 break;
391 case 'E':
392 if (GET_FIELD (insn, 25, 25))
393 fput_reg_r (GET_FIELD (insn, 6, 10), info);
394 else
395 fput_reg (GET_FIELD (insn, 6, 10), info);
396 break;
397 case 't':
398 fput_reg (GET_FIELD (insn, 27, 31), info);
399 break;
400 case 'v':
401 if (GET_FIELD (insn, 25, 25))
402 fput_reg_r (GET_FIELD (insn, 27, 31), info);
403 else
404 fput_reg (GET_FIELD (insn, 27, 31), info);
405 break;
406 case '4':
407 fput_creg (GET_FIELD (insn, 6, 10), info);
408 break;
409 case '6':
410 fput_reg (GET_FIELD (insn, 11, 15), info);
411 break;
412 case '7':
413 fput_reg (GET_FIELD (insn, 27, 31), info);
414 break;
415 case '8':
416 fput_reg (GET_FIELD (insn, 16, 20), info);
417 break;
418 case '9':
419 fput_reg (GET_FIELD (insn, 21, 25), info);
420 break;
421 case '5':
422 fput_const (extract_5_load (insn), info);
423 break;
424 case 's':
425 fprintf_filtered (stream, "sr%d", GET_FIELD (insn, 16, 17));
426 break;
427 case 'S':
428 (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
429 break;
430 case 'c':
431 (*info->fprintf_func) (info->stream, "%s ",
432 index_compl_names[GET_COMPL (insn)]);
433 break;
434 case 'C':
435 (*info->fprintf_func) (info->stream, "%s ",
436 short_ldst_compl_names[GET_COMPL (insn)]);
437 break;
438 case 'Y':
439 (*info->fprintf_func) (info->stream, "%s ",
440 short_bytes_compl_names[GET_COMPL (insn)]);
441 break;
442 /* these four conditions are for the set of instructions
443 which distinguish true/false conditions by opcode rather
444 than by the 'f' bit (sigh): comb, comib, addb, addib */
445 case '<':
446 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)],
447 info);
448 break;
449 case '?':
450 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18) + 8],
451 info);
452 break;
453 case '@':
454 fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18) + 8],
455 info);
456 break;
5aef7c67 457 case 'a':
4d135f1c
JK		 458 (*info->fprintf_func) (info->stream, "%s ",
459 compare_cond_names[GET_COND (insn)]);
112087ed 460 break;
5aef7c67 461 case 'd':
4d135f1c
JK		 462 (*info->fprintf_func) (info->stream, "%s ",
463 add_cond_names[GET_COND (insn)]);
464 break;
112087ed
KR		 465 case '!':
466 (*info->fprintf_func) (info->stream, "%s",
467 add_cond_names[GET_FIELD (insn, 16, 18)]);
468 break;
469
470 case '&':
471 (*info->fprintf_func) (info->stream, "%s ",
472 logical_cond_names[GET_COND (insn)]);
473 break;
474 case 'U':
475 (*info->fprintf_func) (info->stream, "%s ",
476 unit_cond_names[GET_COND (insn)]);
477 break;
478 case '>':
479 case '~':
981b3a27
JK		 480 (*info->fprintf_func)
481 (info->stream, "%s",
482 shift_cond_names[GET_FIELD (insn, 16, 18)]);
483
484 /* If the next character in args is 'n', it will handle
485 putting out the space. */
486 if (s[1] != 'n')
487 (*info->fprintf_func) (info->stream, " ");
112087ed
KR		 488 break;
489 case 'V':
490 fput_const (extract_5_store (insn), info);
491 break;
b2ad2e64
JK		 492 case 'r':
493 fput_const (extract_5r_store (insn), info);
494 break;
112087ed
KR		 495 case 'R':
496 fput_const (extract_5R_store (insn), info);
497 break;
498 case 'Q':
499 fput_const (extract_5Q_store (insn), info);
500 break;
501 case 'i':
502 fput_const (extract_11 (insn), info);
503 break;
504 case 'j':
505 fput_const (extract_14 (insn), info);
506 break;
507 case 'k':
508 fput_const (extract_21 (insn), info);
509 break;
510 case 'n':
511 if (insn & 0x2)
512 (*info->fprintf_func) (info->stream, ",n ");
513 else
514 (*info->fprintf_func) (info->stream, " ");
515 break;
516 case 'w':
517 (*info->print_address_func) (memaddr + 8 + extract_12 (insn),
518 info);
519 break;
520 case 'W':
521 /* don't interpret an address if it's an external branch
522 instruction. */
523 op = GET_FIELD (insn, 0, 5);
524 if (op != 0x38 /* be */ && op != 0x39 /* ble */)
525 (*info->print_address_func) ((memaddr + 8
526 + extract_17 (insn)),
527 info);
528 else
529 fput_const (extract_17 (insn), info);
530 break;
531 case 'p':
532 (*info->fprintf_func) (info->stream, "%d",
533 31 - GET_FIELD (insn, 22, 26));
534 break;
535 case 'P':
536 (*info->fprintf_func) (info->stream, "%d",
537 GET_FIELD (insn, 22, 26));
538 break;
539 case 'T':
540 (*info->fprintf_func) (info->stream, "%d",
541 32 - GET_FIELD (insn, 27, 31));
542 break;
543 case 'A':
544 fput_const (GET_FIELD (insn, 6, 18), info);
545 break;
546 case 'Z':
547 if (GET_FIELD (insn, 26, 26))
548 (*info->fprintf_func) (info->stream, ",m ");
549 else
550 (*info->fprintf_func) (info->stream, " ");
551 break;
552 case 'D':
553 fput_const (GET_FIELD (insn, 6, 31), info);
554 break;
555 case 'f':
556 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
557 break;
558 case 'O':
559 fput_const ((GET_FIELD (insn, 6,20) << 5 |
560 GET_FIELD (insn, 27, 31)), info);
561 break;
562 case 'o':
563 fput_const (GET_FIELD (insn, 6, 20), info);
564 break;
565 case '2':
566 fput_const ((GET_FIELD (insn, 6, 22) << 5 |
567 GET_FIELD (insn, 27, 31)), info);
568 break;
569 case '1':
570 fput_const ((GET_FIELD (insn, 11, 20) << 5 |
571 GET_FIELD (insn, 27, 31)), info);
572 break;
573 case '0':
574 fput_const ((GET_FIELD (insn, 16, 20) << 5 |
575 GET_FIELD (insn, 27, 31)), info);
576 break;
577 case 'u':
578 (*info->fprintf_func) (info->stream, "%d", GET_FIELD (insn, 23, 25));
579 break;
580 case 'F':
581 /* if no destination completer, need a space here */
582 if (GET_FIELD (insn, 21, 22) == 1)
583 fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
584 info);
585 else
586 (*info->fprintf_func) (info->stream, "%s ",
587 float_format_names[GET_FIELD
588 (insn, 19, 20)]);
589 break;
590 case 'G':
591 (*info->fprintf_func) (info->stream, "%s ",
592 float_format_names[GET_FIELD (insn,
593 17, 18)]);
594 break;
595 case 'H':
596 fputs_filtered (float_format_names[GET_FIELD
597 (insn, 26, 26)], info);
598 break;
599 case 'I':
600 /* if no destination completer, need a space here */
601 if (GET_FIELD (insn, 21, 22) == 1)
602 fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
603 info);
604 else
605 fprintf_filtered (stream, "%s ",
606 float_format_names[GET_FIELD
607 (insn, 20, 20)]);
608 break;
609 case 'J':
610 if (GET_FIELD (insn, 24, 24))
611 fput_reg_r (GET_FIELD (insn, 6, 10), info);
612 else
613 fput_reg (GET_FIELD (insn, 6, 10), info);
614
615 break;
616 case 'K':
617 if (GET_FIELD (insn, 19, 19))
618 fput_reg_r (GET_FIELD (insn, 11, 15), info);
619 else
620 fput_reg (GET_FIELD (insn, 11, 15), info);
621 break;
622 case 'M':
623 fputs_filtered (float_comp_names[GET_FIELD (insn, 27, 31)],
624 info);
625 break;
626 default:
627 (*info->fprintf_func) (info->stream, "%c", *s);
628 break;
629 }
630 }
631 return sizeof(insn);
632 }
633 }
634 (*info->fprintf_func) (info->stream, "#%8x", insn);
635 return sizeof(insn);
636}
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