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* bfd.c (bfd_perror): Flush stdout before and stderr after printing
[binutils.git] / bfd / elf32-arm.c
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252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
e6a6bb22 3 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840 263
0855e32b 264 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 265 0, /* rightshift */
0855e32b
NS		 266 2, /* size (0 = byte, 1 = short, 2 = long) */
267 32, /* bitsize */
7f266840
DJ		 268 FALSE, /* pc_relative */
269 0, /* bitpos */
0855e32b 270 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 271 bfd_elf_generic_reloc, /* special_function */
0855e32b 272 "R_ARM_TLS_DESC", /* name */
7f266840 273 FALSE, /* partial_inplace */
0855e32b
NS		 274 0xffffffff, /* src_mask */
275 0xffffffff, /* dst_mask */
7f266840
DJ		 276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
0855e32b
NS		 1355 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1356 0, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 32, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_bitfield,/* complain_on_overflow */
1362 NULL, /* special_function */
1363 "R_ARM_TLS_GOTDESC", /* name */
1364 TRUE, /* partial_inplace */
1365 0xffffffff, /* src_mask */
1366 0xffffffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 HOWTO (R_ARM_TLS_CALL, /* type */
1370 0, /* rightshift */
1371 2, /* size (0 = byte, 1 = short, 2 = long) */
1372 24, /* bitsize */
1373 FALSE, /* pc_relative */
1374 0, /* bitpos */
1375 complain_overflow_dont,/* complain_on_overflow */
1376 bfd_elf_generic_reloc, /* special_function */
1377 "R_ARM_TLS_CALL", /* name */
1378 FALSE, /* partial_inplace */
1379 0x00ffffff, /* src_mask */
1380 0x00ffffff, /* dst_mask */
1381 FALSE), /* pcrel_offset */
1382
1383 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1384 0, /* rightshift */
1385 2, /* size (0 = byte, 1 = short, 2 = long) */
1386 0, /* bitsize */
1387 FALSE, /* pc_relative */
1388 0, /* bitpos */
1389 complain_overflow_bitfield,/* complain_on_overflow */
1390 bfd_elf_generic_reloc, /* special_function */
1391 "R_ARM_TLS_DESCSEQ", /* name */
1392 FALSE, /* partial_inplace */
1393 0x00000000, /* src_mask */
1394 0x00000000, /* dst_mask */
1395 FALSE), /* pcrel_offset */
1396
1397 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1398 0, /* rightshift */
1399 2, /* size (0 = byte, 1 = short, 2 = long) */
1400 24, /* bitsize */
1401 FALSE, /* pc_relative */
1402 0, /* bitpos */
1403 complain_overflow_dont,/* complain_on_overflow */
1404 bfd_elf_generic_reloc, /* special_function */
1405 "R_ARM_THM_TLS_CALL", /* name */
1406 FALSE, /* partial_inplace */
1407 0x07ff07ff, /* src_mask */
1408 0x07ff07ff, /* dst_mask */
1409 FALSE), /* pcrel_offset */
c19d1205
ZW		 1410
1411 HOWTO (R_ARM_PLT32_ABS, /* type */
1412 0, /* rightshift */
1413 2, /* size (0 = byte, 1 = short, 2 = long) */
1414 32, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 bfd_elf_generic_reloc, /* special_function */
1419 "R_ARM_PLT32_ABS", /* name */
1420 FALSE, /* partial_inplace */
1421 0xffffffff, /* src_mask */
1422 0xffffffff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424
1425 HOWTO (R_ARM_GOT_ABS, /* type */
1426 0, /* rightshift */
1427 2, /* size (0 = byte, 1 = short, 2 = long) */
1428 32, /* bitsize */
1429 FALSE, /* pc_relative */
1430 0, /* bitpos */
1431 complain_overflow_dont,/* complain_on_overflow */
1432 bfd_elf_generic_reloc, /* special_function */
1433 "R_ARM_GOT_ABS", /* name */
1434 FALSE, /* partial_inplace */
1435 0xffffffff, /* src_mask */
1436 0xffffffff, /* dst_mask */
1437 FALSE), /* pcrel_offset */
1438
1439 HOWTO (R_ARM_GOT_PREL, /* type */
1440 0, /* rightshift */
1441 2, /* size (0 = byte, 1 = short, 2 = long) */
1442 32, /* bitsize */
1443 TRUE, /* pc_relative */
1444 0, /* bitpos */
1445 complain_overflow_dont, /* complain_on_overflow */
1446 bfd_elf_generic_reloc, /* special_function */
1447 "R_ARM_GOT_PREL", /* name */
1448 FALSE, /* partial_inplace */
1449 0xffffffff, /* src_mask */
1450 0xffffffff, /* dst_mask */
1451 TRUE), /* pcrel_offset */
1452
1453 HOWTO (R_ARM_GOT_BREL12, /* type */
1454 0, /* rightshift */
1455 2, /* size (0 = byte, 1 = short, 2 = long) */
1456 12, /* bitsize */
1457 FALSE, /* pc_relative */
1458 0, /* bitpos */
1459 complain_overflow_bitfield,/* complain_on_overflow */
1460 bfd_elf_generic_reloc, /* special_function */
1461 "R_ARM_GOT_BREL12", /* name */
1462 FALSE, /* partial_inplace */
1463 0x00000fff, /* src_mask */
1464 0x00000fff, /* dst_mask */
1465 FALSE), /* pcrel_offset */
1466
1467 HOWTO (R_ARM_GOTOFF12, /* type */
1468 0, /* rightshift */
1469 2, /* size (0 = byte, 1 = short, 2 = long) */
1470 12, /* bitsize */
1471 FALSE, /* pc_relative */
1472 0, /* bitpos */
1473 complain_overflow_bitfield,/* complain_on_overflow */
1474 bfd_elf_generic_reloc, /* special_function */
1475 "R_ARM_GOTOFF12", /* name */
1476 FALSE, /* partial_inplace */
1477 0x00000fff, /* src_mask */
1478 0x00000fff, /* dst_mask */
1479 FALSE), /* pcrel_offset */
1480
1481 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1482
1483 /* GNU extension to record C++ vtable member usage */
1484 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1485 0, /* rightshift */
1486 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1487 0, /* bitsize */
ba93b8ac
DJ		 1488 FALSE, /* pc_relative */
1489 0, /* bitpos */
c19d1205
ZW		 1490 complain_overflow_dont, /* complain_on_overflow */
1491 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1492 "R_ARM_GNU_VTENTRY", /* name */
1493 FALSE, /* partial_inplace */
1494 0, /* src_mask */
1495 0, /* dst_mask */
1496 FALSE), /* pcrel_offset */
1497
1498 /* GNU extension to record C++ vtable hierarchy */
1499 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1500 0, /* rightshift */
1501 2, /* size (0 = byte, 1 = short, 2 = long) */
1502 0, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont, /* complain_on_overflow */
1506 NULL, /* special_function */
1507 "R_ARM_GNU_VTINHERIT", /* name */
1508 FALSE, /* partial_inplace */
1509 0, /* src_mask */
1510 0, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512
1513 HOWTO (R_ARM_THM_JUMP11, /* type */
1514 1, /* rightshift */
1515 1, /* size (0 = byte, 1 = short, 2 = long) */
1516 11, /* bitsize */
1517 TRUE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_signed, /* complain_on_overflow */
1520 bfd_elf_generic_reloc, /* special_function */
1521 "R_ARM_THM_JUMP11", /* name */
1522 FALSE, /* partial_inplace */
1523 0x000007ff, /* src_mask */
1524 0x000007ff, /* dst_mask */
1525 TRUE), /* pcrel_offset */
1526
1527 HOWTO (R_ARM_THM_JUMP8, /* type */
1528 1, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 8, /* bitsize */
1531 TRUE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_signed, /* complain_on_overflow */
1534 bfd_elf_generic_reloc, /* special_function */
1535 "R_ARM_THM_JUMP8", /* name */
1536 FALSE, /* partial_inplace */
1537 0x000000ff, /* src_mask */
1538 0x000000ff, /* dst_mask */
1539 TRUE), /* pcrel_offset */
ba93b8ac 1540
c19d1205
ZW		 1541 /* TLS relocations */
1542 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1543 0, /* rightshift */
1544 2, /* size (0 = byte, 1 = short, 2 = long) */
1545 32, /* bitsize */
1546 FALSE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1549 NULL, /* special_function */
1550 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1551 TRUE, /* partial_inplace */
1552 0xffffffff, /* src_mask */
1553 0xffffffff, /* dst_mask */
c19d1205 1554 FALSE), /* pcrel_offset */
ba93b8ac 1555
ba93b8ac
DJ		 1556 HOWTO (R_ARM_TLS_LDM32, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 32, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_bitfield,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_ARM_TLS_LDM32", /* name */
1565 TRUE, /* partial_inplace */
1566 0xffffffff, /* src_mask */
1567 0xffffffff, /* dst_mask */
c19d1205 1568 FALSE), /* pcrel_offset */
ba93b8ac 1569
c19d1205 1570 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 32, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_bitfield,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
c19d1205 1578 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1579 TRUE, /* partial_inplace */
1580 0xffffffff, /* src_mask */
1581 0xffffffff, /* dst_mask */
c19d1205 1582 FALSE), /* pcrel_offset */
ba93b8ac 1583
ba93b8ac
DJ		 1584 HOWTO (R_ARM_TLS_IE32, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 32, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_bitfield,/* complain_on_overflow */
1591 NULL, /* special_function */
1592 "R_ARM_TLS_IE32", /* name */
1593 TRUE, /* partial_inplace */
1594 0xffffffff, /* src_mask */
1595 0xffffffff, /* dst_mask */
c19d1205 1596 FALSE), /* pcrel_offset */
7f266840 1597
c19d1205 1598 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1599 0, /* rightshift */
1600 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1601 32, /* bitsize */
7f266840
DJ		 1602 FALSE, /* pc_relative */
1603 0, /* bitpos */
c19d1205
ZW		 1604 complain_overflow_bitfield,/* complain_on_overflow */
1605 bfd_elf_generic_reloc, /* special_function */
1606 "R_ARM_TLS_LE32", /* name */
1607 TRUE, /* partial_inplace */
1608 0xffffffff, /* src_mask */
1609 0xffffffff, /* dst_mask */
1610 FALSE), /* pcrel_offset */
7f266840 1611
c19d1205
ZW		 1612 HOWTO (R_ARM_TLS_LDO12, /* type */
1613 0, /* rightshift */
1614 2, /* size (0 = byte, 1 = short, 2 = long) */
1615 12, /* bitsize */
1616 FALSE, /* pc_relative */
7f266840 1617 0, /* bitpos */
c19d1205 1618 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1619 bfd_elf_generic_reloc, /* special_function */
c19d1205 1620 "R_ARM_TLS_LDO12", /* name */
7f266840 1621 FALSE, /* partial_inplace */
c19d1205
ZW		 1622 0x00000fff, /* src_mask */
1623 0x00000fff, /* dst_mask */
1624 FALSE), /* pcrel_offset */
7f266840 1625
c19d1205
ZW		 1626 HOWTO (R_ARM_TLS_LE12, /* type */
1627 0, /* rightshift */
1628 2, /* size (0 = byte, 1 = short, 2 = long) */
1629 12, /* bitsize */
1630 FALSE, /* pc_relative */
7f266840 1631 0, /* bitpos */
c19d1205 1632 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1633 bfd_elf_generic_reloc, /* special_function */
c19d1205 1634 "R_ARM_TLS_LE12", /* name */
7f266840 1635 FALSE, /* partial_inplace */
c19d1205
ZW		 1636 0x00000fff, /* src_mask */
1637 0x00000fff, /* dst_mask */
1638 FALSE), /* pcrel_offset */
7f266840 1639
c19d1205 1640 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1641 0, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1643 12, /* bitsize */
1644 FALSE, /* pc_relative */
7f266840 1645 0, /* bitpos */
c19d1205 1646 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1647 bfd_elf_generic_reloc, /* special_function */
c19d1205 1648 "R_ARM_TLS_IE12GP", /* name */
7f266840 1649 FALSE, /* partial_inplace */
c19d1205
ZW		 1650 0x00000fff, /* src_mask */
1651 0x00000fff, /* dst_mask */
1652 FALSE), /* pcrel_offset */
0855e32b
NS		 1653
1654 EMPTY_HOWTO (112),
1655 EMPTY_HOWTO (113),
1656 EMPTY_HOWTO (114),
1657 EMPTY_HOWTO (115),
1658 EMPTY_HOWTO (116),
1659 EMPTY_HOWTO (117),
1660 EMPTY_HOWTO (118),
1661 EMPTY_HOWTO (119),
1662 EMPTY_HOWTO (120),
1663 EMPTY_HOWTO (121),
1664 EMPTY_HOWTO (122),
1665 EMPTY_HOWTO (123),
1666 EMPTY_HOWTO (124),
1667 EMPTY_HOWTO (125),
1668 EMPTY_HOWTO (126),
1669 EMPTY_HOWTO (127),
1670 EMPTY_HOWTO (128),
1671
1672 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1673 0, /* rightshift */
1674 1, /* size (0 = byte, 1 = short, 2 = long) */
1675 0, /* bitsize */
1676 FALSE, /* pc_relative */
1677 0, /* bitpos */
1678 complain_overflow_bitfield,/* complain_on_overflow */
1679 bfd_elf_generic_reloc, /* special_function */
1680 "R_ARM_THM_TLS_DESCSEQ",/* name */
1681 FALSE, /* partial_inplace */
1682 0x00000000, /* src_mask */
1683 0x00000000, /* dst_mask */
1684 FALSE), /* pcrel_offset */
c19d1205
ZW		 1685};
1686
1687/* 112-127 private relocations
1688 128 R_ARM_ME_TOO, obsolete
1689 129-255 unallocated in AAELF.
7f266840 1690
c19d1205
ZW		 1691 249-255 extended, currently unused, relocations: */
1692
4962c51a 1693static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1694{
1695 HOWTO (R_ARM_RREL32, /* type */
1696 0, /* rightshift */
1697 0, /* size (0 = byte, 1 = short, 2 = long) */
1698 0, /* bitsize */
1699 FALSE, /* pc_relative */
1700 0, /* bitpos */
1701 complain_overflow_dont,/* complain_on_overflow */
1702 bfd_elf_generic_reloc, /* special_function */
1703 "R_ARM_RREL32", /* name */
1704 FALSE, /* partial_inplace */
1705 0, /* src_mask */
1706 0, /* dst_mask */
1707 FALSE), /* pcrel_offset */
1708
1709 HOWTO (R_ARM_RABS32, /* type */
1710 0, /* rightshift */
1711 0, /* size (0 = byte, 1 = short, 2 = long) */
1712 0, /* bitsize */
1713 FALSE, /* pc_relative */
1714 0, /* bitpos */
1715 complain_overflow_dont,/* complain_on_overflow */
1716 bfd_elf_generic_reloc, /* special_function */
1717 "R_ARM_RABS32", /* name */
1718 FALSE, /* partial_inplace */
1719 0, /* src_mask */
1720 0, /* dst_mask */
1721 FALSE), /* pcrel_offset */
1722
1723 HOWTO (R_ARM_RPC24, /* type */
1724 0, /* rightshift */
1725 0, /* size (0 = byte, 1 = short, 2 = long) */
1726 0, /* bitsize */
1727 FALSE, /* pc_relative */
1728 0, /* bitpos */
1729 complain_overflow_dont,/* complain_on_overflow */
1730 bfd_elf_generic_reloc, /* special_function */
1731 "R_ARM_RPC24", /* name */
1732 FALSE, /* partial_inplace */
1733 0, /* src_mask */
1734 0, /* dst_mask */
1735 FALSE), /* pcrel_offset */
1736
1737 HOWTO (R_ARM_RBASE, /* type */
1738 0, /* rightshift */
1739 0, /* size (0 = byte, 1 = short, 2 = long) */
1740 0, /* bitsize */
1741 FALSE, /* pc_relative */
1742 0, /* bitpos */
1743 complain_overflow_dont,/* complain_on_overflow */
1744 bfd_elf_generic_reloc, /* special_function */
1745 "R_ARM_RBASE", /* name */
1746 FALSE, /* partial_inplace */
1747 0, /* src_mask */
1748 0, /* dst_mask */
1749 FALSE) /* pcrel_offset */
1750};
1751
1752static reloc_howto_type *
1753elf32_arm_howto_from_type (unsigned int r_type)
1754{
906e58ca 1755 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1756 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1757
c19d1205 1758 if (r_type >= R_ARM_RREL32
906e58ca 1759 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1760 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1761
c19d1205 1762 return NULL;
7f266840
DJ		 1763}
1764
1765static void
1766elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1767 Elf_Internal_Rela * elf_reloc)
1768{
1769 unsigned int r_type;
1770
1771 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1772 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1773}
1774
1775struct elf32_arm_reloc_map
1776 {
1777 bfd_reloc_code_real_type bfd_reloc_val;
1778 unsigned char elf_reloc_val;
1779 };
1780
1781/* All entries in this list must also be present in elf32_arm_howto_table. */
1782static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1783 {
1784 {BFD_RELOC_NONE, R_ARM_NONE},
1785 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1786 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1787 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1788 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1789 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1790 {BFD_RELOC_32, R_ARM_ABS32},
1791 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1792 {BFD_RELOC_8, R_ARM_ABS8},
1793 {BFD_RELOC_16, R_ARM_ABS16},
1794 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1795 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1796 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1797 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1798 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1799 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1800 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1801 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1802 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1803 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1804 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1805 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1806 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1807 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1808 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1809 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1810 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1811 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1812 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1813 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1814 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1815 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1816 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1817 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1818 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1819 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1820 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1821 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1822 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1823 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1824 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1825 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1826 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1827 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1828 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1829 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1830 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1831 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1832 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1833 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1834 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1835 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1836 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1837 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1838 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1839 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1840 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1841 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1842 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1843 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1844 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1845 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1846 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1847 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1848 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1849 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1850 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1851 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1852 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1853 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1854 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1855 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1856 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1857 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1858 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1859 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1860 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1861 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1862 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1863 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1864 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1865 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1866 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1867 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1868 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1869 };
1870
1871static reloc_howto_type *
f1c71a59
ZW		 1872elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1873 bfd_reloc_code_real_type code)
7f266840
DJ		 1874{
1875 unsigned int i;
8029a119 1876
906e58ca 1877 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1878 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1879 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1880
c19d1205 1881 return NULL;
7f266840
DJ		 1882}
1883
157090f7
AM		 1884static reloc_howto_type *
1885elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1886 const char *r_name)
1887{
1888 unsigned int i;
1889
906e58ca 1890 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1891 if (elf32_arm_howto_table_1[i].name != NULL
1892 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1893 return &elf32_arm_howto_table_1[i];
1894
906e58ca 1895 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1896 if (elf32_arm_howto_table_2[i].name != NULL
1897 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1898 return &elf32_arm_howto_table_2[i];
1899
1900 return NULL;
1901}
1902
906e58ca
NC		 1903/* Support for core dump NOTE sections. */
1904
7f266840 1905static bfd_boolean
f1c71a59 1906elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1907{
1908 int offset;
1909 size_t size;
1910
1911 switch (note->descsz)
1912 {
1913 default:
1914 return FALSE;
1915
8029a119 1916 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1917 /* pr_cursig */
1918 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1919
1920 /* pr_pid */
261b8d08 1921 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1922
1923 /* pr_reg */
1924 offset = 72;
1925 size = 72;
1926
1927 break;
1928 }
1929
1930 /* Make a ".reg/999" section. */
1931 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1932 size, note->descpos + offset);
1933}
1934
1935static bfd_boolean
f1c71a59 1936elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1937{
1938 switch (note->descsz)
1939 {
1940 default:
1941 return FALSE;
1942
8029a119 1943 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1944 elf_tdata (abfd)->core_program
1945 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1946 elf_tdata (abfd)->core_command
1947 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1948 }
1949
1950 /* Note that for some reason, a spurious space is tacked
1951 onto the end of the args in some (at least one anyway)
1952 implementations, so strip it off if it exists. */
7f266840
DJ		 1953 {
1954 char *command = elf_tdata (abfd)->core_command;
1955 int n = strlen (command);
1956
1957 if (0 < n && command[n - 1] == ' ')
1958 command[n - 1] = '\0';
1959 }
1960
1961 return TRUE;
1962}
1963
1964#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1965#define TARGET_LITTLE_NAME "elf32-littlearm"
1966#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1967#define TARGET_BIG_NAME "elf32-bigarm"
1968
1969#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1970#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1971
252b5132
RH		 1972typedef unsigned long int insn32;
1973typedef unsigned short int insn16;
1974
3a4a14e9
PB		 1975/* In lieu of proper flags, assume all EABIv4 or later objects are
1976 interworkable. */
57e8b36a 1977#define INTERWORK_FLAG(abfd) \
3a4a14e9 1978 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1979 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1980 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1981
252b5132
RH		 1982/* The linker script knows the section names for placement.
1983 The entry_names are used to do simple name mangling on the stubs.
1984 Given a function name, and its type, the stub can be found. The
9b485d32 1985 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1986#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1987#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1988
1989#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1990#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1991
c7b8f16e
JB		 1992#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1993#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1994
845b51d6
PB		 1995#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1996#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1997
7413f23f
DJ		 1998#define STUB_ENTRY_NAME "__%s_veneer"
1999
252b5132
RH		 2000/* The name of the dynamic interpreter. This is put in the .interp
2001 section. */
2002#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2003
0855e32b
NS		 2004static const unsigned long tls_trampoline [] =
2005 {
2006 0xe08e0000, /* add r0, lr, r0 */
2007 0xe5901004, /* ldr r1, [r0,#4] */
2008 0xe12fff11, /* bx r1 */
2009 };
2010
2011static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2012 {
2013 0xe52d2004, /* push {r2} */
2014 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2015 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2016 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2017 0xe081100f, /* 2: add r1, pc */
2018 0xe12fff12, /* bx r2 */
2019 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2020 + dl_tlsdesc_lazy_resolver(GOT) */
2021 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2022 };
2023
5e681ec4
PB		 2024#ifdef FOUR_WORD_PLT
2025
252b5132
RH		 2026/* The first entry in a procedure linkage table looks like
2027 this. It is set up so that any shared library function that is
59f2c4e7 2028 called before the relocation has been set up calls the dynamic
9b485d32 2029 linker first. */
e5a52504 2030static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 2031 {
2032 0xe52de004, /* str lr, [sp, #-4]! */
2033 0xe59fe010, /* ldr lr, [pc, #16] */
2034 0xe08fe00e, /* add lr, pc, lr */
2035 0xe5bef008, /* ldr pc, [lr, #8]! */
2036 };
2037
2038/* Subsequent entries in a procedure linkage table look like
2039 this. */
e5a52504 2040static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 2041 {
2042 0xe28fc600, /* add ip, pc, #NN */
2043 0xe28cca00, /* add ip, ip, #NN */
2044 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2045 0x00000000, /* unused */
2046 };
2047
2048#else
2049
5e681ec4
PB		 2050/* The first entry in a procedure linkage table looks like
2051 this. It is set up so that any shared library function that is
2052 called before the relocation has been set up calls the dynamic
2053 linker first. */
e5a52504 2054static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 2055 {
5e681ec4
PB		 2056 0xe52de004, /* str lr, [sp, #-4]! */
2057 0xe59fe004, /* ldr lr, [pc, #4] */
2058 0xe08fe00e, /* add lr, pc, lr */
2059 0xe5bef008, /* ldr pc, [lr, #8]! */
2060 0x00000000, /* &GOT[0] - . */
917583ad 2061 };
252b5132
RH		 2062
2063/* Subsequent entries in a procedure linkage table look like
2064 this. */
e5a52504 2065static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 2066 {
2067 0xe28fc600, /* add ip, pc, #0xNN00000 */
2068 0xe28cca00, /* add ip, ip, #0xNN000 */
2069 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2070 };
2071
2072#endif
252b5132 2073
00a97672
RS		 2074/* The format of the first entry in the procedure linkage table
2075 for a VxWorks executable. */
2076static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2077 {
2078 0xe52dc008, /* str ip,[sp,#-8]! */
2079 0xe59fc000, /* ldr ip,[pc] */
2080 0xe59cf008, /* ldr pc,[ip,#8] */
2081 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2082 };
2083
2084/* The format of subsequent entries in a VxWorks executable. */
2085static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2086 {
2087 0xe59fc000, /* ldr ip,[pc] */
2088 0xe59cf000, /* ldr pc,[ip] */
2089 0x00000000, /* .long @got */
2090 0xe59fc000, /* ldr ip,[pc] */
2091 0xea000000, /* b _PLT */
2092 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2093 };
2094
2095/* The format of entries in a VxWorks shared library. */
2096static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2097 {
2098 0xe59fc000, /* ldr ip,[pc] */
2099 0xe79cf009, /* ldr pc,[ip,r9] */
2100 0x00000000, /* .long @got */
2101 0xe59fc000, /* ldr ip,[pc] */
2102 0xe599f008, /* ldr pc,[r9,#8] */
2103 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2104 };
2105
b7693d02
DJ		 2106/* An initial stub used if the PLT entry is referenced from Thumb code. */
2107#define PLT_THUMB_STUB_SIZE 4
2108static const bfd_vma elf32_arm_plt_thumb_stub [] =
2109 {
2110 0x4778, /* bx pc */
2111 0x46c0 /* nop */
2112 };
2113
e5a52504
MM		 2114/* The entries in a PLT when using a DLL-based target with multiple
2115 address spaces. */
906e58ca 2116static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2117 {
83a358aa 2118 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2119 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2120 };
2121
906e58ca
NC		 2122#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2123#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2124#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2125#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2126#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2127#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2128
461a49ca
DJ		 2129enum stub_insn_type
2130 {
2131 THUMB16_TYPE = 1,
2132 THUMB32_TYPE,
2133 ARM_TYPE,
2134 DATA_TYPE
2135 };
2136
48229727
JB		 2137#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2138/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2139 is inserted in arm_build_one_stub(). */
2140#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2141#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2142#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2143#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2144#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2145#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2146
2147typedef struct
2148{
2149 bfd_vma data;
2150 enum stub_insn_type type;
ebe24dd4 2151 unsigned int r_type;
461a49ca
DJ		 2152 int reloc_addend;
2153} insn_sequence;
2154
fea2b4d6
CL		 2155/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2156 to reach the stub if necessary. */
461a49ca 2157static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2158 {
461a49ca
DJ		 2159 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2160 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2161 };
2162
fea2b4d6
CL		 2163/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2164 available. */
461a49ca 2165static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2166 {
461a49ca
DJ		 2167 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2168 ARM_INSN(0xe12fff1c), /* bx ip */
2169 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2170 };
2171
d3626fb0 2172/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2173static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2174 {
461a49ca
DJ		 2175 THUMB16_INSN(0xb401), /* push {r0} */
2176 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2177 THUMB16_INSN(0x4684), /* mov ip, r0 */
2178 THUMB16_INSN(0xbc01), /* pop {r0} */
2179 THUMB16_INSN(0x4760), /* bx ip */
2180 THUMB16_INSN(0xbf00), /* nop */
2181 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2182 };
2183
d3626fb0
CL		 2184/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2185 allowed. */
2186static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2187 {
2188 THUMB16_INSN(0x4778), /* bx pc */
2189 THUMB16_INSN(0x46c0), /* nop */
2190 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2191 ARM_INSN(0xe12fff1c), /* bx ip */
2192 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2193 };
2194
fea2b4d6
CL		 2195/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2196 available. */
461a49ca 2197static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2198 {
461a49ca
DJ		 2199 THUMB16_INSN(0x4778), /* bx pc */
2200 THUMB16_INSN(0x46c0), /* nop */
2201 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2202 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2203 };
2204
fea2b4d6
CL		 2205/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2206 one, when the destination is close enough. */
461a49ca 2207static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2208 {
461a49ca
DJ		 2209 THUMB16_INSN(0x4778), /* bx pc */
2210 THUMB16_INSN(0x46c0), /* nop */
2211 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2212 };
2213
cf3eccff 2214/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2215 blx to reach the stub if necessary. */
cf3eccff 2216static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2217 {
9ae92b05 2218 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
461a49ca
DJ		 2219 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2220 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2221 };
2222
cf3eccff
DJ		 2223/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2224 blx to reach the stub if necessary. We can not add into pc;
2225 it is not guaranteed to mode switch (different in ARMv6 and
2226 ARMv7). */
2227static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2228 {
9ae92b05 2229 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
cf3eccff
DJ		 2230 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2231 ARM_INSN(0xe12fff1c), /* bx ip */
2232 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2233 };
2234
ebe24dd4
CL		 2235/* V4T ARM -> ARM long branch stub, PIC. */
2236static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2237 {
2238 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2239 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2240 ARM_INSN(0xe12fff1c), /* bx ip */
2241 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2242 };
2243
2244/* V4T Thumb -> ARM long branch stub, PIC. */
2245static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2246 {
2247 THUMB16_INSN(0x4778), /* bx pc */
2248 THUMB16_INSN(0x46c0), /* nop */
2249 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2250 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2251 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2252 };
2253
d3626fb0
CL		 2254/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2255 architectures. */
ebe24dd4
CL		 2256static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2257 {
2258 THUMB16_INSN(0xb401), /* push {r0} */
2259 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2260 THUMB16_INSN(0x46fc), /* mov ip, pc */
2261 THUMB16_INSN(0x4484), /* add ip, r0 */
2262 THUMB16_INSN(0xbc01), /* pop {r0} */
2263 THUMB16_INSN(0x4760), /* bx ip */
2264 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2265 };
2266
d3626fb0
CL		 2267/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2268 allowed. */
2269static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2270 {
2271 THUMB16_INSN(0x4778), /* bx pc */
2272 THUMB16_INSN(0x46c0), /* nop */
2273 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2274 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2275 ARM_INSN(0xe12fff1c), /* bx ip */
2276 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2277 };
2278
0855e32b
NS		 2279/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2280 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2281static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2282{
2283 ARM_INSN(0xe59f1000), /* ldr r1, [pc] */
2284 ARM_INSN(0xe08ff001), /* add pc, pc, r1 */
2285 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2286};
2287
2288/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2289 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2290static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2291{
2292 THUMB16_INSN(0x4778), /* bx pc */
2293 THUMB16_INSN(0x46c0), /* nop */
2294 ARM_INSN(0xe59f1000), /* ldr r1, [pc, #0] */
2295 ARM_INSN(0xe081f00f), /* add pc, r1, pc */
2296 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2297};
2298
48229727
JB		 2299/* Cortex-A8 erratum-workaround stubs. */
2300
2301/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2302 can't use a conditional branch to reach this stub). */
2303
2304static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2305 {
2306 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2307 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2308 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2309 };
2310
2311/* Stub used for b.w and bl.w instructions. */
2312
2313static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2314 {
2315 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2316 };
2317
2318static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2319 {
2320 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2321 };
2322
2323/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2324 instruction (which switches to ARM mode) to point to this stub. Jump to the
2325 real destination using an ARM-mode branch. */
2326
2327static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2328 {
2329 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2330 };
2331
906e58ca
NC		 2332/* Section name for stubs is the associated section name plus this
2333 string. */
2334#define STUB_SUFFIX ".stub"
2335
738a79f6
CL		 2336/* One entry per long/short branch stub defined above. */
2337#define DEF_STUBS \
2338 DEF_STUB(long_branch_any_any) \
2339 DEF_STUB(long_branch_v4t_arm_thumb) \
2340 DEF_STUB(long_branch_thumb_only) \
2341 DEF_STUB(long_branch_v4t_thumb_thumb) \
2342 DEF_STUB(long_branch_v4t_thumb_arm) \
2343 DEF_STUB(short_branch_v4t_thumb_arm) \
2344 DEF_STUB(long_branch_any_arm_pic) \
2345 DEF_STUB(long_branch_any_thumb_pic) \
2346 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2347 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2348 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2349 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2350 DEF_STUB(long_branch_any_tls_pic) \
2351 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
48229727
JB		 2352 DEF_STUB(a8_veneer_b_cond) \
2353 DEF_STUB(a8_veneer_b) \
2354 DEF_STUB(a8_veneer_bl) \
2355 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2356
2357#define DEF_STUB(x) arm_stub_##x,
2358enum elf32_arm_stub_type {
906e58ca 2359 arm_stub_none,
738a79f6 2360 DEF_STUBS
eb7c4339
NS		 2361 /* Note the first a8_veneer type */
2362 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2363};
2364#undef DEF_STUB
2365
2366typedef struct
2367{
d3ce72d0 2368 const insn_sequence* template_sequence;
738a79f6
CL		 2369 int template_size;
2370} stub_def;
2371
2372#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2373static const stub_def stub_definitions[] = {
2374 {NULL, 0},
2375 DEF_STUBS
906e58ca
NC		 2376};
2377
2378struct elf32_arm_stub_hash_entry
2379{
2380 /* Base hash table entry structure. */
2381 struct bfd_hash_entry root;
2382
2383 /* The stub section. */
2384 asection *stub_sec;
2385
2386 /* Offset within stub_sec of the beginning of this stub. */
2387 bfd_vma stub_offset;
2388
2389 /* Given the symbol's value and its section we can determine its final
2390 value when building the stubs (so the stub knows where to jump). */
2391 bfd_vma target_value;
2392 asection *target_section;
2393
48229727
JB		 2394 /* Offset to apply to relocation referencing target_value. */
2395 bfd_vma target_addend;
2396
2397 /* The instruction which caused this stub to be generated (only valid for
2398 Cortex-A8 erratum workaround stubs at present). */
2399 unsigned long orig_insn;
2400
461a49ca 2401 /* The stub type. */
906e58ca 2402 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2403 /* Its encoding size in bytes. */
2404 int stub_size;
2405 /* Its template. */
2406 const insn_sequence *stub_template;
2407 /* The size of the template (number of entries). */
2408 int stub_template_size;
906e58ca
NC		 2409
2410 /* The symbol table entry, if any, that this was derived from. */
2411 struct elf32_arm_link_hash_entry *h;
2412
2413 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2414 unsigned char st_type;
2415
2416 /* Where this stub is being called from, or, in the case of combined
2417 stub sections, the first input section in the group. */
2418 asection *id_sec;
7413f23f
DJ		 2419
2420 /* The name for the local symbol at the start of this stub. The
2421 stub name in the hash table has to be unique; this does not, so
2422 it can be friendlier. */
2423 char *output_name;
906e58ca
NC		 2424};
2425
e489d0ae
PB		 2426/* Used to build a map of a section. This is required for mixed-endian
2427 code/data. */
2428
2429typedef struct elf32_elf_section_map
2430{
2431 bfd_vma vma;
2432 char type;
2433}
2434elf32_arm_section_map;
2435
c7b8f16e
JB		 2436/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2437
2438typedef enum
2439{
2440 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2441 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2442 VFP11_ERRATUM_ARM_VENEER,
2443 VFP11_ERRATUM_THUMB_VENEER
2444}
2445elf32_vfp11_erratum_type;
2446
2447typedef struct elf32_vfp11_erratum_list
2448{
2449 struct elf32_vfp11_erratum_list *next;
2450 bfd_vma vma;
2451 union
2452 {
2453 struct
2454 {
2455 struct elf32_vfp11_erratum_list *veneer;
2456 unsigned int vfp_insn;
2457 } b;
2458 struct
2459 {
2460 struct elf32_vfp11_erratum_list *branch;
2461 unsigned int id;
2462 } v;
2463 } u;
2464 elf32_vfp11_erratum_type type;
2465}
2466elf32_vfp11_erratum_list;
2467
2468f9c9
PB		 2468typedef enum
2469{
2470 DELETE_EXIDX_ENTRY,
2471 INSERT_EXIDX_CANTUNWIND_AT_END
2472}
2473arm_unwind_edit_type;
2474
2475/* A (sorted) list of edits to apply to an unwind table. */
2476typedef struct arm_unwind_table_edit
2477{
2478 arm_unwind_edit_type type;
2479 /* Note: we sometimes want to insert an unwind entry corresponding to a
2480 section different from the one we're currently writing out, so record the
2481 (text) section this edit relates to here. */
2482 asection *linked_section;
2483 unsigned int index;
2484 struct arm_unwind_table_edit *next;
2485}
2486arm_unwind_table_edit;
2487
8e3de13a 2488typedef struct _arm_elf_section_data
e489d0ae 2489{
2468f9c9 2490 /* Information about mapping symbols. */
e489d0ae 2491 struct bfd_elf_section_data elf;
8e3de13a 2492 unsigned int mapcount;
c7b8f16e 2493 unsigned int mapsize;
e489d0ae 2494 elf32_arm_section_map *map;
2468f9c9 2495 /* Information about CPU errata. */
c7b8f16e
JB		 2496 unsigned int erratumcount;
2497 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2498 /* Information about unwind tables. */
2499 union
2500 {
2501 /* Unwind info attached to a text section. */
2502 struct
2503 {
2504 asection *arm_exidx_sec;
2505 } text;
2506
2507 /* Unwind info attached to an .ARM.exidx section. */
2508 struct
2509 {
2510 arm_unwind_table_edit *unwind_edit_list;
2511 arm_unwind_table_edit *unwind_edit_tail;
2512 } exidx;
2513 } u;
8e3de13a
NC		 2514}
2515_arm_elf_section_data;
e489d0ae
PB		 2516
2517#define elf32_arm_section_data(sec) \
8e3de13a 2518 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2519
48229727
JB		 2520/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2521 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2522 so may be created multiple times: we use an array of these entries whilst
2523 relaxing which we can refresh easily, then create stubs for each potentially
2524 erratum-triggering instruction once we've settled on a solution. */
2525
2526struct a8_erratum_fix {
2527 bfd *input_bfd;
2528 asection *section;
2529 bfd_vma offset;
2530 bfd_vma addend;
2531 unsigned long orig_insn;
2532 char *stub_name;
2533 enum elf32_arm_stub_type stub_type;
fe33d2fa 2534 int st_type;
48229727
JB		 2535};
2536
2537/* A table of relocs applied to branches which might trigger Cortex-A8
2538 erratum. */
2539
2540struct a8_erratum_reloc {
2541 bfd_vma from;
2542 bfd_vma destination;
92750f34
DJ		 2543 struct elf32_arm_link_hash_entry *hash;
2544 const char *sym_name;
48229727
JB		 2545 unsigned int r_type;
2546 unsigned char st_type;
48229727
JB		 2547 bfd_boolean non_a8_stub;
2548};
2549
ba93b8ac
DJ		 2550/* The size of the thread control block. */
2551#define TCB_SIZE 8
2552
0ffa91dd 2553struct elf_arm_obj_tdata
ba93b8ac
DJ		 2554{
2555 struct elf_obj_tdata root;
2556
2557 /* tls_type for each local got entry. */
2558 char *local_got_tls_type;
ee065d83 2559
0855e32b
NS		 2560 /* GOTPLT entries for TLS descriptors. */
2561 bfd_vma *local_tlsdesc_gotent;
2562
bf21ed78
MS		 2563 /* Zero to warn when linking objects with incompatible enum sizes. */
2564 int no_enum_size_warning;
a9dc9481
JM		 2565
2566 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2567 int no_wchar_size_warning;
ba93b8ac
DJ		 2568};
2569
0ffa91dd
NC		 2570#define elf_arm_tdata(bfd) \
2571 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2572
0ffa91dd
NC		 2573#define elf32_arm_local_got_tls_type(bfd) \
2574 (elf_arm_tdata (bfd)->local_got_tls_type)
2575
0855e32b
NS		 2576#define elf32_arm_local_tlsdesc_gotent(bfd) \
2577 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2578
0ffa91dd
NC		 2579#define is_arm_elf(bfd) \
2580 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2581 && elf_tdata (bfd) != NULL \
4dfe6ac6 2582 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2583
2584static bfd_boolean
2585elf32_arm_mkobject (bfd *abfd)
2586{
0ffa91dd 2587 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2588 ARM_ELF_DATA);
ba93b8ac
DJ		 2589}
2590
ba93b8ac
DJ		 2591#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2592
ba96a88f 2593/* Arm ELF linker hash entry. */
252b5132 2594struct elf32_arm_link_hash_entry
917583ad
NC		 2595 {
2596 struct elf_link_hash_entry root;
252b5132 2597
0bdcacaf
RS		 2598 /* Track dynamic relocs copied for this symbol. */
2599 struct elf_dyn_relocs *dyn_relocs;
b7693d02
DJ		 2600
2601 /* We reference count Thumb references to a PLT entry separately,
2602 so that we can emit the Thumb trampoline only if needed. */
2603 bfd_signed_vma plt_thumb_refcount;
2604
bd97cb95
DJ		 2605 /* Some references from Thumb code may be eliminated by BL->BLX
2606 conversion, so record them separately. */
2607 bfd_signed_vma plt_maybe_thumb_refcount;
2608
b7693d02
DJ		 2609 /* Since PLT entries have variable size if the Thumb prologue is
2610 used, we need to record the index into .got.plt instead of
2611 recomputing it from the PLT offset. */
2612 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2613
2614#define GOT_UNKNOWN 0
2615#define GOT_NORMAL 1
2616#define GOT_TLS_GD 2
2617#define GOT_TLS_IE 4
0855e32b
NS		 2618#define GOT_TLS_GDESC 8
2619#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
ba93b8ac 2620 unsigned char tls_type;
a4fd1a8e 2621
0855e32b
NS		 2622 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2623 starting at the end of the jump table. */
2624 bfd_vma tlsdesc_got;
2625
a4fd1a8e
PB		 2626 /* The symbol marking the real symbol location for exported thumb
2627 symbols with Arm stubs. */
2628 struct elf_link_hash_entry *export_glue;
906e58ca 2629
da5938a2 2630 /* A pointer to the most recently used stub hash entry against this
8029a119 2631 symbol. */
da5938a2 2632 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2633 };
252b5132 2634
252b5132 2635/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2636#define elf32_arm_link_hash_traverse(table, func, info) \
2637 (elf_link_hash_traverse \
2638 (&(table)->root, \
b7693d02 2639 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2640 (info)))
2641
2642/* Get the ARM elf linker hash table from a link_info structure. */
2643#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2644 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2645 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2646
906e58ca
NC		 2647#define arm_stub_hash_lookup(table, string, create, copy) \
2648 ((struct elf32_arm_stub_hash_entry *) \
2649 bfd_hash_lookup ((table), (string), (create), (copy)))
2650
21d799b5
NC		 2651/* Array to keep track of which stub sections have been created, and
2652 information on stub grouping. */
2653struct map_stub
2654{
2655 /* This is the section to which stubs in the group will be
2656 attached. */
2657 asection *link_sec;
2658 /* The stub section. */
2659 asection *stub_sec;
2660};
2661
0855e32b
NS		 2662#define elf32_arm_compute_jump_table_size(htab) \
2663 ((htab)->next_tls_desc_index * 4)
2664
9b485d32 2665/* ARM ELF linker hash table. */
252b5132 2666struct elf32_arm_link_hash_table
906e58ca
NC		 2667{
2668 /* The main hash table. */
2669 struct elf_link_hash_table root;
252b5132 2670
906e58ca
NC		 2671 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2672 bfd_size_type thumb_glue_size;
252b5132 2673
906e58ca
NC		 2674 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2675 bfd_size_type arm_glue_size;
252b5132 2676
906e58ca
NC		 2677 /* The size in bytes of section containing the ARMv4 BX veneers. */
2678 bfd_size_type bx_glue_size;
845b51d6 2679
906e58ca
NC		 2680 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2681 veneer has been populated. */
2682 bfd_vma bx_glue_offset[15];
845b51d6 2683
906e58ca
NC		 2684 /* The size in bytes of the section containing glue for VFP11 erratum
2685 veneers. */
2686 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2687
48229727
JB		 2688 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2689 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2690 elf32_arm_write_section(). */
2691 struct a8_erratum_fix *a8_erratum_fixes;
2692 unsigned int num_a8_erratum_fixes;
2693
906e58ca
NC		 2694 /* An arbitrary input BFD chosen to hold the glue sections. */
2695 bfd * bfd_of_glue_owner;
ba96a88f 2696
906e58ca
NC		 2697 /* Nonzero to output a BE8 image. */
2698 int byteswap_code;
e489d0ae 2699
906e58ca
NC		 2700 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2701 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2702 int target1_is_rel;
9c504268 2703
906e58ca
NC		 2704 /* The relocation to use for R_ARM_TARGET2 relocations. */
2705 int target2_reloc;
eb043451 2706
906e58ca
NC		 2707 /* 0 = Ignore R_ARM_V4BX.
2708 1 = Convert BX to MOV PC.
2709 2 = Generate v4 interworing stubs. */
2710 int fix_v4bx;
319850b4 2711
48229727
JB		 2712 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2713 int fix_cortex_a8;
2714
906e58ca
NC		 2715 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2716 int use_blx;
33bfe774 2717
906e58ca
NC		 2718 /* What sort of code sequences we should look for which may trigger the
2719 VFP11 denorm erratum. */
2720 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2721
906e58ca
NC		 2722 /* Global counter for the number of fixes we have emitted. */
2723 int num_vfp11_fixes;
c7b8f16e 2724
906e58ca
NC		 2725 /* Nonzero to force PIC branch veneers. */
2726 int pic_veneer;
27e55c4d 2727
906e58ca
NC		 2728 /* The number of bytes in the initial entry in the PLT. */
2729 bfd_size_type plt_header_size;
e5a52504 2730
906e58ca
NC		 2731 /* The number of bytes in the subsequent PLT etries. */
2732 bfd_size_type plt_entry_size;
e5a52504 2733
906e58ca
NC		 2734 /* True if the target system is VxWorks. */
2735 int vxworks_p;
00a97672 2736
906e58ca
NC		 2737 /* True if the target system is Symbian OS. */
2738 int symbian_p;
e5a52504 2739
906e58ca
NC		 2740 /* True if the target uses REL relocations. */
2741 int use_rel;
4e7fd91e 2742
0855e32b
NS		 2743 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2744 bfd_vma next_tls_desc_index;
2745
2746 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2747 bfd_vma num_tls_desc;
2748
906e58ca 2749 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2750 asection *sdynbss;
2751 asection *srelbss;
5e681ec4 2752
906e58ca
NC		 2753 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2754 asection *srelplt2;
00a97672 2755
0855e32b
NS		 2756 /* The offset into splt of the PLT entry for the TLS descriptor
2757 resolver. Special values are 0, if not necessary (or not found
2758 to be necessary yet), and -1 if needed but not determined
2759 yet. */
2760 bfd_vma dt_tlsdesc_plt;
2761
2762 /* The offset into sgot of the GOT entry used by the PLT entry
2763 above. */
2764 bfd_vma dt_tlsdesc_got;
2765
2766 /* Offset in .plt section of tls_arm_trampoline. */
2767 bfd_vma tls_trampoline;
2768
906e58ca
NC		 2769 /* Data for R_ARM_TLS_LDM32 relocations. */
2770 union
2771 {
2772 bfd_signed_vma refcount;
2773 bfd_vma offset;
2774 } tls_ldm_got;
b7693d02 2775
87d72d41
AM		 2776 /* Small local sym cache. */
2777 struct sym_cache sym_cache;
906e58ca
NC		 2778
2779 /* For convenience in allocate_dynrelocs. */
2780 bfd * obfd;
2781
0855e32b
NS		 2782 /* The amount of space used by the reserved portion of the sgotplt
2783 section, plus whatever space is used by the jump slots. */
2784 bfd_vma sgotplt_jump_table_size;
2785
906e58ca
NC		 2786 /* The stub hash table. */
2787 struct bfd_hash_table stub_hash_table;
2788
2789 /* Linker stub bfd. */
2790 bfd *stub_bfd;
2791
2792 /* Linker call-backs. */
2793 asection * (*add_stub_section) (const char *, asection *);
2794 void (*layout_sections_again) (void);
2795
2796 /* Array to keep track of which stub sections have been created, and
2797 information on stub grouping. */
21d799b5 2798 struct map_stub *stub_group;
906e58ca 2799
fe33d2fa
CL		 2800 /* Number of elements in stub_group. */
2801 int top_id;
2802
906e58ca
NC		 2803 /* Assorted information used by elf32_arm_size_stubs. */
2804 unsigned int bfd_count;
2805 int top_index;
2806 asection **input_list;
2807};
252b5132 2808
780a67af
NC		 2809/* Create an entry in an ARM ELF linker hash table. */
2810
2811static struct bfd_hash_entry *
57e8b36a
NC		 2812elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2813 struct bfd_hash_table * table,
2814 const char * string)
780a67af
NC		 2815{
2816 struct elf32_arm_link_hash_entry * ret =
2817 (struct elf32_arm_link_hash_entry *) entry;
2818
2819 /* Allocate the structure if it has not already been allocated by a
2820 subclass. */
906e58ca 2821 if (ret == NULL)
21d799b5
NC		 2822 ret = (struct elf32_arm_link_hash_entry *)
2823 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2824 if (ret == NULL)
780a67af
NC		 2825 return (struct bfd_hash_entry *) ret;
2826
2827 /* Call the allocation method of the superclass. */
2828 ret = ((struct elf32_arm_link_hash_entry *)
2829 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2830 table, string));
57e8b36a 2831 if (ret != NULL)
b7693d02 2832 {
0bdcacaf 2833 ret->dyn_relocs = NULL;
ba93b8ac 2834 ret->tls_type = GOT_UNKNOWN;
0855e32b 2835 ret->tlsdesc_got = (bfd_vma) -1;
b7693d02 2836 ret->plt_thumb_refcount = 0;
bd97cb95 2837 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2838 ret->plt_got_offset = -1;
a4fd1a8e 2839 ret->export_glue = NULL;
906e58ca
NC		 2840
2841 ret->stub_cache = NULL;
b7693d02 2842 }
780a67af
NC		 2843
2844 return (struct bfd_hash_entry *) ret;
2845}
2846
906e58ca
NC		 2847/* Initialize an entry in the stub hash table. */
2848
2849static struct bfd_hash_entry *
2850stub_hash_newfunc (struct bfd_hash_entry *entry,
2851 struct bfd_hash_table *table,
2852 const char *string)
2853{
2854 /* Allocate the structure if it has not already been allocated by a
2855 subclass. */
2856 if (entry == NULL)
2857 {
21d799b5
NC		 2858 entry = (struct bfd_hash_entry *)
2859 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 2860 if (entry == NULL)
2861 return entry;
2862 }
2863
2864 /* Call the allocation method of the superclass. */
2865 entry = bfd_hash_newfunc (entry, table, string);
2866 if (entry != NULL)
2867 {
2868 struct elf32_arm_stub_hash_entry *eh;
2869
2870 /* Initialize the local fields. */
2871 eh = (struct elf32_arm_stub_hash_entry *) entry;
2872 eh->stub_sec = NULL;
2873 eh->stub_offset = 0;
2874 eh->target_value = 0;
2875 eh->target_section = NULL;
cedfb179
DK		 2876 eh->target_addend = 0;
2877 eh->orig_insn = 0;
906e58ca 2878 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2879 eh->stub_size = 0;
2880 eh->stub_template = NULL;
2881 eh->stub_template_size = 0;
906e58ca
NC		 2882 eh->h = NULL;
2883 eh->id_sec = NULL;
d8d2f433 2884 eh->output_name = NULL;
906e58ca
NC		 2885 }
2886
2887 return entry;
2888}
2889
00a97672 2890/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2891 shortcuts to them in our hash table. */
2892
2893static bfd_boolean
57e8b36a 2894create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2895{
2896 struct elf32_arm_link_hash_table *htab;
2897
e5a52504 2898 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2899 if (htab == NULL)
2900 return FALSE;
2901
e5a52504
MM		 2902 /* BPABI objects never have a GOT, or associated sections. */
2903 if (htab->symbian_p)
2904 return TRUE;
2905
5e681ec4
PB		 2906 if (! _bfd_elf_create_got_section (dynobj, info))
2907 return FALSE;
2908
5e681ec4
PB		 2909 return TRUE;
2910}
2911
00a97672
RS		 2912/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2913 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2914 hash table. */
2915
2916static bfd_boolean
57e8b36a 2917elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2918{
2919 struct elf32_arm_link_hash_table *htab;
2920
2921 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2922 if (htab == NULL)
2923 return FALSE;
2924
362d30a1 2925 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 2926 return FALSE;
2927
2928 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2929 return FALSE;
2930
5e681ec4
PB		 2931 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2932 if (!info->shared)
00a97672
RS		 2933 htab->srelbss = bfd_get_section_by_name (dynobj,
2934 RELOC_SECTION (htab, ".bss"));
2935
2936 if (htab->vxworks_p)
2937 {
2938 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2939 return FALSE;
2940
2941 if (info->shared)
2942 {
2943 htab->plt_header_size = 0;
2944 htab->plt_entry_size
2945 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2946 }
2947 else
2948 {
2949 htab->plt_header_size
2950 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2951 htab->plt_entry_size
2952 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2953 }
2954 }
5e681ec4 2955
362d30a1
RS		 2956 if (!htab->root.splt
2957 || !htab->root.srelplt
e5a52504 2958 || !htab->sdynbss
5e681ec4
PB		 2959 || (!info->shared && !htab->srelbss))
2960 abort ();
2961
2962 return TRUE;
2963}
2964
906e58ca
NC		 2965/* Copy the extra info we tack onto an elf_link_hash_entry. */
2966
2967static void
2968elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2969 struct elf_link_hash_entry *dir,
2970 struct elf_link_hash_entry *ind)
2971{
2972 struct elf32_arm_link_hash_entry *edir, *eind;
2973
2974 edir = (struct elf32_arm_link_hash_entry *) dir;
2975 eind = (struct elf32_arm_link_hash_entry *) ind;
2976
0bdcacaf 2977 if (eind->dyn_relocs != NULL)
906e58ca 2978 {
0bdcacaf 2979 if (edir->dyn_relocs != NULL)
906e58ca 2980 {
0bdcacaf
RS		 2981 struct elf_dyn_relocs **pp;
2982 struct elf_dyn_relocs *p;
906e58ca
NC		 2983
2984 /* Add reloc counts against the indirect sym to the direct sym
2985 list. Merge any entries against the same section. */
0bdcacaf 2986 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 2987 {
0bdcacaf 2988 struct elf_dyn_relocs *q;
906e58ca 2989
0bdcacaf
RS		 2990 for (q = edir->dyn_relocs; q != NULL; q = q->next)
2991 if (q->sec == p->sec)
906e58ca
NC		 2992 {
2993 q->pc_count += p->pc_count;
2994 q->count += p->count;
2995 *pp = p->next;
2996 break;
2997 }
2998 if (q == NULL)
2999 pp = &p->next;
3000 }
0bdcacaf 3001 *pp = edir->dyn_relocs;
906e58ca
NC		 3002 }
3003
0bdcacaf
RS		 3004 edir->dyn_relocs = eind->dyn_relocs;
3005 eind->dyn_relocs = NULL;
906e58ca
NC		 3006 }
3007
3008 if (ind->root.type == bfd_link_hash_indirect)
3009 {
3010 /* Copy over PLT info. */
3011 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
3012 eind->plt_thumb_refcount = 0;
3013 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
3014 eind->plt_maybe_thumb_refcount = 0;
3015
3016 if (dir->got.refcount <= 0)
3017 {
3018 edir->tls_type = eind->tls_type;
3019 eind->tls_type = GOT_UNKNOWN;
3020 }
3021 }
3022
3023 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3024}
3025
3026/* Create an ARM elf linker hash table. */
3027
3028static struct bfd_link_hash_table *
3029elf32_arm_link_hash_table_create (bfd *abfd)
3030{
3031 struct elf32_arm_link_hash_table *ret;
3032 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3033
21d799b5 3034 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 3035 if (ret == NULL)
3036 return NULL;
3037
3038 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3039 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3040 sizeof (struct elf32_arm_link_hash_entry),
3041 ARM_ELF_DATA))
906e58ca
NC		 3042 {
3043 free (ret);
3044 return NULL;
3045 }
3046
906e58ca
NC		 3047 ret->sdynbss = NULL;
3048 ret->srelbss = NULL;
3049 ret->srelplt2 = NULL;
0855e32b
NS		 3050 ret->dt_tlsdesc_plt = 0;
3051 ret->dt_tlsdesc_got = 0;
3052 ret->tls_trampoline = 0;
3053 ret->next_tls_desc_index = 0;
3054 ret->num_tls_desc = 0;
906e58ca
NC		 3055 ret->thumb_glue_size = 0;
3056 ret->arm_glue_size = 0;
3057 ret->bx_glue_size = 0;
3058 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3059 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3060 ret->vfp11_erratum_glue_size = 0;
3061 ret->num_vfp11_fixes = 0;
48229727 3062 ret->fix_cortex_a8 = 0;
906e58ca
NC		 3063 ret->bfd_of_glue_owner = NULL;
3064 ret->byteswap_code = 0;
3065 ret->target1_is_rel = 0;
3066 ret->target2_reloc = R_ARM_NONE;
3067#ifdef FOUR_WORD_PLT
3068 ret->plt_header_size = 16;
3069 ret->plt_entry_size = 16;
3070#else
3071 ret->plt_header_size = 20;
3072 ret->plt_entry_size = 12;
3073#endif
3074 ret->fix_v4bx = 0;
3075 ret->use_blx = 0;
3076 ret->vxworks_p = 0;
3077 ret->symbian_p = 0;
3078 ret->use_rel = 1;
87d72d41 3079 ret->sym_cache.abfd = NULL;
906e58ca
NC		 3080 ret->obfd = abfd;
3081 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 3082 ret->stub_bfd = NULL;
3083 ret->add_stub_section = NULL;
3084 ret->layout_sections_again = NULL;
3085 ret->stub_group = NULL;
fe33d2fa 3086 ret->top_id = 0;
6cee0a6f
L		 3087 ret->bfd_count = 0;
3088 ret->top_index = 0;
3089 ret->input_list = NULL;
906e58ca
NC		 3090
3091 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3092 sizeof (struct elf32_arm_stub_hash_entry)))
3093 {
3094 free (ret);
3095 return NULL;
3096 }
3097
3098 return &ret->root.root;
3099}
3100
3101/* Free the derived linker hash table. */
3102
3103static void
3104elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3105{
3106 struct elf32_arm_link_hash_table *ret
3107 = (struct elf32_arm_link_hash_table *) hash;
3108
3109 bfd_hash_table_free (&ret->stub_hash_table);
3110 _bfd_generic_link_hash_table_free (hash);
3111}
3112
3113/* Determine if we're dealing with a Thumb only architecture. */
3114
3115static bfd_boolean
3116using_thumb_only (struct elf32_arm_link_hash_table *globals)
3117{
3118 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3119 Tag_CPU_arch);
3120 int profile;
3121
41ed1ee7
DJ		 3122 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3123 return TRUE;
3124
9e3c6df6 3125 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3126 return FALSE;
3127
3128 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3129 Tag_CPU_arch_profile);
3130
3131 return profile == 'M';
3132}
3133
3134/* Determine if we're dealing with a Thumb-2 object. */
3135
3136static bfd_boolean
3137using_thumb2 (struct elf32_arm_link_hash_table *globals)
3138{
3139 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3140 Tag_CPU_arch);
3141 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3142}
3143
cd1dac3d
DG		 3144/* Determine what kind of NOPs are available. */
3145
3146static bfd_boolean
3147arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3148{
3149 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3150 Tag_CPU_arch);
3151 return arch == TAG_CPU_ARCH_V6T2
3152 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3153 || arch == TAG_CPU_ARCH_V7
3154 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3155}
3156
3157static bfd_boolean
3158arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3159{
3160 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3161 Tag_CPU_arch);
9e3c6df6
PB		 3162 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3163 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3164}
3165
f4ac8484
DJ		 3166static bfd_boolean
3167arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3168{
3169 switch (stub_type)
3170 {
fea2b4d6
CL		 3171 case arm_stub_long_branch_thumb_only:
3172 case arm_stub_long_branch_v4t_thumb_arm:
3173 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 3174 case arm_stub_long_branch_v4t_thumb_arm_pic:
3175 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3176 return TRUE;
3177 case arm_stub_none:
3178 BFD_FAIL ();
3179 return FALSE;
3180 break;
3181 default:
3182 return FALSE;
3183 }
3184}
3185
906e58ca
NC		 3186/* Determine the type of stub needed, if any, for a call. */
3187
3188static enum elf32_arm_stub_type
3189arm_type_of_stub (struct bfd_link_info *info,
3190 asection *input_sec,
3191 const Elf_Internal_Rela *rel,
fe33d2fa 3192 int *actual_st_type,
906e58ca 3193 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3194 bfd_vma destination,
3195 asection *sym_sec,
3196 bfd *input_bfd,
3197 const char *name)
906e58ca
NC		 3198{
3199 bfd_vma location;
3200 bfd_signed_vma branch_offset;
3201 unsigned int r_type;
3202 struct elf32_arm_link_hash_table * globals;
3203 int thumb2;
3204 int thumb_only;
3205 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3206 int use_plt = 0;
fe33d2fa 3207 int st_type = *actual_st_type;
906e58ca 3208
da5938a2 3209 /* We don't know the actual type of destination in case it is of
8029a119 3210 type STT_SECTION: give up. */
da5938a2
NC		 3211 if (st_type == STT_SECTION)
3212 return stub_type;
3213
906e58ca 3214 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3215 if (globals == NULL)
3216 return stub_type;
906e58ca
NC		 3217
3218 thumb_only = using_thumb_only (globals);
3219
3220 thumb2 = using_thumb2 (globals);
3221
3222 /* Determine where the call point is. */
3223 location = (input_sec->output_offset
3224 + input_sec->output_section->vma
3225 + rel->r_offset);
3226
906e58ca
NC		 3227 r_type = ELF32_R_TYPE (rel->r_info);
3228
5fa9e92f 3229 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 3230 if (globals->root.splt != NULL
fe33d2fa
CL		 3231 && hash != NULL
3232 && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3233 {
3234 use_plt = 1;
fe33d2fa 3235
5fa9e92f
CL		 3236 /* Note when dealing with PLT entries: the main PLT stub is in
3237 ARM mode, so if the branch is in Thumb mode, another
3238 Thumb->ARM stub will be inserted later just before the ARM
3239 PLT stub. We don't take this extra distance into account
3240 here, because if a long branch stub is needed, we'll add a
3241 Thumb->Arm one and branch directly to the ARM PLT entry
3242 because it avoids spreading offset corrections in several
3243 places. */
fe33d2fa 3244
362d30a1
RS		 3245 destination = (globals->root.splt->output_section->vma
3246 + globals->root.splt->output_offset
fe33d2fa
CL		 3247 + hash->root.plt.offset);
3248 st_type = STT_FUNC;
5fa9e92f 3249 }
906e58ca 3250
fe33d2fa
CL		 3251 branch_offset = (bfd_signed_vma)(destination - location);
3252
0855e32b
NS		 3253 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3254 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3255 {
5fa9e92f
CL		 3256 /* Handle cases where:
3257 - this call goes too far (different Thumb/Thumb2 max
3258 distance)
155d87d7
CL		 3259 - it's a Thumb->Arm call and blx is not available, or it's a
3260 Thumb->Arm branch (not bl). A stub is needed in this case,
3261 but only if this call is not through a PLT entry. Indeed,
3262 PLT stubs handle mode switching already.
5fa9e92f 3263 */
906e58ca
NC		 3264 if ((!thumb2
3265 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3266 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3267 || (thumb2
3268 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3269 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3270 || ((st_type != STT_ARM_TFUNC)
0855e32b
NS		 3271 && (((r_type == R_ARM_THM_CALL
3272 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3273 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3274 && !use_plt))
906e58ca
NC		 3275 {
3276 if (st_type == STT_ARM_TFUNC)
3277 {
3278 /* Thumb to thumb. */
3279 if (!thumb_only)
3280 {
3281 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3282 /* PIC stubs. */
155d87d7
CL		 3283 ? ((globals->use_blx
3284 && (r_type ==R_ARM_THM_CALL))
3285 /* V5T and above. Stub starts with ARM code, so
3286 we must be able to switch mode before
3287 reaching it, which is only possible for 'bl'
3288 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3289 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3290 /* On V4T, use Thumb code only. */
d3626fb0 3291 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3292
3293 /* non-PIC stubs. */
155d87d7
CL		 3294 : ((globals->use_blx
3295 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3296 /* V5T and above. */
3297 ? arm_stub_long_branch_any_any
3298 /* V4T. */
d3626fb0 3299 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3300 }
3301 else
3302 {
3303 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3304 /* PIC stub. */
3305 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3306 /* non-PIC stub. */
3307 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3308 }
3309 }
3310 else
3311 {
3312 /* Thumb to arm. */
c820be07
NC		 3313 if (sym_sec != NULL
3314 && sym_sec->owner != NULL
3315 && !INTERWORK_FLAG (sym_sec->owner))
3316 {
3317 (*_bfd_error_handler)
3318 (_("%B(%s): warning: interworking not enabled.\n"
3319 " first occurrence: %B: Thumb call to ARM"),
3320 sym_sec->owner, input_bfd, name);
3321 }
3322
0855e32b
NS		 3323 stub_type =
3324 (info->shared | globals->pic_veneer)
c2b4a39d 3325 /* PIC stubs. */
0855e32b
NS		 3326 ? (r_type == R_ARM_THM_TLS_CALL
3327 /* TLS PIC stubs */
3328 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3329 : arm_stub_long_branch_v4t_thumb_tls_pic)
3330 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3331 /* V5T PIC and above. */
3332 ? arm_stub_long_branch_any_arm_pic
3333 /* V4T PIC stub. */
3334 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3335
3336 /* non-PIC stubs. */
0855e32b 3337 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3338 /* V5T and above. */
3339 ? arm_stub_long_branch_any_any
3340 /* V4T. */
3341 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3342
3343 /* Handle v4t short branches. */
fea2b4d6 3344 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3345 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3346 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3347 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3348 }
3349 }
3350 }
fe33d2fa
CL		 3351 else if (r_type == R_ARM_CALL
3352 || r_type == R_ARM_JUMP24
0855e32b
NS		 3353 || r_type == R_ARM_PLT32
3354 || r_type == R_ARM_TLS_CALL)
906e58ca
NC		 3355 {
3356 if (st_type == STT_ARM_TFUNC)
3357 {
3358 /* Arm to thumb. */
c820be07
NC		 3359
3360 if (sym_sec != NULL
3361 && sym_sec->owner != NULL
3362 && !INTERWORK_FLAG (sym_sec->owner))
3363 {
3364 (*_bfd_error_handler)
3365 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3366 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3367 sym_sec->owner, input_bfd, name);
3368 }
3369
3370 /* We have an extra 2-bytes reach because of
3371 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3372 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3373 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3374 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3375 || (r_type == R_ARM_JUMP24)
3376 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3377 {
3378 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3379 /* PIC stubs. */
ebe24dd4
CL		 3380 ? ((globals->use_blx)
3381 /* V5T and above. */
3382 ? arm_stub_long_branch_any_thumb_pic
3383 /* V4T stub. */
3384 : arm_stub_long_branch_v4t_arm_thumb_pic)
3385
c2b4a39d
CL		 3386 /* non-PIC stubs. */
3387 : ((globals->use_blx)
3388 /* V5T and above. */
3389 ? arm_stub_long_branch_any_any
3390 /* V4T. */
3391 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3392 }
3393 }
3394 else
3395 {
3396 /* Arm to arm. */
3397 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3398 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3399 {
0855e32b
NS		 3400 stub_type =
3401 (info->shared | globals->pic_veneer)
c2b4a39d 3402 /* PIC stubs. */
0855e32b
NS		 3403 ? (r_type == R_ARM_TLS_CALL
3404 /* TLS PIC Stub */
3405 ? arm_stub_long_branch_any_tls_pic
3406 : arm_stub_long_branch_any_arm_pic)
c2b4a39d 3407 /* non-PIC stubs. */
fea2b4d6 3408 : arm_stub_long_branch_any_any;
906e58ca
NC		 3409 }
3410 }
3411 }
3412
fe33d2fa
CL		 3413 /* If a stub is needed, record the actual destination type. */
3414 if (stub_type != arm_stub_none)
9ae92b05 3415 *actual_st_type = st_type;
fe33d2fa 3416
906e58ca
NC		 3417 return stub_type;
3418}
3419
3420/* Build a name for an entry in the stub hash table. */
3421
3422static char *
3423elf32_arm_stub_name (const asection *input_section,
3424 const asection *sym_sec,
3425 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3426 const Elf_Internal_Rela *rel,
3427 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3428{
3429 char *stub_name;
3430 bfd_size_type len;
3431
3432 if (hash)
3433 {
fe33d2fa 3434 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3435 stub_name = (char *) bfd_malloc (len);
906e58ca 3436 if (stub_name != NULL)
fe33d2fa 3437 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3438 input_section->id & 0xffffffff,
3439 hash->root.root.root.string,
fe33d2fa
CL		 3440 (int) rel->r_addend & 0xffffffff,
3441 (int) stub_type);
906e58ca
NC		 3442 }
3443 else
3444 {
fe33d2fa 3445 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3446 stub_name = (char *) bfd_malloc (len);
906e58ca 3447 if (stub_name != NULL)
fe33d2fa 3448 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3449 input_section->id & 0xffffffff,
3450 sym_sec->id & 0xffffffff,
0855e32b
NS		 3451 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3452 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3453 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3454 (int) rel->r_addend & 0xffffffff,
3455 (int) stub_type);
906e58ca
NC		 3456 }
3457
3458 return stub_name;
3459}
3460
3461/* Look up an entry in the stub hash. Stub entries are cached because
3462 creating the stub name takes a bit of time. */
3463
3464static struct elf32_arm_stub_hash_entry *
3465elf32_arm_get_stub_entry (const asection *input_section,
3466 const asection *sym_sec,
3467 struct elf_link_hash_entry *hash,
3468 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3469 struct elf32_arm_link_hash_table *htab,
3470 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3471{
3472 struct elf32_arm_stub_hash_entry *stub_entry;
3473 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3474 const asection *id_sec;
3475
3476 if ((input_section->flags & SEC_CODE) == 0)
3477 return NULL;
3478
3479 /* If this input section is part of a group of sections sharing one
3480 stub section, then use the id of the first section in the group.
3481 Stub names need to include a section id, as there may well be
3482 more than one stub used to reach say, printf, and we need to
3483 distinguish between them. */
3484 id_sec = htab->stub_group[input_section->id].link_sec;
3485
3486 if (h != NULL && h->stub_cache != NULL
3487 && h->stub_cache->h == h
fe33d2fa
CL		 3488 && h->stub_cache->id_sec == id_sec
3489 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3490 {
3491 stub_entry = h->stub_cache;
3492 }
3493 else
3494 {
3495 char *stub_name;
3496
fe33d2fa 3497 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3498 if (stub_name == NULL)
3499 return NULL;
3500
3501 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3502 stub_name, FALSE, FALSE);
3503 if (h != NULL)
3504 h->stub_cache = stub_entry;
3505
3506 free (stub_name);
3507 }
3508
3509 return stub_entry;
3510}
3511
48229727
JB		 3512/* Find or create a stub section. Returns a pointer to the stub section, and
3513 the section to which the stub section will be attached (in *LINK_SEC_P).
3514 LINK_SEC_P may be NULL. */
906e58ca 3515
48229727
JB		 3516static asection *
3517elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3518 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3519{
3520 asection *link_sec;
3521 asection *stub_sec;
906e58ca
NC		 3522
3523 link_sec = htab->stub_group[section->id].link_sec;
3524 stub_sec = htab->stub_group[section->id].stub_sec;
3525 if (stub_sec == NULL)
3526 {
3527 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3528 if (stub_sec == NULL)
3529 {
3530 size_t namelen;
3531 bfd_size_type len;
3532 char *s_name;
3533
3534 namelen = strlen (link_sec->name);
3535 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3536 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3537 if (s_name == NULL)
3538 return NULL;
3539
3540 memcpy (s_name, link_sec->name, namelen);
3541 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3542 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3543 if (stub_sec == NULL)
3544 return NULL;
3545 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3546 }
3547 htab->stub_group[section->id].stub_sec = stub_sec;
3548 }
48229727
JB		 3549
3550 if (link_sec_p)
3551 *link_sec_p = link_sec;
3552
3553 return stub_sec;
3554}
3555
3556/* Add a new stub entry to the stub hash. Not all fields of the new
3557 stub entry are initialised. */
3558
3559static struct elf32_arm_stub_hash_entry *
3560elf32_arm_add_stub (const char *stub_name,
3561 asection *section,
3562 struct elf32_arm_link_hash_table *htab)
3563{
3564 asection *link_sec;
3565 asection *stub_sec;
3566 struct elf32_arm_stub_hash_entry *stub_entry;
3567
3568 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3569 if (stub_sec == NULL)
3570 return NULL;
906e58ca
NC		 3571
3572 /* Enter this entry into the linker stub hash table. */
3573 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3574 TRUE, FALSE);
3575 if (stub_entry == NULL)
3576 {
3577 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3578 section->owner,
3579 stub_name);
3580 return NULL;
3581 }
3582
3583 stub_entry->stub_sec = stub_sec;
3584 stub_entry->stub_offset = 0;
3585 stub_entry->id_sec = link_sec;
3586
906e58ca
NC		 3587 return stub_entry;
3588}
3589
3590/* Store an Arm insn into an output section not processed by
3591 elf32_arm_write_section. */
3592
3593static void
8029a119
NC		 3594put_arm_insn (struct elf32_arm_link_hash_table * htab,
3595 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3596{
3597 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3598 bfd_putl32 (val, ptr);
3599 else
3600 bfd_putb32 (val, ptr);
3601}
3602
3603/* Store a 16-bit Thumb insn into an output section not processed by
3604 elf32_arm_write_section. */
3605
3606static void
8029a119
NC		 3607put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3608 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3609{
3610 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3611 bfd_putl16 (val, ptr);
3612 else
3613 bfd_putb16 (val, ptr);
3614}
3615
0855e32b
NS		 3616/* If it's possible to change R_TYPE to a more efficient access
3617 model, return the new reloc type. */
3618
3619static unsigned
3620elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
3621 struct elf_link_hash_entry *h)
3622{
3623 int is_local = (h == NULL);
3624
3625 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
3626 return r_type;
3627
3628 /* We do not support relaxations for Old TLS models. */
3629 switch (r_type)
3630 {
3631 case R_ARM_TLS_GOTDESC:
3632 case R_ARM_TLS_CALL:
3633 case R_ARM_THM_TLS_CALL:
3634 case R_ARM_TLS_DESCSEQ:
3635 case R_ARM_THM_TLS_DESCSEQ:
3636 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
3637 }
3638
3639 return r_type;
3640}
3641
48229727
JB		 3642static bfd_reloc_status_type elf32_arm_final_link_relocate
3643 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3644 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3645 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3646
4563a860
JB		 3647static unsigned int
3648arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
3649{
3650 switch (stub_type)
3651 {
3652 case arm_stub_a8_veneer_b_cond:
3653 case arm_stub_a8_veneer_b:
3654 case arm_stub_a8_veneer_bl:
3655 return 2;
3656
3657 case arm_stub_long_branch_any_any:
3658 case arm_stub_long_branch_v4t_arm_thumb:
3659 case arm_stub_long_branch_thumb_only:
3660 case arm_stub_long_branch_v4t_thumb_thumb:
3661 case arm_stub_long_branch_v4t_thumb_arm:
3662 case arm_stub_short_branch_v4t_thumb_arm:
3663 case arm_stub_long_branch_any_arm_pic:
3664 case arm_stub_long_branch_any_thumb_pic:
3665 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3666 case arm_stub_long_branch_v4t_arm_thumb_pic:
3667 case arm_stub_long_branch_v4t_thumb_arm_pic:
3668 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 3669 case arm_stub_long_branch_any_tls_pic:
3670 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 3671 case arm_stub_a8_veneer_blx:
3672 return 4;
3673
3674 default:
3675 abort (); /* Should be unreachable. */
3676 }
3677}
3678
906e58ca
NC		 3679static bfd_boolean
3680arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3681 void * in_arg)
3682{
48229727 3683#define MAXRELOCS 2
906e58ca 3684 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3685 struct elf32_arm_link_hash_table *globals;
906e58ca 3686 struct bfd_link_info *info;
906e58ca
NC		 3687 asection *stub_sec;
3688 bfd *stub_bfd;
906e58ca
NC		 3689 bfd_byte *loc;
3690 bfd_vma sym_value;
3691 int template_size;
3692 int size;
d3ce72d0 3693 const insn_sequence *template_sequence;
906e58ca 3694 int i;
48229727
JB		 3695 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3696 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3697 int nrelocs = 0;
906e58ca
NC		 3698
3699 /* Massage our args to the form they really have. */
3700 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3701 info = (struct bfd_link_info *) in_arg;
3702
3703 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3704 if (globals == NULL)
3705 return FALSE;
906e58ca 3706
906e58ca
NC		 3707 stub_sec = stub_entry->stub_sec;
3708
4dfe6ac6 3709 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 3710 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
3711 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 3712 return TRUE;
fe33d2fa 3713
906e58ca
NC		 3714 /* Make a note of the offset within the stubs for this entry. */
3715 stub_entry->stub_offset = stub_sec->size;
3716 loc = stub_sec->contents + stub_entry->stub_offset;
3717
3718 stub_bfd = stub_sec->owner;
3719
906e58ca
NC		 3720 /* This is the address of the stub destination. */
3721 sym_value = (stub_entry->target_value
3722 + stub_entry->target_section->output_offset
3723 + stub_entry->target_section->output_section->vma);
3724
d3ce72d0 3725 template_sequence = stub_entry->stub_template;
461a49ca 3726 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3727
3728 size = 0;
461a49ca 3729 for (i = 0; i < template_size; i++)
906e58ca 3730 {
d3ce72d0 3731 switch (template_sequence[i].type)
461a49ca
DJ		 3732 {
3733 case THUMB16_TYPE:
48229727 3734 {
d3ce72d0
NC		 3735 bfd_vma data = (bfd_vma) template_sequence[i].data;
3736 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 3737 {
3738 /* We've borrowed the reloc_addend field to mean we should
3739 insert a condition code into this (Thumb-1 branch)
3740 instruction. See THUMB16_BCOND_INSN. */
3741 BFD_ASSERT ((data & 0xff00) == 0xd000);
3742 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3743 }
fe33d2fa 3744 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 3745 size += 2;
3746 }
461a49ca 3747 break;
906e58ca 3748
48229727 3749 case THUMB32_TYPE:
fe33d2fa
CL		 3750 bfd_put_16 (stub_bfd,
3751 (template_sequence[i].data >> 16) & 0xffff,
3752 loc + size);
3753 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
3754 loc + size + 2);
d3ce72d0 3755 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 3756 {
3757 stub_reloc_idx[nrelocs] = i;
3758 stub_reloc_offset[nrelocs++] = size;
3759 }
3760 size += 4;
3761 break;
3762
461a49ca 3763 case ARM_TYPE:
fe33d2fa
CL		 3764 bfd_put_32 (stub_bfd, template_sequence[i].data,
3765 loc + size);
461a49ca
DJ		 3766 /* Handle cases where the target is encoded within the
3767 instruction. */
d3ce72d0 3768 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 3769 {
48229727
JB		 3770 stub_reloc_idx[nrelocs] = i;
3771 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3772 }
3773 size += 4;
3774 break;
3775
3776 case DATA_TYPE:
d3ce72d0 3777 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 3778 stub_reloc_idx[nrelocs] = i;
3779 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3780 size += 4;
3781 break;
3782
3783 default:
3784 BFD_FAIL ();
3785 return FALSE;
3786 }
906e58ca 3787 }
461a49ca 3788
906e58ca
NC		 3789 stub_sec->size += size;
3790
461a49ca
DJ		 3791 /* Stub size has already been computed in arm_size_one_stub. Check
3792 consistency. */
3793 BFD_ASSERT (size == stub_entry->stub_size);
3794
906e58ca
NC		 3795 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3796 if (stub_entry->st_type == STT_ARM_TFUNC)
3797 sym_value |= 1;
3798
48229727
JB		 3799 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3800 in each stub. */
3801 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3802
48229727 3803 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 3804 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3805 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3806 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3807 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 3808 {
3809 Elf_Internal_Rela rel;
3810 bfd_boolean unresolved_reloc;
3811 char *error_message;
3812 int sym_flags
d3ce72d0 3813 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
48229727
JB		 3814 ? STT_ARM_TFUNC : 0;
3815 bfd_vma points_to = sym_value + stub_entry->target_addend;
3816
3817 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 3818 rel.r_info = ELF32_R_INFO (0,
3819 template_sequence[stub_reloc_idx[i]].r_type);
3820 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 3821
3822 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3823 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3824 template should refer back to the instruction after the original
3825 branch. */
3826 points_to = sym_value;
3827
33c6a8fc
JB		 3828 /* There may be unintended consequences if this is not true. */
3829 BFD_ASSERT (stub_entry->h == NULL);
3830
48229727
JB		 3831 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3832 properly. We should probably use this function unconditionally,
3833 rather than only for certain relocations listed in the enclosing
3834 conditional, for the sake of consistency. */
3835 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3836 (template_sequence[stub_reloc_idx[i]].r_type),
48229727
JB		 3837 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3838 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3839 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3840 &error_message);
3841 }
3842 else
3843 {
fe33d2fa
CL		 3844 Elf_Internal_Rela rel;
3845 bfd_boolean unresolved_reloc;
3846 char *error_message;
3847 bfd_vma points_to = sym_value + stub_entry->target_addend
3848 + template_sequence[stub_reloc_idx[i]].reloc_addend;
3849
3850 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3851 rel.r_info = ELF32_R_INFO (0,
3852 template_sequence[stub_reloc_idx[i]].r_type);
3853 rel.r_addend = 0;
3854
3855 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3856 (template_sequence[stub_reloc_idx[i]].r_type),
3857 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3858 points_to, info, stub_entry->target_section, "", stub_entry->st_type,
3859 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3860 &error_message);
48229727 3861 }
906e58ca
NC		 3862
3863 return TRUE;
48229727 3864#undef MAXRELOCS
906e58ca
NC		 3865}
3866
48229727
JB		 3867/* Calculate the template, template size and instruction size for a stub.
3868 Return value is the instruction size. */
906e58ca 3869
48229727
JB		 3870static unsigned int
3871find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3872 const insn_sequence **stub_template,
3873 int *stub_template_size)
906e58ca 3874{
d3ce72d0 3875 const insn_sequence *template_sequence = NULL;
48229727
JB		 3876 int template_size = 0, i;
3877 unsigned int size;
906e58ca 3878
d3ce72d0 3879 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 3880 if (stub_template)
3881 *stub_template = template_sequence;
3882
48229727 3883 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 3884 if (stub_template_size)
3885 *stub_template_size = template_size;
906e58ca
NC		 3886
3887 size = 0;
461a49ca
DJ		 3888 for (i = 0; i < template_size; i++)
3889 {
d3ce72d0 3890 switch (template_sequence[i].type)
461a49ca
DJ		 3891 {
3892 case THUMB16_TYPE:
3893 size += 2;
3894 break;
3895
3896 case ARM_TYPE:
48229727 3897 case THUMB32_TYPE:
461a49ca
DJ		 3898 case DATA_TYPE:
3899 size += 4;
3900 break;
3901
3902 default:
3903 BFD_FAIL ();
2a229407 3904 return 0;
461a49ca
DJ		 3905 }
3906 }
3907
48229727
JB		 3908 return size;
3909}
3910
3911/* As above, but don't actually build the stub. Just bump offset so
3912 we know stub section sizes. */
3913
3914static bfd_boolean
3915arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 3916 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 3917{
3918 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 3919 const insn_sequence *template_sequence;
48229727
JB		 3920 int template_size, size;
3921
3922 /* Massage our args to the form they really have. */
3923 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 3924
3925 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3926 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3927
d3ce72d0 3928 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 3929 &template_size);
3930
461a49ca 3931 stub_entry->stub_size = size;
d3ce72d0 3932 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 3933 stub_entry->stub_template_size = template_size;
3934
906e58ca
NC		 3935 size = (size + 7) & ~7;
3936 stub_entry->stub_sec->size += size;
461a49ca 3937
906e58ca
NC		 3938 return TRUE;
3939}
3940
3941/* External entry points for sizing and building linker stubs. */
3942
3943/* Set up various things so that we can make a list of input sections
3944 for each output section included in the link. Returns -1 on error,
3945 0 when no stubs will be needed, and 1 on success. */
3946
3947int
3948elf32_arm_setup_section_lists (bfd *output_bfd,
3949 struct bfd_link_info *info)
3950{
3951 bfd *input_bfd;
3952 unsigned int bfd_count;
3953 int top_id, top_index;
3954 asection *section;
3955 asection **input_list, **list;
3956 bfd_size_type amt;
3957 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3958
4dfe6ac6
NC		 3959 if (htab == NULL)
3960 return 0;
906e58ca
NC		 3961 if (! is_elf_hash_table (htab))
3962 return 0;
3963
3964 /* Count the number of input BFDs and find the top input section id. */
3965 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3966 input_bfd != NULL;
3967 input_bfd = input_bfd->link_next)
3968 {
3969 bfd_count += 1;
3970 for (section = input_bfd->sections;
3971 section != NULL;
3972 section = section->next)
3973 {
3974 if (top_id < section->id)
3975 top_id = section->id;
3976 }
3977 }
3978 htab->bfd_count = bfd_count;
3979
3980 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 3981 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 3982 if (htab->stub_group == NULL)
3983 return -1;
fe33d2fa 3984 htab->top_id = top_id;
906e58ca
NC		 3985
3986 /* We can't use output_bfd->section_count here to find the top output
3987 section index as some sections may have been removed, and
3988 _bfd_strip_section_from_output doesn't renumber the indices. */
3989 for (section = output_bfd->sections, top_index = 0;
3990 section != NULL;
3991 section = section->next)
3992 {
3993 if (top_index < section->index)
3994 top_index = section->index;
3995 }
3996
3997 htab->top_index = top_index;
3998 amt = sizeof (asection *) * (top_index + 1);
21d799b5 3999 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4000 htab->input_list = input_list;
4001 if (input_list == NULL)
4002 return -1;
4003
4004 /* For sections we aren't interested in, mark their entries with a
4005 value we can check later. */
4006 list = input_list + top_index;
4007 do
4008 *list = bfd_abs_section_ptr;
4009 while (list-- != input_list);
4010
4011 for (section = output_bfd->sections;
4012 section != NULL;
4013 section = section->next)
4014 {
4015 if ((section->flags & SEC_CODE) != 0)
4016 input_list[section->index] = NULL;
4017 }
4018
4019 return 1;
4020}
4021
4022/* The linker repeatedly calls this function for each input section,
4023 in the order that input sections are linked into output sections.
4024 Build lists of input sections to determine groupings between which
4025 we may insert linker stubs. */
4026
4027void
4028elf32_arm_next_input_section (struct bfd_link_info *info,
4029 asection *isec)
4030{
4031 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4032
4dfe6ac6
NC		 4033 if (htab == NULL)
4034 return;
4035
906e58ca
NC		 4036 if (isec->output_section->index <= htab->top_index)
4037 {
4038 asection **list = htab->input_list + isec->output_section->index;
4039
a7470592 4040 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4041 {
4042 /* Steal the link_sec pointer for our list. */
4043#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4044 /* This happens to make the list in reverse order,
07d72278 4045 which we reverse later. */
906e58ca
NC		 4046 PREV_SEC (isec) = *list;
4047 *list = isec;
4048 }
4049 }
4050}
4051
4052/* See whether we can group stub sections together. Grouping stub
4053 sections may result in fewer stubs. More importantly, we need to
07d72278 4054 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4055 .fini output sections respectively, because glibc splits the
4056 _init and _fini functions into multiple parts. Putting a stub in
4057 the middle of a function is not a good idea. */
4058
4059static void
4060group_sections (struct elf32_arm_link_hash_table *htab,
4061 bfd_size_type stub_group_size,
07d72278 4062 bfd_boolean stubs_always_after_branch)
906e58ca 4063{
07d72278 4064 asection **list = htab->input_list;
906e58ca
NC		 4065
4066 do
4067 {
4068 asection *tail = *list;
07d72278 4069 asection *head;
906e58ca
NC		 4070
4071 if (tail == bfd_abs_section_ptr)
4072 continue;
4073
07d72278
DJ		 4074 /* Reverse the list: we must avoid placing stubs at the
4075 beginning of the section because the beginning of the text
4076 section may be required for an interrupt vector in bare metal
4077 code. */
4078#define NEXT_SEC PREV_SEC
e780aef2
CL		 4079 head = NULL;
4080 while (tail != NULL)
4081 {
4082 /* Pop from tail. */
4083 asection *item = tail;
4084 tail = PREV_SEC (item);
4085
4086 /* Push on head. */
4087 NEXT_SEC (item) = head;
4088 head = item;
4089 }
07d72278
DJ		 4090
4091 while (head != NULL)
906e58ca
NC		 4092 {
4093 asection *curr;
07d72278 4094 asection *next;
e780aef2
CL		 4095 bfd_vma stub_group_start = head->output_offset;
4096 bfd_vma end_of_next;
906e58ca 4097
07d72278 4098 curr = head;
e780aef2 4099 while (NEXT_SEC (curr) != NULL)
8cd931b7 4100 {
e780aef2
CL		 4101 next = NEXT_SEC (curr);
4102 end_of_next = next->output_offset + next->size;
4103 if (end_of_next - stub_group_start >= stub_group_size)
4104 /* End of NEXT is too far from start, so stop. */
8cd931b7 4105 break;
e780aef2
CL		 4106 /* Add NEXT to the group. */
4107 curr = next;
8cd931b7 4108 }
906e58ca 4109
07d72278 4110 /* OK, the size from the start to the start of CURR is less
906e58ca 4111 than stub_group_size and thus can be handled by one stub
07d72278 4112 section. (Or the head section is itself larger than
906e58ca
NC		 4113 stub_group_size, in which case we may be toast.)
4114 We should really be keeping track of the total size of
4115 stubs added here, as stubs contribute to the final output
7fb9f789 4116 section size. */
906e58ca
NC		 4117 do
4118 {
07d72278 4119 next = NEXT_SEC (head);
906e58ca 4120 /* Set up this stub group. */
07d72278 4121 htab->stub_group[head->id].link_sec = curr;
906e58ca 4122 }
07d72278 4123 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4124
4125 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4126 bytes after the stub section can be handled by it too. */
4127 if (!stubs_always_after_branch)
906e58ca 4128 {
e780aef2
CL		 4129 stub_group_start = curr->output_offset + curr->size;
4130
8cd931b7 4131 while (next != NULL)
906e58ca 4132 {
e780aef2
CL		 4133 end_of_next = next->output_offset + next->size;
4134 if (end_of_next - stub_group_start >= stub_group_size)
4135 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4136 break;
e780aef2 4137 /* Add NEXT to the stub group. */
07d72278
DJ		 4138 head = next;
4139 next = NEXT_SEC (head);
4140 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4141 }
4142 }
07d72278 4143 head = next;
906e58ca
NC		 4144 }
4145 }
07d72278 4146 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4147
4148 free (htab->input_list);
4149#undef PREV_SEC
07d72278 4150#undef NEXT_SEC
906e58ca
NC		 4151}
4152
48229727
JB		 4153/* Comparison function for sorting/searching relocations relating to Cortex-A8
4154 erratum fix. */
4155
4156static int
4157a8_reloc_compare (const void *a, const void *b)
4158{
21d799b5
NC		 4159 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4160 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4161
4162 if (ra->from < rb->from)
4163 return -1;
4164 else if (ra->from > rb->from)
4165 return 1;
4166 else
4167 return 0;
4168}
4169
4170static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4171 const char *, char **);
4172
4173/* Helper function to scan code for sequences which might trigger the Cortex-A8
4174 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4175 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4176 otherwise. */
4177
81694485
NC		 4178static bfd_boolean
4179cortex_a8_erratum_scan (bfd *input_bfd,
4180 struct bfd_link_info *info,
48229727
JB		 4181 struct a8_erratum_fix **a8_fixes_p,
4182 unsigned int *num_a8_fixes_p,
4183 unsigned int *a8_fix_table_size_p,
4184 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4185 unsigned int num_a8_relocs,
4186 unsigned prev_num_a8_fixes,
4187 bfd_boolean *stub_changed_p)
48229727
JB		 4188{
4189 asection *section;
4190 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4191 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4192 unsigned int num_a8_fixes = *num_a8_fixes_p;
4193 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4194
4dfe6ac6
NC		 4195 if (htab == NULL)
4196 return FALSE;
4197
48229727
JB		 4198 for (section = input_bfd->sections;
4199 section != NULL;
4200 section = section->next)
4201 {
4202 bfd_byte *contents = NULL;
4203 struct _arm_elf_section_data *sec_data;
4204 unsigned int span;
4205 bfd_vma base_vma;
4206
4207 if (elf_section_type (section) != SHT_PROGBITS
4208 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4209 || (section->flags & SEC_EXCLUDE) != 0
4210 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4211 || (section->output_section == bfd_abs_section_ptr))
4212 continue;
4213
4214 base_vma = section->output_section->vma + section->output_offset;
4215
4216 if (elf_section_data (section)->this_hdr.contents != NULL)
4217 contents = elf_section_data (section)->this_hdr.contents;
4218 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4219 return TRUE;
48229727
JB		 4220
4221 sec_data = elf32_arm_section_data (section);
4222
4223 for (span = 0; span < sec_data->mapcount; span++)
4224 {
4225 unsigned int span_start = sec_data->map[span].vma;
4226 unsigned int span_end = (span == sec_data->mapcount - 1)
4227 ? section->size : sec_data->map[span + 1].vma;
4228 unsigned int i;
4229 char span_type = sec_data->map[span].type;
4230 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4231
4232 if (span_type != 't')
4233 continue;
4234
4235 /* Span is entirely within a single 4KB region: skip scanning. */
4236 if (((base_vma + span_start) & ~0xfff)
4237 == ((base_vma + span_end) & ~0xfff))
4238 continue;
4239
4240 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4241
4242 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4243 * The branch target is in the same 4KB region as the
4244 first half of the branch.
4245 * The instruction before the branch is a 32-bit
81694485 4246 length non-branch instruction. */
48229727
JB		 4247 for (i = span_start; i < span_end;)
4248 {
4249 unsigned int insn = bfd_getl16 (&contents[i]);
4250 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4251 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4252
4253 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4254 insn_32bit = TRUE;
4255
4256 if (insn_32bit)
4257 {
4258 /* Load the rest of the insn (in manual-friendly order). */
4259 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4260
4261 /* Encoding T4: B<c>.W. */
4262 is_b = (insn & 0xf800d000) == 0xf0009000;
4263 /* Encoding T1: BL<c>.W. */
4264 is_bl = (insn & 0xf800d000) == 0xf000d000;
4265 /* Encoding T2: BLX<c>.W. */
4266 is_blx = (insn & 0xf800d000) == 0xf000c000;
4267 /* Encoding T3: B<c>.W (not permitted in IT block). */
4268 is_bcc = (insn & 0xf800d000) == 0xf0008000
4269 && (insn & 0x07f00000) != 0x03800000;
4270 }
4271
4272 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4273
81694485
NC		 4274 if (((base_vma + i) & 0xfff) == 0xffe
4275 && insn_32bit
4276 && is_32bit_branch
4277 && last_was_32bit
4278 && ! last_was_branch)
48229727 4279 {
8f73510c 4280 bfd_signed_vma offset = 0;
48229727
JB		 4281 bfd_boolean force_target_arm = FALSE;
4282 bfd_boolean force_target_thumb = FALSE;
4283 bfd_vma target;
4284 enum elf32_arm_stub_type stub_type = arm_stub_none;
4285 struct a8_erratum_reloc key, *found;
4286
4287 key.from = base_vma + i;
21d799b5
NC		 4288 found = (struct a8_erratum_reloc *)
4289 bsearch (&key, a8_relocs, num_a8_relocs,
4290 sizeof (struct a8_erratum_reloc),
4291 &a8_reloc_compare);
48229727
JB		 4292
4293 if (found)
4294 {
4295 char *error_message = NULL;
4296 struct elf_link_hash_entry *entry;
92750f34 4297 bfd_boolean use_plt = FALSE;
48229727
JB		 4298
4299 /* We don't care about the error returned from this
4300 function, only if there is glue or not. */
4301 entry = find_thumb_glue (info, found->sym_name,
4302 &error_message);
4303
4304 if (entry)
4305 found->non_a8_stub = TRUE;
4306
92750f34 4307 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4308 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4309 && found->hash->root.plt.offset != (bfd_vma) -1)
4310 use_plt = TRUE;
4311
4312 if (found->r_type == R_ARM_THM_CALL)
4313 {
4314 if (found->st_type != STT_ARM_TFUNC || use_plt)
4315 force_target_arm = TRUE;
4316 else
4317 force_target_thumb = TRUE;
4318 }
48229727
JB		 4319 }
4320
4321 /* Check if we have an offending branch instruction. */
4322
4323 if (found && found->non_a8_stub)
4324 /* We've already made a stub for this instruction, e.g.
4325 it's a long branch or a Thumb->ARM stub. Assume that
4326 stub will suffice to work around the A8 erratum (see
4327 setting of always_after_branch above). */
4328 ;
4329 else if (is_bcc)
4330 {
4331 offset = (insn & 0x7ff) << 1;
4332 offset |= (insn & 0x3f0000) >> 4;
4333 offset |= (insn & 0x2000) ? 0x40000 : 0;
4334 offset |= (insn & 0x800) ? 0x80000 : 0;
4335 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4336 if (offset & 0x100000)
81694485 4337 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4338 stub_type = arm_stub_a8_veneer_b_cond;
4339 }
4340 else if (is_b || is_bl || is_blx)
4341 {
4342 int s = (insn & 0x4000000) != 0;
4343 int j1 = (insn & 0x2000) != 0;
4344 int j2 = (insn & 0x800) != 0;
4345 int i1 = !(j1 ^ s);
4346 int i2 = !(j2 ^ s);
4347
4348 offset = (insn & 0x7ff) << 1;
4349 offset |= (insn & 0x3ff0000) >> 4;
4350 offset |= i2 << 22;
4351 offset |= i1 << 23;
4352 offset |= s << 24;
4353 if (offset & 0x1000000)
81694485 4354 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4355
4356 if (is_blx)
81694485 4357 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4358
4359 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4360 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4361 }
4362
4363 if (stub_type != arm_stub_none)
4364 {
4365 bfd_vma pc_for_insn = base_vma + i + 4;
4366
4367 /* The original instruction is a BL, but the target is
4368 an ARM instruction. If we were not making a stub,
4369 the BL would have been converted to a BLX. Use the
4370 BLX stub instead in that case. */
4371 if (htab->use_blx && force_target_arm
4372 && stub_type == arm_stub_a8_veneer_bl)
4373 {
4374 stub_type = arm_stub_a8_veneer_blx;
4375 is_blx = TRUE;
4376 is_bl = FALSE;
4377 }
4378 /* Conversely, if the original instruction was
4379 BLX but the target is Thumb mode, use the BL
4380 stub. */
4381 else if (force_target_thumb
4382 && stub_type == arm_stub_a8_veneer_blx)
4383 {
4384 stub_type = arm_stub_a8_veneer_bl;
4385 is_blx = FALSE;
4386 is_bl = TRUE;
4387 }
4388
4389 if (is_blx)
81694485 4390 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4391
4392 /* If we found a relocation, use the proper destination,
4393 not the offset in the (unrelocated) instruction.
4394 Note this is always done if we switched the stub type
4395 above. */
4396 if (found)
81694485
NC		 4397 offset =
4398 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4399
4400 target = pc_for_insn + offset;
4401
4402 /* The BLX stub is ARM-mode code. Adjust the offset to
4403 take the different PC value (+8 instead of +4) into
4404 account. */
4405 if (stub_type == arm_stub_a8_veneer_blx)
4406 offset += 4;
4407
4408 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4409 {
eb7c4339 4410 char *stub_name = NULL;
48229727
JB		 4411
4412 if (num_a8_fixes == a8_fix_table_size)
4413 {
4414 a8_fix_table_size *= 2;
21d799b5
NC		 4415 a8_fixes = (struct a8_erratum_fix *)
4416 bfd_realloc (a8_fixes,
4417 sizeof (struct a8_erratum_fix)
4418 * a8_fix_table_size);
48229727
JB		 4419 }
4420
eb7c4339
NS		 4421 if (num_a8_fixes < prev_num_a8_fixes)
4422 {
4423 /* If we're doing a subsequent scan,
4424 check if we've found the same fix as
4425 before, and try and reuse the stub
4426 name. */
4427 stub_name = a8_fixes[num_a8_fixes].stub_name;
4428 if ((a8_fixes[num_a8_fixes].section != section)
4429 || (a8_fixes[num_a8_fixes].offset != i))
4430 {
4431 free (stub_name);
4432 stub_name = NULL;
4433 *stub_changed_p = TRUE;
4434 }
4435 }
4436
4437 if (!stub_name)
4438 {
21d799b5 4439 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4440 if (stub_name != NULL)
4441 sprintf (stub_name, "%x:%x", section->id, i);
4442 }
48229727
JB		 4443
4444 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4445 a8_fixes[num_a8_fixes].section = section;
4446 a8_fixes[num_a8_fixes].offset = i;
4447 a8_fixes[num_a8_fixes].addend = offset;
4448 a8_fixes[num_a8_fixes].orig_insn = insn;
4449 a8_fixes[num_a8_fixes].stub_name = stub_name;
4450 a8_fixes[num_a8_fixes].stub_type = stub_type;
fe33d2fa
CL		 4451 a8_fixes[num_a8_fixes].st_type =
4452 is_blx ? STT_FUNC : STT_ARM_TFUNC;
48229727
JB		 4453
4454 num_a8_fixes++;
4455 }
4456 }
4457 }
4458
4459 i += insn_32bit ? 4 : 2;
4460 last_was_32bit = insn_32bit;
4461 last_was_branch = is_32bit_branch;
4462 }
4463 }
4464
4465 if (elf_section_data (section)->this_hdr.contents == NULL)
4466 free (contents);
4467 }
fe33d2fa 4468
48229727
JB		 4469 *a8_fixes_p = a8_fixes;
4470 *num_a8_fixes_p = num_a8_fixes;
4471 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4472
81694485 4473 return FALSE;
48229727
JB		 4474}
4475
906e58ca
NC		 4476/* Determine and set the size of the stub section for a final link.
4477
4478 The basic idea here is to examine all the relocations looking for
4479 PC-relative calls to a target that is unreachable with a "bl"
4480 instruction. */
4481
4482bfd_boolean
4483elf32_arm_size_stubs (bfd *output_bfd,
4484 bfd *stub_bfd,
4485 struct bfd_link_info *info,
4486 bfd_signed_vma group_size,
4487 asection * (*add_stub_section) (const char *, asection *),
4488 void (*layout_sections_again) (void))
4489{
4490 bfd_size_type stub_group_size;
07d72278 4491 bfd_boolean stubs_always_after_branch;
906e58ca 4492 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4493 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4494 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4495 struct a8_erratum_reloc *a8_relocs = NULL;
4496 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4497
4dfe6ac6
NC		 4498 if (htab == NULL)
4499 return FALSE;
4500
48229727
JB		 4501 if (htab->fix_cortex_a8)
4502 {
21d799b5
NC		 4503 a8_fixes = (struct a8_erratum_fix *)
4504 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4505 a8_relocs = (struct a8_erratum_reloc *)
4506 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4507 }
906e58ca
NC		 4508
4509 /* Propagate mach to stub bfd, because it may not have been
4510 finalized when we created stub_bfd. */
4511 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4512 bfd_get_mach (output_bfd));
4513
4514 /* Stash our params away. */
4515 htab->stub_bfd = stub_bfd;
4516 htab->add_stub_section = add_stub_section;
4517 htab->layout_sections_again = layout_sections_again;
07d72278 4518 stubs_always_after_branch = group_size < 0;
48229727
JB		 4519
4520 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4521 as the first half of a 32-bit branch straddling two 4K pages. This is a
4522 crude way of enforcing that. */
4523 if (htab->fix_cortex_a8)
4524 stubs_always_after_branch = 1;
4525
906e58ca
NC		 4526 if (group_size < 0)
4527 stub_group_size = -group_size;
4528 else
4529 stub_group_size = group_size;
4530
4531 if (stub_group_size == 1)
4532 {
4533 /* Default values. */
4534 /* Thumb branch range is +-4MB has to be used as the default
4535 maximum size (a given section can contain both ARM and Thumb
4536 code, so the worst case has to be taken into account).
4537
4538 This value is 24K less than that, which allows for 2025
4539 12-byte stubs. If we exceed that, then we will fail to link.
4540 The user will have to relink with an explicit group size
4541 option. */
4542 stub_group_size = 4170000;
4543 }
4544
07d72278 4545 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4546
3ae046cc
NS		 4547 /* If we're applying the cortex A8 fix, we need to determine the
4548 program header size now, because we cannot change it later --
4549 that could alter section placements. Notice the A8 erratum fix
4550 ends up requiring the section addresses to remain unchanged
4551 modulo the page size. That's something we cannot represent
4552 inside BFD, and we don't want to force the section alignment to
4553 be the page size. */
4554 if (htab->fix_cortex_a8)
4555 (*htab->layout_sections_again) ();
4556
906e58ca
NC		 4557 while (1)
4558 {
4559 bfd *input_bfd;
4560 unsigned int bfd_indx;
4561 asection *stub_sec;
eb7c4339
NS		 4562 bfd_boolean stub_changed = FALSE;
4563 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4564
48229727 4565 num_a8_fixes = 0;
906e58ca
NC		 4566 for (input_bfd = info->input_bfds, bfd_indx = 0;
4567 input_bfd != NULL;
4568 input_bfd = input_bfd->link_next, bfd_indx++)
4569 {
4570 Elf_Internal_Shdr *symtab_hdr;
4571 asection *section;
4572 Elf_Internal_Sym *local_syms = NULL;
4573
48229727
JB		 4574 num_a8_relocs = 0;
4575
906e58ca
NC		 4576 /* We'll need the symbol table in a second. */
4577 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4578 if (symtab_hdr->sh_info == 0)
4579 continue;
4580
4581 /* Walk over each section attached to the input bfd. */
4582 for (section = input_bfd->sections;
4583 section != NULL;
4584 section = section->next)
4585 {
4586 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4587
4588 /* If there aren't any relocs, then there's nothing more
4589 to do. */
4590 if ((section->flags & SEC_RELOC) == 0
4591 || section->reloc_count == 0
4592 || (section->flags & SEC_CODE) == 0)
4593 continue;
4594
4595 /* If this section is a link-once section that will be
4596 discarded, then don't create any stubs. */
4597 if (section->output_section == NULL
4598 || section->output_section->owner != output_bfd)
4599 continue;
4600
4601 /* Get the relocs. */
4602 internal_relocs
4603 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4604 NULL, info->keep_memory);
4605 if (internal_relocs == NULL)
4606 goto error_ret_free_local;
4607
4608 /* Now examine each relocation. */
4609 irela = internal_relocs;
4610 irelaend = irela + section->reloc_count;
4611 for (; irela < irelaend; irela++)
4612 {
4613 unsigned int r_type, r_indx;
4614 enum elf32_arm_stub_type stub_type;
4615 struct elf32_arm_stub_hash_entry *stub_entry;
4616 asection *sym_sec;
4617 bfd_vma sym_value;
4618 bfd_vma destination;
4619 struct elf32_arm_link_hash_entry *hash;
7413f23f 4620 const char *sym_name;
906e58ca
NC		 4621 char *stub_name;
4622 const asection *id_sec;
fe33d2fa 4623 int st_type;
48229727 4624 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4625
4626 r_type = ELF32_R_TYPE (irela->r_info);
4627 r_indx = ELF32_R_SYM (irela->r_info);
4628
4629 if (r_type >= (unsigned int) R_ARM_max)
4630 {
4631 bfd_set_error (bfd_error_bad_value);
4632 error_ret_free_internal:
4633 if (elf_section_data (section)->relocs == NULL)
4634 free (internal_relocs);
4635 goto error_ret_free_local;
4636 }
0855e32b
NS		 4637
4638 hash = NULL;
4639 if (r_indx >= symtab_hdr->sh_info)
4640 hash = elf32_arm_hash_entry
4641 (elf_sym_hashes (input_bfd)
4642 [r_indx - symtab_hdr->sh_info]);
4643
4644 /* Only look for stubs on branch instructions, or
4645 non-relaxed TLSCALL */
906e58ca 4646 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4647 && (r_type != (unsigned int) R_ARM_THM_CALL)
4648 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4649 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4650 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 4651 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 4652 && (r_type != (unsigned int) R_ARM_PLT32)
4653 && !((r_type == (unsigned int) R_ARM_TLS_CALL
4654 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4655 && r_type == elf32_arm_tls_transition
4656 (info, r_type, &hash->root)
4657 && ((hash ? hash->tls_type
4658 : (elf32_arm_local_got_tls_type
4659 (input_bfd)[r_indx]))
4660 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 4661 continue;
4662
4663 /* Now determine the call target, its name, value,
4664 section. */
4665 sym_sec = NULL;
4666 sym_value = 0;
4667 destination = 0;
7413f23f 4668 sym_name = NULL;
0855e32b
NS		 4669
4670 if (r_type == (unsigned int) R_ARM_TLS_CALL
4671 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4672 {
4673 /* A non-relaxed TLS call. The target is the
4674 plt-resident trampoline and nothing to do
4675 with the symbol. */
4676 BFD_ASSERT (htab->tls_trampoline > 0);
4677 sym_sec = htab->root.splt;
4678 sym_value = htab->tls_trampoline;
4679 hash = 0;
4680 st_type = STT_FUNC;
4681 }
4682 else if (!hash)
906e58ca
NC		 4683 {
4684 /* It's a local symbol. */
4685 Elf_Internal_Sym *sym;
906e58ca
NC		 4686
4687 if (local_syms == NULL)
4688 {
4689 local_syms
4690 = (Elf_Internal_Sym *) symtab_hdr->contents;
4691 if (local_syms == NULL)
4692 local_syms
4693 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4694 symtab_hdr->sh_info, 0,
4695 NULL, NULL, NULL);
4696 if (local_syms == NULL)
4697 goto error_ret_free_internal;
4698 }
4699
4700 sym = local_syms + r_indx;
f6d250ce
TS		 4701 if (sym->st_shndx == SHN_UNDEF)
4702 sym_sec = bfd_und_section_ptr;
4703 else if (sym->st_shndx == SHN_ABS)
4704 sym_sec = bfd_abs_section_ptr;
4705 else if (sym->st_shndx == SHN_COMMON)
4706 sym_sec = bfd_com_section_ptr;
4707 else
4708 sym_sec =
4709 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
4710
ffcb4889
NS		 4711 if (!sym_sec)
4712 /* This is an undefined symbol. It can never
4713 be resolved. */
4714 continue;
fe33d2fa 4715
906e58ca
NC		 4716 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4717 sym_value = sym->st_value;
4718 destination = (sym_value + irela->r_addend
4719 + sym_sec->output_offset
4720 + sym_sec->output_section->vma);
4721 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4722 sym_name
4723 = bfd_elf_string_from_elf_section (input_bfd,
4724 symtab_hdr->sh_link,
4725 sym->st_name);
906e58ca
NC		 4726 }
4727 else
4728 {
4729 /* It's an external symbol. */
906e58ca
NC		 4730 while (hash->root.root.type == bfd_link_hash_indirect
4731 || hash->root.root.type == bfd_link_hash_warning)
4732 hash = ((struct elf32_arm_link_hash_entry *)
4733 hash->root.root.u.i.link);
4734
4735 if (hash->root.root.type == bfd_link_hash_defined
4736 || hash->root.root.type == bfd_link_hash_defweak)
4737 {
4738 sym_sec = hash->root.root.u.def.section;
4739 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4740
4741 struct elf32_arm_link_hash_table *globals =
4742 elf32_arm_hash_table (info);
4743
4744 /* For a destination in a shared library,
4745 use the PLT stub as target address to
4746 decide whether a branch stub is
4747 needed. */
4dfe6ac6 4748 if (globals != NULL
362d30a1 4749 && globals->root.splt != NULL
4dfe6ac6 4750 && hash != NULL
022f8312
CL		 4751 && hash->root.plt.offset != (bfd_vma) -1)
4752 {
362d30a1 4753 sym_sec = globals->root.splt;
022f8312
CL		 4754 sym_value = hash->root.plt.offset;
4755 if (sym_sec->output_section != NULL)
4756 destination = (sym_value
4757 + sym_sec->output_offset
4758 + sym_sec->output_section->vma);
4759 }
4760 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4761 destination = (sym_value + irela->r_addend
4762 + sym_sec->output_offset
4763 + sym_sec->output_section->vma);
4764 }
69c5861e
CL		 4765 else if ((hash->root.root.type == bfd_link_hash_undefined)
4766 || (hash->root.root.type == bfd_link_hash_undefweak))
4767 {
4768 /* For a shared library, use the PLT stub as
4769 target address to decide whether a long
4770 branch stub is needed.
4771 For absolute code, they cannot be handled. */
4772 struct elf32_arm_link_hash_table *globals =
4773 elf32_arm_hash_table (info);
4774
4dfe6ac6 4775 if (globals != NULL
362d30a1 4776 && globals->root.splt != NULL
4dfe6ac6 4777 && hash != NULL
69c5861e
CL		 4778 && hash->root.plt.offset != (bfd_vma) -1)
4779 {
362d30a1 4780 sym_sec = globals->root.splt;
69c5861e
CL		 4781 sym_value = hash->root.plt.offset;
4782 if (sym_sec->output_section != NULL)
4783 destination = (sym_value
4784 + sym_sec->output_offset
4785 + sym_sec->output_section->vma);
4786 }
4787 else
4788 continue;
4789 }
906e58ca
NC		 4790 else
4791 {
4792 bfd_set_error (bfd_error_bad_value);
4793 goto error_ret_free_internal;
4794 }
4795 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4796 sym_name = hash->root.root.root.string;
906e58ca
NC		 4797 }
4798
48229727 4799 do
7413f23f 4800 {
48229727
JB		 4801 /* Determine what (if any) linker stub is needed. */
4802 stub_type = arm_type_of_stub (info, section, irela,
fe33d2fa 4803 &st_type, hash,
48229727
JB		 4804 destination, sym_sec,
4805 input_bfd, sym_name);
4806 if (stub_type == arm_stub_none)
4807 break;
4808
4809 /* Support for grouping stub sections. */
4810 id_sec = htab->stub_group[section->id].link_sec;
4811
4812 /* Get the name of this stub. */
4813 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 4814 irela, stub_type);
48229727
JB		 4815 if (!stub_name)
4816 goto error_ret_free_internal;
4817
4818 /* We've either created a stub for this reloc already,
4819 or we are about to. */
4820 created_stub = TRUE;
4821
4822 stub_entry = arm_stub_hash_lookup
4823 (&htab->stub_hash_table, stub_name,
4824 FALSE, FALSE);
4825 if (stub_entry != NULL)
4826 {
4827 /* The proper stub has already been created. */
4828 free (stub_name);
eb7c4339 4829 stub_entry->target_value = sym_value;
48229727
JB		 4830 break;
4831 }
7413f23f 4832
48229727
JB		 4833 stub_entry = elf32_arm_add_stub (stub_name, section,
4834 htab);
4835 if (stub_entry == NULL)
4836 {
4837 free (stub_name);
4838 goto error_ret_free_internal;
4839 }
7413f23f 4840
48229727
JB		 4841 stub_entry->target_value = sym_value;
4842 stub_entry->target_section = sym_sec;
4843 stub_entry->stub_type = stub_type;
4844 stub_entry->h = hash;
4845 stub_entry->st_type = st_type;
4846
4847 if (sym_name == NULL)
4848 sym_name = "unnamed";
21d799b5
NC		 4849 stub_entry->output_name = (char *)
4850 bfd_alloc (htab->stub_bfd,
48229727
JB		 4851 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4852 + strlen (sym_name));
4853 if (stub_entry->output_name == NULL)
4854 {
4855 free (stub_name);
4856 goto error_ret_free_internal;
4857 }
4858
4859 /* For historical reasons, use the existing names for
4860 ARM-to-Thumb and Thumb-to-ARM stubs. */
4861 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4862 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4863 && st_type != STT_ARM_TFUNC)
4864 sprintf (stub_entry->output_name,
4865 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4866 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4867 || (r_type == (unsigned int) R_ARM_JUMP24))
4868 && st_type == STT_ARM_TFUNC)
4869 sprintf (stub_entry->output_name,
4870 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4871 else
4872 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4873 sym_name);
4874
4875 stub_changed = TRUE;
4876 }
4877 while (0);
4878
4879 /* Look for relocations which might trigger Cortex-A8
4880 erratum. */
4881 if (htab->fix_cortex_a8
4882 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4883 || r_type == (unsigned int) R_ARM_THM_JUMP19
4884 || r_type == (unsigned int) R_ARM_THM_CALL
4885 || r_type == (unsigned int) R_ARM_THM_XPC22))
4886 {
4887 bfd_vma from = section->output_section->vma
4888 + section->output_offset
4889 + irela->r_offset;
4890
4891 if ((from & 0xfff) == 0xffe)
4892 {
4893 /* Found a candidate. Note we haven't checked the
4894 destination is within 4K here: if we do so (and
4895 don't create an entry in a8_relocs) we can't tell
4896 that a branch should have been relocated when
4897 scanning later. */
4898 if (num_a8_relocs == a8_reloc_table_size)
4899 {
4900 a8_reloc_table_size *= 2;
21d799b5
NC		 4901 a8_relocs = (struct a8_erratum_reloc *)
4902 bfd_realloc (a8_relocs,
4903 sizeof (struct a8_erratum_reloc)
4904 * a8_reloc_table_size);
48229727
JB		 4905 }
4906
4907 a8_relocs[num_a8_relocs].from = from;
4908 a8_relocs[num_a8_relocs].destination = destination;
4909 a8_relocs[num_a8_relocs].r_type = r_type;
4910 a8_relocs[num_a8_relocs].st_type = st_type;
4911 a8_relocs[num_a8_relocs].sym_name = sym_name;
4912 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 4913 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 4914
4915 num_a8_relocs++;
4916 }
4917 }
906e58ca
NC		 4918 }
4919
48229727
JB		 4920 /* We're done with the internal relocs, free them. */
4921 if (elf_section_data (section)->relocs == NULL)
4922 free (internal_relocs);
4923 }
4924
4925 if (htab->fix_cortex_a8)
4926 {
4927 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4928 qsort (a8_relocs, num_a8_relocs,
4929 sizeof (struct a8_erratum_reloc),
48229727
JB		 4930 &a8_reloc_compare);
4931
4932 /* Scan for branches which might trigger Cortex-A8 erratum. */
4933 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4934 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4935 a8_relocs, num_a8_relocs,
4936 prev_num_a8_fixes, &stub_changed)
4937 != 0)
48229727 4938 goto error_ret_free_local;
5e681ec4 4939 }
5e681ec4
PB		 4940 }
4941
eb7c4339 4942 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4943 stub_changed = TRUE;
4944
906e58ca
NC		 4945 if (!stub_changed)
4946 break;
5e681ec4 4947
906e58ca
NC		 4948 /* OK, we've added some stubs. Find out the new size of the
4949 stub sections. */
4950 for (stub_sec = htab->stub_bfd->sections;
4951 stub_sec != NULL;
4952 stub_sec = stub_sec->next)
3e6b1042
DJ		 4953 {
4954 /* Ignore non-stub sections. */
4955 if (!strstr (stub_sec->name, STUB_SUFFIX))
4956 continue;
4957
4958 stub_sec->size = 0;
4959 }
b34b2d70 4960
906e58ca
NC		 4961 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4962
48229727
JB		 4963 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4964 if (htab->fix_cortex_a8)
4965 for (i = 0; i < num_a8_fixes; i++)
4966 {
4967 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4968 a8_fixes[i].section, htab);
4969
4970 if (stub_sec == NULL)
4971 goto error_ret_free_local;
4972
4973 stub_sec->size
4974 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4975 NULL);
4976 }
4977
4978
906e58ca
NC		 4979 /* Ask the linker to do its stuff. */
4980 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4981 }
4982
48229727
JB		 4983 /* Add stubs for Cortex-A8 erratum fixes now. */
4984 if (htab->fix_cortex_a8)
4985 {
4986 for (i = 0; i < num_a8_fixes; i++)
4987 {
4988 struct elf32_arm_stub_hash_entry *stub_entry;
4989 char *stub_name = a8_fixes[i].stub_name;
4990 asection *section = a8_fixes[i].section;
4991 unsigned int section_id = a8_fixes[i].section->id;
4992 asection *link_sec = htab->stub_group[section_id].link_sec;
4993 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 4994 const insn_sequence *template_sequence;
48229727
JB		 4995 int template_size, size = 0;
4996
4997 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4998 TRUE, FALSE);
4999 if (stub_entry == NULL)
5000 {
5001 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5002 section->owner,
5003 stub_name);
5004 return FALSE;
5005 }
5006
5007 stub_entry->stub_sec = stub_sec;
5008 stub_entry->stub_offset = 0;
5009 stub_entry->id_sec = link_sec;
5010 stub_entry->stub_type = a8_fixes[i].stub_type;
5011 stub_entry->target_section = a8_fixes[i].section;
5012 stub_entry->target_value = a8_fixes[i].offset;
5013 stub_entry->target_addend = a8_fixes[i].addend;
5014 stub_entry->orig_insn = a8_fixes[i].orig_insn;
fe33d2fa 5015 stub_entry->st_type = a8_fixes[i].st_type;
48229727 5016
d3ce72d0
NC		 5017 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5018 &template_sequence,
48229727
JB		 5019 &template_size);
5020
5021 stub_entry->stub_size = size;
d3ce72d0 5022 stub_entry->stub_template = template_sequence;
48229727
JB		 5023 stub_entry->stub_template_size = template_size;
5024 }
5025
5026 /* Stash the Cortex-A8 erratum fix array for use later in
5027 elf32_arm_write_section(). */
5028 htab->a8_erratum_fixes = a8_fixes;
5029 htab->num_a8_erratum_fixes = num_a8_fixes;
5030 }
5031 else
5032 {
5033 htab->a8_erratum_fixes = NULL;
5034 htab->num_a8_erratum_fixes = 0;
5035 }
906e58ca
NC		 5036 return TRUE;
5037
5038 error_ret_free_local:
5039 return FALSE;
5e681ec4
PB		 5040}
5041
906e58ca
NC		 5042/* Build all the stubs associated with the current output file. The
5043 stubs are kept in a hash table attached to the main linker hash
5044 table. We also set up the .plt entries for statically linked PIC
5045 functions here. This function is called via arm_elf_finish in the
5046 linker. */
252b5132 5047
906e58ca
NC		 5048bfd_boolean
5049elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5050{
906e58ca
NC		 5051 asection *stub_sec;
5052 struct bfd_hash_table *table;
5053 struct elf32_arm_link_hash_table *htab;
252b5132 5054
906e58ca 5055 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5056 if (htab == NULL)
5057 return FALSE;
252b5132 5058
906e58ca
NC		 5059 for (stub_sec = htab->stub_bfd->sections;
5060 stub_sec != NULL;
5061 stub_sec = stub_sec->next)
252b5132 5062 {
906e58ca
NC		 5063 bfd_size_type size;
5064
8029a119 5065 /* Ignore non-stub sections. */
906e58ca
NC		 5066 if (!strstr (stub_sec->name, STUB_SUFFIX))
5067 continue;
5068
5069 /* Allocate memory to hold the linker stubs. */
5070 size = stub_sec->size;
21d799b5 5071 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5072 if (stub_sec->contents == NULL && size != 0)
5073 return FALSE;
5074 stub_sec->size = 0;
252b5132
RH		 5075 }
5076
906e58ca
NC		 5077 /* Build the stubs as directed by the stub hash table. */
5078 table = &htab->stub_hash_table;
5079 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5080 if (htab->fix_cortex_a8)
5081 {
5082 /* Place the cortex a8 stubs last. */
5083 htab->fix_cortex_a8 = -1;
5084 bfd_hash_traverse (table, arm_build_one_stub, info);
5085 }
252b5132 5086
906e58ca 5087 return TRUE;
252b5132
RH		 5088}
5089
9b485d32
NC		 5090/* Locate the Thumb encoded calling stub for NAME. */
5091
252b5132 5092static struct elf_link_hash_entry *
57e8b36a
NC		 5093find_thumb_glue (struct bfd_link_info *link_info,
5094 const char *name,
f2a9dd69 5095 char **error_message)
252b5132
RH		 5096{
5097 char *tmp_name;
5098 struct elf_link_hash_entry *hash;
5099 struct elf32_arm_link_hash_table *hash_table;
5100
5101 /* We need a pointer to the armelf specific hash table. */
5102 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5103 if (hash_table == NULL)
5104 return NULL;
252b5132 5105
21d799b5
NC		 5106 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5107 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5108
5109 BFD_ASSERT (tmp_name);
5110
5111 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5112
5113 hash = elf_link_hash_lookup
b34976b6 5114 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5115
b1657152
AM		 5116 if (hash == NULL
5117 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5118 tmp_name, name) == -1)
5119 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5120
5121 free (tmp_name);
5122
5123 return hash;
5124}
5125
9b485d32
NC		 5126/* Locate the ARM encoded calling stub for NAME. */
5127
252b5132 5128static struct elf_link_hash_entry *
57e8b36a
NC		 5129find_arm_glue (struct bfd_link_info *link_info,
5130 const char *name,
f2a9dd69 5131 char **error_message)
252b5132
RH		 5132{
5133 char *tmp_name;
5134 struct elf_link_hash_entry *myh;
5135 struct elf32_arm_link_hash_table *hash_table;
5136
5137 /* We need a pointer to the elfarm specific hash table. */
5138 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5139 if (hash_table == NULL)
5140 return NULL;
252b5132 5141
21d799b5
NC		 5142 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5143 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5144
5145 BFD_ASSERT (tmp_name);
5146
5147 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5148
5149 myh = elf_link_hash_lookup
b34976b6 5150 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5151
b1657152
AM		 5152 if (myh == NULL
5153 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5154 tmp_name, name) == -1)
5155 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5156
5157 free (tmp_name);
5158
5159 return myh;
5160}
5161
8f6277f5 5162/* ARM->Thumb glue (static images):
252b5132
RH		 5163
5164 .arm
5165 __func_from_arm:
5166 ldr r12, __func_addr
5167 bx r12
5168 __func_addr:
906e58ca 5169 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5170
26079076
PB		 5171 (v5t static images)
5172 .arm
5173 __func_from_arm:
5174 ldr pc, __func_addr
5175 __func_addr:
906e58ca 5176 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5177
8f6277f5
PB		 5178 (relocatable images)
5179 .arm
5180 __func_from_arm:
5181 ldr r12, __func_offset
5182 add r12, r12, pc
5183 bx r12
5184 __func_offset:
8029a119 5185 .word func - . */
8f6277f5
PB		 5186
5187#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5188static const insn32 a2t1_ldr_insn = 0xe59fc000;
5189static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5190static const insn32 a2t3_func_addr_insn = 0x00000001;
5191
26079076
PB		 5192#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5193static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5194static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5195
8f6277f5
PB		 5196#define ARM2THUMB_PIC_GLUE_SIZE 16
5197static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5198static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5199static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5200
9b485d32 5201/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5202
8029a119
NC		 5203 .thumb .thumb
5204 .align 2 .align 2
5205 __func_from_thumb: __func_from_thumb:
5206 bx pc push {r6, lr}
5207 nop ldr r6, __func_addr
5208 .arm mov lr, pc
5209 b func bx r6
fcef9eb7
NC		 5210 .arm
5211 ;; back_to_thumb
5212 ldmia r13! {r6, lr}
5213 bx lr
8029a119
NC		 5214 __func_addr:
5215 .word func */
252b5132
RH		 5216
5217#define THUMB2ARM_GLUE_SIZE 8
5218static const insn16 t2a1_bx_pc_insn = 0x4778;
5219static const insn16 t2a2_noop_insn = 0x46c0;
5220static const insn32 t2a3_b_insn = 0xea000000;
5221
c7b8f16e
JB		 5222#define VFP11_ERRATUM_VENEER_SIZE 8
5223
845b51d6
PB		 5224#define ARM_BX_VENEER_SIZE 12
5225static const insn32 armbx1_tst_insn = 0xe3100001;
5226static const insn32 armbx2_moveq_insn = 0x01a0f000;
5227static const insn32 armbx3_bx_insn = 0xe12fff10;
5228
7e392df6 5229#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5230static void
5231arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5232{
5233 asection * s;
8029a119 5234 bfd_byte * contents;
252b5132 5235
8029a119 5236 if (size == 0)
3e6b1042
DJ		 5237 {
5238 /* Do not include empty glue sections in the output. */
5239 if (abfd != NULL)
5240 {
5241 s = bfd_get_section_by_name (abfd, name);
5242 if (s != NULL)
5243 s->flags |= SEC_EXCLUDE;
5244 }
5245 return;
5246 }
252b5132 5247
8029a119 5248 BFD_ASSERT (abfd != NULL);
252b5132 5249
8029a119
NC		 5250 s = bfd_get_section_by_name (abfd, name);
5251 BFD_ASSERT (s != NULL);
252b5132 5252
21d799b5 5253 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5254
8029a119
NC		 5255 BFD_ASSERT (s->size == size);
5256 s->contents = contents;
5257}
906e58ca 5258
8029a119
NC		 5259bfd_boolean
5260bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5261{
5262 struct elf32_arm_link_hash_table * globals;
906e58ca 5263
8029a119
NC		 5264 globals = elf32_arm_hash_table (info);
5265 BFD_ASSERT (globals != NULL);
906e58ca 5266
8029a119
NC		 5267 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5268 globals->arm_glue_size,
5269 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5270
8029a119
NC		 5271 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5272 globals->thumb_glue_size,
5273 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5274
8029a119
NC		 5275 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5276 globals->vfp11_erratum_glue_size,
5277 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5278
8029a119
NC		 5279 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5280 globals->bx_glue_size,
845b51d6
PB		 5281 ARM_BX_GLUE_SECTION_NAME);
5282
b34976b6 5283 return TRUE;
252b5132
RH		 5284}
5285
a4fd1a8e 5286/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5287 returns the symbol identifying the stub. */
5288
a4fd1a8e 5289static struct elf_link_hash_entry *
57e8b36a
NC		 5290record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5291 struct elf_link_hash_entry * h)
252b5132
RH		 5292{
5293 const char * name = h->root.root.string;
63b0f745 5294 asection * s;
252b5132
RH		 5295 char * tmp_name;
5296 struct elf_link_hash_entry * myh;
14a793b2 5297 struct bfd_link_hash_entry * bh;
252b5132 5298 struct elf32_arm_link_hash_table * globals;
dc810e39 5299 bfd_vma val;
2f475487 5300 bfd_size_type size;
252b5132
RH		 5301
5302 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5303 BFD_ASSERT (globals != NULL);
5304 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5305
5306 s = bfd_get_section_by_name
5307 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5308
252b5132
RH		 5309 BFD_ASSERT (s != NULL);
5310
21d799b5
NC		 5311 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5312 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5313
5314 BFD_ASSERT (tmp_name);
5315
5316 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5317
5318 myh = elf_link_hash_lookup
b34976b6 5319 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5320
5321 if (myh != NULL)
5322 {
9b485d32 5323 /* We've already seen this guy. */
252b5132 5324 free (tmp_name);
a4fd1a8e 5325 return myh;
252b5132
RH		 5326 }
5327
57e8b36a
NC		 5328 /* The only trick here is using hash_table->arm_glue_size as the value.
5329 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5330 putting it. The +1 on the value marks that the stub has not been
5331 output yet - not that it is a Thumb function. */
14a793b2 5332 bh = NULL;
dc810e39
AM		 5333 val = globals->arm_glue_size + 1;
5334 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5335 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5336 NULL, TRUE, FALSE, &bh);
252b5132 5337
b7693d02
DJ		 5338 myh = (struct elf_link_hash_entry *) bh;
5339 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5340 myh->forced_local = 1;
5341
252b5132
RH		 5342 free (tmp_name);
5343
27e55c4d
PB		 5344 if (link_info->shared || globals->root.is_relocatable_executable
5345 || globals->pic_veneer)
2f475487 5346 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5347 else if (globals->use_blx)
5348 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5349 else
2f475487
AM		 5350 size = ARM2THUMB_STATIC_GLUE_SIZE;
5351
5352 s->size += size;
5353 globals->arm_glue_size += size;
252b5132 5354
a4fd1a8e 5355 return myh;
252b5132
RH		 5356}
5357
845b51d6
PB		 5358/* Allocate space for ARMv4 BX veneers. */
5359
5360static void
5361record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5362{
5363 asection * s;
5364 struct elf32_arm_link_hash_table *globals;
5365 char *tmp_name;
5366 struct elf_link_hash_entry *myh;
5367 struct bfd_link_hash_entry *bh;
5368 bfd_vma val;
5369
5370 /* BX PC does not need a veneer. */
5371 if (reg == 15)
5372 return;
5373
5374 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5375 BFD_ASSERT (globals != NULL);
5376 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5377
5378 /* Check if this veneer has already been allocated. */
5379 if (globals->bx_glue_offset[reg])
5380 return;
5381
5382 s = bfd_get_section_by_name
5383 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5384
5385 BFD_ASSERT (s != NULL);
5386
5387 /* Add symbol for veneer. */
21d799b5
NC		 5388 tmp_name = (char *)
5389 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5390
845b51d6 5391 BFD_ASSERT (tmp_name);
906e58ca 5392
845b51d6 5393 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5394
845b51d6
PB		 5395 myh = elf_link_hash_lookup
5396 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5397
845b51d6 5398 BFD_ASSERT (myh == NULL);
906e58ca 5399
845b51d6
PB		 5400 bh = NULL;
5401 val = globals->bx_glue_size;
5402 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5403 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5404 NULL, TRUE, FALSE, &bh);
5405
5406 myh = (struct elf_link_hash_entry *) bh;
5407 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5408 myh->forced_local = 1;
5409
5410 s->size += ARM_BX_VENEER_SIZE;
5411 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5412 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5413}
5414
5415
c7b8f16e
JB		 5416/* Add an entry to the code/data map for section SEC. */
5417
5418static void
5419elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5420{
5421 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5422 unsigned int newidx;
906e58ca 5423
c7b8f16e
JB		 5424 if (sec_data->map == NULL)
5425 {
21d799b5
NC		 5426 sec_data->map = (elf32_arm_section_map *)
5427 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5428 sec_data->mapcount = 0;
5429 sec_data->mapsize = 1;
5430 }
906e58ca 5431
c7b8f16e 5432 newidx = sec_data->mapcount++;
906e58ca 5433
c7b8f16e
JB		 5434 if (sec_data->mapcount > sec_data->mapsize)
5435 {
5436 sec_data->mapsize *= 2;
21d799b5
NC		 5437 sec_data->map = (elf32_arm_section_map *)
5438 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5439 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5440 }
5441
5442 if (sec_data->map)
5443 {
5444 sec_data->map[newidx].vma = vma;
5445 sec_data->map[newidx].type = type;
c7b8f16e 5446 }
c7b8f16e
JB		 5447}
5448
5449
5450/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5451 veneers are handled for now. */
5452
5453static bfd_vma
5454record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5455 elf32_vfp11_erratum_list *branch,
5456 bfd *branch_bfd,
5457 asection *branch_sec,
5458 unsigned int offset)
5459{
5460 asection *s;
5461 struct elf32_arm_link_hash_table *hash_table;
5462 char *tmp_name;
5463 struct elf_link_hash_entry *myh;
5464 struct bfd_link_hash_entry *bh;
5465 bfd_vma val;
5466 struct _arm_elf_section_data *sec_data;
c7b8f16e 5467 elf32_vfp11_erratum_list *newerr;
906e58ca 5468
c7b8f16e 5469 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5470 BFD_ASSERT (hash_table != NULL);
5471 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5472
c7b8f16e
JB		 5473 s = bfd_get_section_by_name
5474 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5475
c7b8f16e 5476 sec_data = elf32_arm_section_data (s);
906e58ca 5477
c7b8f16e 5478 BFD_ASSERT (s != NULL);
906e58ca 5479
21d799b5
NC		 5480 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5481 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5482
c7b8f16e 5483 BFD_ASSERT (tmp_name);
906e58ca 5484
c7b8f16e
JB		 5485 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5486 hash_table->num_vfp11_fixes);
906e58ca 5487
c7b8f16e
JB		 5488 myh = elf_link_hash_lookup
5489 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5490
c7b8f16e 5491 BFD_ASSERT (myh == NULL);
906e58ca 5492
c7b8f16e
JB		 5493 bh = NULL;
5494 val = hash_table->vfp11_erratum_glue_size;
5495 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5496 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5497 NULL, TRUE, FALSE, &bh);
5498
5499 myh = (struct elf_link_hash_entry *) bh;
5500 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5501 myh->forced_local = 1;
5502
5503 /* Link veneer back to calling location. */
c7e2358a 5504 sec_data->erratumcount += 1;
21d799b5
NC		 5505 newerr = (elf32_vfp11_erratum_list *)
5506 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5507
c7b8f16e
JB		 5508 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5509 newerr->vma = -1;
5510 newerr->u.v.branch = branch;
5511 newerr->u.v.id = hash_table->num_vfp11_fixes;
5512 branch->u.b.veneer = newerr;
5513
5514 newerr->next = sec_data->erratumlist;
5515 sec_data->erratumlist = newerr;
5516
5517 /* A symbol for the return from the veneer. */
5518 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5519 hash_table->num_vfp11_fixes);
5520
5521 myh = elf_link_hash_lookup
5522 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5523
c7b8f16e
JB		 5524 if (myh != NULL)
5525 abort ();
5526
5527 bh = NULL;
5528 val = offset + 4;
5529 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5530 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5531
c7b8f16e
JB		 5532 myh = (struct elf_link_hash_entry *) bh;
5533 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5534 myh->forced_local = 1;
5535
5536 free (tmp_name);
906e58ca 5537
c7b8f16e
JB		 5538 /* Generate a mapping symbol for the veneer section, and explicitly add an
5539 entry for that symbol to the code/data map for the section. */
5540 if (hash_table->vfp11_erratum_glue_size == 0)
5541 {
5542 bh = NULL;
5543 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5544 ever requires this erratum fix. */
5545 _bfd_generic_link_add_one_symbol (link_info,
5546 hash_table->bfd_of_glue_owner, "$a",
5547 BSF_LOCAL, s, 0, NULL,
5548 TRUE, FALSE, &bh);
5549
5550 myh = (struct elf_link_hash_entry *) bh;
5551 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5552 myh->forced_local = 1;
906e58ca 5553
c7b8f16e
JB		 5554 /* The elf32_arm_init_maps function only cares about symbols from input
5555 BFDs. We must make a note of this generated mapping symbol
5556 ourselves so that code byteswapping works properly in
5557 elf32_arm_write_section. */
5558 elf32_arm_section_map_add (s, 'a', 0);
5559 }
906e58ca 5560
c7b8f16e
JB		 5561 s->size += VFP11_ERRATUM_VENEER_SIZE;
5562 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5563 hash_table->num_vfp11_fixes++;
906e58ca 5564
c7b8f16e
JB		 5565 /* The offset of the veneer. */
5566 return val;
5567}
5568
8029a119 5569#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5570 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5571 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5572
5573/* Create a fake section for use by the ARM backend of the linker. */
5574
5575static bfd_boolean
5576arm_make_glue_section (bfd * abfd, const char * name)
5577{
5578 asection * sec;
5579
5580 sec = bfd_get_section_by_name (abfd, name);
5581 if (sec != NULL)
5582 /* Already made. */
5583 return TRUE;
5584
5585 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5586
5587 if (sec == NULL
5588 || !bfd_set_section_alignment (abfd, sec, 2))
5589 return FALSE;
5590
5591 /* Set the gc mark to prevent the section from being removed by garbage
5592 collection, despite the fact that no relocs refer to this section. */
5593 sec->gc_mark = 1;
5594
5595 return TRUE;
5596}
5597
8afb0e02
NC		 5598/* Add the glue sections to ABFD. This function is called from the
5599 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5600
b34976b6 5601bfd_boolean
57e8b36a
NC		 5602bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5603 struct bfd_link_info *info)
252b5132 5604{
8afb0e02
NC		 5605 /* If we are only performing a partial
5606 link do not bother adding the glue. */
1049f94e 5607 if (info->relocatable)
b34976b6 5608 return TRUE;
252b5132 5609
8029a119
NC		 5610 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5611 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5612 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5613 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5614}
5615
5616/* Select a BFD to be used to hold the sections used by the glue code.
5617 This function is called from the linker scripts in ld/emultempl/
8029a119 5618 {armelf/pe}.em. */
8afb0e02 5619
b34976b6 5620bfd_boolean
57e8b36a 5621bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5622{
5623 struct elf32_arm_link_hash_table *globals;
5624
5625 /* If we are only performing a partial link
5626 do not bother getting a bfd to hold the glue. */
1049f94e 5627 if (info->relocatable)
b34976b6 5628 return TRUE;
8afb0e02 5629
b7693d02
DJ		 5630 /* Make sure we don't attach the glue sections to a dynamic object. */
5631 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5632
8afb0e02 5633 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5634 BFD_ASSERT (globals != NULL);
5635
5636 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5637 return TRUE;
8afb0e02 5638
252b5132
RH		 5639 /* Save the bfd for later use. */
5640 globals->bfd_of_glue_owner = abfd;
cedb70c5 5641
b34976b6 5642 return TRUE;
252b5132
RH		 5643}
5644
906e58ca
NC		 5645static void
5646check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5647{
104d59d1
JM		 5648 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5649 Tag_CPU_arch) > 2)
39b41c9c
PB		 5650 globals->use_blx = 1;
5651}
5652
b34976b6 5653bfd_boolean
57e8b36a 5654bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5655 struct bfd_link_info *link_info)
252b5132
RH		 5656{
5657 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5658 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5659 Elf_Internal_Rela *irel, *irelend;
5660 bfd_byte *contents = NULL;
252b5132
RH		 5661
5662 asection *sec;
5663 struct elf32_arm_link_hash_table *globals;
5664
5665 /* If we are only performing a partial link do not bother
5666 to construct any glue. */
1049f94e 5667 if (link_info->relocatable)
b34976b6 5668 return TRUE;
252b5132 5669
39ce1a6a
NC		 5670 /* Here we have a bfd that is to be included on the link. We have a
5671 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5672 globals = elf32_arm_hash_table (link_info);
252b5132 5673 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5674
5675 check_use_blx (globals);
252b5132 5676
d504ffc8 5677 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5678 {
d003868e
AM		 5679 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5680 abfd);
e489d0ae
PB		 5681 return FALSE;
5682 }
f21f3fe0 5683
39ce1a6a
NC		 5684 /* PR 5398: If we have not decided to include any loadable sections in
5685 the output then we will not have a glue owner bfd. This is OK, it
5686 just means that there is nothing else for us to do here. */
5687 if (globals->bfd_of_glue_owner == NULL)
5688 return TRUE;
5689
252b5132
RH		 5690 /* Rummage around all the relocs and map the glue vectors. */
5691 sec = abfd->sections;
5692
5693 if (sec == NULL)
b34976b6 5694 return TRUE;
252b5132
RH		 5695
5696 for (; sec != NULL; sec = sec->next)
5697 {
5698 if (sec->reloc_count == 0)
5699 continue;
5700
2f475487
AM		 5701 if ((sec->flags & SEC_EXCLUDE) != 0)
5702 continue;
5703
0ffa91dd 5704 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5705
9b485d32 5706 /* Load the relocs. */
6cdc0ccc 5707 internal_relocs
906e58ca 5708 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5709
6cdc0ccc
AM		 5710 if (internal_relocs == NULL)
5711 goto error_return;
252b5132 5712
6cdc0ccc
AM		 5713 irelend = internal_relocs + sec->reloc_count;
5714 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5715 {
5716 long r_type;
5717 unsigned long r_index;
252b5132
RH		 5718
5719 struct elf_link_hash_entry *h;
5720
5721 r_type = ELF32_R_TYPE (irel->r_info);
5722 r_index = ELF32_R_SYM (irel->r_info);
5723
9b485d32 5724 /* These are the only relocation types we care about. */
ba96a88f 5725 if ( r_type != R_ARM_PC24
845b51d6 5726 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5727 continue;
5728
5729 /* Get the section contents if we haven't done so already. */
5730 if (contents == NULL)
5731 {
5732 /* Get cached copy if it exists. */
5733 if (elf_section_data (sec)->this_hdr.contents != NULL)
5734 contents = elf_section_data (sec)->this_hdr.contents;
5735 else
5736 {
5737 /* Go get them off disk. */
57e8b36a 5738 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5739 goto error_return;
5740 }
5741 }
5742
845b51d6
PB		 5743 if (r_type == R_ARM_V4BX)
5744 {
5745 int reg;
5746
5747 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5748 record_arm_bx_glue (link_info, reg);
5749 continue;
5750 }
5751
a7c10850 5752 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5753 h = NULL;
5754
9b485d32 5755 /* We don't care about local symbols. */
252b5132
RH		 5756 if (r_index < symtab_hdr->sh_info)
5757 continue;
5758
9b485d32 5759 /* This is an external symbol. */
252b5132
RH		 5760 r_index -= symtab_hdr->sh_info;
5761 h = (struct elf_link_hash_entry *)
5762 elf_sym_hashes (abfd)[r_index];
5763
5764 /* If the relocation is against a static symbol it must be within
5765 the current section and so cannot be a cross ARM/Thumb relocation. */
5766 if (h == NULL)
5767 continue;
5768
d504ffc8
DJ		 5769 /* If the call will go through a PLT entry then we do not need
5770 glue. */
362d30a1 5771 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5772 continue;
5773
252b5132
RH		 5774 switch (r_type)
5775 {
5776 case R_ARM_PC24:
5777 /* This one is a call from arm code. We need to look up
2f0ca46a 5778 the target of the call. If it is a thumb target, we
252b5132 5779 insert glue. */
ebe24dd4 5780 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5781 record_arm_to_thumb_glue (link_info, h);
5782 break;
5783
252b5132 5784 default:
c6596c5e 5785 abort ();
252b5132
RH		 5786 }
5787 }
6cdc0ccc
AM		 5788
5789 if (contents != NULL
5790 && elf_section_data (sec)->this_hdr.contents != contents)
5791 free (contents);
5792 contents = NULL;
5793
5794 if (internal_relocs != NULL
5795 && elf_section_data (sec)->relocs != internal_relocs)
5796 free (internal_relocs);
5797 internal_relocs = NULL;
252b5132
RH		 5798 }
5799
b34976b6 5800 return TRUE;
9a5aca8c 5801
252b5132 5802error_return:
6cdc0ccc
AM		 5803 if (contents != NULL
5804 && elf_section_data (sec)->this_hdr.contents != contents)
5805 free (contents);
5806 if (internal_relocs != NULL
5807 && elf_section_data (sec)->relocs != internal_relocs)
5808 free (internal_relocs);
9a5aca8c 5809
b34976b6 5810 return FALSE;
252b5132 5811}
7e392df6 5812#endif
252b5132 5813
eb043451 5814
c7b8f16e
JB		 5815/* Initialise maps of ARM/Thumb/data for input BFDs. */
5816
5817void
5818bfd_elf32_arm_init_maps (bfd *abfd)
5819{
5820 Elf_Internal_Sym *isymbuf;
5821 Elf_Internal_Shdr *hdr;
5822 unsigned int i, localsyms;
5823
af1f4419
NC		 5824 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5825 if (! is_arm_elf (abfd))
5826 return;
5827
c7b8f16e
JB		 5828 if ((abfd->flags & DYNAMIC) != 0)
5829 return;
5830
0ffa91dd 5831 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5832 localsyms = hdr->sh_info;
5833
5834 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5835 should contain the number of local symbols, which should come before any
5836 global symbols. Mapping symbols are always local. */
5837 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5838 NULL);
5839
5840 /* No internal symbols read? Skip this BFD. */
5841 if (isymbuf == NULL)
5842 return;
5843
5844 for (i = 0; i < localsyms; i++)
5845 {
5846 Elf_Internal_Sym *isym = &isymbuf[i];
5847 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5848 const char *name;
906e58ca 5849
c7b8f16e
JB		 5850 if (sec != NULL
5851 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5852 {
5853 name = bfd_elf_string_from_elf_section (abfd,
5854 hdr->sh_link, isym->st_name);
906e58ca 5855
c7b8f16e
JB		 5856 if (bfd_is_arm_special_symbol_name (name,
5857 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5858 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5859 }
5860 }
5861}
5862
5863
48229727
JB		 5864/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5865 say what they wanted. */
5866
5867void
5868bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5869{
5870 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5871 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5872
4dfe6ac6
NC		 5873 if (globals == NULL)
5874 return;
5875
48229727
JB		 5876 if (globals->fix_cortex_a8 == -1)
5877 {
5878 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5879 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5880 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5881 || out_attr[Tag_CPU_arch_profile].i == 0))
5882 globals->fix_cortex_a8 = 1;
5883 else
5884 globals->fix_cortex_a8 = 0;
5885 }
5886}
5887
5888
c7b8f16e
JB		 5889void
5890bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5891{
5892 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5893 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5894
4dfe6ac6
NC		 5895 if (globals == NULL)
5896 return;
c7b8f16e
JB		 5897 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5898 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5899 {
5900 switch (globals->vfp11_fix)
5901 {
5902 case BFD_ARM_VFP11_FIX_DEFAULT:
5903 case BFD_ARM_VFP11_FIX_NONE:
5904 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5905 break;
906e58ca 5906
c7b8f16e
JB		 5907 default:
5908 /* Give a warning, but do as the user requests anyway. */
5909 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5910 "workaround is not necessary for target architecture"), obfd);
5911 }
5912 }
5913 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5914 /* For earlier architectures, we might need the workaround, but do not
5915 enable it by default. If users is running with broken hardware, they
5916 must enable the erratum fix explicitly. */
5917 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5918}
5919
5920
906e58ca
NC		 5921enum bfd_arm_vfp11_pipe
5922{
c7b8f16e
JB		 5923 VFP11_FMAC,
5924 VFP11_LS,
5925 VFP11_DS,
5926 VFP11_BAD
5927};
5928
5929/* Return a VFP register number. This is encoded as RX:X for single-precision
5930 registers, or X:RX for double-precision registers, where RX is the group of
5931 four bits in the instruction encoding and X is the single extension bit.
5932 RX and X fields are specified using their lowest (starting) bit. The return
5933 value is:
5934
5935 0...31: single-precision registers s0...s31
5936 32...63: double-precision registers d0...d31.
906e58ca 5937
c7b8f16e
JB		 5938 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5939 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5940
c7b8f16e
JB		 5941static unsigned int
5942bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5943 unsigned int x)
5944{
5945 if (is_double)
5946 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5947 else
5948 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5949}
5950
5951/* Set bits in *WMASK according to a register number REG as encoded by
5952 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5953
5954static void
5955bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5956{
5957 if (reg < 32)
5958 *wmask |= 1 << reg;
5959 else if (reg < 48)
5960 *wmask |= 3 << ((reg - 32) * 2);
5961}
5962
5963/* Return TRUE if WMASK overwrites anything in REGS. */
5964
5965static bfd_boolean
5966bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5967{
5968 int i;
906e58ca 5969
c7b8f16e
JB		 5970 for (i = 0; i < numregs; i++)
5971 {
5972 unsigned int reg = regs[i];
5973
5974 if (reg < 32 && (wmask & (1 << reg)) != 0)
5975 return TRUE;
906e58ca 5976
c7b8f16e
JB		 5977 reg -= 32;
5978
5979 if (reg >= 16)
5980 continue;
906e58ca 5981
c7b8f16e
JB		 5982 if ((wmask & (3 << (reg * 2))) != 0)
5983 return TRUE;
5984 }
906e58ca 5985
c7b8f16e
JB		 5986 return FALSE;
5987}
5988
5989/* In this function, we're interested in two things: finding input registers
5990 for VFP data-processing instructions, and finding the set of registers which
5991 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5992 hold the written set, so FLDM etc. are easy to deal with (we're only
5993 interested in 32 SP registers or 16 dp registers, due to the VFP version
5994 implemented by the chip in question). DP registers are marked by setting
5995 both SP registers in the write mask). */
5996
5997static enum bfd_arm_vfp11_pipe
5998bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5999 int *numregs)
6000{
91d6fa6a 6001 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6002 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6003
6004 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6005 {
6006 unsigned int pqrs;
6007 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6008 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6009
6010 pqrs = ((insn & 0x00800000) >> 20)
6011 | ((insn & 0x00300000) >> 19)
6012 | ((insn & 0x00000040) >> 6);
6013
6014 switch (pqrs)
6015 {
6016 case 0: /* fmac[sd]. */
6017 case 1: /* fnmac[sd]. */
6018 case 2: /* fmsc[sd]. */
6019 case 3: /* fnmsc[sd]. */
91d6fa6a 6020 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6021 bfd_arm_vfp11_write_mask (destmask, fd);
6022 regs[0] = fd;
6023 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6024 regs[2] = fm;
6025 *numregs = 3;
6026 break;
6027
6028 case 4: /* fmul[sd]. */
6029 case 5: /* fnmul[sd]. */
6030 case 6: /* fadd[sd]. */
6031 case 7: /* fsub[sd]. */
91d6fa6a 6032 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6033 goto vfp_binop;
6034
6035 case 8: /* fdiv[sd]. */
91d6fa6a 6036 vpipe = VFP11_DS;
c7b8f16e
JB		 6037 vfp_binop:
6038 bfd_arm_vfp11_write_mask (destmask, fd);
6039 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6040 regs[1] = fm;
6041 *numregs = 2;
6042 break;
6043
6044 case 15: /* extended opcode. */
6045 {
6046 unsigned int extn = ((insn >> 15) & 0x1e)
6047 | ((insn >> 7) & 1);
6048
6049 switch (extn)
6050 {
6051 case 0: /* fcpy[sd]. */
6052 case 1: /* fabs[sd]. */
6053 case 2: /* fneg[sd]. */
6054 case 8: /* fcmp[sd]. */
6055 case 9: /* fcmpe[sd]. */
6056 case 10: /* fcmpz[sd]. */
6057 case 11: /* fcmpez[sd]. */
6058 case 16: /* fuito[sd]. */
6059 case 17: /* fsito[sd]. */
6060 case 24: /* ftoui[sd]. */
6061 case 25: /* ftouiz[sd]. */
6062 case 26: /* ftosi[sd]. */
6063 case 27: /* ftosiz[sd]. */
6064 /* These instructions will not bounce due to underflow. */
6065 *numregs = 0;
91d6fa6a 6066 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6067 break;
6068
6069 case 3: /* fsqrt[sd]. */
6070 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6071 registers to cause the erratum in previous instructions. */
6072 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 6073 vpipe = VFP11_DS;
c7b8f16e
JB		 6074 break;
6075
6076 case 15: /* fcvt{ds,sd}. */
6077 {
6078 int rnum = 0;
6079
6080 bfd_arm_vfp11_write_mask (destmask, fd);
6081
6082 /* Only FCVTSD can underflow. */
6083 if ((insn & 0x100) != 0)
6084 regs[rnum++] = fm;
6085
6086 *numregs = rnum;
6087
91d6fa6a 6088 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6089 }
6090 break;
6091
6092 default:
6093 return VFP11_BAD;
6094 }
6095 }
6096 break;
6097
6098 default:
6099 return VFP11_BAD;
6100 }
6101 }
6102 /* Two-register transfer. */
6103 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6104 {
6105 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6106
c7b8f16e
JB		 6107 if ((insn & 0x100000) == 0)
6108 {
6109 if (is_double)
6110 bfd_arm_vfp11_write_mask (destmask, fm);
6111 else
6112 {
6113 bfd_arm_vfp11_write_mask (destmask, fm);
6114 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6115 }
6116 }
6117
91d6fa6a 6118 vpipe = VFP11_LS;
c7b8f16e
JB		 6119 }
6120 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6121 {
6122 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6123 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6124
c7b8f16e
JB		 6125 switch (puw)
6126 {
6127 case 0: /* Two-reg transfer. We should catch these above. */
6128 abort ();
906e58ca 6129
c7b8f16e
JB		 6130 case 2: /* fldm[sdx]. */
6131 case 3:
6132 case 5:
6133 {
6134 unsigned int i, offset = insn & 0xff;
6135
6136 if (is_double)
6137 offset >>= 1;
6138
6139 for (i = fd; i < fd + offset; i++)
6140 bfd_arm_vfp11_write_mask (destmask, i);
6141 }
6142 break;
906e58ca 6143
c7b8f16e
JB		 6144 case 4: /* fld[sd]. */
6145 case 6:
6146 bfd_arm_vfp11_write_mask (destmask, fd);
6147 break;
906e58ca 6148
c7b8f16e
JB		 6149 default:
6150 return VFP11_BAD;
6151 }
6152
91d6fa6a 6153 vpipe = VFP11_LS;
c7b8f16e
JB		 6154 }
6155 /* Single-register transfer. Note L==0. */
6156 else if ((insn & 0x0f100e10) == 0x0e000a10)
6157 {
6158 unsigned int opcode = (insn >> 21) & 7;
6159 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6160
6161 switch (opcode)
6162 {
6163 case 0: /* fmsr/fmdlr. */
6164 case 1: /* fmdhr. */
6165 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6166 destination register. I don't know if this is exactly right,
6167 but it is the conservative choice. */
6168 bfd_arm_vfp11_write_mask (destmask, fn);
6169 break;
6170
6171 case 7: /* fmxr. */
6172 break;
6173 }
6174
91d6fa6a 6175 vpipe = VFP11_LS;
c7b8f16e
JB		 6176 }
6177
91d6fa6a 6178 return vpipe;
c7b8f16e
JB		 6179}
6180
6181
6182static int elf32_arm_compare_mapping (const void * a, const void * b);
6183
6184
6185/* Look for potentially-troublesome code sequences which might trigger the
6186 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6187 (available from ARM) for details of the erratum. A short version is
6188 described in ld.texinfo. */
6189
6190bfd_boolean
6191bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6192{
6193 asection *sec;
6194 bfd_byte *contents = NULL;
6195 int state = 0;
6196 int regs[3], numregs = 0;
6197 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6198 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6199
4dfe6ac6
NC		 6200 if (globals == NULL)
6201 return FALSE;
6202
c7b8f16e
JB		 6203 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6204 The states transition as follows:
906e58ca 6205
c7b8f16e
JB		 6206 0 -> 1 (vector) or 0 -> 2 (scalar)
6207 A VFP FMAC-pipeline instruction has been seen. Fill
6208 regs[0]..regs[numregs-1] with its input operands. Remember this
6209 instruction in 'first_fmac'.
6210
6211 1 -> 2
6212 Any instruction, except for a VFP instruction which overwrites
6213 regs[*].
906e58ca 6214
c7b8f16e
JB		 6215 1 -> 3 [ -> 0 ] or
6216 2 -> 3 [ -> 0 ]
6217 A VFP instruction has been seen which overwrites any of regs[*].
6218 We must make a veneer! Reset state to 0 before examining next
6219 instruction.
906e58ca 6220
c7b8f16e
JB		 6221 2 -> 0
6222 If we fail to match anything in state 2, reset to state 0 and reset
6223 the instruction pointer to the instruction after 'first_fmac'.
6224
6225 If the VFP11 vector mode is in use, there must be at least two unrelated
6226 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6227 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6228
6229 /* If we are only performing a partial link do not bother
6230 to construct any glue. */
6231 if (link_info->relocatable)
6232 return TRUE;
6233
0ffa91dd
NC		 6234 /* Skip if this bfd does not correspond to an ELF image. */
6235 if (! is_arm_elf (abfd))
6236 return TRUE;
906e58ca 6237
c7b8f16e
JB		 6238 /* We should have chosen a fix type by the time we get here. */
6239 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6240
6241 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6242 return TRUE;
2e6030b9 6243
33a7ffc2
JM		 6244 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6245 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6246 return TRUE;
6247
c7b8f16e
JB		 6248 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6249 {
6250 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6251 struct _arm_elf_section_data *sec_data;
6252
6253 /* If we don't have executable progbits, we're not interested in this
6254 section. Also skip if section is to be excluded. */
6255 if (elf_section_type (sec) != SHT_PROGBITS
6256 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6257 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6258 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6259 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6260 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6261 continue;
6262
6263 sec_data = elf32_arm_section_data (sec);
906e58ca 6264
c7b8f16e
JB		 6265 if (sec_data->mapcount == 0)
6266 continue;
906e58ca 6267
c7b8f16e
JB		 6268 if (elf_section_data (sec)->this_hdr.contents != NULL)
6269 contents = elf_section_data (sec)->this_hdr.contents;
6270 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6271 goto error_return;
6272
6273 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6274 elf32_arm_compare_mapping);
6275
6276 for (span = 0; span < sec_data->mapcount; span++)
6277 {
6278 unsigned int span_start = sec_data->map[span].vma;
6279 unsigned int span_end = (span == sec_data->mapcount - 1)
6280 ? sec->size : sec_data->map[span + 1].vma;
6281 char span_type = sec_data->map[span].type;
906e58ca 6282
c7b8f16e
JB		 6283 /* FIXME: Only ARM mode is supported at present. We may need to
6284 support Thumb-2 mode also at some point. */
6285 if (span_type != 'a')
6286 continue;
6287
6288 for (i = span_start; i < span_end;)
6289 {
6290 unsigned int next_i = i + 4;
6291 unsigned int insn = bfd_big_endian (abfd)
6292 ? (contents[i] << 24)
6293 | (contents[i + 1] << 16)
6294 | (contents[i + 2] << 8)
6295 | contents[i + 3]
6296 : (contents[i + 3] << 24)
6297 | (contents[i + 2] << 16)
6298 | (contents[i + 1] << 8)
6299 | contents[i];
6300 unsigned int writemask = 0;
91d6fa6a 6301 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6302
6303 switch (state)
6304 {
6305 case 0:
91d6fa6a 6306 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6307 &numregs);
6308 /* I'm assuming the VFP11 erratum can trigger with denorm
6309 operands on either the FMAC or the DS pipeline. This might
6310 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6311 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6312 {
6313 state = use_vector ? 1 : 2;
6314 first_fmac = i;
6315 veneer_of_insn = insn;
6316 }
6317 break;
6318
6319 case 1:
6320 {
6321 int other_regs[3], other_numregs;
91d6fa6a 6322 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6323 other_regs,
6324 &other_numregs);
91d6fa6a 6325 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6326 && bfd_arm_vfp11_antidependency (writemask, regs,
6327 numregs))
6328 state = 3;
6329 else
6330 state = 2;
6331 }
6332 break;
6333
6334 case 2:
6335 {
6336 int other_regs[3], other_numregs;
91d6fa6a 6337 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6338 other_regs,
6339 &other_numregs);
91d6fa6a 6340 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6341 && bfd_arm_vfp11_antidependency (writemask, regs,
6342 numregs))
6343 state = 3;
6344 else
6345 {
6346 state = 0;
6347 next_i = first_fmac + 4;
6348 }
6349 }
6350 break;
6351
6352 case 3:
6353 abort (); /* Should be unreachable. */
6354 }
6355
6356 if (state == 3)
6357 {
21d799b5
NC		 6358 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6359 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6360
c7e2358a 6361 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6362
6363 newerr->u.b.vfp_insn = veneer_of_insn;
6364
6365 switch (span_type)
6366 {
6367 case 'a':
6368 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6369 break;
906e58ca 6370
c7b8f16e
JB		 6371 default:
6372 abort ();
6373 }
6374
6375 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6376 first_fmac);
6377
6378 newerr->vma = -1;
6379
6380 newerr->next = sec_data->erratumlist;
6381 sec_data->erratumlist = newerr;
6382
6383 state = 0;
6384 }
6385
6386 i = next_i;
6387 }
6388 }
906e58ca 6389
c7b8f16e
JB		 6390 if (contents != NULL
6391 && elf_section_data (sec)->this_hdr.contents != contents)
6392 free (contents);
6393 contents = NULL;
6394 }
6395
6396 return TRUE;
6397
6398error_return:
6399 if (contents != NULL
6400 && elf_section_data (sec)->this_hdr.contents != contents)
6401 free (contents);
906e58ca 6402
c7b8f16e
JB		 6403 return FALSE;
6404}
6405
6406/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6407 after sections have been laid out, using specially-named symbols. */
6408
6409void
6410bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6411 struct bfd_link_info *link_info)
6412{
6413 asection *sec;
6414 struct elf32_arm_link_hash_table *globals;
6415 char *tmp_name;
906e58ca 6416
c7b8f16e
JB		 6417 if (link_info->relocatable)
6418 return;
2e6030b9
MS		 6419
6420 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6421 if (! is_arm_elf (abfd))
2e6030b9
MS		 6422 return;
6423
c7b8f16e 6424 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6425 if (globals == NULL)
6426 return;
906e58ca 6427
21d799b5
NC		 6428 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6429 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6430
6431 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6432 {
6433 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6434 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6435
c7b8f16e
JB		 6436 for (; errnode != NULL; errnode = errnode->next)
6437 {
6438 struct elf_link_hash_entry *myh;
6439 bfd_vma vma;
6440
6441 switch (errnode->type)
6442 {
6443 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6444 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6445 /* Find veneer symbol. */
6446 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6447 errnode->u.b.veneer->u.v.id);
6448
6449 myh = elf_link_hash_lookup
6450 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6451
6452 if (myh == NULL)
6453 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6454 "`%s'"), abfd, tmp_name);
6455
6456 vma = myh->root.u.def.section->output_section->vma
6457 + myh->root.u.def.section->output_offset
6458 + myh->root.u.def.value;
6459
6460 errnode->u.b.veneer->vma = vma;
6461 break;
6462
6463 case VFP11_ERRATUM_ARM_VENEER:
6464 case VFP11_ERRATUM_THUMB_VENEER:
6465 /* Find return location. */
6466 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6467 errnode->u.v.id);
6468
6469 myh = elf_link_hash_lookup
6470 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6471
6472 if (myh == NULL)
6473 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6474 "`%s'"), abfd, tmp_name);
6475
6476 vma = myh->root.u.def.section->output_section->vma
6477 + myh->root.u.def.section->output_offset
6478 + myh->root.u.def.value;
6479
6480 errnode->u.v.branch->vma = vma;
6481 break;
906e58ca 6482
c7b8f16e
JB		 6483 default:
6484 abort ();
6485 }
6486 }
6487 }
906e58ca 6488
c7b8f16e
JB		 6489 free (tmp_name);
6490}
6491
6492
eb043451
PB		 6493/* Set target relocation values needed during linking. */
6494
6495void
bf21ed78
MS		 6496bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6497 struct bfd_link_info *link_info,
eb043451 6498 int target1_is_rel,
319850b4 6499 char * target2_type,
33bfe774 6500 int fix_v4bx,
c7b8f16e 6501 int use_blx,
bf21ed78 6502 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6503 int no_enum_warn, int no_wchar_warn,
48229727 6504 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6505{
6506 struct elf32_arm_link_hash_table *globals;
6507
6508 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6509 if (globals == NULL)
6510 return;
eb043451
PB		 6511
6512 globals->target1_is_rel = target1_is_rel;
6513 if (strcmp (target2_type, "rel") == 0)
6514 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6515 else if (strcmp (target2_type, "abs") == 0)
6516 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6517 else if (strcmp (target2_type, "got-rel") == 0)
6518 globals->target2_reloc = R_ARM_GOT_PREL;
6519 else
6520 {
6521 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6522 target2_type);
6523 }
319850b4 6524 globals->fix_v4bx = fix_v4bx;
33bfe774 6525 globals->use_blx |= use_blx;
c7b8f16e 6526 globals->vfp11_fix = vfp11_fix;
27e55c4d 6527 globals->pic_veneer = pic_veneer;
48229727 6528 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6529
0ffa91dd
NC		 6530 BFD_ASSERT (is_arm_elf (output_bfd));
6531 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6532 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6533}
eb043451 6534
12a0a0fd 6535/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6536
12a0a0fd
PB		 6537static void
6538insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6539{
6540 bfd_vma upper;
6541 bfd_vma lower;
6542 int reloc_sign;
6543
6544 BFD_ASSERT ((offset & 1) == 0);
6545
6546 upper = bfd_get_16 (abfd, insn);
6547 lower = bfd_get_16 (abfd, insn + 2);
6548 reloc_sign = (offset < 0) ? 1 : 0;
6549 upper = (upper & ~(bfd_vma) 0x7ff)
6550 | ((offset >> 12) & 0x3ff)
6551 | (reloc_sign << 10);
906e58ca 6552 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6553 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6554 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6555 | ((offset >> 1) & 0x7ff);
6556 bfd_put_16 (abfd, upper, insn);
6557 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6558}
6559
9b485d32
NC		 6560/* Thumb code calling an ARM function. */
6561
252b5132 6562static int
57e8b36a
NC		 6563elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6564 const char * name,
6565 bfd * input_bfd,
6566 bfd * output_bfd,
6567 asection * input_section,
6568 bfd_byte * hit_data,
6569 asection * sym_sec,
6570 bfd_vma offset,
6571 bfd_signed_vma addend,
f2a9dd69
DJ		 6572 bfd_vma val,
6573 char **error_message)
252b5132 6574{
bcbdc74c 6575 asection * s = 0;
dc810e39 6576 bfd_vma my_offset;
252b5132 6577 long int ret_offset;
bcbdc74c
NC		 6578 struct elf_link_hash_entry * myh;
6579 struct elf32_arm_link_hash_table * globals;
252b5132 6580
f2a9dd69 6581 myh = find_thumb_glue (info, name, error_message);
252b5132 6582 if (myh == NULL)
b34976b6 6583 return FALSE;
252b5132
RH		 6584
6585 globals = elf32_arm_hash_table (info);
252b5132
RH		 6586 BFD_ASSERT (globals != NULL);
6587 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6588
6589 my_offset = myh->root.u.def.value;
6590
6591 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6592 THUMB2ARM_GLUE_SECTION_NAME);
6593
6594 BFD_ASSERT (s != NULL);
6595 BFD_ASSERT (s->contents != NULL);
6596 BFD_ASSERT (s->output_section != NULL);
6597
6598 if ((my_offset & 0x01) == 0x01)
6599 {
6600 if (sym_sec != NULL
6601 && sym_sec->owner != NULL
6602 && !INTERWORK_FLAG (sym_sec->owner))
6603 {
8f615d07 6604 (*_bfd_error_handler)
d003868e
AM		 6605 (_("%B(%s): warning: interworking not enabled.\n"
6606 " first occurrence: %B: thumb call to arm"),
6607 sym_sec->owner, input_bfd, name);
252b5132 6608
b34976b6 6609 return FALSE;
252b5132
RH		 6610 }
6611
6612 --my_offset;
6613 myh->root.u.def.value = my_offset;
6614
52ab56c2
PB		 6615 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6616 s->contents + my_offset);
252b5132 6617
52ab56c2
PB		 6618 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6619 s->contents + my_offset + 2);
252b5132
RH		 6620
6621 ret_offset =
9b485d32
NC		 6622 /* Address of destination of the stub. */
6623 ((bfd_signed_vma) val)
252b5132 6624 - ((bfd_signed_vma)
57e8b36a
NC		 6625 /* Offset from the start of the current section
6626 to the start of the stubs. */
9b485d32
NC		 6627 (s->output_offset
6628 /* Offset of the start of this stub from the start of the stubs. */
6629 + my_offset
6630 /* Address of the start of the current section. */
6631 + s->output_section->vma)
6632 /* The branch instruction is 4 bytes into the stub. */
6633 + 4
6634 /* ARM branches work from the pc of the instruction + 8. */
6635 + 8);
252b5132 6636
52ab56c2
PB		 6637 put_arm_insn (globals, output_bfd,
6638 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6639 s->contents + my_offset + 4);
252b5132
RH		 6640 }
6641
6642 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6643
427bfd90
NC		 6644 /* Now go back and fix up the original BL insn to point to here. */
6645 ret_offset =
6646 /* Address of where the stub is located. */
6647 (s->output_section->vma + s->output_offset + my_offset)
6648 /* Address of where the BL is located. */
57e8b36a
NC		 6649 - (input_section->output_section->vma + input_section->output_offset
6650 + offset)
427bfd90
NC		 6651 /* Addend in the relocation. */
6652 - addend
6653 /* Biassing for PC-relative addressing. */
6654 - 8;
252b5132 6655
12a0a0fd 6656 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6657
b34976b6 6658 return TRUE;
252b5132
RH		 6659}
6660
a4fd1a8e 6661/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6662
a4fd1a8e
PB		 6663static struct elf_link_hash_entry *
6664elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6665 const char * name,
6666 bfd * input_bfd,
6667 bfd * output_bfd,
6668 asection * sym_sec,
6669 bfd_vma val,
8029a119
NC		 6670 asection * s,
6671 char ** error_message)
252b5132 6672{
dc810e39 6673 bfd_vma my_offset;
252b5132 6674 long int ret_offset;
bcbdc74c
NC		 6675 struct elf_link_hash_entry * myh;
6676 struct elf32_arm_link_hash_table * globals;
252b5132 6677
f2a9dd69 6678 myh = find_arm_glue (info, name, error_message);
252b5132 6679 if (myh == NULL)
a4fd1a8e 6680 return NULL;
252b5132
RH		 6681
6682 globals = elf32_arm_hash_table (info);
252b5132
RH		 6683 BFD_ASSERT (globals != NULL);
6684 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6685
6686 my_offset = myh->root.u.def.value;
252b5132
RH		 6687
6688 if ((my_offset & 0x01) == 0x01)
6689 {
6690 if (sym_sec != NULL
6691 && sym_sec->owner != NULL
6692 && !INTERWORK_FLAG (sym_sec->owner))
6693 {
8f615d07 6694 (*_bfd_error_handler)
d003868e
AM		 6695 (_("%B(%s): warning: interworking not enabled.\n"
6696 " first occurrence: %B: arm call to thumb"),
6697 sym_sec->owner, input_bfd, name);
252b5132 6698 }
9b485d32 6699
252b5132
RH		 6700 --my_offset;
6701 myh->root.u.def.value = my_offset;
6702
27e55c4d
PB		 6703 if (info->shared || globals->root.is_relocatable_executable
6704 || globals->pic_veneer)
8f6277f5
PB		 6705 {
6706 /* For relocatable objects we can't use absolute addresses,
6707 so construct the address from a relative offset. */
6708 /* TODO: If the offset is small it's probably worth
6709 constructing the address with adds. */
52ab56c2
PB		 6710 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6711 s->contents + my_offset);
6712 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6713 s->contents + my_offset + 4);
6714 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6715 s->contents + my_offset + 8);
8f6277f5
PB		 6716 /* Adjust the offset by 4 for the position of the add,
6717 and 8 for the pipeline offset. */
6718 ret_offset = (val - (s->output_offset
6719 + s->output_section->vma
6720 + my_offset + 12))
6721 | 1;
6722 bfd_put_32 (output_bfd, ret_offset,
6723 s->contents + my_offset + 12);
6724 }
26079076
PB		 6725 else if (globals->use_blx)
6726 {
6727 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6728 s->contents + my_offset);
6729
6730 /* It's a thumb address. Add the low order bit. */
6731 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6732 s->contents + my_offset + 4);
6733 }
8f6277f5
PB		 6734 else
6735 {
52ab56c2
PB		 6736 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6737 s->contents + my_offset);
252b5132 6738
52ab56c2
PB		 6739 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6740 s->contents + my_offset + 4);
252b5132 6741
8f6277f5
PB		 6742 /* It's a thumb address. Add the low order bit. */
6743 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6744 s->contents + my_offset + 8);
8029a119
NC		 6745
6746 my_offset += 12;
8f6277f5 6747 }
252b5132
RH		 6748 }
6749
6750 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6751
a4fd1a8e
PB		 6752 return myh;
6753}
6754
6755/* Arm code calling a Thumb function. */
6756
6757static int
6758elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6759 const char * name,
6760 bfd * input_bfd,
6761 bfd * output_bfd,
6762 asection * input_section,
6763 bfd_byte * hit_data,
6764 asection * sym_sec,
6765 bfd_vma offset,
6766 bfd_signed_vma addend,
f2a9dd69
DJ		 6767 bfd_vma val,
6768 char **error_message)
a4fd1a8e
PB		 6769{
6770 unsigned long int tmp;
6771 bfd_vma my_offset;
6772 asection * s;
6773 long int ret_offset;
6774 struct elf_link_hash_entry * myh;
6775 struct elf32_arm_link_hash_table * globals;
6776
6777 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6778 BFD_ASSERT (globals != NULL);
6779 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6780
6781 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6782 ARM2THUMB_GLUE_SECTION_NAME);
6783 BFD_ASSERT (s != NULL);
6784 BFD_ASSERT (s->contents != NULL);
6785 BFD_ASSERT (s->output_section != NULL);
6786
6787 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6788 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6789 if (!myh)
6790 return FALSE;
6791
6792 my_offset = myh->root.u.def.value;
252b5132
RH		 6793 tmp = bfd_get_32 (input_bfd, hit_data);
6794 tmp = tmp & 0xFF000000;
6795
9b485d32 6796 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6797 ret_offset = (s->output_offset
6798 + my_offset
6799 + s->output_section->vma
6800 - (input_section->output_offset
6801 + input_section->output_section->vma
6802 + offset + addend)
6803 - 8);
9a5aca8c 6804
252b5132
RH		 6805 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6806
dc810e39 6807 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6808
b34976b6 6809 return TRUE;
252b5132
RH		 6810}
6811
a4fd1a8e
PB		 6812/* Populate Arm stub for an exported Thumb function. */
6813
6814static bfd_boolean
6815elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6816{
6817 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6818 asection * s;
6819 struct elf_link_hash_entry * myh;
6820 struct elf32_arm_link_hash_entry *eh;
6821 struct elf32_arm_link_hash_table * globals;
6822 asection *sec;
6823 bfd_vma val;
f2a9dd69 6824 char *error_message;
a4fd1a8e 6825
906e58ca 6826 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6827 /* Allocate stubs for exported Thumb functions on v4t. */
6828 if (eh->export_glue == NULL)
6829 return TRUE;
6830
6831 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6832 BFD_ASSERT (globals != NULL);
6833 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6834
6835 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6836 ARM2THUMB_GLUE_SECTION_NAME);
6837 BFD_ASSERT (s != NULL);
6838 BFD_ASSERT (s->contents != NULL);
6839 BFD_ASSERT (s->output_section != NULL);
6840
6841 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6842
6843 BFD_ASSERT (sec->output_section != NULL);
6844
a4fd1a8e
PB		 6845 val = eh->export_glue->root.u.def.value + sec->output_offset
6846 + sec->output_section->vma;
8029a119 6847
a4fd1a8e
PB		 6848 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6849 h->root.u.def.section->owner,
f2a9dd69
DJ		 6850 globals->obfd, sec, val, s,
6851 &error_message);
a4fd1a8e
PB		 6852 BFD_ASSERT (myh);
6853 return TRUE;
6854}
6855
845b51d6
PB		 6856/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6857
6858static bfd_vma
6859elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6860{
6861 bfd_byte *p;
6862 bfd_vma glue_addr;
6863 asection *s;
6864 struct elf32_arm_link_hash_table *globals;
6865
6866 globals = elf32_arm_hash_table (info);
845b51d6
PB		 6867 BFD_ASSERT (globals != NULL);
6868 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6869
6870 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6871 ARM_BX_GLUE_SECTION_NAME);
6872 BFD_ASSERT (s != NULL);
6873 BFD_ASSERT (s->contents != NULL);
6874 BFD_ASSERT (s->output_section != NULL);
6875
6876 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6877
6878 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6879
6880 if ((globals->bx_glue_offset[reg] & 1) == 0)
6881 {
6882 p = s->contents + glue_addr;
6883 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6884 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6885 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6886 globals->bx_glue_offset[reg] |= 1;
6887 }
6888
6889 return glue_addr + s->output_section->vma + s->output_offset;
6890}
6891
a4fd1a8e
PB		 6892/* Generate Arm stubs for exported Thumb symbols. */
6893static void
906e58ca 6894elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6895 struct bfd_link_info *link_info)
6896{
6897 struct elf32_arm_link_hash_table * globals;
6898
8029a119
NC		 6899 if (link_info == NULL)
6900 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6901 return;
6902
6903 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6904 if (globals == NULL)
6905 return;
6906
84c08195
PB		 6907 /* If blx is available then exported Thumb symbols are OK and there is
6908 nothing to do. */
a4fd1a8e
PB		 6909 if (globals->use_blx)
6910 return;
6911
6912 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6913 link_info);
6914}
6915
eb043451
PB		 6916/* Some relocations map to different relocations depending on the
6917 target. Return the real relocation. */
8029a119 6918
eb043451
PB		 6919static int
6920arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6921 int r_type)
6922{
6923 switch (r_type)
6924 {
6925 case R_ARM_TARGET1:
6926 if (globals->target1_is_rel)
6927 return R_ARM_REL32;
6928 else
6929 return R_ARM_ABS32;
6930
6931 case R_ARM_TARGET2:
6932 return globals->target2_reloc;
6933
6934 default:
6935 return r_type;
6936 }
6937}
eb043451 6938
ba93b8ac
DJ		 6939/* Return the base VMA address which should be subtracted from real addresses
6940 when resolving @dtpoff relocation.
6941 This is PT_TLS segment p_vaddr. */
6942
6943static bfd_vma
6944dtpoff_base (struct bfd_link_info *info)
6945{
6946 /* If tls_sec is NULL, we should have signalled an error already. */
6947 if (elf_hash_table (info)->tls_sec == NULL)
6948 return 0;
6949 return elf_hash_table (info)->tls_sec->vma;
6950}
6951
6952/* Return the relocation value for @tpoff relocation
6953 if STT_TLS virtual address is ADDRESS. */
6954
6955static bfd_vma
6956tpoff (struct bfd_link_info *info, bfd_vma address)
6957{
6958 struct elf_link_hash_table *htab = elf_hash_table (info);
6959 bfd_vma base;
6960
6961 /* If tls_sec is NULL, we should have signalled an error already. */
6962 if (htab->tls_sec == NULL)
6963 return 0;
6964 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6965 return address - htab->tls_sec->vma + base;
6966}
6967
00a97672
RS		 6968/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6969 VALUE is the relocation value. */
6970
6971static bfd_reloc_status_type
6972elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6973{
6974 if (value > 0xfff)
6975 return bfd_reloc_overflow;
6976
6977 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6978 bfd_put_32 (abfd, value, data);
6979 return bfd_reloc_ok;
6980}
6981
0855e32b
NS		 6982/* Handle TLS relaxations. Relaxing is possible for symbols that use
6983 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
6984 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
6985
6986 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
6987 is to then call final_link_relocate. Return other values in the
62672b10
NS		 6988 case of error.
6989
6990 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
6991 the pre-relaxed code. It would be nice if the relocs were updated
6992 to match the optimization. */
0855e32b
NS		 6993
6994static bfd_reloc_status_type
6995elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
6996 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
6997 Elf_Internal_Rela *rel, unsigned long is_local)
6998{
6999 unsigned long insn;
7000
7001 switch (ELF32_R_TYPE (rel->r_info))
7002 {
7003 default:
7004 return bfd_reloc_notsupported;
7005
7006 case R_ARM_TLS_GOTDESC:
7007 if (is_local)
7008 insn = 0;
7009 else
7010 {
7011 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7012 if (insn & 1)
7013 insn -= 5; /* THUMB */
7014 else
7015 insn -= 8; /* ARM */
7016 }
7017 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7018 return bfd_reloc_continue;
7019
7020 case R_ARM_THM_TLS_DESCSEQ:
7021 /* Thumb insn. */
7022 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7023 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7024 {
7025 if (is_local)
7026 /* nop */
7027 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7028 }
7029 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7030 {
7031 if (is_local)
7032 /* nop */
7033 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7034 else
7035 /* ldr rx,[ry] */
7036 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7037 }
7038 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7039 {
7040 if (is_local)
7041 /* nop */
7042 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7043 else
7044 /* mov r0, rx */
7045 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7046 contents + rel->r_offset);
7047 }
7048 else
7049 {
7050 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7051 /* It's a 32 bit instruction, fetch the rest of it for
7052 error generation. */
7053 insn = (insn << 16)
7054 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7055 (*_bfd_error_handler)
7056 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7057 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7058 return bfd_reloc_notsupported;
7059 }
7060 break;
7061
7062 case R_ARM_TLS_DESCSEQ:
7063 /* arm insn. */
7064 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7065 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7066 {
7067 if (is_local)
7068 /* mov rx, ry */
7069 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7070 contents + rel->r_offset);
7071 }
7072 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7073 {
7074 if (is_local)
7075 /* nop */
7076 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7077 else
7078 /* ldr rx,[ry] */
7079 bfd_put_32 (input_bfd, insn & 0xfffff000,
7080 contents + rel->r_offset);
7081 }
7082 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7083 {
7084 if (is_local)
7085 /* nop */
7086 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7087 else
7088 /* mov r0, rx */
7089 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7090 contents + rel->r_offset);
7091 }
7092 else
7093 {
7094 (*_bfd_error_handler)
7095 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7096 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7097 return bfd_reloc_notsupported;
7098 }
7099 break;
7100
7101 case R_ARM_TLS_CALL:
7102 /* GD->IE relaxation, turn the instruction into 'nop' or
7103 'ldr r0, [pc,r0]' */
7104 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7105 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7106 break;
7107
7108 case R_ARM_THM_TLS_CALL:
7109 /* GD->IE relaxation */
7110 if (!is_local)
7111 /* add r0,pc; ldr r0, [r0] */
7112 insn = 0x44786800;
7113 else if (arch_has_thumb2_nop (globals))
7114 /* nop.w */
7115 insn = 0xf3af8000;
7116 else
7117 /* nop; nop */
7118 insn = 0xbf00bf00;
7119
7120 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7121 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7122 break;
7123 }
7124 return bfd_reloc_ok;
7125}
7126
4962c51a
MS		 7127/* For a given value of n, calculate the value of G_n as required to
7128 deal with group relocations. We return it in the form of an
7129 encoded constant-and-rotation, together with the final residual. If n is
7130 specified as less than zero, then final_residual is filled with the
7131 input value and no further action is performed. */
7132
7133static bfd_vma
7134calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7135{
7136 int current_n;
7137 bfd_vma g_n;
7138 bfd_vma encoded_g_n = 0;
7139 bfd_vma residual = value; /* Also known as Y_n. */
7140
7141 for (current_n = 0; current_n <= n; current_n++)
7142 {
7143 int shift;
7144
7145 /* Calculate which part of the value to mask. */
7146 if (residual == 0)
7147 shift = 0;
7148 else
7149 {
7150 int msb;
7151
7152 /* Determine the most significant bit in the residual and
7153 align the resulting value to a 2-bit boundary. */
7154 for (msb = 30; msb >= 0; msb -= 2)
7155 if (residual & (3 << msb))
7156 break;
7157
7158 /* The desired shift is now (msb - 6), or zero, whichever
7159 is the greater. */
7160 shift = msb - 6;
7161 if (shift < 0)
7162 shift = 0;
7163 }
7164
7165 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7166 g_n = residual & (0xff << shift);
7167 encoded_g_n = (g_n >> shift)
7168 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7169
7170 /* Calculate the residual for the next time around. */
7171 residual &= ~g_n;
7172 }
7173
7174 *final_residual = residual;
7175
7176 return encoded_g_n;
7177}
7178
7179/* Given an ARM instruction, determine whether it is an ADD or a SUB.
7180 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 7181
4962c51a 7182static int
906e58ca 7183identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 7184{
7185 int opcode = insn & 0x1e00000;
7186
7187 if (opcode == 1 << 23) /* ADD */
7188 return 1;
7189
7190 if (opcode == 1 << 22) /* SUB */
7191 return -1;
7192
7193 return 0;
7194}
7195
252b5132 7196/* Perform a relocation as part of a final link. */
9b485d32 7197
252b5132 7198static bfd_reloc_status_type
57e8b36a
NC		 7199elf32_arm_final_link_relocate (reloc_howto_type * howto,
7200 bfd * input_bfd,
7201 bfd * output_bfd,
7202 asection * input_section,
7203 bfd_byte * contents,
7204 Elf_Internal_Rela * rel,
7205 bfd_vma value,
7206 struct bfd_link_info * info,
7207 asection * sym_sec,
7208 const char * sym_name,
7209 int sym_flags,
0945cdfd 7210 struct elf_link_hash_entry * h,
f2a9dd69 7211 bfd_boolean * unresolved_reloc_p,
8029a119 7212 char ** error_message)
252b5132
RH		 7213{
7214 unsigned long r_type = howto->type;
7215 unsigned long r_symndx;
7216 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 7217 bfd_vma * local_got_offsets;
0855e32b 7218 bfd_vma * local_tlsdesc_gotents;
252b5132
RH		 7219 asection * sgot = NULL;
7220 asection * splt = NULL;
7221 asection * sreloc = NULL;
362d30a1 7222 asection * srelgot;
252b5132 7223 bfd_vma addend;
ba96a88f
NC		 7224 bfd_signed_vma signed_addend;
7225 struct elf32_arm_link_hash_table * globals;
f21f3fe0 7226
9c504268 7227 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 7228 if (globals == NULL)
7229 return bfd_reloc_notsupported;
9c504268 7230
0ffa91dd
NC		 7231 BFD_ASSERT (is_arm_elf (input_bfd));
7232
7233 /* Some relocation types map to different relocations depending on the
9c504268 7234 target. We pick the right one here. */
eb043451 7235 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 7236
7237 /* It is possible to have linker relaxations on some TLS access
7238 models. Update our information here. */
7239 r_type = elf32_arm_tls_transition (info, r_type, h);
7240
eb043451
PB		 7241 if (r_type != howto->type)
7242 howto = elf32_arm_howto_from_type (r_type);
9c504268 7243
cac15327
NC		 7244 /* If the start address has been set, then set the EF_ARM_HASENTRY
7245 flag. Setting this more than once is redundant, but the cost is
7246 not too high, and it keeps the code simple.
99e4ae17 7247
cac15327
NC		 7248 The test is done here, rather than somewhere else, because the
7249 start address is only set just before the final link commences.
7250
7251 Note - if the user deliberately sets a start address of 0, the
7252 flag will not be set. */
7253 if (bfd_get_start_address (output_bfd) != 0)
7254 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 7255
362d30a1
RS		 7256 sgot = globals->root.sgot;
7257 splt = globals->root.splt;
7258 srelgot = globals->root.srelgot;
252b5132 7259 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 7260 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
7261
252b5132
RH		 7262 r_symndx = ELF32_R_SYM (rel->r_info);
7263
4e7fd91e 7264 if (globals->use_rel)
ba96a88f 7265 {
4e7fd91e
PB		 7266 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
7267
7268 if (addend & ((howto->src_mask + 1) >> 1))
7269 {
7270 signed_addend = -1;
7271 signed_addend &= ~ howto->src_mask;
7272 signed_addend |= addend;
7273 }
7274 else
7275 signed_addend = addend;
ba96a88f
NC		 7276 }
7277 else
4e7fd91e 7278 addend = signed_addend = rel->r_addend;
f21f3fe0 7279
252b5132
RH		 7280 switch (r_type)
7281 {
7282 case R_ARM_NONE:
28a094c2
DJ		 7283 /* We don't need to find a value for this symbol. It's just a
7284 marker. */
7285 *unresolved_reloc_p = FALSE;
252b5132
RH		 7286 return bfd_reloc_ok;
7287
00a97672
RS		 7288 case R_ARM_ABS12:
7289 if (!globals->vxworks_p)
7290 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7291
252b5132
RH		 7292 case R_ARM_PC24:
7293 case R_ARM_ABS32:
bb224fc3 7294 case R_ARM_ABS32_NOI:
252b5132 7295 case R_ARM_REL32:
bb224fc3 7296 case R_ARM_REL32_NOI:
5b5bb741
PB		 7297 case R_ARM_CALL:
7298 case R_ARM_JUMP24:
dfc5f959 7299 case R_ARM_XPC25:
eb043451 7300 case R_ARM_PREL31:
7359ea65 7301 case R_ARM_PLT32:
7359ea65
DJ		 7302 /* Handle relocations which should use the PLT entry. ABS32/REL32
7303 will use the symbol's value, which may point to a PLT entry, but we
7304 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 7305 branches in this object should go to it, except if the PLT is too
7306 far away, in which case a long branch stub should be inserted. */
bb224fc3 7307 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 7308 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 7309 && r_type != R_ARM_CALL
7310 && r_type != R_ARM_JUMP24
7311 && r_type != R_ARM_PLT32)
7359ea65 7312 && h != NULL
c84cd8ee 7313 && splt != NULL
7359ea65
DJ		 7314 && h->plt.offset != (bfd_vma) -1)
7315 {
c84cd8ee
DJ		 7316 /* If we've created a .plt section, and assigned a PLT entry to
7317 this function, it should not be known to bind locally. If
7318 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 7319 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
7320
7321 value = (splt->output_section->vma
7322 + splt->output_offset
7323 + h->plt.offset);
0945cdfd 7324 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 7325 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7326 contents, rel->r_offset, value,
00a97672 7327 rel->r_addend);
7359ea65
DJ		 7328 }
7329
67687978
PB		 7330 /* When generating a shared object or relocatable executable, these
7331 relocations are copied into the output file to be resolved at
7332 run time. */
7333 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 7334 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 7335 && !(globals->vxworks_p
3348747a
NS		 7336 && strcmp (input_section->output_section->name,
7337 ".tls_vars") == 0)
bb224fc3 7338 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 7339 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 7340 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 7341 && (h == NULL
7342 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7343 || h->root.type != bfd_link_hash_undefweak)
7344 && r_type != R_ARM_PC24
5b5bb741
PB		 7345 && r_type != R_ARM_CALL
7346 && r_type != R_ARM_JUMP24
ee06dc07 7347 && r_type != R_ARM_PREL31
7359ea65 7348 && r_type != R_ARM_PLT32)
252b5132 7349 {
947216bf
AM		 7350 Elf_Internal_Rela outrel;
7351 bfd_byte *loc;
b34976b6 7352 bfd_boolean skip, relocate;
f21f3fe0 7353
0945cdfd
DJ		 7354 *unresolved_reloc_p = FALSE;
7355
252b5132
RH		 7356 if (sreloc == NULL)
7357 {
83bac4b0
NC		 7358 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
7359 ! globals->use_rel);
f21f3fe0 7360
83bac4b0 7361 if (sreloc == NULL)
252b5132 7362 return bfd_reloc_notsupported;
252b5132 7363 }
f21f3fe0 7364
b34976b6
AM		 7365 skip = FALSE;
7366 relocate = FALSE;
f21f3fe0 7367
00a97672 7368 outrel.r_addend = addend;
c629eae0
JJ		 7369 outrel.r_offset =
7370 _bfd_elf_section_offset (output_bfd, info, input_section,
7371 rel->r_offset);
7372 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 7373 skip = TRUE;
0bb2d96a 7374 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 7375 skip = TRUE, relocate = TRUE;
252b5132
RH		 7376 outrel.r_offset += (input_section->output_section->vma
7377 + input_section->output_offset);
f21f3fe0 7378
252b5132 7379 if (skip)
0bb2d96a 7380 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 7381 else if (h != NULL
7382 && h->dynindx != -1
7359ea65 7383 && (!info->shared
5e681ec4 7384 || !info->symbolic
f5385ebf 7385 || !h->def_regular))
5e681ec4 7386 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 7387 else
7388 {
a16385dc
MM		 7389 int symbol;
7390
5e681ec4 7391 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 7392 if (sym_flags == STT_ARM_TFUNC)
7393 value |= 1;
a16385dc 7394 if (globals->symbian_p)
6366ff1e 7395 {
74541ad4
AM		 7396 asection *osec;
7397
6366ff1e
MM		 7398 /* On Symbian OS, the data segment and text segement
7399 can be relocated independently. Therefore, we
7400 must indicate the segment to which this
7401 relocation is relative. The BPABI allows us to
7402 use any symbol in the right segment; we just use
7403 the section symbol as it is convenient. (We
7404 cannot use the symbol given by "h" directly as it
74541ad4
AM		 7405 will not appear in the dynamic symbol table.)
7406
7407 Note that the dynamic linker ignores the section
7408 symbol value, so we don't subtract osec->vma
7409 from the emitted reloc addend. */
10dbd1f3 7410 if (sym_sec)
74541ad4 7411 osec = sym_sec->output_section;
10dbd1f3 7412 else
74541ad4
AM		 7413 osec = input_section->output_section;
7414 symbol = elf_section_data (osec)->dynindx;
7415 if (symbol == 0)
7416 {
7417 struct elf_link_hash_table *htab = elf_hash_table (info);
7418
7419 if ((osec->flags & SEC_READONLY) == 0
7420 && htab->data_index_section != NULL)
7421 osec = htab->data_index_section;
7422 else
7423 osec = htab->text_index_section;
7424 symbol = elf_section_data (osec)->dynindx;
7425 }
6366ff1e
MM		 7426 BFD_ASSERT (symbol != 0);
7427 }
a16385dc
MM		 7428 else
7429 /* On SVR4-ish systems, the dynamic loader cannot
7430 relocate the text and data segments independently,
7431 so the symbol does not matter. */
7432 symbol = 0;
7433 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 7434 if (globals->use_rel)
7435 relocate = TRUE;
7436 else
7437 outrel.r_addend += value;
252b5132 7438 }
f21f3fe0 7439
947216bf 7440 loc = sreloc->contents;
00a97672
RS		 7441 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
7442 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 7443
f21f3fe0 7444 /* If this reloc is against an external symbol, we do not want to
252b5132 7445 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 7446 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 7447 if (! relocate)
7448 return bfd_reloc_ok;
9a5aca8c 7449
f21f3fe0 7450 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 7451 contents, rel->r_offset, value,
7452 (bfd_vma) 0);
7453 }
7454 else switch (r_type)
7455 {
00a97672
RS		 7456 case R_ARM_ABS12:
7457 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7458
dfc5f959 7459 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 7460 case R_ARM_CALL:
7461 case R_ARM_JUMP24:
8029a119 7462 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 7463 case R_ARM_PLT32:
906e58ca 7464 {
906e58ca
NC		 7465 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7466
dfc5f959 7467 if (r_type == R_ARM_XPC25)
252b5132 7468 {
dfc5f959
NC		 7469 /* Check for Arm calling Arm function. */
7470 /* FIXME: Should we translate the instruction into a BL
7471 instruction instead ? */
7472 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 7473 (*_bfd_error_handler)
7474 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7475 input_bfd,
7476 h ? h->root.root.string : "(local)");
dfc5f959 7477 }
155d87d7 7478 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7479 {
7480 /* Check for Arm calling Thumb function. */
7481 if (sym_flags == STT_ARM_TFUNC)
7482 {
f2a9dd69
DJ		 7483 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7484 output_bfd, input_section,
7485 hit_data, sym_sec, rel->r_offset,
7486 signed_addend, value,
7487 error_message))
7488 return bfd_reloc_ok;
7489 else
7490 return bfd_reloc_dangerous;
dfc5f959 7491 }
252b5132 7492 }
ba96a88f 7493
906e58ca 7494 /* Check if a stub has to be inserted because the
8029a119 7495 destination is too far or we are changing mode. */
155d87d7
CL		 7496 if ( r_type == R_ARM_CALL
7497 || r_type == R_ARM_JUMP24
7498 || r_type == R_ARM_PLT32)
906e58ca 7499 {
fe33d2fa
CL		 7500 enum elf32_arm_stub_type stub_type = arm_stub_none;
7501 struct elf32_arm_link_hash_entry *hash;
7502
7503 hash = (struct elf32_arm_link_hash_entry *) h;
7504 stub_type = arm_type_of_stub (info, input_section, rel,
7505 &sym_flags, hash,
7506 value, sym_sec,
7507 input_bfd, sym_name);
5fa9e92f 7508
fe33d2fa 7509 if (stub_type != arm_stub_none)
906e58ca
NC		 7510 {
7511 /* The target is out of reach, so redirect the
7512 branch to the local stub for this function. */
7513
7514 stub_entry = elf32_arm_get_stub_entry (input_section,
7515 sym_sec, h,
fe33d2fa
CL		 7516 rel, globals,
7517 stub_type);
906e58ca
NC		 7518 if (stub_entry != NULL)
7519 value = (stub_entry->stub_offset
7520 + stub_entry->stub_sec->output_offset
7521 + stub_entry->stub_sec->output_section->vma);
7522 }
fe33d2fa
CL		 7523 else
7524 {
7525 /* If the call goes through a PLT entry, make sure to
7526 check distance to the right destination address. */
7527 if (h != NULL
7528 && splt != NULL
7529 && h->plt.offset != (bfd_vma) -1)
7530 {
7531 value = (splt->output_section->vma
7532 + splt->output_offset
7533 + h->plt.offset);
7534 *unresolved_reloc_p = FALSE;
7535 /* The PLT entry is in ARM mode, regardless of the
7536 target function. */
7537 sym_flags = STT_FUNC;
7538 }
7539 }
906e58ca
NC		 7540 }
7541
dea514f5
PB		 7542 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7543 where:
7544 S is the address of the symbol in the relocation.
7545 P is address of the instruction being relocated.
7546 A is the addend (extracted from the instruction) in bytes.
7547
7548 S is held in 'value'.
7549 P is the base address of the section containing the
7550 instruction plus the offset of the reloc into that
7551 section, ie:
7552 (input_section->output_section->vma +
7553 input_section->output_offset +
7554 rel->r_offset).
7555 A is the addend, converted into bytes, ie:
7556 (signed_addend * 4)
7557
7558 Note: None of these operations have knowledge of the pipeline
7559 size of the processor, thus it is up to the assembler to
7560 encode this information into the addend. */
7561 value -= (input_section->output_section->vma
7562 + input_section->output_offset);
7563 value -= rel->r_offset;
4e7fd91e
PB		 7564 if (globals->use_rel)
7565 value += (signed_addend << howto->size);
7566 else
7567 /* RELA addends do not have to be adjusted by howto->size. */
7568 value += signed_addend;
23080146 7569
dcb5e6e6
NC		 7570 signed_addend = value;
7571 signed_addend >>= howto->rightshift;
9a5aca8c 7572
5ab79981 7573 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7574 the next instruction unless a PLT entry will be created.
77b4f08f 7575 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 7576 The jump to the next instruction is optimized as a NOP depending
7577 on the architecture. */
ffcb4889
NS		 7578 if (h ? (h->root.type == bfd_link_hash_undefweak
7579 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
77b4f08f 7580 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 7581 {
cd1dac3d
DG		 7582 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7583
7584 if (arch_has_arm_nop (globals))
7585 value |= 0x0320f000;
7586 else
7587 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7588 }
7589 else
59f2c4e7 7590 {
9b485d32 7591 /* Perform a signed range check. */
dcb5e6e6 7592 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7593 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7594 return bfd_reloc_overflow;
9a5aca8c 7595
5ab79981 7596 addend = (value & 2);
39b41c9c 7597
5ab79981
PB		 7598 value = (signed_addend & howto->dst_mask)
7599 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7600
5ab79981
PB		 7601 if (r_type == R_ARM_CALL)
7602 {
155d87d7
CL		 7603 /* Set the H bit in the BLX instruction. */
7604 if (sym_flags == STT_ARM_TFUNC)
7605 {
7606 if (addend)
7607 value |= (1 << 24);
7608 else
7609 value &= ~(bfd_vma)(1 << 24);
7610 }
7611
5ab79981 7612 /* Select the correct instruction (BL or BLX). */
906e58ca 7613 /* Only if we are not handling a BL to a stub. In this
8029a119 7614 case, mode switching is performed by the stub. */
906e58ca 7615 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7616 value |= (1 << 28);
7617 else
7618 {
7619 value &= ~(bfd_vma)(1 << 28);
7620 value |= (1 << 24);
7621 }
39b41c9c
PB		 7622 }
7623 }
906e58ca 7624 }
252b5132 7625 break;
f21f3fe0 7626
252b5132
RH		 7627 case R_ARM_ABS32:
7628 value += addend;
7629 if (sym_flags == STT_ARM_TFUNC)
7630 value |= 1;
7631 break;
f21f3fe0 7632
bb224fc3
MS		 7633 case R_ARM_ABS32_NOI:
7634 value += addend;
7635 break;
7636
252b5132 7637 case R_ARM_REL32:
a8bc6c78
PB		 7638 value += addend;
7639 if (sym_flags == STT_ARM_TFUNC)
7640 value |= 1;
252b5132 7641 value -= (input_section->output_section->vma
62efb346 7642 + input_section->output_offset + rel->r_offset);
252b5132 7643 break;
eb043451 7644
bb224fc3
MS		 7645 case R_ARM_REL32_NOI:
7646 value += addend;
7647 value -= (input_section->output_section->vma
7648 + input_section->output_offset + rel->r_offset);
7649 break;
7650
eb043451
PB		 7651 case R_ARM_PREL31:
7652 value -= (input_section->output_section->vma
7653 + input_section->output_offset + rel->r_offset);
7654 value += signed_addend;
7655 if (! h || h->root.type != bfd_link_hash_undefweak)
7656 {
8029a119 7657 /* Check for overflow. */
eb043451
PB		 7658 if ((value ^ (value >> 1)) & (1 << 30))
7659 return bfd_reloc_overflow;
7660 }
7661 value &= 0x7fffffff;
7662 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7663 if (sym_flags == STT_ARM_TFUNC)
7664 value |= 1;
7665 break;
252b5132 7666 }
f21f3fe0 7667
252b5132
RH		 7668 bfd_put_32 (input_bfd, value, hit_data);
7669 return bfd_reloc_ok;
7670
7671 case R_ARM_ABS8:
7672 value += addend;
4e67d4ca
DG		 7673
7674 /* There is no way to tell whether the user intended to use a signed or
7675 unsigned addend. When checking for overflow we accept either,
7676 as specified by the AAELF. */
7677 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 7678 return bfd_reloc_overflow;
7679
7680 bfd_put_8 (input_bfd, value, hit_data);
7681 return bfd_reloc_ok;
7682
7683 case R_ARM_ABS16:
7684 value += addend;
7685
4e67d4ca
DG		 7686 /* See comment for R_ARM_ABS8. */
7687 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 7688 return bfd_reloc_overflow;
7689
7690 bfd_put_16 (input_bfd, value, hit_data);
7691 return bfd_reloc_ok;
7692
252b5132 7693 case R_ARM_THM_ABS5:
9b485d32 7694 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7695 if (globals->use_rel)
7696 {
7697 /* Need to refetch addend. */
7698 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7699 /* ??? Need to determine shift amount from operand size. */
7700 addend >>= howto->rightshift;
7701 }
252b5132
RH		 7702 value += addend;
7703
7704 /* ??? Isn't value unsigned? */
7705 if ((long) value > 0x1f || (long) value < -0x10)
7706 return bfd_reloc_overflow;
7707
7708 /* ??? Value needs to be properly shifted into place first. */
7709 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7710 bfd_put_16 (input_bfd, value, hit_data);
7711 return bfd_reloc_ok;
7712
2cab6cc3
MS		 7713 case R_ARM_THM_ALU_PREL_11_0:
7714 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7715 {
7716 bfd_vma insn;
7717 bfd_signed_vma relocation;
7718
7719 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7720 | bfd_get_16 (input_bfd, hit_data + 2);
7721
7722 if (globals->use_rel)
7723 {
7724 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7725 | ((insn & (1 << 26)) >> 15);
7726 if (insn & 0xf00000)
7727 signed_addend = -signed_addend;
7728 }
7729
7730 relocation = value + signed_addend;
7731 relocation -= (input_section->output_section->vma
7732 + input_section->output_offset
7733 + rel->r_offset);
7734
7735 value = abs (relocation);
7736
7737 if (value >= 0x1000)
7738 return bfd_reloc_overflow;
7739
7740 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7741 | ((value & 0x700) << 4)
7742 | ((value & 0x800) << 15);
7743 if (relocation < 0)
7744 insn |= 0xa00000;
7745
7746 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7747 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7748
7749 return bfd_reloc_ok;
7750 }
7751
e1ec24c6
NC		 7752 case R_ARM_THM_PC8:
7753 /* PR 10073: This reloc is not generated by the GNU toolchain,
7754 but it is supported for compatibility with third party libraries
7755 generated by other compilers, specifically the ARM/IAR. */
7756 {
7757 bfd_vma insn;
7758 bfd_signed_vma relocation;
7759
7760 insn = bfd_get_16 (input_bfd, hit_data);
7761
7762 if (globals->use_rel)
7763 addend = (insn & 0x00ff) << 2;
7764
7765 relocation = value + addend;
7766 relocation -= (input_section->output_section->vma
7767 + input_section->output_offset
7768 + rel->r_offset);
7769
7770 value = abs (relocation);
7771
7772 /* We do not check for overflow of this reloc. Although strictly
7773 speaking this is incorrect, it appears to be necessary in order
7774 to work with IAR generated relocs. Since GCC and GAS do not
7775 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7776 a problem for them. */
7777 value &= 0x3fc;
7778
7779 insn = (insn & 0xff00) | (value >> 2);
7780
7781 bfd_put_16 (input_bfd, insn, hit_data);
7782
7783 return bfd_reloc_ok;
7784 }
7785
2cab6cc3
MS		 7786 case R_ARM_THM_PC12:
7787 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7788 {
7789 bfd_vma insn;
7790 bfd_signed_vma relocation;
7791
7792 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7793 | bfd_get_16 (input_bfd, hit_data + 2);
7794
7795 if (globals->use_rel)
7796 {
7797 signed_addend = insn & 0xfff;
7798 if (!(insn & (1 << 23)))
7799 signed_addend = -signed_addend;
7800 }
7801
7802 relocation = value + signed_addend;
7803 relocation -= (input_section->output_section->vma
7804 + input_section->output_offset
7805 + rel->r_offset);
7806
7807 value = abs (relocation);
7808
7809 if (value >= 0x1000)
7810 return bfd_reloc_overflow;
7811
7812 insn = (insn & 0xff7ff000) | value;
7813 if (relocation >= 0)
7814 insn |= (1 << 23);
7815
7816 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7817 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7818
7819 return bfd_reloc_ok;
7820 }
7821
dfc5f959 7822 case R_ARM_THM_XPC22:
c19d1205 7823 case R_ARM_THM_CALL:
bd97cb95 7824 case R_ARM_THM_JUMP24:
dfc5f959 7825 /* Thumb BL (branch long instruction). */
252b5132 7826 {
b34976b6 7827 bfd_vma relocation;
e95de063 7828 bfd_vma reloc_sign;
b34976b6
AM		 7829 bfd_boolean overflow = FALSE;
7830 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7831 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7832 bfd_signed_vma reloc_signed_max;
7833 bfd_signed_vma reloc_signed_min;
b34976b6 7834 bfd_vma check;
252b5132 7835 bfd_signed_vma signed_check;
e95de063 7836 int bitsize;
cd1dac3d 7837 const int thumb2 = using_thumb2 (globals);
252b5132 7838
5ab79981 7839 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7840 the next instruction unless a PLT entry will be created.
7841 The jump to the next instruction is optimized as a NOP.W for
7842 Thumb-2 enabled architectures. */
19540007
JM		 7843 if (h && h->root.type == bfd_link_hash_undefweak
7844 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7845 {
cd1dac3d
DG		 7846 if (arch_has_thumb2_nop (globals))
7847 {
7848 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7849 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7850 }
7851 else
7852 {
7853 bfd_put_16 (input_bfd, 0xe000, hit_data);
7854 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7855 }
5ab79981
PB		 7856 return bfd_reloc_ok;
7857 }
7858
e95de063
MS		 7859 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7860 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7861 if (globals->use_rel)
7862 {
e95de063
MS		 7863 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7864 bfd_vma upper = upper_insn & 0x3ff;
7865 bfd_vma lower = lower_insn & 0x7ff;
7866 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7867 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7868 bfd_vma i1 = j1 ^ s ? 0 : 1;
7869 bfd_vma i2 = j2 ^ s ? 0 : 1;
7870
7871 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7872 /* Sign extend. */
7873 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7874
4e7fd91e
PB		 7875 signed_addend = addend;
7876 }
cb1afa5c 7877
dfc5f959
NC		 7878 if (r_type == R_ARM_THM_XPC22)
7879 {
7880 /* Check for Thumb to Thumb call. */
7881 /* FIXME: Should we translate the instruction into a BL
7882 instruction instead ? */
7883 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7884 (*_bfd_error_handler)
7885 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7886 input_bfd,
7887 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7888 }
7889 else
252b5132 7890 {
dfc5f959
NC		 7891 /* If it is not a call to Thumb, assume call to Arm.
7892 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7893 function call at all, but rather a long jump. Calls through
7894 the PLT do not require stubs. */
7895 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7896 && (h == NULL || splt == NULL
7897 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7898 {
bd97cb95 7899 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7900 {
7901 /* Convert BL to BLX. */
7902 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7903 }
155d87d7
CL		 7904 else if (( r_type != R_ARM_THM_CALL)
7905 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7906 {
7907 if (elf32_thumb_to_arm_stub
7908 (info, sym_name, input_bfd, output_bfd, input_section,
7909 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7910 error_message))
7911 return bfd_reloc_ok;
7912 else
7913 return bfd_reloc_dangerous;
7914 }
da5938a2 7915 }
bd97cb95
DJ		 7916 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7917 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7918 {
7919 /* Make sure this is a BL. */
7920 lower_insn |= 0x1800;
7921 }
252b5132 7922 }
f21f3fe0 7923
fe33d2fa 7924 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 7925 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7926 {
7927 /* Check if a stub has to be inserted because the destination
8029a119 7928 is too far. */
fe33d2fa
CL		 7929 struct elf32_arm_stub_hash_entry *stub_entry;
7930 struct elf32_arm_link_hash_entry *hash;
7931
7932 hash = (struct elf32_arm_link_hash_entry *) h;
7933
7934 stub_type = arm_type_of_stub (info, input_section, rel,
7935 &sym_flags, hash, value, sym_sec,
7936 input_bfd, sym_name);
7937
7938 if (stub_type != arm_stub_none)
906e58ca
NC		 7939 {
7940 /* The target is out of reach or we are changing modes, so
7941 redirect the branch to the local stub for this
7942 function. */
7943 stub_entry = elf32_arm_get_stub_entry (input_section,
7944 sym_sec, h,
fe33d2fa
CL		 7945 rel, globals,
7946 stub_type);
906e58ca
NC		 7947 if (stub_entry != NULL)
7948 value = (stub_entry->stub_offset
7949 + stub_entry->stub_sec->output_offset
7950 + stub_entry->stub_sec->output_section->vma);
7951
f4ac8484 7952 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7953 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7954 {
7955 if ((stub_entry
7956 && !arm_stub_is_thumb (stub_entry->stub_type))
7957 || (sym_flags != STT_ARM_TFUNC))
7958 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7959 }
906e58ca
NC		 7960 }
7961 }
7962
fe33d2fa
CL		 7963 /* Handle calls via the PLT. */
7964 if (stub_type == arm_stub_none
7965 && h != NULL
7966 && splt != NULL
7967 && h->plt.offset != (bfd_vma) -1)
7968 {
7969 value = (splt->output_section->vma
7970 + splt->output_offset
7971 + h->plt.offset);
7972
7973 if (globals->use_blx && r_type == R_ARM_THM_CALL)
7974 {
7975 /* If the Thumb BLX instruction is available, convert
7976 the BL to a BLX instruction to call the ARM-mode
7977 PLT entry. */
7978 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7979 sym_flags = STT_FUNC;
7980 }
7981 else
7982 {
7983 /* Target the Thumb stub before the ARM PLT entry. */
7984 value -= PLT_THUMB_STUB_SIZE;
7985 sym_flags = STT_ARM_TFUNC;
7986 }
7987 *unresolved_reloc_p = FALSE;
7988 }
7989
ba96a88f 7990 relocation = value + signed_addend;
f21f3fe0 7991
252b5132 7992 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7993 + input_section->output_offset
7994 + rel->r_offset);
9a5aca8c 7995
252b5132
RH		 7996 check = relocation >> howto->rightshift;
7997
7998 /* If this is a signed value, the rightshift just dropped
7999 leading 1 bits (assuming twos complement). */
8000 if ((bfd_signed_vma) relocation >= 0)
8001 signed_check = check;
8002 else
8003 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8004
e95de063
MS		 8005 /* Calculate the permissable maximum and minimum values for
8006 this relocation according to whether we're relocating for
8007 Thumb-2 or not. */
8008 bitsize = howto->bitsize;
8009 if (!thumb2)
8010 bitsize -= 2;
f6ebfac0 8011 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8012 reloc_signed_min = ~reloc_signed_max;
8013
252b5132 8014 /* Assumes two's complement. */
ba96a88f 8015 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8016 overflow = TRUE;
252b5132 8017
bd97cb95 8018 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8019 /* For a BLX instruction, make sure that the relocation is rounded up
8020 to a word boundary. This follows the semantics of the instruction
8021 which specifies that bit 1 of the target address will come from bit
8022 1 of the base address. */
8023 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8024
e95de063
MS		 8025 /* Put RELOCATION back into the insn. Assumes two's complement.
8026 We use the Thumb-2 encoding, which is safe even if dealing with
8027 a Thumb-1 instruction by virtue of our overflow check above. */
8028 reloc_sign = (signed_check < 0) ? 1 : 0;
8029 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8030 | ((relocation >> 12) & 0x3ff)
8031 | (reloc_sign << 10);
906e58ca 8032 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 8033 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8034 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8035 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8036
252b5132
RH		 8037 /* Put the relocated value back in the object file: */
8038 bfd_put_16 (input_bfd, upper_insn, hit_data);
8039 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8040
8041 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8042 }
8043 break;
8044
c19d1205
ZW		 8045 case R_ARM_THM_JUMP19:
8046 /* Thumb32 conditional branch instruction. */
8047 {
8048 bfd_vma relocation;
8049 bfd_boolean overflow = FALSE;
8050 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8051 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8052 bfd_signed_vma reloc_signed_max = 0xffffe;
8053 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8054 bfd_signed_vma signed_check;
8055
8056 /* Need to refetch the addend, reconstruct the top three bits,
8057 and squish the two 11 bit pieces together. */
8058 if (globals->use_rel)
8059 {
8060 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 8061 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 8062 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8063 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8064 bfd_vma lower = (lower_insn & 0x07ff);
8065
a00a1f35
MS		 8066 upper |= J1 << 6;
8067 upper |= J2 << 7;
8068 upper |= (!S) << 8;
c19d1205
ZW		 8069 upper -= 0x0100; /* Sign extend. */
8070
8071 addend = (upper << 12) | (lower << 1);
8072 signed_addend = addend;
8073 }
8074
bd97cb95
DJ		 8075 /* Handle calls via the PLT. */
8076 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
8077 {
8078 value = (splt->output_section->vma
8079 + splt->output_offset
8080 + h->plt.offset);
8081 /* Target the Thumb stub before the ARM PLT entry. */
8082 value -= PLT_THUMB_STUB_SIZE;
8083 *unresolved_reloc_p = FALSE;
8084 }
8085
c19d1205
ZW		 8086 /* ??? Should handle interworking? GCC might someday try to
8087 use this for tail calls. */
8088
8089 relocation = value + signed_addend;
8090 relocation -= (input_section->output_section->vma
8091 + input_section->output_offset
8092 + rel->r_offset);
a00a1f35 8093 signed_check = (bfd_signed_vma) relocation;
c19d1205 8094
c19d1205
ZW		 8095 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8096 overflow = TRUE;
8097
8098 /* Put RELOCATION back into the insn. */
8099 {
8100 bfd_vma S = (relocation & 0x00100000) >> 20;
8101 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8102 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8103 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8104 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8105
a00a1f35 8106 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 8107 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8108 }
8109
8110 /* Put the relocated value back in the object file: */
8111 bfd_put_16 (input_bfd, upper_insn, hit_data);
8112 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8113
8114 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8115 }
8116
8117 case R_ARM_THM_JUMP11:
8118 case R_ARM_THM_JUMP8:
8119 case R_ARM_THM_JUMP6:
51c5503b
NC		 8120 /* Thumb B (branch) instruction). */
8121 {
6cf9e9fe 8122 bfd_signed_vma relocation;
51c5503b
NC		 8123 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
8124 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 8125 bfd_signed_vma signed_check;
8126
c19d1205
ZW		 8127 /* CZB cannot jump backward. */
8128 if (r_type == R_ARM_THM_JUMP6)
8129 reloc_signed_min = 0;
8130
4e7fd91e 8131 if (globals->use_rel)
6cf9e9fe 8132 {
4e7fd91e
PB		 8133 /* Need to refetch addend. */
8134 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8135 if (addend & ((howto->src_mask + 1) >> 1))
8136 {
8137 signed_addend = -1;
8138 signed_addend &= ~ howto->src_mask;
8139 signed_addend |= addend;
8140 }
8141 else
8142 signed_addend = addend;
8143 /* The value in the insn has been right shifted. We need to
8144 undo this, so that we can perform the address calculation
8145 in terms of bytes. */
8146 signed_addend <<= howto->rightshift;
6cf9e9fe 8147 }
6cf9e9fe 8148 relocation = value + signed_addend;
51c5503b
NC		 8149
8150 relocation -= (input_section->output_section->vma
8151 + input_section->output_offset
8152 + rel->r_offset);
8153
6cf9e9fe
NC		 8154 relocation >>= howto->rightshift;
8155 signed_check = relocation;
c19d1205
ZW		 8156
8157 if (r_type == R_ARM_THM_JUMP6)
8158 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
8159 else
8160 relocation &= howto->dst_mask;
51c5503b 8161 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 8162
51c5503b
NC		 8163 bfd_put_16 (input_bfd, relocation, hit_data);
8164
8165 /* Assumes two's complement. */
8166 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8167 return bfd_reloc_overflow;
8168
8169 return bfd_reloc_ok;
8170 }
cedb70c5 8171
8375c36b
PB		 8172 case R_ARM_ALU_PCREL7_0:
8173 case R_ARM_ALU_PCREL15_8:
8174 case R_ARM_ALU_PCREL23_15:
8175 {
8176 bfd_vma insn;
8177 bfd_vma relocation;
8178
8179 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 8180 if (globals->use_rel)
8181 {
8182 /* Extract the addend. */
8183 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
8184 signed_addend = addend;
8185 }
8375c36b
PB		 8186 relocation = value + signed_addend;
8187
8188 relocation -= (input_section->output_section->vma
8189 + input_section->output_offset
8190 + rel->r_offset);
8191 insn = (insn & ~0xfff)
8192 | ((howto->bitpos << 7) & 0xf00)
8193 | ((relocation >> howto->bitpos) & 0xff);
8194 bfd_put_32 (input_bfd, value, hit_data);
8195 }
8196 return bfd_reloc_ok;
8197
252b5132
RH		 8198 case R_ARM_GNU_VTINHERIT:
8199 case R_ARM_GNU_VTENTRY:
8200 return bfd_reloc_ok;
8201
c19d1205 8202 case R_ARM_GOTOFF32:
252b5132
RH		 8203 /* Relocation is relative to the start of the
8204 global offset table. */
8205
8206 BFD_ASSERT (sgot != NULL);
8207 if (sgot == NULL)
8208 return bfd_reloc_notsupported;
9a5aca8c 8209
cedb70c5 8210 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 8211 address by one, so that attempts to call the function pointer will
8212 correctly interpret it as Thumb code. */
8213 if (sym_flags == STT_ARM_TFUNC)
8214 value += 1;
8215
252b5132
RH		 8216 /* Note that sgot->output_offset is not involved in this
8217 calculation. We always want the start of .got. If we
8218 define _GLOBAL_OFFSET_TABLE in a different way, as is
8219 permitted by the ABI, we might have to change this
9b485d32 8220 calculation. */
252b5132 8221 value -= sgot->output_section->vma;
f21f3fe0 8222 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8223 contents, rel->r_offset, value,
00a97672 8224 rel->r_addend);
252b5132
RH		 8225
8226 case R_ARM_GOTPC:
a7c10850 8227 /* Use global offset table as symbol value. */
252b5132 8228 BFD_ASSERT (sgot != NULL);
f21f3fe0 8229
252b5132
RH		 8230 if (sgot == NULL)
8231 return bfd_reloc_notsupported;
8232
0945cdfd 8233 *unresolved_reloc_p = FALSE;
252b5132 8234 value = sgot->output_section->vma;
f21f3fe0 8235 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8236 contents, rel->r_offset, value,
00a97672 8237 rel->r_addend);
f21f3fe0 8238
252b5132 8239 case R_ARM_GOT32:
eb043451 8240 case R_ARM_GOT_PREL:
252b5132 8241 /* Relocation is to the entry for this symbol in the
9b485d32 8242 global offset table. */
252b5132
RH		 8243 if (sgot == NULL)
8244 return bfd_reloc_notsupported;
f21f3fe0 8245
252b5132
RH		 8246 if (h != NULL)
8247 {
8248 bfd_vma off;
5e681ec4 8249 bfd_boolean dyn;
f21f3fe0 8250
252b5132
RH		 8251 off = h->got.offset;
8252 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 8253 dyn = globals->root.dynamic_sections_created;
f21f3fe0 8254
5e681ec4 8255 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 8256 || (info->shared
5e681ec4
PB		 8257 && SYMBOL_REFERENCES_LOCAL (info, h))
8258 || (ELF_ST_VISIBILITY (h->other)
8259 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 8260 {
8261 /* This is actually a static link, or it is a -Bsymbolic link
8262 and the symbol is defined locally. We must initialize this
8263 entry in the global offset table. Since the offset must
8264 always be a multiple of 4, we use the least significant bit
8265 to record whether we have initialized it already.
f21f3fe0 8266
00a97672 8267 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 8268 entry to initialize the value. This is done in the
9b485d32 8269 finish_dynamic_symbol routine. */
252b5132
RH		 8270 if ((off & 1) != 0)
8271 off &= ~1;
8272 else
8273 {
ee29b9fb
RE		 8274 /* If we are addressing a Thumb function, we need to
8275 adjust the address by one, so that attempts to
8276 call the function pointer will correctly
8277 interpret it as Thumb code. */
8278 if (sym_flags == STT_ARM_TFUNC)
8279 value |= 1;
8280
252b5132
RH		 8281 bfd_put_32 (output_bfd, value, sgot->contents + off);
8282 h->got.offset |= 1;
8283 }
8284 }
0945cdfd
DJ		 8285 else
8286 *unresolved_reloc_p = FALSE;
f21f3fe0 8287
252b5132
RH		 8288 value = sgot->output_offset + off;
8289 }
8290 else
8291 {
8292 bfd_vma off;
f21f3fe0 8293
252b5132
RH		 8294 BFD_ASSERT (local_got_offsets != NULL &&
8295 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 8296
252b5132 8297 off = local_got_offsets[r_symndx];
f21f3fe0 8298
252b5132
RH		 8299 /* The offset must always be a multiple of 4. We use the
8300 least significant bit to record whether we have already
9b485d32 8301 generated the necessary reloc. */
252b5132
RH		 8302 if ((off & 1) != 0)
8303 off &= ~1;
8304 else
8305 {
b7693d02
DJ		 8306 /* If we are addressing a Thumb function, we need to
8307 adjust the address by one, so that attempts to
8308 call the function pointer will correctly
8309 interpret it as Thumb code. */
8310 if (sym_flags == STT_ARM_TFUNC)
8311 value |= 1;
8312
00a97672
RS		 8313 if (globals->use_rel)
8314 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 8315
252b5132
RH		 8316 if (info->shared)
8317 {
947216bf
AM		 8318 Elf_Internal_Rela outrel;
8319 bfd_byte *loc;
f21f3fe0 8320
252b5132 8321 BFD_ASSERT (srelgot != NULL);
f21f3fe0 8322
00a97672 8323 outrel.r_addend = addend + value;
252b5132 8324 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 8325 + sgot->output_offset
252b5132
RH		 8326 + off);
8327 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 8328 loc = srelgot->contents;
00a97672
RS		 8329 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
8330 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 8331 }
f21f3fe0 8332
252b5132
RH		 8333 local_got_offsets[r_symndx] |= 1;
8334 }
f21f3fe0 8335
252b5132
RH		 8336 value = sgot->output_offset + off;
8337 }
eb043451
PB		 8338 if (r_type != R_ARM_GOT32)
8339 value += sgot->output_section->vma;
9a5aca8c 8340
f21f3fe0 8341 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8342 contents, rel->r_offset, value,
00a97672 8343 rel->r_addend);
f21f3fe0 8344
ba93b8ac
DJ		 8345 case R_ARM_TLS_LDO32:
8346 value = value - dtpoff_base (info);
8347
8348 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8349 contents, rel->r_offset, value,
8350 rel->r_addend);
ba93b8ac
DJ		 8351
8352 case R_ARM_TLS_LDM32:
8353 {
8354 bfd_vma off;
8355
362d30a1 8356 if (sgot == NULL)
ba93b8ac
DJ		 8357 abort ();
8358
8359 off = globals->tls_ldm_got.offset;
8360
8361 if ((off & 1) != 0)
8362 off &= ~1;
8363 else
8364 {
8365 /* If we don't know the module number, create a relocation
8366 for it. */
8367 if (info->shared)
8368 {
8369 Elf_Internal_Rela outrel;
8370 bfd_byte *loc;
8371
362d30a1 8372 if (srelgot == NULL)
ba93b8ac
DJ		 8373 abort ();
8374
00a97672 8375 outrel.r_addend = 0;
362d30a1
RS		 8376 outrel.r_offset = (sgot->output_section->vma
8377 + sgot->output_offset + off);
ba93b8ac
DJ		 8378 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
8379
00a97672
RS		 8380 if (globals->use_rel)
8381 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8382 sgot->contents + off);
ba93b8ac 8383
362d30a1
RS		 8384 loc = srelgot->contents;
8385 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
00a97672 8386 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 8387 }
8388 else
362d30a1 8389 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 8390
8391 globals->tls_ldm_got.offset |= 1;
8392 }
8393
362d30a1 8394 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 8395 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8396
8397 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8398 contents, rel->r_offset, value,
00a97672 8399 rel->r_addend);
ba93b8ac
DJ		 8400 }
8401
0855e32b
NS		 8402 case R_ARM_TLS_CALL:
8403 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 8404 case R_ARM_TLS_GD32:
8405 case R_ARM_TLS_IE32:
0855e32b
NS		 8406 case R_ARM_TLS_GOTDESC:
8407 case R_ARM_TLS_DESCSEQ:
8408 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 8409 {
0855e32b
NS		 8410 bfd_vma off, offplt;
8411 int indx = 0;
ba93b8ac
DJ		 8412 char tls_type;
8413
0855e32b 8414 BFD_ASSERT (sgot != NULL);
ba93b8ac 8415
ba93b8ac
DJ		 8416 if (h != NULL)
8417 {
8418 bfd_boolean dyn;
8419 dyn = globals->root.dynamic_sections_created;
8420 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8421 && (!info->shared
8422 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8423 {
8424 *unresolved_reloc_p = FALSE;
8425 indx = h->dynindx;
8426 }
8427 off = h->got.offset;
0855e32b 8428 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 8429 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
8430 }
8431 else
8432 {
0855e32b 8433 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 8434 off = local_got_offsets[r_symndx];
0855e32b 8435 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 8436 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
8437 }
8438
0855e32b
NS		 8439 /* Linker relaxations happens from one of the
8440 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
8441 if (ELF32_R_TYPE(rel->r_info) != r_type)
8442 tls_type = GOT_TLS_IE;
8443
8444 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 8445
8446 if ((off & 1) != 0)
8447 off &= ~1;
8448 else
8449 {
8450 bfd_boolean need_relocs = FALSE;
8451 Elf_Internal_Rela outrel;
8452 bfd_byte *loc = NULL;
8453 int cur_off = off;
8454
8455 /* The GOT entries have not been initialized yet. Do it
8456 now, and emit any relocations. If both an IE GOT and a
8457 GD GOT are necessary, we emit the GD first. */
8458
8459 if ((info->shared || indx != 0)
8460 && (h == NULL
8461 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8462 || h->root.type != bfd_link_hash_undefweak))
8463 {
8464 need_relocs = TRUE;
0855e32b 8465 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 8466 }
8467
0855e32b
NS		 8468 if (tls_type & GOT_TLS_GDESC)
8469 {
8470 /* We should have relaxed, unless this is an undefined
8471 weak symbol. */
8472 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
8473 || info->shared);
8474 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
8475 <= globals->root.sgotplt->size);
8476
8477 outrel.r_addend = 0;
8478 outrel.r_offset = (globals->root.sgotplt->output_section->vma
8479 + globals->root.sgotplt->output_offset
8480 + offplt
8481 + globals->sgotplt_jump_table_size);
8482
8483 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
8484 sreloc = globals->root.srelplt;
8485 loc = sreloc->contents;
8486 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
8487 BFD_ASSERT (loc + RELOC_SIZE (globals)
8488 <= sreloc->contents + sreloc->size);
8489
8490 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
8491
8492 /* For globals, the first word in the relocation gets
8493 the relocation index and the top bit set, or zero,
8494 if we're binding now. For locals, it gets the
8495 symbol's offset in the tls section. */
8496 bfd_put_32 (output_bfd,
8497 !h ? value - elf_hash_table (info)->tls_sec->vma
8498 : info->flags & DF_BIND_NOW ? 0
8499 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
8500 globals->root.sgotplt->contents + offplt +
8501 globals->sgotplt_jump_table_size);
8502
8503 /* Second word in the relocation is always zero. */
8504 bfd_put_32 (output_bfd, 0,
8505 globals->root.sgotplt->contents + offplt +
8506 globals->sgotplt_jump_table_size + 4);
8507 }
ba93b8ac
DJ		 8508 if (tls_type & GOT_TLS_GD)
8509 {
8510 if (need_relocs)
8511 {
00a97672 8512 outrel.r_addend = 0;
362d30a1
RS		 8513 outrel.r_offset = (sgot->output_section->vma
8514 + sgot->output_offset
00a97672 8515 + cur_off);
ba93b8ac 8516 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 8517
00a97672
RS		 8518 if (globals->use_rel)
8519 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8520 sgot->contents + cur_off);
0855e32b
NS		 8521 loc = srelgot->contents;
8522 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
00a97672
RS		 8523
8524 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 8525
8526 if (indx == 0)
8527 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 8528 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 8529 else
8530 {
00a97672 8531 outrel.r_addend = 0;
ba93b8ac
DJ		 8532 outrel.r_info = ELF32_R_INFO (indx,
8533 R_ARM_TLS_DTPOFF32);
8534 outrel.r_offset += 4;
00a97672
RS		 8535
8536 if (globals->use_rel)
8537 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8538 sgot->contents + cur_off + 4);
00a97672 8539
0855e32b
NS		 8540 loc = srelgot->contents;
8541 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
00a97672
RS		 8542
8543 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 8544 }
8545 }
8546 else
8547 {
8548 /* If we are not emitting relocations for a
8549 general dynamic reference, then we must be in a
8550 static link or an executable link with the
8551 symbol binding locally. Mark it as belonging
8552 to module 1, the executable. */
8553 bfd_put_32 (output_bfd, 1,
362d30a1 8554 sgot->contents + cur_off);
ba93b8ac 8555 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 8556 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 8557 }
8558
8559 cur_off += 8;
8560 }
8561
8562 if (tls_type & GOT_TLS_IE)
8563 {
8564 if (need_relocs)
8565 {
00a97672
RS		 8566 if (indx == 0)
8567 outrel.r_addend = value - dtpoff_base (info);
8568 else
8569 outrel.r_addend = 0;
362d30a1
RS		 8570 outrel.r_offset = (sgot->output_section->vma
8571 + sgot->output_offset
ba93b8ac
DJ		 8572 + cur_off);
8573 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8574
00a97672
RS		 8575 if (globals->use_rel)
8576 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8577 sgot->contents + cur_off);
ba93b8ac 8578
0855e32b
NS		 8579 loc = srelgot->contents;
8580 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
8581
00a97672 8582 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 8583 }
8584 else
8585 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 8586 sgot->contents + cur_off);
ba93b8ac
DJ		 8587 cur_off += 4;
8588 }
8589
8590 if (h != NULL)
8591 h->got.offset |= 1;
8592 else
8593 local_got_offsets[r_symndx] |= 1;
8594 }
8595
8596 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8597 off += 8;
0855e32b
NS		 8598 else if (tls_type & GOT_TLS_GDESC)
8599 off = offplt;
8600
8601 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
8602 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
8603 {
8604 bfd_signed_vma offset;
8605 enum elf32_arm_stub_type stub_type
8606 = arm_type_of_stub (info, input_section, rel, &sym_flags,
8607 (struct elf32_arm_link_hash_entry *)h,
8608 globals->tls_trampoline, globals->root.splt,
8609 input_bfd, sym_name);
8610
8611 if (stub_type != arm_stub_none)
8612 {
8613 struct elf32_arm_stub_hash_entry *stub_entry
8614 = elf32_arm_get_stub_entry
8615 (input_section, globals->root.splt, 0, rel,
8616 globals, stub_type);
8617 offset = (stub_entry->stub_offset
8618 + stub_entry->stub_sec->output_offset
8619 + stub_entry->stub_sec->output_section->vma);
8620 }
8621 else
8622 offset = (globals->root.splt->output_section->vma
8623 + globals->root.splt->output_offset
8624 + globals->tls_trampoline);
8625
8626 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
8627 {
8628 unsigned long inst;
8629
8630 offset -= (input_section->output_section->vma +
8631 input_section->output_offset + rel->r_offset + 8);
8632
8633 inst = offset >> 2;
8634 inst &= 0x00ffffff;
8635 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
8636 }
8637 else
8638 {
8639 /* Thumb blx encodes the offset in a complicated
8640 fashion. */
8641 unsigned upper_insn, lower_insn;
8642 unsigned neg;
8643
8644 offset -= (input_section->output_section->vma +
8645 input_section->output_offset
8646 + rel->r_offset + 4);
8647
8648 /* Round up the offset to a word boundary */
8649 offset = (offset + 2) & ~2;
8650 neg = offset < 0;
8651 upper_insn = (0xf000
8652 | ((offset >> 12) & 0x3ff)
8653 | (neg << 10));
8654 lower_insn = (0xc000
8655 | (((!((offset >> 23) & 1)) ^ neg) << 13)
8656 | (((!((offset >> 22) & 1)) ^ neg) << 11)
8657 | ((offset >> 1) & 0x7ff));
8658 bfd_put_16 (input_bfd, upper_insn, hit_data);
8659 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8660 return bfd_reloc_ok;
8661 }
8662 }
8663 /* These relocations needs special care, as besides the fact
8664 they point somewhere in .gotplt, the addend must be
8665 adjusted accordingly depending on the type of instruction
8666 we refer to */
8667 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
8668 {
8669 unsigned long data, insn;
8670 unsigned thumb;
8671
8672 data = bfd_get_32 (input_bfd, hit_data);
8673 thumb = data & 1;
8674 data &= ~1u;
8675
8676 if (thumb)
8677 {
8678 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
8679 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8680 insn = (insn << 16)
8681 | bfd_get_16 (input_bfd,
8682 contents + rel->r_offset - data + 2);
8683 if ((insn & 0xf800c000) == 0xf000c000)
8684 /* bl/blx */
8685 value = -6;
8686 else if ((insn & 0xffffff00) == 0x4400)
8687 /* add */
8688 value = -5;
8689 else
8690 {
8691 (*_bfd_error_handler)
8692 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
8693 input_bfd, input_section,
8694 (unsigned long)rel->r_offset, insn);
8695 return bfd_reloc_notsupported;
8696 }
8697 }
8698 else
8699 {
8700 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
8701
8702 switch (insn >> 24)
8703 {
8704 case 0xeb: /* bl */
8705 case 0xfa: /* blx */
8706 value = -4;
8707 break;
8708
8709 case 0xe0: /* add */
8710 value = -8;
8711 break;
8712
8713 default:
8714 (*_bfd_error_handler)
8715 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
8716 input_bfd, input_section,
8717 (unsigned long)rel->r_offset, insn);
8718 return bfd_reloc_notsupported;
8719 }
8720 }
8721
8722 value += ((globals->root.sgotplt->output_section->vma
8723 + globals->root.sgotplt->output_offset + off)
8724 - (input_section->output_section->vma
8725 + input_section->output_offset
8726 + rel->r_offset)
8727 + globals->sgotplt_jump_table_size);
8728 }
8729 else
8730 value = ((globals->root.sgot->output_section->vma
8731 + globals->root.sgot->output_offset + off)
8732 - (input_section->output_section->vma
8733 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 8734
8735 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8736 contents, rel->r_offset, value,
00a97672 8737 rel->r_addend);
ba93b8ac
DJ		 8738 }
8739
8740 case R_ARM_TLS_LE32:
8741 if (info->shared)
8742 {
8743 (*_bfd_error_handler)
8744 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8745 input_bfd, input_section,
8746 (long) rel->r_offset, howto->name);
21d799b5 8747 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 8748 }
8749 else
8750 value = tpoff (info, value);
906e58ca 8751
ba93b8ac 8752 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8753 contents, rel->r_offset, value,
8754 rel->r_addend);
ba93b8ac 8755
319850b4
JB		 8756 case R_ARM_V4BX:
8757 if (globals->fix_v4bx)
845b51d6
PB		 8758 {
8759 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8760
845b51d6
PB		 8761 /* Ensure that we have a BX instruction. */
8762 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8763
845b51d6
PB		 8764 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8765 {
8766 /* Branch to veneer. */
8767 bfd_vma glue_addr;
8768 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8769 glue_addr -= input_section->output_section->vma
8770 + input_section->output_offset
8771 + rel->r_offset + 8;
8772 insn = (insn & 0xf0000000) | 0x0a000000
8773 | ((glue_addr >> 2) & 0x00ffffff);
8774 }
8775 else
8776 {
8777 /* Preserve Rm (lowest four bits) and the condition code
8778 (highest four bits). Other bits encode MOV PC,Rm. */
8779 insn = (insn & 0xf000000f) | 0x01a0f000;
8780 }
319850b4 8781
845b51d6
PB		 8782 bfd_put_32 (input_bfd, insn, hit_data);
8783 }
319850b4
JB		 8784 return bfd_reloc_ok;
8785
b6895b4f
PB		 8786 case R_ARM_MOVW_ABS_NC:
8787 case R_ARM_MOVT_ABS:
8788 case R_ARM_MOVW_PREL_NC:
8789 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8790 /* Until we properly support segment-base-relative addressing then
8791 we assume the segment base to be zero, as for the group relocations.
8792 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8793 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8794 case R_ARM_MOVW_BREL_NC:
8795 case R_ARM_MOVW_BREL:
8796 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8797 {
8798 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8799
8800 if (globals->use_rel)
8801 {
8802 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8803 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8804 }
92f5d02b 8805
b6895b4f 8806 value += signed_addend;
b6895b4f
PB		 8807
8808 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8809 value -= (input_section->output_section->vma
8810 + input_section->output_offset + rel->r_offset);
8811
92f5d02b
MS		 8812 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8813 return bfd_reloc_overflow;
8814
8815 if (sym_flags == STT_ARM_TFUNC)
8816 value |= 1;
8817
8818 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8819 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8820 value >>= 16;
8821
8822 insn &= 0xfff0f000;
8823 insn |= value & 0xfff;
8824 insn |= (value & 0xf000) << 4;
8825 bfd_put_32 (input_bfd, insn, hit_data);
8826 }
8827 return bfd_reloc_ok;
8828
8829 case R_ARM_THM_MOVW_ABS_NC:
8830 case R_ARM_THM_MOVT_ABS:
8831 case R_ARM_THM_MOVW_PREL_NC:
8832 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8833 /* Until we properly support segment-base-relative addressing then
8834 we assume the segment base to be zero, as for the above relocations.
8835 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8836 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8837 as R_ARM_THM_MOVT_ABS. */
8838 case R_ARM_THM_MOVW_BREL_NC:
8839 case R_ARM_THM_MOVW_BREL:
8840 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8841 {
8842 bfd_vma insn;
906e58ca 8843
b6895b4f
PB		 8844 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8845 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8846
8847 if (globals->use_rel)
8848 {
8849 addend = ((insn >> 4) & 0xf000)
8850 | ((insn >> 15) & 0x0800)
8851 | ((insn >> 4) & 0x0700)
8852 | (insn & 0x00ff);
39623e12 8853 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8854 }
92f5d02b 8855
b6895b4f 8856 value += signed_addend;
b6895b4f
PB		 8857
8858 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8859 value -= (input_section->output_section->vma
8860 + input_section->output_offset + rel->r_offset);
8861
92f5d02b
MS		 8862 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8863 return bfd_reloc_overflow;
8864
8865 if (sym_flags == STT_ARM_TFUNC)
8866 value |= 1;
8867
8868 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8869 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8870 value >>= 16;
8871
8872 insn &= 0xfbf08f00;
8873 insn |= (value & 0xf000) << 4;
8874 insn |= (value & 0x0800) << 15;
8875 insn |= (value & 0x0700) << 4;
8876 insn |= (value & 0x00ff);
8877
8878 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8879 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8880 }
8881 return bfd_reloc_ok;
8882
4962c51a
MS		 8883 case R_ARM_ALU_PC_G0_NC:
8884 case R_ARM_ALU_PC_G1_NC:
8885 case R_ARM_ALU_PC_G0:
8886 case R_ARM_ALU_PC_G1:
8887 case R_ARM_ALU_PC_G2:
8888 case R_ARM_ALU_SB_G0_NC:
8889 case R_ARM_ALU_SB_G1_NC:
8890 case R_ARM_ALU_SB_G0:
8891 case R_ARM_ALU_SB_G1:
8892 case R_ARM_ALU_SB_G2:
8893 {
8894 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8895 bfd_vma pc = input_section->output_section->vma
8896 + input_section->output_offset + rel->r_offset;
8897 /* sb should be the origin of the *segment* containing the symbol.
8898 It is not clear how to obtain this OS-dependent value, so we
8899 make an arbitrary choice of zero. */
8900 bfd_vma sb = 0;
8901 bfd_vma residual;
8902 bfd_vma g_n;
8903 bfd_signed_vma signed_value;
8904 int group = 0;
8905
8906 /* Determine which group of bits to select. */
8907 switch (r_type)
8908 {
8909 case R_ARM_ALU_PC_G0_NC:
8910 case R_ARM_ALU_PC_G0:
8911 case R_ARM_ALU_SB_G0_NC:
8912 case R_ARM_ALU_SB_G0:
8913 group = 0;
8914 break;
8915
8916 case R_ARM_ALU_PC_G1_NC:
8917 case R_ARM_ALU_PC_G1:
8918 case R_ARM_ALU_SB_G1_NC:
8919 case R_ARM_ALU_SB_G1:
8920 group = 1;
8921 break;
8922
8923 case R_ARM_ALU_PC_G2:
8924 case R_ARM_ALU_SB_G2:
8925 group = 2;
8926 break;
8927
8928 default:
906e58ca 8929 abort ();
4962c51a
MS		 8930 }
8931
8932 /* If REL, extract the addend from the insn. If RELA, it will
8933 have already been fetched for us. */
8934 if (globals->use_rel)
8935 {
8936 int negative;
8937 bfd_vma constant = insn & 0xff;
8938 bfd_vma rotation = (insn & 0xf00) >> 8;
8939
8940 if (rotation == 0)
8941 signed_addend = constant;
8942 else
8943 {
8944 /* Compensate for the fact that in the instruction, the
8945 rotation is stored in multiples of 2 bits. */
8946 rotation *= 2;
8947
8948 /* Rotate "constant" right by "rotation" bits. */
8949 signed_addend = (constant >> rotation) |
8950 (constant << (8 * sizeof (bfd_vma) - rotation));
8951 }
8952
8953 /* Determine if the instruction is an ADD or a SUB.
8954 (For REL, this determines the sign of the addend.) */
8955 negative = identify_add_or_sub (insn);
8956 if (negative == 0)
8957 {
8958 (*_bfd_error_handler)
8959 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8960 input_bfd, input_section,
8961 (long) rel->r_offset, howto->name);
906e58ca 8962 return bfd_reloc_overflow;
4962c51a
MS		 8963 }
8964
8965 signed_addend *= negative;
8966 }
8967
8968 /* Compute the value (X) to go in the place. */
8969 if (r_type == R_ARM_ALU_PC_G0_NC
8970 || r_type == R_ARM_ALU_PC_G1_NC
8971 || r_type == R_ARM_ALU_PC_G0
8972 || r_type == R_ARM_ALU_PC_G1
8973 || r_type == R_ARM_ALU_PC_G2)
8974 /* PC relative. */
8975 signed_value = value - pc + signed_addend;
8976 else
8977 /* Section base relative. */
8978 signed_value = value - sb + signed_addend;
8979
8980 /* If the target symbol is a Thumb function, then set the
8981 Thumb bit in the address. */
8982 if (sym_flags == STT_ARM_TFUNC)
8983 signed_value |= 1;
8984
8985 /* Calculate the value of the relevant G_n, in encoded
8986 constant-with-rotation format. */
8987 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8988 &residual);
8989
8990 /* Check for overflow if required. */
8991 if ((r_type == R_ARM_ALU_PC_G0
8992 || r_type == R_ARM_ALU_PC_G1
8993 || r_type == R_ARM_ALU_PC_G2
8994 || r_type == R_ARM_ALU_SB_G0
8995 || r_type == R_ARM_ALU_SB_G1
8996 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8997 {
8998 (*_bfd_error_handler)
8999 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9000 input_bfd, input_section,
9001 (long) rel->r_offset, abs (signed_value), howto->name);
9002 return bfd_reloc_overflow;
9003 }
9004
9005 /* Mask out the value and the ADD/SUB part of the opcode; take care
9006 not to destroy the S bit. */
9007 insn &= 0xff1ff000;
9008
9009 /* Set the opcode according to whether the value to go in the
9010 place is negative. */
9011 if (signed_value < 0)
9012 insn |= 1 << 22;
9013 else
9014 insn |= 1 << 23;
9015
9016 /* Encode the offset. */
9017 insn |= g_n;
9018
9019 bfd_put_32 (input_bfd, insn, hit_data);
9020 }
9021 return bfd_reloc_ok;
9022
9023 case R_ARM_LDR_PC_G0:
9024 case R_ARM_LDR_PC_G1:
9025 case R_ARM_LDR_PC_G2:
9026 case R_ARM_LDR_SB_G0:
9027 case R_ARM_LDR_SB_G1:
9028 case R_ARM_LDR_SB_G2:
9029 {
9030 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9031 bfd_vma pc = input_section->output_section->vma
9032 + input_section->output_offset + rel->r_offset;
9033 bfd_vma sb = 0; /* See note above. */
9034 bfd_vma residual;
9035 bfd_signed_vma signed_value;
9036 int group = 0;
9037
9038 /* Determine which groups of bits to calculate. */
9039 switch (r_type)
9040 {
9041 case R_ARM_LDR_PC_G0:
9042 case R_ARM_LDR_SB_G0:
9043 group = 0;
9044 break;
9045
9046 case R_ARM_LDR_PC_G1:
9047 case R_ARM_LDR_SB_G1:
9048 group = 1;
9049 break;
9050
9051 case R_ARM_LDR_PC_G2:
9052 case R_ARM_LDR_SB_G2:
9053 group = 2;
9054 break;
9055
9056 default:
906e58ca 9057 abort ();
4962c51a
MS		 9058 }
9059
9060 /* If REL, extract the addend from the insn. If RELA, it will
9061 have already been fetched for us. */
9062 if (globals->use_rel)
9063 {
9064 int negative = (insn & (1 << 23)) ? 1 : -1;
9065 signed_addend = negative * (insn & 0xfff);
9066 }
9067
9068 /* Compute the value (X) to go in the place. */
9069 if (r_type == R_ARM_LDR_PC_G0
9070 || r_type == R_ARM_LDR_PC_G1
9071 || r_type == R_ARM_LDR_PC_G2)
9072 /* PC relative. */
9073 signed_value = value - pc + signed_addend;
9074 else
9075 /* Section base relative. */
9076 signed_value = value - sb + signed_addend;
9077
9078 /* Calculate the value of the relevant G_{n-1} to obtain
9079 the residual at that stage. */
9080 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9081
9082 /* Check for overflow. */
9083 if (residual >= 0x1000)
9084 {
9085 (*_bfd_error_handler)
9086 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9087 input_bfd, input_section,
9088 (long) rel->r_offset, abs (signed_value), howto->name);
9089 return bfd_reloc_overflow;
9090 }
9091
9092 /* Mask out the value and U bit. */
9093 insn &= 0xff7ff000;
9094
9095 /* Set the U bit if the value to go in the place is non-negative. */
9096 if (signed_value >= 0)
9097 insn |= 1 << 23;
9098
9099 /* Encode the offset. */
9100 insn |= residual;
9101
9102 bfd_put_32 (input_bfd, insn, hit_data);
9103 }
9104 return bfd_reloc_ok;
9105
9106 case R_ARM_LDRS_PC_G0:
9107 case R_ARM_LDRS_PC_G1:
9108 case R_ARM_LDRS_PC_G2:
9109 case R_ARM_LDRS_SB_G0:
9110 case R_ARM_LDRS_SB_G1:
9111 case R_ARM_LDRS_SB_G2:
9112 {
9113 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9114 bfd_vma pc = input_section->output_section->vma
9115 + input_section->output_offset + rel->r_offset;
9116 bfd_vma sb = 0; /* See note above. */
9117 bfd_vma residual;
9118 bfd_signed_vma signed_value;
9119 int group = 0;
9120
9121 /* Determine which groups of bits to calculate. */
9122 switch (r_type)
9123 {
9124 case R_ARM_LDRS_PC_G0:
9125 case R_ARM_LDRS_SB_G0:
9126 group = 0;
9127 break;
9128
9129 case R_ARM_LDRS_PC_G1:
9130 case R_ARM_LDRS_SB_G1:
9131 group = 1;
9132 break;
9133
9134 case R_ARM_LDRS_PC_G2:
9135 case R_ARM_LDRS_SB_G2:
9136 group = 2;
9137 break;
9138
9139 default:
906e58ca 9140 abort ();
4962c51a
MS		 9141 }
9142
9143 /* If REL, extract the addend from the insn. If RELA, it will
9144 have already been fetched for us. */
9145 if (globals->use_rel)
9146 {
9147 int negative = (insn & (1 << 23)) ? 1 : -1;
9148 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
9149 }
9150
9151 /* Compute the value (X) to go in the place. */
9152 if (r_type == R_ARM_LDRS_PC_G0
9153 || r_type == R_ARM_LDRS_PC_G1
9154 || r_type == R_ARM_LDRS_PC_G2)
9155 /* PC relative. */
9156 signed_value = value - pc + signed_addend;
9157 else
9158 /* Section base relative. */
9159 signed_value = value - sb + signed_addend;
9160
9161 /* Calculate the value of the relevant G_{n-1} to obtain
9162 the residual at that stage. */
9163 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9164
9165 /* Check for overflow. */
9166 if (residual >= 0x100)
9167 {
9168 (*_bfd_error_handler)
9169 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9170 input_bfd, input_section,
9171 (long) rel->r_offset, abs (signed_value), howto->name);
9172 return bfd_reloc_overflow;
9173 }
9174
9175 /* Mask out the value and U bit. */
9176 insn &= 0xff7ff0f0;
9177
9178 /* Set the U bit if the value to go in the place is non-negative. */
9179 if (signed_value >= 0)
9180 insn |= 1 << 23;
9181
9182 /* Encode the offset. */
9183 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
9184
9185 bfd_put_32 (input_bfd, insn, hit_data);
9186 }
9187 return bfd_reloc_ok;
9188
9189 case R_ARM_LDC_PC_G0:
9190 case R_ARM_LDC_PC_G1:
9191 case R_ARM_LDC_PC_G2:
9192 case R_ARM_LDC_SB_G0:
9193 case R_ARM_LDC_SB_G1:
9194 case R_ARM_LDC_SB_G2:
9195 {
9196 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9197 bfd_vma pc = input_section->output_section->vma
9198 + input_section->output_offset + rel->r_offset;
9199 bfd_vma sb = 0; /* See note above. */
9200 bfd_vma residual;
9201 bfd_signed_vma signed_value;
9202 int group = 0;
9203
9204 /* Determine which groups of bits to calculate. */
9205 switch (r_type)
9206 {
9207 case R_ARM_LDC_PC_G0:
9208 case R_ARM_LDC_SB_G0:
9209 group = 0;
9210 break;
9211
9212 case R_ARM_LDC_PC_G1:
9213 case R_ARM_LDC_SB_G1:
9214 group = 1;
9215 break;
9216
9217 case R_ARM_LDC_PC_G2:
9218 case R_ARM_LDC_SB_G2:
9219 group = 2;
9220 break;
9221
9222 default:
906e58ca 9223 abort ();
4962c51a
MS		 9224 }
9225
9226 /* If REL, extract the addend from the insn. If RELA, it will
9227 have already been fetched for us. */
9228 if (globals->use_rel)
9229 {
9230 int negative = (insn & (1 << 23)) ? 1 : -1;
9231 signed_addend = negative * ((insn & 0xff) << 2);
9232 }
9233
9234 /* Compute the value (X) to go in the place. */
9235 if (r_type == R_ARM_LDC_PC_G0
9236 || r_type == R_ARM_LDC_PC_G1
9237 || r_type == R_ARM_LDC_PC_G2)
9238 /* PC relative. */
9239 signed_value = value - pc + signed_addend;
9240 else
9241 /* Section base relative. */
9242 signed_value = value - sb + signed_addend;
9243
9244 /* Calculate the value of the relevant G_{n-1} to obtain
9245 the residual at that stage. */
9246 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9247
9248 /* Check for overflow. (The absolute value to go in the place must be
9249 divisible by four and, after having been divided by four, must
9250 fit in eight bits.) */
9251 if ((residual & 0x3) != 0 || residual >= 0x400)
9252 {
9253 (*_bfd_error_handler)
9254 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9255 input_bfd, input_section,
9256 (long) rel->r_offset, abs (signed_value), howto->name);
9257 return bfd_reloc_overflow;
9258 }
9259
9260 /* Mask out the value and U bit. */
9261 insn &= 0xff7fff00;
9262
9263 /* Set the U bit if the value to go in the place is non-negative. */
9264 if (signed_value >= 0)
9265 insn |= 1 << 23;
9266
9267 /* Encode the offset. */
9268 insn |= residual >> 2;
9269
9270 bfd_put_32 (input_bfd, insn, hit_data);
9271 }
9272 return bfd_reloc_ok;
9273
252b5132
RH		 9274 default:
9275 return bfd_reloc_notsupported;
9276 }
9277}
9278
98c1d4aa
NC		 9279/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
9280static void
57e8b36a
NC		 9281arm_add_to_rel (bfd * abfd,
9282 bfd_byte * address,
9283 reloc_howto_type * howto,
9284 bfd_signed_vma increment)
98c1d4aa 9285{
98c1d4aa
NC		 9286 bfd_signed_vma addend;
9287
bd97cb95
DJ		 9288 if (howto->type == R_ARM_THM_CALL
9289 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 9290 {
9a5aca8c
AM		 9291 int upper_insn, lower_insn;
9292 int upper, lower;
98c1d4aa 9293
9a5aca8c
AM		 9294 upper_insn = bfd_get_16 (abfd, address);
9295 lower_insn = bfd_get_16 (abfd, address + 2);
9296 upper = upper_insn & 0x7ff;
9297 lower = lower_insn & 0x7ff;
9298
9299 addend = (upper << 12) | (lower << 1);
ddda4409 9300 addend += increment;
9a5aca8c 9301 addend >>= 1;
98c1d4aa 9302
9a5aca8c
AM		 9303 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
9304 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
9305
dc810e39
AM		 9306 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
9307 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 9308 }
9309 else
9310 {
9311 bfd_vma contents;
9312
9313 contents = bfd_get_32 (abfd, address);
9314
9315 /* Get the (signed) value from the instruction. */
9316 addend = contents & howto->src_mask;
9317 if (addend & ((howto->src_mask + 1) >> 1))
9318 {
9319 bfd_signed_vma mask;
9320
9321 mask = -1;
9322 mask &= ~ howto->src_mask;
9323 addend |= mask;
9324 }
9325
9326 /* Add in the increment, (which is a byte value). */
9327 switch (howto->type)
9328 {
9329 default:
9330 addend += increment;
9331 break;
9332
9333 case R_ARM_PC24:
c6596c5e 9334 case R_ARM_PLT32:
5b5bb741
PB		 9335 case R_ARM_CALL:
9336 case R_ARM_JUMP24:
9a5aca8c 9337 addend <<= howto->size;
dc810e39 9338 addend += increment;
9a5aca8c
AM		 9339
9340 /* Should we check for overflow here ? */
9341
9342 /* Drop any undesired bits. */
9343 addend >>= howto->rightshift;
9344 break;
9345 }
9346
9347 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
9348
9349 bfd_put_32 (abfd, contents, address);
ddda4409 9350 }
98c1d4aa 9351}
252b5132 9352
ba93b8ac
DJ		 9353#define IS_ARM_TLS_RELOC(R_TYPE) \
9354 ((R_TYPE) == R_ARM_TLS_GD32 \
9355 || (R_TYPE) == R_ARM_TLS_LDO32 \
9356 || (R_TYPE) == R_ARM_TLS_LDM32 \
9357 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
9358 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
9359 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
9360 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 9361 || (R_TYPE) == R_ARM_TLS_IE32 \
9362 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
9363
9364/* Specific set of relocations for the gnu tls dialect. */
9365#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
9366 ((R_TYPE) == R_ARM_TLS_GOTDESC \
9367 || (R_TYPE) == R_ARM_TLS_CALL \
9368 || (R_TYPE) == R_ARM_THM_TLS_CALL \
9369 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
9370 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 9371
252b5132 9372/* Relocate an ARM ELF section. */
906e58ca 9373
b34976b6 9374static bfd_boolean
57e8b36a
NC		 9375elf32_arm_relocate_section (bfd * output_bfd,
9376 struct bfd_link_info * info,
9377 bfd * input_bfd,
9378 asection * input_section,
9379 bfd_byte * contents,
9380 Elf_Internal_Rela * relocs,
9381 Elf_Internal_Sym * local_syms,
9382 asection ** local_sections)
252b5132 9383{
b34976b6
AM		 9384 Elf_Internal_Shdr *symtab_hdr;
9385 struct elf_link_hash_entry **sym_hashes;
9386 Elf_Internal_Rela *rel;
9387 Elf_Internal_Rela *relend;
9388 const char *name;
b32d3aa2 9389 struct elf32_arm_link_hash_table * globals;
252b5132 9390
4e7fd91e 9391 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 9392 if (globals == NULL)
9393 return FALSE;
b491616a 9394
0ffa91dd 9395 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 9396 sym_hashes = elf_sym_hashes (input_bfd);
9397
9398 rel = relocs;
9399 relend = relocs + input_section->reloc_count;
9400 for (; rel < relend; rel++)
9401 {
ba96a88f
NC		 9402 int r_type;
9403 reloc_howto_type * howto;
9404 unsigned long r_symndx;
9405 Elf_Internal_Sym * sym;
9406 asection * sec;
252b5132 9407 struct elf_link_hash_entry * h;
ba96a88f
NC		 9408 bfd_vma relocation;
9409 bfd_reloc_status_type r;
9410 arelent bfd_reloc;
ba93b8ac 9411 char sym_type;
0945cdfd 9412 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 9413 char *error_message = NULL;
f21f3fe0 9414
252b5132 9415 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 9416 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 9417 r_type = arm_real_reloc_type (globals, r_type);
252b5132 9418
ba96a88f
NC		 9419 if ( r_type == R_ARM_GNU_VTENTRY
9420 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 9421 continue;
9422
b32d3aa2 9423 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 9424 howto = bfd_reloc.howto;
252b5132 9425
252b5132
RH		 9426 h = NULL;
9427 sym = NULL;
9428 sec = NULL;
9b485d32 9429
252b5132
RH		 9430 if (r_symndx < symtab_hdr->sh_info)
9431 {
9432 sym = local_syms + r_symndx;
ba93b8ac 9433 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 9434 sec = local_sections[r_symndx];
ffcb4889
NS		 9435
9436 /* An object file might have a reference to a local
9437 undefined symbol. This is a daft object file, but we
9438 should at least do something about it. V4BX & NONE
9439 relocations do not use the symbol and are explicitly
77b4f08f
TS		 9440 allowed to use the undefined symbol, so allow those.
9441 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 9442 if (r_type != R_ARM_V4BX
9443 && r_type != R_ARM_NONE
77b4f08f 9444 && r_symndx != STN_UNDEF
ffcb4889
NS		 9445 && bfd_is_und_section (sec)
9446 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
9447 {
9448 if (!info->callbacks->undefined_symbol
9449 (info, bfd_elf_string_from_elf_section
9450 (input_bfd, symtab_hdr->sh_link, sym->st_name),
9451 input_bfd, input_section,
9452 rel->r_offset, TRUE))
9453 return FALSE;
9454 }
9455
4e7fd91e 9456 if (globals->use_rel)
f8df10f4 9457 {
4e7fd91e
PB		 9458 relocation = (sec->output_section->vma
9459 + sec->output_offset
9460 + sym->st_value);
ab96bf03
AM		 9461 if (!info->relocatable
9462 && (sec->flags & SEC_MERGE)
9463 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 9464 {
4e7fd91e
PB		 9465 asection *msec;
9466 bfd_vma addend, value;
9467
39623e12 9468 switch (r_type)
4e7fd91e 9469 {
39623e12
PB		 9470 case R_ARM_MOVW_ABS_NC:
9471 case R_ARM_MOVT_ABS:
9472 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
9473 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
9474 addend = (addend ^ 0x8000) - 0x8000;
9475 break;
f8df10f4 9476
39623e12
PB		 9477 case R_ARM_THM_MOVW_ABS_NC:
9478 case R_ARM_THM_MOVT_ABS:
9479 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
9480 << 16;
9481 value |= bfd_get_16 (input_bfd,
9482 contents + rel->r_offset + 2);
9483 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
9484 | ((value & 0x04000000) >> 15);
9485 addend = (addend ^ 0x8000) - 0x8000;
9486 break;
f8df10f4 9487
39623e12
PB		 9488 default:
9489 if (howto->rightshift
9490 || (howto->src_mask & (howto->src_mask + 1)))
9491 {
9492 (*_bfd_error_handler)
9493 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
9494 input_bfd, input_section,
9495 (long) rel->r_offset, howto->name);
9496 return FALSE;
9497 }
9498
9499 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
9500
9501 /* Get the (signed) value from the instruction. */
9502 addend = value & howto->src_mask;
9503 if (addend & ((howto->src_mask + 1) >> 1))
9504 {
9505 bfd_signed_vma mask;
9506
9507 mask = -1;
9508 mask &= ~ howto->src_mask;
9509 addend |= mask;
9510 }
9511 break;
4e7fd91e 9512 }
39623e12 9513
4e7fd91e
PB		 9514 msec = sec;
9515 addend =
9516 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
9517 - relocation;
9518 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 9519
9520 /* Cases here must match those in the preceeding
9521 switch statement. */
9522 switch (r_type)
9523 {
9524 case R_ARM_MOVW_ABS_NC:
9525 case R_ARM_MOVT_ABS:
9526 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
9527 | (addend & 0xfff);
9528 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
9529 break;
9530
9531 case R_ARM_THM_MOVW_ABS_NC:
9532 case R_ARM_THM_MOVT_ABS:
9533 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
9534 | (addend & 0xff) | ((addend & 0x0800) << 15);
9535 bfd_put_16 (input_bfd, value >> 16,
9536 contents + rel->r_offset);
9537 bfd_put_16 (input_bfd, value,
9538 contents + rel->r_offset + 2);
9539 break;
9540
9541 default:
9542 value = (value & ~ howto->dst_mask)
9543 | (addend & howto->dst_mask);
9544 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
9545 break;
9546 }
f8df10f4 9547 }
f8df10f4 9548 }
4e7fd91e
PB		 9549 else
9550 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 9551 }
9552 else
9553 {
560e09e9 9554 bfd_boolean warned;
560e09e9 9555
b2a8e766
AM		 9556 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
9557 r_symndx, symtab_hdr, sym_hashes,
9558 h, sec, relocation,
9559 unresolved_reloc, warned);
ba93b8ac
DJ		 9560
9561 sym_type = h->type;
252b5132
RH		 9562 }
9563
ab96bf03 9564 if (sec != NULL && elf_discarded_section (sec))
e4067dbb
DJ		 9565 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
9566 rel, relend, howto, contents);
ab96bf03
AM		 9567
9568 if (info->relocatable)
9569 {
9570 /* This is a relocatable link. We don't have to change
9571 anything, unless the reloc is against a section symbol,
9572 in which case we have to adjust according to where the
9573 section symbol winds up in the output section. */
9574 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
9575 {
9576 if (globals->use_rel)
9577 arm_add_to_rel (input_bfd, contents + rel->r_offset,
9578 howto, (bfd_signed_vma) sec->output_offset);
9579 else
9580 rel->r_addend += sec->output_offset;
9581 }
9582 continue;
9583 }
9584
252b5132
RH		 9585 if (h != NULL)
9586 name = h->root.root.string;
9587 else
9588 {
9589 name = (bfd_elf_string_from_elf_section
9590 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9591 if (name == NULL || *name == '\0')
9592 name = bfd_section_name (input_bfd, sec);
9593 }
f21f3fe0 9594
cf35638d 9595 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 9596 && r_type != R_ARM_NONE
9597 && (h == NULL
9598 || h->root.type == bfd_link_hash_defined
9599 || h->root.type == bfd_link_hash_defweak)
9600 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
9601 {
9602 (*_bfd_error_handler)
9603 ((sym_type == STT_TLS
9604 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
9605 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
9606 input_bfd,
9607 input_section,
9608 (long) rel->r_offset,
9609 howto->name,
9610 name);
9611 }
9612
0855e32b
NS		 9613 /* We call elf32_arm_final_link_relocate unless we're completely
9614 done, i.e., the relaxation produced the final output we want,
9615 and we won't let anybody mess with it. Also, we have to do
9616 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
9617 both in relaxed and non-relaxed cases */
9618 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
9619 || (IS_ARM_TLS_GNU_RELOC (r_type)
9620 && !((h ? elf32_arm_hash_entry (h)->tls_type :
9621 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
9622 & GOT_TLS_GDESC)))
9623 {
9624 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
9625 contents, rel, h == NULL);
9626 /* This may have been marked unresolved because it came from
9627 a shared library. But we've just dealt with that. */
9628 unresolved_reloc = 0;
9629 }
9630 else
9631 r = bfd_reloc_continue;
9632
9633 if (r == bfd_reloc_continue)
9634 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
9635 input_section, contents, rel,
9636 relocation, info, sec, name,
9637 (h ? ELF_ST_TYPE (h->type) :
9638 ELF_ST_TYPE (sym->st_info)), h,
9639 &unresolved_reloc, &error_message);
0945cdfd
DJ		 9640
9641 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
9642 because such sections are not SEC_ALLOC and thus ld.so will
9643 not process them. */
9644 if (unresolved_reloc
9645 && !((input_section->flags & SEC_DEBUGGING) != 0
9646 && h->def_dynamic))
9647 {
9648 (*_bfd_error_handler)
843fe662
L		 9649 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
9650 input_bfd,
9651 input_section,
9652 (long) rel->r_offset,
9653 howto->name,
9654 h->root.root.string);
0945cdfd
DJ		 9655 return FALSE;
9656 }
252b5132
RH		 9657
9658 if (r != bfd_reloc_ok)
9659 {
252b5132
RH		 9660 switch (r)
9661 {
9662 case bfd_reloc_overflow:
cf919dfd
PB		 9663 /* If the overflowing reloc was to an undefined symbol,
9664 we have already printed one error message and there
9665 is no point complaining again. */
9666 if ((! h ||
9667 h->root.type != bfd_link_hash_undefined)
9668 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 9669 (info, (h ? &h->root : NULL), name, howto->name,
9670 (bfd_vma) 0, input_bfd, input_section,
9671 rel->r_offset))))
b34976b6 9672 return FALSE;
252b5132
RH		 9673 break;
9674
9675 case bfd_reloc_undefined:
9676 if (!((*info->callbacks->undefined_symbol)
9677 (info, name, input_bfd, input_section,
b34976b6
AM		 9678 rel->r_offset, TRUE)))
9679 return FALSE;
252b5132
RH		 9680 break;
9681
9682 case bfd_reloc_outofrange:
f2a9dd69 9683 error_message = _("out of range");
252b5132
RH		 9684 goto common_error;
9685
9686 case bfd_reloc_notsupported:
f2a9dd69 9687 error_message = _("unsupported relocation");
252b5132
RH		 9688 goto common_error;
9689
9690 case bfd_reloc_dangerous:
f2a9dd69 9691 /* error_message should already be set. */
252b5132
RH		 9692 goto common_error;
9693
9694 default:
f2a9dd69 9695 error_message = _("unknown error");
8029a119 9696 /* Fall through. */
252b5132
RH		 9697
9698 common_error:
f2a9dd69
DJ		 9699 BFD_ASSERT (error_message != NULL);
9700 if (!((*info->callbacks->reloc_dangerous)
9701 (info, error_message, input_bfd, input_section,
252b5132 9702 rel->r_offset)))
b34976b6 9703 return FALSE;
252b5132
RH		 9704 break;
9705 }
9706 }
9707 }
9708
b34976b6 9709 return TRUE;
252b5132
RH		 9710}
9711
91d6fa6a 9712/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 9713 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 9714 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 9715 maintaining that condition). */
9716
9717static void
9718add_unwind_table_edit (arm_unwind_table_edit **head,
9719 arm_unwind_table_edit **tail,
9720 arm_unwind_edit_type type,
9721 asection *linked_section,
91d6fa6a 9722 unsigned int tindex)
2468f9c9 9723{
21d799b5
NC		 9724 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9725 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 9726
9727 new_edit->type = type;
9728 new_edit->linked_section = linked_section;
91d6fa6a 9729 new_edit->index = tindex;
2468f9c9 9730
91d6fa6a 9731 if (tindex > 0)
2468f9c9
PB		 9732 {
9733 new_edit->next = NULL;
9734
9735 if (*tail)
9736 (*tail)->next = new_edit;
9737
9738 (*tail) = new_edit;
9739
9740 if (!*head)
9741 (*head) = new_edit;
9742 }
9743 else
9744 {
9745 new_edit->next = *head;
9746
9747 if (!*tail)
9748 *tail = new_edit;
9749
9750 *head = new_edit;
9751 }
9752}
9753
9754static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9755
9756/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9757static void
9758adjust_exidx_size(asection *exidx_sec, int adjust)
9759{
9760 asection *out_sec;
9761
9762 if (!exidx_sec->rawsize)
9763 exidx_sec->rawsize = exidx_sec->size;
9764
9765 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9766 out_sec = exidx_sec->output_section;
9767 /* Adjust size of output section. */
9768 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9769}
9770
9771/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9772static void
9773insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9774{
9775 struct _arm_elf_section_data *exidx_arm_data;
9776
9777 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9778 add_unwind_table_edit (
9779 &exidx_arm_data->u.exidx.unwind_edit_list,
9780 &exidx_arm_data->u.exidx.unwind_edit_tail,
9781 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9782
9783 adjust_exidx_size(exidx_sec, 8);
9784}
9785
9786/* Scan .ARM.exidx tables, and create a list describing edits which should be
9787 made to those tables, such that:
9788
9789 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9790 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9791 codes which have been inlined into the index).
9792
85fdf906
AH		 9793 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
9794
2468f9c9
PB		 9795 The edits are applied when the tables are written
9796 (in elf32_arm_write_section).
9797*/
9798
9799bfd_boolean
9800elf32_arm_fix_exidx_coverage (asection **text_section_order,
9801 unsigned int num_text_sections,
85fdf906
AH		 9802 struct bfd_link_info *info,
9803 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 9804{
9805 bfd *inp;
9806 unsigned int last_second_word = 0, i;
9807 asection *last_exidx_sec = NULL;
9808 asection *last_text_sec = NULL;
9809 int last_unwind_type = -1;
9810
9811 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9812 text sections. */
9813 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9814 {
9815 asection *sec;
9816
9817 for (sec = inp->sections; sec != NULL; sec = sec->next)
9818 {
9819 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9820 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9821
dec9d5df 9822 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9823 continue;
9824
9825 if (elf_sec->linked_to)
9826 {
9827 Elf_Internal_Shdr *linked_hdr
9828 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9829 struct _arm_elf_section_data *linked_sec_arm_data
9830 = get_arm_elf_section_data (linked_hdr->bfd_section);
9831
9832 if (linked_sec_arm_data == NULL)
9833 continue;
9834
9835 /* Link this .ARM.exidx section back from the text section it
9836 describes. */
9837 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9838 }
9839 }
9840 }
9841
9842 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9843 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 9844 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 9845
9846 for (i = 0; i < num_text_sections; i++)
9847 {
9848 asection *sec = text_section_order[i];
9849 asection *exidx_sec;
9850 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9851 struct _arm_elf_section_data *exidx_arm_data;
9852 bfd_byte *contents = NULL;
9853 int deleted_exidx_bytes = 0;
9854 bfd_vma j;
9855 arm_unwind_table_edit *unwind_edit_head = NULL;
9856 arm_unwind_table_edit *unwind_edit_tail = NULL;
9857 Elf_Internal_Shdr *hdr;
9858 bfd *ibfd;
9859
9860 if (arm_data == NULL)
9861 continue;
9862
9863 exidx_sec = arm_data->u.text.arm_exidx_sec;
9864 if (exidx_sec == NULL)
9865 {
9866 /* Section has no unwind data. */
9867 if (last_unwind_type == 0 || !last_exidx_sec)
9868 continue;
9869
9870 /* Ignore zero sized sections. */
9871 if (sec->size == 0)
9872 continue;
9873
9874 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9875 last_unwind_type = 0;
9876 continue;
9877 }
9878
22a8f80e
PB		 9879 /* Skip /DISCARD/ sections. */
9880 if (bfd_is_abs_section (exidx_sec->output_section))
9881 continue;
9882
2468f9c9
PB		 9883 hdr = &elf_section_data (exidx_sec)->this_hdr;
9884 if (hdr->sh_type != SHT_ARM_EXIDX)
9885 continue;
9886
9887 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9888 if (exidx_arm_data == NULL)
9889 continue;
9890
9891 ibfd = exidx_sec->owner;
9892
9893 if (hdr->contents != NULL)
9894 contents = hdr->contents;
9895 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9896 /* An error? */
9897 continue;
9898
9899 for (j = 0; j < hdr->sh_size; j += 8)
9900 {
9901 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9902 int unwind_type;
9903 int elide = 0;
9904
9905 /* An EXIDX_CANTUNWIND entry. */
9906 if (second_word == 1)
9907 {
9908 if (last_unwind_type == 0)
9909 elide = 1;
9910 unwind_type = 0;
9911 }
9912 /* Inlined unwinding data. Merge if equal to previous. */
9913 else if ((second_word & 0x80000000) != 0)
9914 {
85fdf906
AH		 9915 if (merge_exidx_entries
9916 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 9917 elide = 1;
9918 unwind_type = 1;
9919 last_second_word = second_word;
9920 }
9921 /* Normal table entry. In theory we could merge these too,
9922 but duplicate entries are likely to be much less common. */
9923 else
9924 unwind_type = 2;
9925
9926 if (elide)
9927 {
9928 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9929 DELETE_EXIDX_ENTRY, NULL, j / 8);
9930
9931 deleted_exidx_bytes += 8;
9932 }
9933
9934 last_unwind_type = unwind_type;
9935 }
9936
9937 /* Free contents if we allocated it ourselves. */
9938 if (contents != hdr->contents)
9939 free (contents);
9940
9941 /* Record edits to be applied later (in elf32_arm_write_section). */
9942 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9943 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9944
9945 if (deleted_exidx_bytes > 0)
9946 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9947
9948 last_exidx_sec = exidx_sec;
9949 last_text_sec = sec;
9950 }
9951
9952 /* Add terminating CANTUNWIND entry. */
9953 if (last_exidx_sec && last_unwind_type != 0)
9954 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9955
9956 return TRUE;
9957}
9958
3e6b1042
DJ		 9959static bfd_boolean
9960elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9961 bfd *ibfd, const char *name)
9962{
9963 asection *sec, *osec;
9964
9965 sec = bfd_get_section_by_name (ibfd, name);
9966 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9967 return TRUE;
9968
9969 osec = sec->output_section;
9970 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9971 return TRUE;
9972
9973 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9974 sec->output_offset, sec->size))
9975 return FALSE;
9976
9977 return TRUE;
9978}
9979
9980static bfd_boolean
9981elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9982{
9983 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 9984 asection *sec, *osec;
3e6b1042 9985
4dfe6ac6
NC		 9986 if (globals == NULL)
9987 return FALSE;
9988
3e6b1042
DJ		 9989 /* Invoke the regular ELF backend linker to do all the work. */
9990 if (!bfd_elf_final_link (abfd, info))
9991 return FALSE;
9992
fe33d2fa
CL		 9993 /* Process stub sections (eg BE8 encoding, ...). */
9994 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
9995 int i;
cdb21a0a
NS		 9996 for (i=0; i<htab->top_id; i++)
9997 {
9998 sec = htab->stub_group[i].stub_sec;
9999 /* Only process it once, in its link_sec slot. */
10000 if (sec && i == htab->stub_group[i].link_sec->id)
10001 {
10002 osec = sec->output_section;
10003 elf32_arm_write_section (abfd, info, sec, sec->contents);
10004 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10005 sec->output_offset, sec->size))
10006 return FALSE;
10007 }
fe33d2fa 10008 }
fe33d2fa 10009
3e6b1042
DJ		 10010 /* Write out any glue sections now that we have created all the
10011 stubs. */
10012 if (globals->bfd_of_glue_owner != NULL)
10013 {
10014 if (! elf32_arm_output_glue_section (info, abfd,
10015 globals->bfd_of_glue_owner,
10016 ARM2THUMB_GLUE_SECTION_NAME))
10017 return FALSE;
10018
10019 if (! elf32_arm_output_glue_section (info, abfd,
10020 globals->bfd_of_glue_owner,
10021 THUMB2ARM_GLUE_SECTION_NAME))
10022 return FALSE;
10023
10024 if (! elf32_arm_output_glue_section (info, abfd,
10025 globals->bfd_of_glue_owner,
10026 VFP11_ERRATUM_VENEER_SECTION_NAME))
10027 return FALSE;
10028
10029 if (! elf32_arm_output_glue_section (info, abfd,
10030 globals->bfd_of_glue_owner,
10031 ARM_BX_GLUE_SECTION_NAME))
10032 return FALSE;
10033 }
10034
10035 return TRUE;
10036}
10037
c178919b
NC		 10038/* Set the right machine number. */
10039
10040static bfd_boolean
57e8b36a 10041elf32_arm_object_p (bfd *abfd)
c178919b 10042{
5a6c6817 10043 unsigned int mach;
57e8b36a 10044
5a6c6817 10045 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 10046
5a6c6817
NC		 10047 if (mach != bfd_mach_arm_unknown)
10048 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10049
10050 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
10051 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 10052
e16bb312 10053 else
5a6c6817 10054 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 10055
10056 return TRUE;
10057}
10058
fc830a83 10059/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 10060
b34976b6 10061static bfd_boolean
57e8b36a 10062elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 10063{
10064 if (elf_flags_init (abfd)
10065 && elf_elfheader (abfd)->e_flags != flags)
10066 {
fc830a83
NC		 10067 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
10068 {
fd2ec330 10069 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 10070 (*_bfd_error_handler)
10071 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
10072 abfd);
fc830a83 10073 else
d003868e
AM		 10074 _bfd_error_handler
10075 (_("Warning: Clearing the interworking flag of %B due to outside request"),
10076 abfd);
fc830a83 10077 }
252b5132
RH		 10078 }
10079 else
10080 {
10081 elf_elfheader (abfd)->e_flags = flags;
b34976b6 10082 elf_flags_init (abfd) = TRUE;
252b5132
RH		 10083 }
10084
b34976b6 10085 return TRUE;
252b5132
RH		 10086}
10087
fc830a83 10088/* Copy backend specific data from one object module to another. */
9b485d32 10089
b34976b6 10090static bfd_boolean
57e8b36a 10091elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 10092{
10093 flagword in_flags;
10094 flagword out_flags;
10095
0ffa91dd 10096 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10097 return TRUE;
252b5132 10098
fc830a83 10099 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 10100 out_flags = elf_elfheader (obfd)->e_flags;
10101
fc830a83
NC		 10102 if (elf_flags_init (obfd)
10103 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
10104 && in_flags != out_flags)
252b5132 10105 {
252b5132 10106 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 10107 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 10108 return FALSE;
252b5132
RH		 10109
10110 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 10111 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 10112 return FALSE;
252b5132
RH		 10113
10114 /* If the src and dest have different interworking flags
10115 then turn off the interworking bit. */
fd2ec330 10116 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 10117 {
fd2ec330 10118 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 10119 _bfd_error_handler
10120 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
10121 obfd, ibfd);
252b5132 10122
fd2ec330 10123 in_flags &= ~EF_ARM_INTERWORK;
252b5132 10124 }
1006ba19
PB		 10125
10126 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 10127 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
10128 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 10129 }
10130
10131 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 10132 elf_flags_init (obfd) = TRUE;
252b5132 10133
94a3258f
PB		 10134 /* Also copy the EI_OSABI field. */
10135 elf_elfheader (obfd)->e_ident[EI_OSABI] =
10136 elf_elfheader (ibfd)->e_ident[EI_OSABI];
10137
104d59d1
JM		 10138 /* Copy object attributes. */
10139 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 10140
10141 return TRUE;
10142}
10143
10144/* Values for Tag_ABI_PCS_R9_use. */
10145enum
10146{
10147 AEABI_R9_V6,
10148 AEABI_R9_SB,
10149 AEABI_R9_TLS,
10150 AEABI_R9_unused
10151};
10152
10153/* Values for Tag_ABI_PCS_RW_data. */
10154enum
10155{
10156 AEABI_PCS_RW_data_absolute,
10157 AEABI_PCS_RW_data_PCrel,
10158 AEABI_PCS_RW_data_SBrel,
10159 AEABI_PCS_RW_data_unused
10160};
10161
10162/* Values for Tag_ABI_enum_size. */
10163enum
10164{
10165 AEABI_enum_unused,
10166 AEABI_enum_short,
10167 AEABI_enum_wide,
10168 AEABI_enum_forced_wide
10169};
10170
104d59d1
JM		 10171/* Determine whether an object attribute tag takes an integer, a
10172 string or both. */
906e58ca 10173
104d59d1
JM		 10174static int
10175elf32_arm_obj_attrs_arg_type (int tag)
10176{
10177 if (tag == Tag_compatibility)
3483fe2e 10178 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 10179 else if (tag == Tag_nodefaults)
3483fe2e
AS		 10180 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
10181 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
10182 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 10183 else if (tag < 32)
3483fe2e 10184 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 10185 else
3483fe2e 10186 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 10187}
10188
5aa6ff7c
AS		 10189/* The ABI defines that Tag_conformance should be emitted first, and that
10190 Tag_nodefaults should be second (if either is defined). This sets those
10191 two positions, and bumps up the position of all the remaining tags to
10192 compensate. */
10193static int
10194elf32_arm_obj_attrs_order (int num)
10195{
3de4a297 10196 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 10197 return Tag_conformance;
3de4a297 10198 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 10199 return Tag_nodefaults;
10200 if ((num - 2) < Tag_nodefaults)
10201 return num - 2;
10202 if ((num - 1) < Tag_conformance)
10203 return num - 1;
10204 return num;
10205}
10206
e8b36cd1
JM		 10207/* Attribute numbers >=64 (mod 128) can be safely ignored. */
10208static bfd_boolean
10209elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
10210{
10211 if ((tag & 127) < 64)
10212 {
10213 _bfd_error_handler
10214 (_("%B: Unknown mandatory EABI object attribute %d"),
10215 abfd, tag);
10216 bfd_set_error (bfd_error_bad_value);
10217 return FALSE;
10218 }
10219 else
10220 {
10221 _bfd_error_handler
10222 (_("Warning: %B: Unknown EABI object attribute %d"),
10223 abfd, tag);
10224 return TRUE;
10225 }
10226}
10227
91e22acd
AS		 10228/* Read the architecture from the Tag_also_compatible_with attribute, if any.
10229 Returns -1 if no architecture could be read. */
10230
10231static int
10232get_secondary_compatible_arch (bfd *abfd)
10233{
10234 obj_attribute *attr =
10235 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
10236
10237 /* Note: the tag and its argument below are uleb128 values, though
10238 currently-defined values fit in one byte for each. */
10239 if (attr->s
10240 && attr->s[0] == Tag_CPU_arch
10241 && (attr->s[1] & 128) != 128
10242 && attr->s[2] == 0)
10243 return attr->s[1];
10244
10245 /* This tag is "safely ignorable", so don't complain if it looks funny. */
10246 return -1;
10247}
10248
10249/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10250 The tag is removed if ARCH is -1. */
10251
8e79c3df 10252static void
91e22acd 10253set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 10254{
91e22acd
AS		 10255 obj_attribute *attr =
10256 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 10257
91e22acd
AS		 10258 if (arch == -1)
10259 {
10260 attr->s = NULL;
10261 return;
8e79c3df 10262 }
91e22acd
AS		 10263
10264 /* Note: the tag and its argument below are uleb128 values, though
10265 currently-defined values fit in one byte for each. */
10266 if (!attr->s)
21d799b5 10267 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 10268 attr->s[0] = Tag_CPU_arch;
10269 attr->s[1] = arch;
10270 attr->s[2] = '\0';
8e79c3df
CM		 10271}
10272
91e22acd
AS		 10273/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10274 into account. */
10275
10276static int
10277tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
10278 int newtag, int secondary_compat)
8e79c3df 10279{
91e22acd
AS		 10280#define T(X) TAG_CPU_ARCH_##X
10281 int tagl, tagh, result;
10282 const int v6t2[] =
10283 {
10284 T(V6T2), /* PRE_V4. */
10285 T(V6T2), /* V4. */
10286 T(V6T2), /* V4T. */
10287 T(V6T2), /* V5T. */
10288 T(V6T2), /* V5TE. */
10289 T(V6T2), /* V5TEJ. */
10290 T(V6T2), /* V6. */
10291 T(V7), /* V6KZ. */
10292 T(V6T2) /* V6T2. */
10293 };
10294 const int v6k[] =
10295 {
10296 T(V6K), /* PRE_V4. */
10297 T(V6K), /* V4. */
10298 T(V6K), /* V4T. */
10299 T(V6K), /* V5T. */
10300 T(V6K), /* V5TE. */
10301 T(V6K), /* V5TEJ. */
10302 T(V6K), /* V6. */
10303 T(V6KZ), /* V6KZ. */
10304 T(V7), /* V6T2. */
10305 T(V6K) /* V6K. */
10306 };
10307 const int v7[] =
10308 {
10309 T(V7), /* PRE_V4. */
10310 T(V7), /* V4. */
10311 T(V7), /* V4T. */
10312 T(V7), /* V5T. */
10313 T(V7), /* V5TE. */
10314 T(V7), /* V5TEJ. */
10315 T(V7), /* V6. */
10316 T(V7), /* V6KZ. */
10317 T(V7), /* V6T2. */
10318 T(V7), /* V6K. */
10319 T(V7) /* V7. */
10320 };
10321 const int v6_m[] =
10322 {
10323 -1, /* PRE_V4. */
10324 -1, /* V4. */
10325 T(V6K), /* V4T. */
10326 T(V6K), /* V5T. */
10327 T(V6K), /* V5TE. */
10328 T(V6K), /* V5TEJ. */
10329 T(V6K), /* V6. */
10330 T(V6KZ), /* V6KZ. */
10331 T(V7), /* V6T2. */
10332 T(V6K), /* V6K. */
10333 T(V7), /* V7. */
10334 T(V6_M) /* V6_M. */
10335 };
10336 const int v6s_m[] =
10337 {
10338 -1, /* PRE_V4. */
10339 -1, /* V4. */
10340 T(V6K), /* V4T. */
10341 T(V6K), /* V5T. */
10342 T(V6K), /* V5TE. */
10343 T(V6K), /* V5TEJ. */
10344 T(V6K), /* V6. */
10345 T(V6KZ), /* V6KZ. */
10346 T(V7), /* V6T2. */
10347 T(V6K), /* V6K. */
10348 T(V7), /* V7. */
10349 T(V6S_M), /* V6_M. */
10350 T(V6S_M) /* V6S_M. */
10351 };
9e3c6df6
PB		 10352 const int v7e_m[] =
10353 {
10354 -1, /* PRE_V4. */
10355 -1, /* V4. */
10356 T(V7E_M), /* V4T. */
10357 T(V7E_M), /* V5T. */
10358 T(V7E_M), /* V5TE. */
10359 T(V7E_M), /* V5TEJ. */
10360 T(V7E_M), /* V6. */
10361 T(V7E_M), /* V6KZ. */
10362 T(V7E_M), /* V6T2. */
10363 T(V7E_M), /* V6K. */
10364 T(V7E_M), /* V7. */
10365 T(V7E_M), /* V6_M. */
10366 T(V7E_M), /* V6S_M. */
10367 T(V7E_M) /* V7E_M. */
10368 };
91e22acd
AS		 10369 const int v4t_plus_v6_m[] =
10370 {
10371 -1, /* PRE_V4. */
10372 -1, /* V4. */
10373 T(V4T), /* V4T. */
10374 T(V5T), /* V5T. */
10375 T(V5TE), /* V5TE. */
10376 T(V5TEJ), /* V5TEJ. */
10377 T(V6), /* V6. */
10378 T(V6KZ), /* V6KZ. */
10379 T(V6T2), /* V6T2. */
10380 T(V6K), /* V6K. */
10381 T(V7), /* V7. */
10382 T(V6_M), /* V6_M. */
10383 T(V6S_M), /* V6S_M. */
9e3c6df6 10384 T(V7E_M), /* V7E_M. */
91e22acd
AS		 10385 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
10386 };
10387 const int *comb[] =
10388 {
10389 v6t2,
10390 v6k,
10391 v7,
10392 v6_m,
10393 v6s_m,
9e3c6df6 10394 v7e_m,
91e22acd
AS		 10395 /* Pseudo-architecture. */
10396 v4t_plus_v6_m
10397 };
10398
10399 /* Check we've not got a higher architecture than we know about. */
10400
9e3c6df6 10401 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 10402 {
3895f852 10403 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 10404 return -1;
10405 }
10406
10407 /* Override old tag if we have a Tag_also_compatible_with on the output. */
10408
10409 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10410 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10411 oldtag = T(V4T_PLUS_V6_M);
10412
10413 /* And override the new tag if we have a Tag_also_compatible_with on the
10414 input. */
10415
10416 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10417 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
10418 newtag = T(V4T_PLUS_V6_M);
10419
10420 tagl = (oldtag < newtag) ? oldtag : newtag;
10421 result = tagh = (oldtag > newtag) ? oldtag : newtag;
10422
10423 /* Architectures before V6KZ add features monotonically. */
10424 if (tagh <= TAG_CPU_ARCH_V6KZ)
10425 return result;
10426
10427 result = comb[tagh - T(V6T2)][tagl];
10428
10429 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10430 as the canonical version. */
10431 if (result == T(V4T_PLUS_V6_M))
10432 {
10433 result = T(V4T);
10434 *secondary_compat_out = T(V6_M);
10435 }
10436 else
10437 *secondary_compat_out = -1;
10438
10439 if (result == -1)
10440 {
3895f852 10441 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 10442 ibfd, oldtag, newtag);
10443 return -1;
10444 }
10445
10446 return result;
10447#undef T
8e79c3df
CM		 10448}
10449
ee065d83
PB		 10450/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
10451 are conflicting attributes. */
906e58ca 10452
ee065d83
PB		 10453static bfd_boolean
10454elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
10455{
104d59d1
JM		 10456 obj_attribute *in_attr;
10457 obj_attribute *out_attr;
ee065d83
PB		 10458 /* Some tags have 0 = don't care, 1 = strong requirement,
10459 2 = weak requirement. */
91e22acd 10460 static const int order_021[3] = {0, 2, 1};
ee065d83 10461 int i;
91e22acd 10462 bfd_boolean result = TRUE;
ee065d83 10463
3e6b1042
DJ		 10464 /* Skip the linker stubs file. This preserves previous behavior
10465 of accepting unknown attributes in the first input file - but
10466 is that a bug? */
10467 if (ibfd->flags & BFD_LINKER_CREATED)
10468 return TRUE;
10469
104d59d1 10470 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 10471 {
10472 /* This is the first object. Copy the attributes. */
104d59d1 10473 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 10474
cd21e546
MGD		 10475 out_attr = elf_known_obj_attributes_proc (obfd);
10476
004ae526
PB		 10477 /* Use the Tag_null value to indicate the attributes have been
10478 initialized. */
cd21e546 10479 out_attr[0].i = 1;
004ae526 10480
cd21e546
MGD		 10481 /* We do not output objects with Tag_MPextension_use_legacy - we move
10482 the attribute's value to Tag_MPextension_use. */
10483 if (out_attr[Tag_MPextension_use_legacy].i != 0)
10484 {
10485 if (out_attr[Tag_MPextension_use].i != 0
10486 && out_attr[Tag_MPextension_use_legacy].i
10487 != out_attr[Tag_MPextension_use].i)
10488 {
10489 _bfd_error_handler
10490 (_("Error: %B has both the current and legacy "
10491 "Tag_MPextension_use attributes"), ibfd);
10492 result = FALSE;
10493 }
10494
10495 out_attr[Tag_MPextension_use] =
10496 out_attr[Tag_MPextension_use_legacy];
10497 out_attr[Tag_MPextension_use_legacy].type = 0;
10498 out_attr[Tag_MPextension_use_legacy].i = 0;
10499 }
10500
10501 return result;
ee065d83
PB		 10502 }
10503
104d59d1
JM		 10504 in_attr = elf_known_obj_attributes_proc (ibfd);
10505 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 10506 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
10507 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
10508 {
8e79c3df 10509 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 10510 if (out_attr[Tag_ABI_FP_number_model].i == 0)
10511 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
10512 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
10513 {
10514 _bfd_error_handler
3895f852 10515 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 10516 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
10517 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 10518 result = FALSE;
ee065d83
PB		 10519 }
10520 }
10521
3de4a297 10522 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 10523 {
10524 /* Merge this attribute with existing attributes. */
10525 switch (i)
10526 {
10527 case Tag_CPU_raw_name:
10528 case Tag_CPU_name:
91e22acd 10529 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 10530 break;
10531
10532 case Tag_ABI_optimization_goals:
10533 case Tag_ABI_FP_optimization_goals:
10534 /* Use the first value seen. */
10535 break;
10536
10537 case Tag_CPU_arch:
91e22acd
AS		 10538 {
10539 int secondary_compat = -1, secondary_compat_out = -1;
10540 unsigned int saved_out_attr = out_attr[i].i;
10541 static const char *name_table[] = {
10542 /* These aren't real CPU names, but we can't guess
10543 that from the architecture version alone. */
10544 "Pre v4",
10545 "ARM v4",
10546 "ARM v4T",
10547 "ARM v5T",
10548 "ARM v5TE",
10549 "ARM v5TEJ",
10550 "ARM v6",
10551 "ARM v6KZ",
10552 "ARM v6T2",
10553 "ARM v6K",
10554 "ARM v7",
10555 "ARM v6-M",
10556 "ARM v6S-M"
10557 };
10558
10559 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
10560 secondary_compat = get_secondary_compatible_arch (ibfd);
10561 secondary_compat_out = get_secondary_compatible_arch (obfd);
10562 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
10563 &secondary_compat_out,
10564 in_attr[i].i,
10565 secondary_compat);
10566 set_secondary_compatible_arch (obfd, secondary_compat_out);
10567
10568 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
10569 if (out_attr[i].i == saved_out_attr)
10570 ; /* Leave the names alone. */
10571 else if (out_attr[i].i == in_attr[i].i)
10572 {
10573 /* The output architecture has been changed to match the
10574 input architecture. Use the input names. */
10575 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
10576 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
10577 : NULL;
10578 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
10579 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
10580 : NULL;
10581 }
10582 else
10583 {
10584 out_attr[Tag_CPU_name].s = NULL;
10585 out_attr[Tag_CPU_raw_name].s = NULL;
10586 }
10587
10588 /* If we still don't have a value for Tag_CPU_name,
10589 make one up now. Tag_CPU_raw_name remains blank. */
10590 if (out_attr[Tag_CPU_name].s == NULL
10591 && out_attr[i].i < ARRAY_SIZE (name_table))
10592 out_attr[Tag_CPU_name].s =
10593 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
10594 }
10595 break;
10596
ee065d83
PB		 10597 case Tag_ARM_ISA_use:
10598 case Tag_THUMB_ISA_use:
ee065d83 10599 case Tag_WMMX_arch:
91e22acd
AS		 10600 case Tag_Advanced_SIMD_arch:
10601 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 10602 case Tag_ABI_FP_rounding:
ee065d83
PB		 10603 case Tag_ABI_FP_exceptions:
10604 case Tag_ABI_FP_user_exceptions:
10605 case Tag_ABI_FP_number_model:
75375b3e 10606 case Tag_FP_HP_extension:
91e22acd
AS		 10607 case Tag_CPU_unaligned_access:
10608 case Tag_T2EE_use:
91e22acd 10609 case Tag_MPextension_use:
ee065d83
PB		 10610 /* Use the largest value specified. */
10611 if (in_attr[i].i > out_attr[i].i)
10612 out_attr[i].i = in_attr[i].i;
10613 break;
10614
75375b3e 10615 case Tag_ABI_align_preserved:
91e22acd
AS		 10616 case Tag_ABI_PCS_RO_data:
10617 /* Use the smallest value specified. */
10618 if (in_attr[i].i < out_attr[i].i)
10619 out_attr[i].i = in_attr[i].i;
10620 break;
10621
75375b3e 10622 case Tag_ABI_align_needed:
91e22acd 10623 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 10624 && (in_attr[Tag_ABI_align_preserved].i == 0
10625 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 10626 {
91e22acd
AS		 10627 /* This error message should be enabled once all non-conformant
10628 binaries in the toolchain have had the attributes set
10629 properly.
ee065d83 10630 _bfd_error_handler
3895f852 10631 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 10632 obfd, ibfd);
10633 result = FALSE; */
ee065d83 10634 }
91e22acd
AS		 10635 /* Fall through. */
10636 case Tag_ABI_FP_denormal:
10637 case Tag_ABI_PCS_GOT_use:
10638 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
10639 value if greater than 2 (for future-proofing). */
10640 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
10641 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
10642 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 10643 out_attr[i].i = in_attr[i].i;
10644 break;
91e22acd 10645
75375b3e
MGD		 10646 case Tag_Virtualization_use:
10647 /* The virtualization tag effectively stores two bits of
10648 information: the intended use of TrustZone (in bit 0), and the
10649 intended use of Virtualization (in bit 1). */
10650 if (out_attr[i].i == 0)
10651 out_attr[i].i = in_attr[i].i;
10652 else if (in_attr[i].i != 0
10653 && in_attr[i].i != out_attr[i].i)
10654 {
10655 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
10656 out_attr[i].i = 3;
10657 else
10658 {
10659 _bfd_error_handler
10660 (_("error: %B: unable to merge virtualization attributes "
10661 "with %B"),
10662 obfd, ibfd);
10663 result = FALSE;
10664 }
10665 }
10666 break;
91e22acd
AS		 10667
10668 case Tag_CPU_arch_profile:
10669 if (out_attr[i].i != in_attr[i].i)
10670 {
10671 /* 0 will merge with anything.
10672 'A' and 'S' merge to 'A'.
10673 'R' and 'S' merge to 'R'.
10674 'M' and 'A|R|S' is an error. */
10675 if (out_attr[i].i == 0
10676 || (out_attr[i].i == 'S'
10677 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
10678 out_attr[i].i = in_attr[i].i;
10679 else if (in_attr[i].i == 0
10680 || (in_attr[i].i == 'S'
10681 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
10682 ; /* Do nothing. */
10683 else
10684 {
10685 _bfd_error_handler
3895f852 10686 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 10687 ibfd,
10688 in_attr[i].i ? in_attr[i].i : '0',
10689 out_attr[i].i ? out_attr[i].i : '0');
10690 result = FALSE;
10691 }
10692 }
10693 break;
75375b3e 10694 case Tag_FP_arch:
62f3b8c8 10695 {
4547cb56
NC		 10696 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
10697 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
10698 when it's 0. It might mean absence of FP hardware if
10699 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
10700
62f3b8c8
PB		 10701 static const struct
10702 {
10703 int ver;
10704 int regs;
10705 } vfp_versions[7] =
10706 {
10707 {0, 0},
10708 {1, 16},
10709 {2, 16},
10710 {3, 32},
10711 {3, 16},
10712 {4, 32},
10713 {4, 16}
10714 };
10715 int ver;
10716 int regs;
10717 int newval;
10718
4547cb56
NC		 10719 /* If the output has no requirement about FP hardware,
10720 follow the requirement of the input. */
10721 if (out_attr[i].i == 0)
10722 {
10723 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
10724 out_attr[i].i = in_attr[i].i;
10725 out_attr[Tag_ABI_HardFP_use].i
10726 = in_attr[Tag_ABI_HardFP_use].i;
10727 break;
10728 }
10729 /* If the input has no requirement about FP hardware, do
10730 nothing. */
10731 else if (in_attr[i].i == 0)
10732 {
10733 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
10734 break;
10735 }
10736
10737 /* Both the input and the output have nonzero Tag_FP_arch.
10738 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
10739
10740 /* If both the input and the output have zero Tag_ABI_HardFP_use,
10741 do nothing. */
10742 if (in_attr[Tag_ABI_HardFP_use].i == 0
10743 && out_attr[Tag_ABI_HardFP_use].i == 0)
10744 ;
10745 /* If the input and the output have different Tag_ABI_HardFP_use,
10746 the combination of them is 3 (SP & DP). */
10747 else if (in_attr[Tag_ABI_HardFP_use].i
10748 != out_attr[Tag_ABI_HardFP_use].i)
10749 out_attr[Tag_ABI_HardFP_use].i = 3;
10750
10751 /* Now we can handle Tag_FP_arch. */
10752
62f3b8c8
PB		 10753 /* Values greater than 6 aren't defined, so just pick the
10754 biggest */
10755 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
10756 {
10757 out_attr[i] = in_attr[i];
10758 break;
10759 }
10760 /* The output uses the superset of input features
10761 (ISA version) and registers. */
10762 ver = vfp_versions[in_attr[i].i].ver;
10763 if (ver < vfp_versions[out_attr[i].i].ver)
10764 ver = vfp_versions[out_attr[i].i].ver;
10765 regs = vfp_versions[in_attr[i].i].regs;
10766 if (regs < vfp_versions[out_attr[i].i].regs)
10767 regs = vfp_versions[out_attr[i].i].regs;
10768 /* This assumes all possible supersets are also a valid
10769 options. */
10770 for (newval = 6; newval > 0; newval--)
10771 {
10772 if (regs == vfp_versions[newval].regs
10773 && ver == vfp_versions[newval].ver)
10774 break;
10775 }
10776 out_attr[i].i = newval;
10777 }
b1cc4aeb 10778 break;
ee065d83
PB		 10779 case Tag_PCS_config:
10780 if (out_attr[i].i == 0)
10781 out_attr[i].i = in_attr[i].i;
10782 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
10783 {
10784 /* It's sometimes ok to mix different configs, so this is only
10785 a warning. */
10786 _bfd_error_handler
10787 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10788 }
10789 break;
10790 case Tag_ABI_PCS_R9_use:
004ae526
PB		 10791 if (in_attr[i].i != out_attr[i].i
10792 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 10793 && in_attr[i].i != AEABI_R9_unused)
10794 {
10795 _bfd_error_handler
3895f852 10796 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 10797 result = FALSE;
ee065d83
PB		 10798 }
10799 if (out_attr[i].i == AEABI_R9_unused)
10800 out_attr[i].i = in_attr[i].i;
10801 break;
10802 case Tag_ABI_PCS_RW_data:
10803 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10804 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10805 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10806 {
10807 _bfd_error_handler
3895f852 10808 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 10809 ibfd);
91e22acd 10810 result = FALSE;
ee065d83
PB		 10811 }
10812 /* Use the smallest value specified. */
10813 if (in_attr[i].i < out_attr[i].i)
10814 out_attr[i].i = in_attr[i].i;
10815 break;
ee065d83 10816 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 10817 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10818 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 10819 {
10820 _bfd_error_handler
a9dc9481
JM		 10821 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10822 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 10823 }
a9dc9481 10824 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 10825 out_attr[i].i = in_attr[i].i;
10826 break;
ee065d83
PB		 10827 case Tag_ABI_enum_size:
10828 if (in_attr[i].i != AEABI_enum_unused)
10829 {
10830 if (out_attr[i].i == AEABI_enum_unused
10831 || out_attr[i].i == AEABI_enum_forced_wide)
10832 {
10833 /* The existing object is compatible with anything.
10834 Use whatever requirements the new object has. */
10835 out_attr[i].i = in_attr[i].i;
10836 }
10837 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 10838 && out_attr[i].i != in_attr[i].i
0ffa91dd 10839 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 10840 {
91e22acd 10841 static const char *aeabi_enum_names[] =
bf21ed78 10842 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 10843 const char *in_name =
10844 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10845 ? aeabi_enum_names[in_attr[i].i]
10846 : "<unknown>";
10847 const char *out_name =
10848 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10849 ? aeabi_enum_names[out_attr[i].i]
10850 : "<unknown>";
ee065d83 10851 _bfd_error_handler
bf21ed78 10852 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 10853 ibfd, in_name, out_name);
ee065d83
PB		 10854 }
10855 }
10856 break;
10857 case Tag_ABI_VFP_args:
10858 /* Aready done. */
10859 break;
10860 case Tag_ABI_WMMX_args:
10861 if (in_attr[i].i != out_attr[i].i)
10862 {
10863 _bfd_error_handler
3895f852 10864 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 10865 ibfd, obfd);
91e22acd 10866 result = FALSE;
ee065d83
PB		 10867 }
10868 break;
7b86a9fa
AS		 10869 case Tag_compatibility:
10870 /* Merged in target-independent code. */
10871 break;
91e22acd 10872 case Tag_ABI_HardFP_use:
4547cb56 10873 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 10874 break;
10875 case Tag_ABI_FP_16bit_format:
10876 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10877 {
10878 if (in_attr[i].i != out_attr[i].i)
10879 {
10880 _bfd_error_handler
3895f852 10881 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10882 ibfd, obfd);
10883 result = FALSE;
10884 }
10885 }
10886 if (in_attr[i].i != 0)
10887 out_attr[i].i = in_attr[i].i;
10888 break;
7b86a9fa 10889
cd21e546
MGD		 10890 case Tag_DIV_use:
10891 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
10892 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10893 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10894 CPU. We will merge as follows: If the input attribute's value
10895 is one then the output attribute's value remains unchanged. If
10896 the input attribute's value is zero or two then if the output
10897 attribute's value is one the output value is set to the input
10898 value, otherwise the output value must be the same as the
10899 inputs. */
10900 if (in_attr[i].i != 1 && out_attr[i].i != 1)
10901 {
10902 if (in_attr[i].i != out_attr[i].i)
10903 {
10904 _bfd_error_handler
10905 (_("DIV usage mismatch between %B and %B"),
10906 ibfd, obfd);
10907 result = FALSE;
10908 }
10909 }
10910
10911 if (in_attr[i].i != 1)
10912 out_attr[i].i = in_attr[i].i;
10913
10914 break;
10915
10916 case Tag_MPextension_use_legacy:
10917 /* We don't output objects with Tag_MPextension_use_legacy - we
10918 move the value to Tag_MPextension_use. */
10919 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
10920 {
10921 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
10922 {
10923 _bfd_error_handler
10924 (_("%B has has both the current and legacy "
10925 "Tag_MPextension_use attributes"),
10926 ibfd);
10927 result = FALSE;
10928 }
10929 }
10930
10931 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
10932 out_attr[Tag_MPextension_use] = in_attr[i];
10933
10934 break;
10935
91e22acd 10936 case Tag_nodefaults:
2d0bb761
AS		 10937 /* This tag is set if it exists, but the value is unused (and is
10938 typically zero). We don't actually need to do anything here -
10939 the merge happens automatically when the type flags are merged
10940 below. */
91e22acd
AS		 10941 break;
10942 case Tag_also_compatible_with:
10943 /* Already done in Tag_CPU_arch. */
10944 break;
10945 case Tag_conformance:
10946 /* Keep the attribute if it matches. Throw it away otherwise.
10947 No attribute means no claim to conform. */
10948 if (!in_attr[i].s || !out_attr[i].s
10949 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10950 out_attr[i].s = NULL;
10951 break;
3cfad14c 10952
91e22acd 10953 default:
e8b36cd1
JM		 10954 result
10955 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 10956 }
10957
10958 /* If out_attr was copied from in_attr then it won't have a type yet. */
10959 if (in_attr[i].type && !out_attr[i].type)
10960 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10961 }
10962
104d59d1 10963 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 10964 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
10965 return FALSE;
ee065d83 10966
104d59d1 10967 /* Check for any attributes not known on ARM. */
e8b36cd1 10968 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 10969
91e22acd 10970 return result;
252b5132
RH		 10971}
10972
3a4a14e9
PB		 10973
10974/* Return TRUE if the two EABI versions are incompatible. */
10975
10976static bfd_boolean
10977elf32_arm_versions_compatible (unsigned iver, unsigned over)
10978{
10979 /* v4 and v5 are the same spec before and after it was released,
10980 so allow mixing them. */
10981 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10982 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10983 return TRUE;
10984
10985 return (iver == over);
10986}
10987
252b5132
RH		 10988/* Merge backend specific data from an object file to the output
10989 object file when linking. */
9b485d32 10990
b34976b6 10991static bfd_boolean
21d799b5 10992elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 10993
9b485d32
NC		 10994/* Display the flags field. */
10995
b34976b6 10996static bfd_boolean
57e8b36a 10997elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10998{
fc830a83
NC		 10999 FILE * file = (FILE *) ptr;
11000 unsigned long flags;
252b5132
RH		 11001
11002 BFD_ASSERT (abfd != NULL && ptr != NULL);
11003
11004 /* Print normal ELF private data. */
11005 _bfd_elf_print_private_bfd_data (abfd, ptr);
11006
fc830a83 11007 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 11008 /* Ignore init flag - it may not be set, despite the flags field
11009 containing valid data. */
252b5132
RH		 11010
11011 /* xgettext:c-format */
9b485d32 11012 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 11013
fc830a83
NC		 11014 switch (EF_ARM_EABI_VERSION (flags))
11015 {
11016 case EF_ARM_EABI_UNKNOWN:
4cc11e76 11017 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 11018 official ARM ELF extended ABI. Hence they are only decoded if
11019 the EABI version is not set. */
fd2ec330 11020 if (flags & EF_ARM_INTERWORK)
9b485d32 11021 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 11022
fd2ec330 11023 if (flags & EF_ARM_APCS_26)
6c571f00 11024 fprintf (file, " [APCS-26]");
fc830a83 11025 else
6c571f00 11026 fprintf (file, " [APCS-32]");
9a5aca8c 11027
96a846ea
RE		 11028 if (flags & EF_ARM_VFP_FLOAT)
11029 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 11030 else if (flags & EF_ARM_MAVERICK_FLOAT)
11031 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 11032 else
11033 fprintf (file, _(" [FPA float format]"));
11034
fd2ec330 11035 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 11036 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 11037
fd2ec330 11038 if (flags & EF_ARM_PIC)
9b485d32 11039 fprintf (file, _(" [position independent]"));
fc830a83 11040
fd2ec330 11041 if (flags & EF_ARM_NEW_ABI)
9b485d32 11042 fprintf (file, _(" [new ABI]"));
9a5aca8c 11043
fd2ec330 11044 if (flags & EF_ARM_OLD_ABI)
9b485d32 11045 fprintf (file, _(" [old ABI]"));
9a5aca8c 11046
fd2ec330 11047 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 11048 fprintf (file, _(" [software FP]"));
9a5aca8c 11049
96a846ea
RE		 11050 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
11051 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 11052 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
11053 | EF_ARM_MAVERICK_FLOAT);
fc830a83 11054 break;
9a5aca8c 11055
fc830a83 11056 case EF_ARM_EABI_VER1:
9b485d32 11057 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 11058
fc830a83 11059 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 11060 fprintf (file, _(" [sorted symbol table]"));
fc830a83 11061 else
9b485d32 11062 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 11063
fc830a83
NC		 11064 flags &= ~ EF_ARM_SYMSARESORTED;
11065 break;
9a5aca8c 11066
fd2ec330
PB		 11067 case EF_ARM_EABI_VER2:
11068 fprintf (file, _(" [Version2 EABI]"));
11069
11070 if (flags & EF_ARM_SYMSARESORTED)
11071 fprintf (file, _(" [sorted symbol table]"));
11072 else
11073 fprintf (file, _(" [unsorted symbol table]"));
11074
11075 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
11076 fprintf (file, _(" [dynamic symbols use segment index]"));
11077
11078 if (flags & EF_ARM_MAPSYMSFIRST)
11079 fprintf (file, _(" [mapping symbols precede others]"));
11080
99e4ae17 11081 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 11082 | EF_ARM_MAPSYMSFIRST);
11083 break;
11084
d507cf36
PB		 11085 case EF_ARM_EABI_VER3:
11086 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 11087 break;
11088
11089 case EF_ARM_EABI_VER4:
11090 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 11091 goto eabi;
d507cf36 11092
3a4a14e9
PB		 11093 case EF_ARM_EABI_VER5:
11094 fprintf (file, _(" [Version5 EABI]"));
11095 eabi:
d507cf36
PB		 11096 if (flags & EF_ARM_BE8)
11097 fprintf (file, _(" [BE8]"));
11098
11099 if (flags & EF_ARM_LE8)
11100 fprintf (file, _(" [LE8]"));
11101
11102 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
11103 break;
11104
fc830a83 11105 default:
9b485d32 11106 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 11107 break;
11108 }
252b5132 11109
fc830a83 11110 flags &= ~ EF_ARM_EABIMASK;
252b5132 11111
fc830a83 11112 if (flags & EF_ARM_RELEXEC)
9b485d32 11113 fprintf (file, _(" [relocatable executable]"));
252b5132 11114
fc830a83 11115 if (flags & EF_ARM_HASENTRY)
9b485d32 11116 fprintf (file, _(" [has entry point]"));
252b5132 11117
fc830a83
NC		 11118 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
11119
11120 if (flags)
9b485d32 11121 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 11122
252b5132
RH		 11123 fputc ('\n', file);
11124
b34976b6 11125 return TRUE;
252b5132
RH		 11126}
11127
11128static int
57e8b36a 11129elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 11130{
2f0ca46a
NC		 11131 switch (ELF_ST_TYPE (elf_sym->st_info))
11132 {
11133 case STT_ARM_TFUNC:
11134 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 11135
2f0ca46a
NC		 11136 case STT_ARM_16BIT:
11137 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
11138 This allows us to distinguish between data used by Thumb instructions
11139 and non-data (which is probably code) inside Thumb regions of an
11140 executable. */
1a0eb693 11141 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 11142 return ELF_ST_TYPE (elf_sym->st_info);
11143 break;
9a5aca8c 11144
ce855c42
NC		 11145 default:
11146 break;
2f0ca46a
NC		 11147 }
11148
11149 return type;
252b5132 11150}
f21f3fe0 11151
252b5132 11152static asection *
07adf181
AM		 11153elf32_arm_gc_mark_hook (asection *sec,
11154 struct bfd_link_info *info,
11155 Elf_Internal_Rela *rel,
11156 struct elf_link_hash_entry *h,
11157 Elf_Internal_Sym *sym)
252b5132
RH		 11158{
11159 if (h != NULL)
07adf181 11160 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 11161 {
11162 case R_ARM_GNU_VTINHERIT:
11163 case R_ARM_GNU_VTENTRY:
07adf181
AM		 11164 return NULL;
11165 }
9ad5cbcf 11166
07adf181 11167 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 11168}
11169
780a67af
NC		 11170/* Update the got entry reference counts for the section being removed. */
11171
b34976b6 11172static bfd_boolean
ba93b8ac
DJ		 11173elf32_arm_gc_sweep_hook (bfd * abfd,
11174 struct bfd_link_info * info,
11175 asection * sec,
11176 const Elf_Internal_Rela * relocs)
252b5132 11177{
5e681ec4
PB		 11178 Elf_Internal_Shdr *symtab_hdr;
11179 struct elf_link_hash_entry **sym_hashes;
11180 bfd_signed_vma *local_got_refcounts;
11181 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 11182 struct elf32_arm_link_hash_table * globals;
11183
7dda2462
TG		 11184 if (info->relocatable)
11185 return TRUE;
11186
eb043451 11187 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11188 if (globals == NULL)
11189 return FALSE;
5e681ec4
PB		 11190
11191 elf_section_data (sec)->local_dynrel = NULL;
11192
0ffa91dd 11193 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 11194 sym_hashes = elf_sym_hashes (abfd);
11195 local_got_refcounts = elf_local_got_refcounts (abfd);
11196
906e58ca 11197 check_use_blx (globals);
bd97cb95 11198
5e681ec4
PB		 11199 relend = relocs + sec->reloc_count;
11200 for (rel = relocs; rel < relend; rel++)
eb043451 11201 {
3eb128b2
AM		 11202 unsigned long r_symndx;
11203 struct elf_link_hash_entry *h = NULL;
eb043451 11204 int r_type;
5e681ec4 11205
3eb128b2
AM		 11206 r_symndx = ELF32_R_SYM (rel->r_info);
11207 if (r_symndx >= symtab_hdr->sh_info)
11208 {
11209 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11210 while (h->root.type == bfd_link_hash_indirect
11211 || h->root.type == bfd_link_hash_warning)
11212 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11213 }
11214
eb043451 11215 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 11216 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 11217 switch (r_type)
11218 {
11219 case R_ARM_GOT32:
eb043451 11220 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 11221 case R_ARM_TLS_GD32:
11222 case R_ARM_TLS_IE32:
3eb128b2 11223 if (h != NULL)
eb043451 11224 {
eb043451
PB		 11225 if (h->got.refcount > 0)
11226 h->got.refcount -= 1;
11227 }
11228 else if (local_got_refcounts != NULL)
11229 {
11230 if (local_got_refcounts[r_symndx] > 0)
11231 local_got_refcounts[r_symndx] -= 1;
11232 }
11233 break;
11234
ba93b8ac 11235 case R_ARM_TLS_LDM32:
4dfe6ac6 11236 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 11237 break;
11238
eb043451 11239 case R_ARM_ABS32:
bb224fc3 11240 case R_ARM_ABS32_NOI:
eb043451 11241 case R_ARM_REL32:
bb224fc3 11242 case R_ARM_REL32_NOI:
eb043451
PB		 11243 case R_ARM_PC24:
11244 case R_ARM_PLT32:
5b5bb741
PB		 11245 case R_ARM_CALL:
11246 case R_ARM_JUMP24:
eb043451 11247 case R_ARM_PREL31:
c19d1205 11248 case R_ARM_THM_CALL:
bd97cb95
DJ		 11249 case R_ARM_THM_JUMP24:
11250 case R_ARM_THM_JUMP19:
b6895b4f
PB		 11251 case R_ARM_MOVW_ABS_NC:
11252 case R_ARM_MOVT_ABS:
11253 case R_ARM_MOVW_PREL_NC:
11254 case R_ARM_MOVT_PREL:
11255 case R_ARM_THM_MOVW_ABS_NC:
11256 case R_ARM_THM_MOVT_ABS:
11257 case R_ARM_THM_MOVW_PREL_NC:
11258 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 11259 /* Should the interworking branches be here also? */
11260
3eb128b2 11261 if (h != NULL)
eb043451
PB		 11262 {
11263 struct elf32_arm_link_hash_entry *eh;
0bdcacaf
RS		 11264 struct elf_dyn_relocs **pp;
11265 struct elf_dyn_relocs *p;
5e681ec4 11266
b7693d02 11267 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 11268
eb043451 11269 if (h->plt.refcount > 0)
b7693d02
DJ		 11270 {
11271 h->plt.refcount -= 1;
bd97cb95
DJ		 11272 if (r_type == R_ARM_THM_CALL)
11273 eh->plt_maybe_thumb_refcount--;
11274
11275 if (r_type == R_ARM_THM_JUMP24
11276 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 11277 eh->plt_thumb_refcount--;
11278 }
5e681ec4 11279
eb043451 11280 if (r_type == R_ARM_ABS32
bb224fc3
MS		 11281 || r_type == R_ARM_REL32
11282 || r_type == R_ARM_ABS32_NOI
11283 || r_type == R_ARM_REL32_NOI)
0bdcacaf
RS		 11284 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
11285 if (p->sec == sec)
eb043451
PB		 11286 {
11287 p->count -= 1;
bb224fc3 11288 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
0bdcacaf 11289 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 11290 p->pc_count -= 1;
eb043451
PB		 11291 if (p->count == 0)
11292 *pp = p->next;
11293 break;
11294 }
eb043451
PB		 11295 }
11296 break;
5e681ec4 11297
eb043451
PB		 11298 default:
11299 break;
11300 }
11301 }
5e681ec4 11302
b34976b6 11303 return TRUE;
252b5132
RH		 11304}
11305
780a67af
NC		 11306/* Look through the relocs for a section during the first phase. */
11307
b34976b6 11308static bfd_boolean
57e8b36a
NC		 11309elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
11310 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 11311{
b34976b6
AM		 11312 Elf_Internal_Shdr *symtab_hdr;
11313 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 11314 const Elf_Internal_Rela *rel;
11315 const Elf_Internal_Rela *rel_end;
11316 bfd *dynobj;
5e681ec4 11317 asection *sreloc;
5e681ec4 11318 struct elf32_arm_link_hash_table *htab;
39623e12 11319 bfd_boolean needs_plt;
ce98a316 11320 unsigned long nsyms;
9a5aca8c 11321
1049f94e 11322 if (info->relocatable)
b34976b6 11323 return TRUE;
9a5aca8c 11324
0ffa91dd
NC		 11325 BFD_ASSERT (is_arm_elf (abfd));
11326
5e681ec4 11327 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11328 if (htab == NULL)
11329 return FALSE;
11330
5e681ec4 11331 sreloc = NULL;
9a5aca8c 11332
67687978
PB		 11333 /* Create dynamic sections for relocatable executables so that we can
11334 copy relocations. */
11335 if (htab->root.is_relocatable_executable
11336 && ! htab->root.dynamic_sections_created)
11337 {
11338 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
11339 return FALSE;
11340 }
11341
252b5132 11342 dynobj = elf_hash_table (info)->dynobj;
0ffa91dd 11343 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 11344 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 11345 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
11346
252b5132
RH		 11347 rel_end = relocs + sec->reloc_count;
11348 for (rel = relocs; rel < rel_end; rel++)
11349 {
11350 struct elf_link_hash_entry *h;
b7693d02 11351 struct elf32_arm_link_hash_entry *eh;
252b5132 11352 unsigned long r_symndx;
eb043451 11353 int r_type;
9a5aca8c 11354
252b5132 11355 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 11356 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 11357 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 11358
ce98a316
NC		 11359 if (r_symndx >= nsyms
11360 /* PR 9934: It is possible to have relocations that do not
11361 refer to symbols, thus it is also possible to have an
11362 object file containing relocations but no symbol table. */
cf35638d 11363 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 11364 {
11365 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 11366 r_symndx);
ba93b8ac
DJ		 11367 return FALSE;
11368 }
11369
ce98a316 11370 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 11371 h = NULL;
11372 else
973a3492
L		 11373 {
11374 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11375 while (h->root.type == bfd_link_hash_indirect
11376 || h->root.type == bfd_link_hash_warning)
11377 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11378 }
9a5aca8c 11379
b7693d02
DJ		 11380 eh = (struct elf32_arm_link_hash_entry *) h;
11381
0855e32b
NS		 11382 /* Could be done earlier, if h were already available. */
11383 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 11384 switch (r_type)
252b5132 11385 {
5e681ec4 11386 case R_ARM_GOT32:
eb043451 11387 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 11388 case R_ARM_TLS_GD32:
11389 case R_ARM_TLS_IE32:
0855e32b
NS		 11390 case R_ARM_TLS_GOTDESC:
11391 case R_ARM_TLS_DESCSEQ:
11392 case R_ARM_THM_TLS_DESCSEQ:
11393 case R_ARM_TLS_CALL:
11394 case R_ARM_THM_TLS_CALL:
5e681ec4 11395 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 11396 {
11397 int tls_type, old_tls_type;
5e681ec4 11398
ba93b8ac
DJ		 11399 switch (r_type)
11400 {
11401 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
0855e32b 11402
ba93b8ac 11403 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
0855e32b
NS		 11404
11405 case R_ARM_TLS_GOTDESC:
11406 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
11407 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
11408 tls_type = GOT_TLS_GDESC; break;
11409
ba93b8ac
DJ		 11410 default: tls_type = GOT_NORMAL; break;
11411 }
252b5132 11412
ba93b8ac
DJ		 11413 if (h != NULL)
11414 {
11415 h->got.refcount++;
11416 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
11417 }
11418 else
11419 {
11420 bfd_signed_vma *local_got_refcounts;
11421
11422 /* This is a global offset table entry for a local symbol. */
11423 local_got_refcounts = elf_local_got_refcounts (abfd);
11424 if (local_got_refcounts == NULL)
11425 {
11426 bfd_size_type size;
906e58ca 11427
ba93b8ac 11428 size = symtab_hdr->sh_info;
0855e32b
NS		 11429 size *= (sizeof (bfd_signed_vma)
11430 + sizeof (bfd_vma) + sizeof (char));
21d799b5
NC		 11431 local_got_refcounts = (bfd_signed_vma *)
11432 bfd_zalloc (abfd, size);
ba93b8ac
DJ		 11433 if (local_got_refcounts == NULL)
11434 return FALSE;
11435 elf_local_got_refcounts (abfd) = local_got_refcounts;
0855e32b
NS		 11436 elf32_arm_local_tlsdesc_gotent (abfd)
11437 = (bfd_vma *) (local_got_refcounts
11438 + symtab_hdr->sh_info);
ba93b8ac 11439 elf32_arm_local_got_tls_type (abfd)
0855e32b
NS		 11440 = (char *) (elf32_arm_local_tlsdesc_gotent (abfd)
11441 + symtab_hdr->sh_info);
ba93b8ac
DJ		 11442 }
11443 local_got_refcounts[r_symndx] += 1;
11444 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
11445 }
11446
0855e32b
NS		 11447 /* If a variable is accessed with both tls methods, two
11448 slots may be created. */
11449 if (GOT_TLS_GD_ANY_P (old_tls_type)
11450 && GOT_TLS_GD_ANY_P (tls_type))
11451 tls_type |= old_tls_type;
11452
11453 /* We will already have issued an error message if there
11454 is a TLS/non-TLS mismatch, based on the symbol
11455 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 11456 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
11457 && tls_type != GOT_NORMAL)
11458 tls_type |= old_tls_type;
11459
0855e32b
NS		 11460 /* If the symbol is accessed in both IE and GDESC
11461 method, we're able to relax. Turn off the GDESC flag,
11462 without messing up with any other kind of tls types
11463 that may be involved */
11464 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
11465 tls_type &= ~GOT_TLS_GDESC;
11466
ba93b8ac
DJ		 11467 if (old_tls_type != tls_type)
11468 {
11469 if (h != NULL)
11470 elf32_arm_hash_entry (h)->tls_type = tls_type;
11471 else
11472 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
11473 }
11474 }
8029a119 11475 /* Fall through. */
ba93b8ac
DJ		 11476
11477 case R_ARM_TLS_LDM32:
11478 if (r_type == R_ARM_TLS_LDM32)
11479 htab->tls_ldm_got.refcount++;
8029a119 11480 /* Fall through. */
252b5132 11481
c19d1205 11482 case R_ARM_GOTOFF32:
5e681ec4 11483 case R_ARM_GOTPC:
362d30a1 11484 if (htab->root.sgot == NULL)
5e681ec4
PB		 11485 {
11486 if (htab->root.dynobj == NULL)
11487 htab->root.dynobj = abfd;
11488 if (!create_got_section (htab->root.dynobj, info))
11489 return FALSE;
11490 }
252b5132
RH		 11491 break;
11492
00a97672
RS		 11493 case R_ARM_ABS12:
11494 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
11495 ldr __GOTT_INDEX__ offsets. */
11496 if (!htab->vxworks_p)
11497 break;
8029a119 11498 /* Fall through. */
00a97672 11499
252b5132 11500 case R_ARM_PC24:
7359ea65 11501 case R_ARM_PLT32:
5b5bb741
PB		 11502 case R_ARM_CALL:
11503 case R_ARM_JUMP24:
eb043451 11504 case R_ARM_PREL31:
c19d1205 11505 case R_ARM_THM_CALL:
bd97cb95
DJ		 11506 case R_ARM_THM_JUMP24:
11507 case R_ARM_THM_JUMP19:
39623e12
PB		 11508 needs_plt = 1;
11509 goto normal_reloc;
11510
96c23d59
JM		 11511 case R_ARM_MOVW_ABS_NC:
11512 case R_ARM_MOVT_ABS:
11513 case R_ARM_THM_MOVW_ABS_NC:
11514 case R_ARM_THM_MOVT_ABS:
11515 if (info->shared)
11516 {
11517 (*_bfd_error_handler)
11518 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
11519 abfd, elf32_arm_howto_table_1[r_type].name,
11520 (h) ? h->root.root.string : "a local symbol");
11521 bfd_set_error (bfd_error_bad_value);
11522 return FALSE;
11523 }
11524
11525 /* Fall through. */
39623e12
PB		 11526 case R_ARM_ABS32:
11527 case R_ARM_ABS32_NOI:
11528 case R_ARM_REL32:
11529 case R_ARM_REL32_NOI:
b6895b4f
PB		 11530 case R_ARM_MOVW_PREL_NC:
11531 case R_ARM_MOVT_PREL:
b6895b4f
PB		 11532 case R_ARM_THM_MOVW_PREL_NC:
11533 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 11534 needs_plt = 0;
11535 normal_reloc:
11536
b7693d02 11537 /* Should the interworking branches be listed here? */
7359ea65 11538 if (h != NULL)
5e681ec4
PB		 11539 {
11540 /* If this reloc is in a read-only section, we might
11541 need a copy reloc. We can't check reliably at this
11542 stage whether the section is read-only, as input
11543 sections have not yet been mapped to output sections.
11544 Tentatively set the flag for now, and correct in
11545 adjust_dynamic_symbol. */
7359ea65 11546 if (!info->shared)
f5385ebf 11547 h->non_got_ref = 1;
7359ea65 11548
5e681ec4 11549 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 11550 refers to is in a different object. We can't tell for
11551 sure yet, because something later might force the
11552 symbol local. */
39623e12 11553 if (needs_plt)
f5385ebf 11554 h->needs_plt = 1;
4f199be3
DJ		 11555
11556 /* If we create a PLT entry, this relocation will reference
11557 it, even if it's an ABS32 relocation. */
11558 h->plt.refcount += 1;
b7693d02 11559
bd97cb95
DJ		 11560 /* It's too early to use htab->use_blx here, so we have to
11561 record possible blx references separately from
11562 relocs that definitely need a thumb stub. */
11563
c19d1205 11564 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 11565 eh->plt_maybe_thumb_refcount += 1;
11566
11567 if (r_type == R_ARM_THM_JUMP24
11568 || r_type == R_ARM_THM_JUMP19)
b7693d02 11569 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 11570 }
11571
67687978
PB		 11572 /* If we are creating a shared library or relocatable executable,
11573 and this is a reloc against a global symbol, or a non PC
11574 relative reloc against a local symbol, then we need to copy
11575 the reloc into the shared library. However, if we are linking
11576 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 11577 global symbol which is defined in an object we are
11578 including in the link (i.e., DEF_REGULAR is set). At
11579 this point we have not seen all the input files, so it is
11580 possible that DEF_REGULAR is not set now but will be set
11581 later (it is never cleared). We account for that
11582 possibility below by storing information in the
0bdcacaf 11583 dyn_relocs field of the hash table entry. */
67687978 11584 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 11585 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 11586 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 11587 || (h != NULL && ! h->needs_plt
11588 && (! info->symbolic || ! h->def_regular))))
252b5132 11589 {
0bdcacaf 11590 struct elf_dyn_relocs *p, **head;
5e681ec4 11591
252b5132
RH		 11592 /* When creating a shared object, we must copy these
11593 reloc types into the output file. We create a reloc
11594 section in dynobj and make room for this reloc. */
83bac4b0 11595 if (sreloc == NULL)
252b5132 11596 {
83bac4b0
NC		 11597 sreloc = _bfd_elf_make_dynamic_reloc_section
11598 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 11599
83bac4b0 11600 if (sreloc == NULL)
b34976b6 11601 return FALSE;
252b5132 11602
83bac4b0 11603 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 11604 if (htab->symbian_p)
252b5132 11605 {
83bac4b0 11606 flagword flags;
5e681ec4 11607
83bac4b0 11608 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 11609 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 11610 bfd_set_section_flags (dynobj, sreloc, flags);
11611 }
252b5132
RH		 11612 }
11613
5e681ec4
PB		 11614 /* If this is a global symbol, we count the number of
11615 relocations we need for this symbol. */
11616 if (h != NULL)
252b5132 11617 {
0bdcacaf 11618 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
5e681ec4
PB		 11619 }
11620 else
11621 {
11622 /* Track dynamic relocs needed for local syms too.
11623 We really need local syms available to do this
11624 easily. Oh well. */
5e681ec4 11625 asection *s;
6edfbbad 11626 void *vpp;
87d72d41 11627 Elf_Internal_Sym *isym;
6edfbbad 11628
87d72d41
AM		 11629 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11630 abfd, r_symndx);
11631 if (isym == NULL)
5e681ec4 11632 return FALSE;
57e8b36a 11633
87d72d41
AM		 11634 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11635 if (s == NULL)
11636 s = sec;
11637
6edfbbad 11638 vpp = &elf_section_data (s)->local_dynrel;
0bdcacaf 11639 head = (struct elf_dyn_relocs **) vpp;
5e681ec4 11640 }
57e8b36a 11641
5e681ec4 11642 p = *head;
0bdcacaf 11643 if (p == NULL || p->sec != sec)
5e681ec4
PB		 11644 {
11645 bfd_size_type amt = sizeof *p;
57e8b36a 11646
0bdcacaf 11647 p = (struct elf_dyn_relocs *)
21d799b5 11648 bfd_alloc (htab->root.dynobj, amt);
252b5132 11649 if (p == NULL)
5e681ec4
PB		 11650 return FALSE;
11651 p->next = *head;
11652 *head = p;
0bdcacaf 11653 p->sec = sec;
5e681ec4 11654 p->count = 0;
ba93b8ac 11655 p->pc_count = 0;
252b5132 11656 }
57e8b36a 11657
bb224fc3 11658 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 11659 p->pc_count += 1;
71a976dd 11660 p->count += 1;
252b5132
RH		 11661 }
11662 break;
11663
11664 /* This relocation describes the C++ object vtable hierarchy.
11665 Reconstruct it for later use during GC. */
11666 case R_ARM_GNU_VTINHERIT:
c152c796 11667 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 11668 return FALSE;
252b5132 11669 break;
9a5aca8c 11670
252b5132
RH		 11671 /* This relocation describes which C++ vtable entries are actually
11672 used. Record for later use during GC. */
11673 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 11674 BFD_ASSERT (h != NULL);
11675 if (h != NULL
11676 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 11677 return FALSE;
252b5132
RH		 11678 break;
11679 }
11680 }
f21f3fe0 11681
b34976b6 11682 return TRUE;
252b5132
RH		 11683}
11684
6a5bb875
PB		 11685/* Unwinding tables are not referenced directly. This pass marks them as
11686 required if the corresponding code section is marked. */
11687
11688static bfd_boolean
906e58ca
NC		 11689elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11690 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11691{
11692 bfd *sub;
11693 Elf_Internal_Shdr **elf_shdrp;
11694 bfd_boolean again;
11695
11696 /* Marking EH data may cause additional code sections to be marked,
11697 requiring multiple passes. */
11698 again = TRUE;
11699 while (again)
11700 {
11701 again = FALSE;
11702 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11703 {
11704 asection *o;
11705
0ffa91dd 11706 if (! is_arm_elf (sub))
6a5bb875
PB		 11707 continue;
11708
11709 elf_shdrp = elf_elfsections (sub);
11710 for (o = sub->sections; o != NULL; o = o->next)
11711 {
11712 Elf_Internal_Shdr *hdr;
0ffa91dd 11713
6a5bb875 11714 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11715 if (hdr->sh_type == SHT_ARM_EXIDX
11716 && hdr->sh_link
11717 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11718 && !o->gc_mark
11719 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11720 {
11721 again = TRUE;
11722 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11723 return FALSE;
11724 }
11725 }
11726 }
11727 }
11728
11729 return TRUE;
11730}
11731
3c9458e9
NC		 11732/* Treat mapping symbols as special target symbols. */
11733
11734static bfd_boolean
11735elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11736{
b0796911
PB		 11737 return bfd_is_arm_special_symbol_name (sym->name,
11738 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11739}
11740
0367ecfb
NC		 11741/* This is a copy of elf_find_function() from elf.c except that
11742 ARM mapping symbols are ignored when looking for function names
11743 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11744
0367ecfb
NC		 11745static bfd_boolean
11746arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11747 asection * section,
11748 asymbol ** symbols,
11749 bfd_vma offset,
11750 const char ** filename_ptr,
11751 const char ** functionname_ptr)
11752{
11753 const char * filename = NULL;
11754 asymbol * func = NULL;
11755 bfd_vma low_func = 0;
11756 asymbol ** p;
252b5132
RH		 11757
11758 for (p = symbols; *p != NULL; p++)
11759 {
11760 elf_symbol_type *q;
11761
11762 q = (elf_symbol_type *) *p;
11763
252b5132
RH		 11764 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11765 {
11766 default:
11767 break;
11768 case STT_FILE:
11769 filename = bfd_asymbol_name (&q->symbol);
11770 break;
252b5132
RH		 11771 case STT_FUNC:
11772 case STT_ARM_TFUNC:
9d2da7ca 11773 case STT_NOTYPE:
b0796911 11774 /* Skip mapping symbols. */
0367ecfb 11775 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11776 && bfd_is_arm_special_symbol_name (q->symbol.name,
11777 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11778 continue;
11779 /* Fall through. */
6b40fcba 11780 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11781 && q->symbol.value >= low_func
11782 && q->symbol.value <= offset)
11783 {
11784 func = (asymbol *) q;
11785 low_func = q->symbol.value;
11786 }
11787 break;
11788 }
11789 }
11790
11791 if (func == NULL)
b34976b6 11792 return FALSE;
252b5132 11793
0367ecfb
NC		 11794 if (filename_ptr)
11795 *filename_ptr = filename;
11796 if (functionname_ptr)
11797 *functionname_ptr = bfd_asymbol_name (func);
11798
11799 return TRUE;
906e58ca 11800}
0367ecfb
NC		 11801
11802
11803/* Find the nearest line to a particular section and offset, for error
11804 reporting. This code is a duplicate of the code in elf.c, except
11805 that it uses arm_elf_find_function. */
11806
11807static bfd_boolean
11808elf32_arm_find_nearest_line (bfd * abfd,
11809 asection * section,
11810 asymbol ** symbols,
11811 bfd_vma offset,
11812 const char ** filename_ptr,
11813 const char ** functionname_ptr,
11814 unsigned int * line_ptr)
11815{
11816 bfd_boolean found = FALSE;
11817
11818 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11819
11820 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11821 filename_ptr, functionname_ptr,
11822 line_ptr, 0,
11823 & elf_tdata (abfd)->dwarf2_find_line_info))
11824 {
11825 if (!*functionname_ptr)
11826 arm_elf_find_function (abfd, section, symbols, offset,
11827 *filename_ptr ? NULL : filename_ptr,
11828 functionname_ptr);
f21f3fe0 11829
0367ecfb
NC		 11830 return TRUE;
11831 }
11832
11833 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11834 & found, filename_ptr,
11835 functionname_ptr, line_ptr,
11836 & elf_tdata (abfd)->line_info))
11837 return FALSE;
11838
11839 if (found && (*functionname_ptr || *line_ptr))
11840 return TRUE;
11841
11842 if (symbols == NULL)
11843 return FALSE;
11844
11845 if (! arm_elf_find_function (abfd, section, symbols, offset,
11846 filename_ptr, functionname_ptr))
11847 return FALSE;
11848
11849 *line_ptr = 0;
b34976b6 11850 return TRUE;
252b5132
RH		 11851}
11852
4ab527b0
FF		 11853static bfd_boolean
11854elf32_arm_find_inliner_info (bfd * abfd,
11855 const char ** filename_ptr,
11856 const char ** functionname_ptr,
11857 unsigned int * line_ptr)
11858{
11859 bfd_boolean found;
11860 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11861 functionname_ptr, line_ptr,
11862 & elf_tdata (abfd)->dwarf2_find_line_info);
11863 return found;
11864}
11865
252b5132
RH		 11866/* Adjust a symbol defined by a dynamic object and referenced by a
11867 regular object. The current definition is in some section of the
11868 dynamic object, but we're not including those sections. We have to
11869 change the definition to something the rest of the link can
11870 understand. */
11871
b34976b6 11872static bfd_boolean
57e8b36a
NC		 11873elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11874 struct elf_link_hash_entry * h)
252b5132
RH		 11875{
11876 bfd * dynobj;
11877 asection * s;
b7693d02 11878 struct elf32_arm_link_hash_entry * eh;
67687978 11879 struct elf32_arm_link_hash_table *globals;
252b5132 11880
67687978 11881 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11882 if (globals == NULL)
11883 return FALSE;
11884
252b5132
RH		 11885 dynobj = elf_hash_table (info)->dynobj;
11886
11887 /* Make sure we know what is going on here. */
11888 BFD_ASSERT (dynobj != NULL
f5385ebf 11889 && (h->needs_plt
f6e332e6 11890 || h->u.weakdef != NULL
f5385ebf
AM		 11891 || (h->def_dynamic
11892 && h->ref_regular
11893 && !h->def_regular)));
252b5132 11894
b7693d02
DJ		 11895 eh = (struct elf32_arm_link_hash_entry *) h;
11896
252b5132
RH		 11897 /* If this is a function, put it in the procedure linkage table. We
11898 will fill in the contents of the procedure linkage table later,
11899 when we know the address of the .got section. */
0f88be7a 11900 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11901 || h->needs_plt)
252b5132 11902 {
5e681ec4
PB		 11903 if (h->plt.refcount <= 0
11904 || SYMBOL_CALLS_LOCAL (info, h)
11905 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11906 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11907 {
11908 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11909 file, but the symbol was never referred to by a dynamic
11910 object, or if all references were garbage collected. In
11911 such a case, we don't actually need to build a procedure
11912 linkage table, and we can just do a PC24 reloc instead. */
11913 h->plt.offset = (bfd_vma) -1;
b7693d02 11914 eh->plt_thumb_refcount = 0;
bd97cb95 11915 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11916 h->needs_plt = 0;
252b5132
RH		 11917 }
11918
b34976b6 11919 return TRUE;
252b5132 11920 }
5e681ec4 11921 else
b7693d02
DJ		 11922 {
11923 /* It's possible that we incorrectly decided a .plt reloc was
11924 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11925 in check_relocs. We can't decide accurately between function
11926 and non-function syms in check-relocs; Objects loaded later in
11927 the link may change h->type. So fix it now. */
11928 h->plt.offset = (bfd_vma) -1;
11929 eh->plt_thumb_refcount = 0;
bd97cb95 11930 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11931 }
252b5132
RH		 11932
11933 /* If this is a weak symbol, and there is a real definition, the
11934 processor independent code will have arranged for us to see the
11935 real definition first, and we can just use the same value. */
f6e332e6 11936 if (h->u.weakdef != NULL)
252b5132 11937 {
f6e332e6
AM		 11938 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11939 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11940 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11941 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11942 return TRUE;
252b5132
RH		 11943 }
11944
ba93b8ac
DJ		 11945 /* If there are no non-GOT references, we do not need a copy
11946 relocation. */
11947 if (!h->non_got_ref)
11948 return TRUE;
11949
252b5132
RH		 11950 /* This is a reference to a symbol defined by a dynamic object which
11951 is not a function. */
11952
11953 /* If we are creating a shared library, we must presume that the
11954 only references to the symbol are via the global offset table.
11955 For such cases we need not do anything here; the relocations will
67687978
PB		 11956 be handled correctly by relocate_section. Relocatable executables
11957 can reference data in shared objects directly, so we don't need to
11958 do anything here. */
11959 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11960 return TRUE;
252b5132 11961
909272ee
AM		 11962 if (h->size == 0)
11963 {
11964 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11965 h->root.root.string);
11966 return TRUE;
11967 }
11968
252b5132
RH		 11969 /* We must allocate the symbol in our .dynbss section, which will
11970 become part of the .bss section of the executable. There will be
11971 an entry for this symbol in the .dynsym section. The dynamic
11972 object will contain position independent code, so all references
11973 from the dynamic object to this symbol will go through the global
11974 offset table. The dynamic linker will use the .dynsym entry to
11975 determine the address it must put in the global offset table, so
11976 both the dynamic object and the regular object will refer to the
11977 same memory location for the variable. */
252b5132
RH		 11978 s = bfd_get_section_by_name (dynobj, ".dynbss");
11979 BFD_ASSERT (s != NULL);
11980
11981 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11982 copy the initial value out of the dynamic object and into the
11983 runtime process image. We need to remember the offset into the
00a97672 11984 .rel(a).bss section we are going to use. */
252b5132
RH		 11985 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11986 {
11987 asection *srel;
11988
00a97672 11989 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11990 BFD_ASSERT (srel != NULL);
00a97672 11991 srel->size += RELOC_SIZE (globals);
f5385ebf 11992 h->needs_copy = 1;
252b5132
RH		 11993 }
11994
027297b7 11995 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11996}
11997
5e681ec4
PB		 11998/* Allocate space in .plt, .got and associated reloc sections for
11999 dynamic relocs. */
12000
12001static bfd_boolean
57e8b36a 12002allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 12003{
12004 struct bfd_link_info *info;
12005 struct elf32_arm_link_hash_table *htab;
12006 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 12007 struct elf_dyn_relocs *p;
bd97cb95 12008 bfd_signed_vma thumb_refs;
5e681ec4
PB		 12009
12010 if (h->root.type == bfd_link_hash_indirect)
12011 return TRUE;
12012
12013 if (h->root.type == bfd_link_hash_warning)
12014 /* When warning symbols are created, they **replace** the "real"
12015 entry in the hash table, thus we never get to see the real
12016 symbol in a hash traversal. So look at it now. */
12017 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12018
e6a6bb22
AM		 12019 eh = (struct elf32_arm_link_hash_entry *) h;
12020
5e681ec4
PB		 12021 info = (struct bfd_link_info *) inf;
12022 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12023 if (htab == NULL)
12024 return FALSE;
5e681ec4
PB		 12025
12026 if (htab->root.dynamic_sections_created
12027 && h->plt.refcount > 0)
12028 {
12029 /* Make sure this symbol is output as a dynamic symbol.
12030 Undefined weak syms won't yet be marked as dynamic. */
12031 if (h->dynindx == -1
f5385ebf 12032 && !h->forced_local)
5e681ec4 12033 {
c152c796 12034 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12035 return FALSE;
12036 }
12037
12038 if (info->shared
7359ea65 12039 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 12040 {
362d30a1 12041 asection *s = htab->root.splt;
5e681ec4
PB		 12042
12043 /* If this is the first .plt entry, make room for the special
12044 first entry. */
eea6121a 12045 if (s->size == 0)
e5a52504 12046 s->size += htab->plt_header_size;
5e681ec4 12047
eea6121a 12048 h->plt.offset = s->size;
5e681ec4 12049
b7693d02
DJ		 12050 /* If we will insert a Thumb trampoline before this PLT, leave room
12051 for it. */
bd97cb95
DJ		 12052 thumb_refs = eh->plt_thumb_refcount;
12053 if (!htab->use_blx)
12054 thumb_refs += eh->plt_maybe_thumb_refcount;
12055
12056 if (thumb_refs > 0)
b7693d02
DJ		 12057 {
12058 h->plt.offset += PLT_THUMB_STUB_SIZE;
12059 s->size += PLT_THUMB_STUB_SIZE;
12060 }
12061
5e681ec4
PB		 12062 /* If this symbol is not defined in a regular file, and we are
12063 not generating a shared library, then set the symbol to this
12064 location in the .plt. This is required to make function
12065 pointers compare as equal between the normal executable and
12066 the shared library. */
12067 if (! info->shared
f5385ebf 12068 && !h->def_regular)
5e681ec4
PB		 12069 {
12070 h->root.u.def.section = s;
12071 h->root.u.def.value = h->plt.offset;
5e681ec4 12072
67d74e43
DJ		 12073 /* Make sure the function is not marked as Thumb, in case
12074 it is the target of an ABS32 relocation, which will
12075 point to the PLT entry. */
12076 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
12077 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
12078 }
022f8312 12079
5e681ec4 12080 /* Make room for this entry. */
e5a52504 12081 s->size += htab->plt_entry_size;
5e681ec4 12082
e5a52504 12083 if (!htab->symbian_p)
b7693d02
DJ		 12084 {
12085 /* We also need to make an entry in the .got.plt section, which
12086 will be placed in the .got section by the linker script. */
0855e32b
NS		 12087 eh->plt_got_offset = (htab->root.sgotplt->size
12088 - 8 * htab->num_tls_desc);
362d30a1 12089 htab->root.sgotplt->size += 4;
b7693d02 12090 }
5e681ec4 12091
00a97672 12092 /* We also need to make an entry in the .rel(a).plt section. */
362d30a1 12093 htab->root.srelplt->size += RELOC_SIZE (htab);
0855e32b 12094 htab->next_tls_desc_index++;
00a97672
RS		 12095
12096 /* VxWorks executables have a second set of relocations for
12097 each PLT entry. They go in a separate relocation section,
12098 which is processed by the kernel loader. */
12099 if (htab->vxworks_p && !info->shared)
12100 {
12101 /* There is a relocation for the initial PLT entry:
12102 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
12103 if (h->plt.offset == htab->plt_header_size)
12104 htab->srelplt2->size += RELOC_SIZE (htab);
12105
12106 /* There are two extra relocations for each subsequent
12107 PLT entry: an R_ARM_32 relocation for the GOT entry,
12108 and an R_ARM_32 relocation for the PLT entry. */
12109 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
12110 }
5e681ec4
PB		 12111 }
12112 else
12113 {
12114 h->plt.offset = (bfd_vma) -1;
f5385ebf 12115 h->needs_plt = 0;
5e681ec4
PB		 12116 }
12117 }
12118 else
12119 {
12120 h->plt.offset = (bfd_vma) -1;
f5385ebf 12121 h->needs_plt = 0;
5e681ec4
PB		 12122 }
12123
0855e32b
NS		 12124 eh = (struct elf32_arm_link_hash_entry *) h;
12125 eh->tlsdesc_got = (bfd_vma) -1;
12126
5e681ec4
PB		 12127 if (h->got.refcount > 0)
12128 {
12129 asection *s;
12130 bfd_boolean dyn;
ba93b8ac
DJ		 12131 int tls_type = elf32_arm_hash_entry (h)->tls_type;
12132 int indx;
5e681ec4
PB		 12133
12134 /* Make sure this symbol is output as a dynamic symbol.
12135 Undefined weak syms won't yet be marked as dynamic. */
12136 if (h->dynindx == -1
f5385ebf 12137 && !h->forced_local)
5e681ec4 12138 {
c152c796 12139 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12140 return FALSE;
12141 }
12142
e5a52504
MM		 12143 if (!htab->symbian_p)
12144 {
362d30a1 12145 s = htab->root.sgot;
e5a52504 12146 h->got.offset = s->size;
ba93b8ac
DJ		 12147
12148 if (tls_type == GOT_UNKNOWN)
12149 abort ();
12150
12151 if (tls_type == GOT_NORMAL)
12152 /* Non-TLS symbols need one GOT slot. */
12153 s->size += 4;
12154 else
12155 {
0855e32b
NS		 12156 if (tls_type & GOT_TLS_GDESC)
12157 {
12158 /* R_ARM_TLS_DESC needs 2 GOT slots. */
12159 eh->tlsdesc_got
12160 = (htab->root.sgotplt->size
12161 - elf32_arm_compute_jump_table_size (htab));
12162 htab->root.sgotplt->size += 8;
12163 h->got.offset = (bfd_vma) -2;
12164 /* plt_got_offset needs to know there's a TLS_DESC
12165 reloc in the middle of .got.plt. */
12166 htab->num_tls_desc++;
12167 }
12168
ba93b8ac 12169 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 12170 {
12171 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
12172 the symbol is both GD and GDESC, got.offset may
12173 have been overwritten. */
12174 h->got.offset = s->size;
12175 s->size += 8;
12176 }
12177
ba93b8ac
DJ		 12178 if (tls_type & GOT_TLS_IE)
12179 /* R_ARM_TLS_IE32 needs one GOT slot. */
12180 s->size += 4;
12181 }
12182
e5a52504 12183 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 12184
12185 indx = 0;
12186 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
12187 && (!info->shared
12188 || !SYMBOL_REFERENCES_LOCAL (info, h)))
12189 indx = h->dynindx;
12190
12191 if (tls_type != GOT_NORMAL
12192 && (info->shared || indx != 0)
12193 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
12194 || h->root.type != bfd_link_hash_undefweak))
12195 {
12196 if (tls_type & GOT_TLS_IE)
362d30a1 12197 htab->root.srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 12198
12199 if (tls_type & GOT_TLS_GD)
362d30a1 12200 htab->root.srelgot->size += RELOC_SIZE (htab);
ba93b8ac 12201
0855e32b
NS		 12202 if (tls_type & GOT_TLS_GDESC)
12203 {
12204 htab->root.srelplt->size += RELOC_SIZE (htab);
12205 /* GDESC needs a trampoline to jump to. */
12206 htab->tls_trampoline = -1;
12207 }
12208
12209 /* Only GD needs it. GDESC just emits one relocation per
12210 2 entries. */
12211 if ((tls_type & GOT_TLS_GD) && indx != 0)
12212 htab->root.srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 12213 }
12214 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
12215 || h->root.type != bfd_link_hash_undefweak)
12216 && (info->shared
12217 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
362d30a1 12218 htab->root.srelgot->size += RELOC_SIZE (htab);
e5a52504 12219 }
5e681ec4
PB		 12220 }
12221 else
12222 h->got.offset = (bfd_vma) -1;
12223
a4fd1a8e
PB		 12224 /* Allocate stubs for exported Thumb functions on v4t. */
12225 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 12226 && h->def_regular
a4fd1a8e
PB		 12227 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
12228 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
12229 {
12230 struct elf_link_hash_entry * th;
12231 struct bfd_link_hash_entry * bh;
12232 struct elf_link_hash_entry * myh;
12233 char name[1024];
12234 asection *s;
12235 bh = NULL;
12236 /* Create a new symbol to regist the real location of the function. */
12237 s = h->root.u.def.section;
906e58ca 12238 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 12239 _bfd_generic_link_add_one_symbol (info, s->owner,
12240 name, BSF_GLOBAL, s,
12241 h->root.u.def.value,
12242 NULL, TRUE, FALSE, &bh);
12243
12244 myh = (struct elf_link_hash_entry *) bh;
12245 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
12246 myh->forced_local = 1;
12247 eh->export_glue = myh;
12248 th = record_arm_to_thumb_glue (info, h);
12249 /* Point the symbol at the stub. */
12250 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
12251 h->root.u.def.section = th->root.u.def.section;
12252 h->root.u.def.value = th->root.u.def.value & ~1;
12253 }
12254
0bdcacaf 12255 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 12256 return TRUE;
12257
12258 /* In the shared -Bsymbolic case, discard space allocated for
12259 dynamic pc-relative relocs against symbols which turn out to be
12260 defined in regular objects. For the normal shared case, discard
12261 space for pc-relative relocs that have become local due to symbol
12262 visibility changes. */
12263
67687978 12264 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 12265 {
7bdca076 12266 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 12267 R_ARM_REL32_NOI, which will appear on something like
12268 ".long foo - .". We want calls to protected symbols to resolve
12269 directly to the function rather than going via the plt. If people
12270 want function pointer comparisons to work as expected then they
12271 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 12272 if (SYMBOL_CALLS_LOCAL (info, h))
12273 {
0bdcacaf 12274 struct elf_dyn_relocs **pp;
ba93b8ac 12275
0bdcacaf 12276 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 12277 {
12278 p->count -= p->pc_count;
12279 p->pc_count = 0;
12280 if (p->count == 0)
12281 *pp = p->next;
12282 else
12283 pp = &p->next;
12284 }
12285 }
12286
4dfe6ac6 12287 if (htab->vxworks_p)
3348747a 12288 {
0bdcacaf 12289 struct elf_dyn_relocs **pp;
3348747a 12290
0bdcacaf 12291 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 12292 {
0bdcacaf 12293 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 12294 *pp = p->next;
12295 else
12296 pp = &p->next;
12297 }
12298 }
12299
ba93b8ac 12300 /* Also discard relocs on undefined weak syms with non-default
7359ea65 12301 visibility. */
0bdcacaf 12302 if (eh->dyn_relocs != NULL
5e681ec4 12303 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 12304 {
12305 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 12306 eh->dyn_relocs = NULL;
22d606e9
AM		 12307
12308 /* Make sure undefined weak symbols are output as a dynamic
12309 symbol in PIEs. */
12310 else if (h->dynindx == -1
12311 && !h->forced_local)
12312 {
12313 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12314 return FALSE;
12315 }
12316 }
12317
67687978
PB		 12318 else if (htab->root.is_relocatable_executable && h->dynindx == -1
12319 && h->root.type == bfd_link_hash_new)
12320 {
12321 /* Output absolute symbols so that we can create relocations
12322 against them. For normal symbols we output a relocation
12323 against the section that contains them. */
12324 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12325 return FALSE;
12326 }
12327
5e681ec4
PB		 12328 }
12329 else
12330 {
12331 /* For the non-shared case, discard space for relocs against
12332 symbols which turn out to need copy relocs or are not
12333 dynamic. */
12334
f5385ebf
AM		 12335 if (!h->non_got_ref
12336 && ((h->def_dynamic
12337 && !h->def_regular)
5e681ec4
PB		 12338 || (htab->root.dynamic_sections_created
12339 && (h->root.type == bfd_link_hash_undefweak
12340 || h->root.type == bfd_link_hash_undefined))))
12341 {
12342 /* Make sure this symbol is output as a dynamic symbol.
12343 Undefined weak syms won't yet be marked as dynamic. */
12344 if (h->dynindx == -1
f5385ebf 12345 && !h->forced_local)
5e681ec4 12346 {
c152c796 12347 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12348 return FALSE;
12349 }
12350
12351 /* If that succeeded, we know we'll be keeping all the
12352 relocs. */
12353 if (h->dynindx != -1)
12354 goto keep;
12355 }
12356
0bdcacaf 12357 eh->dyn_relocs = NULL;
5e681ec4
PB		 12358
12359 keep: ;
12360 }
12361
12362 /* Finally, allocate space. */
0bdcacaf 12363 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 12364 {
0bdcacaf 12365 asection *sreloc = elf_section_data (p->sec)->sreloc;
00a97672 12366 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 12367 }
12368
12369 return TRUE;
12370}
12371
08d1f311
DJ		 12372/* Find any dynamic relocs that apply to read-only sections. */
12373
12374static bfd_boolean
8029a119 12375elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 12376{
8029a119 12377 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 12378 struct elf_dyn_relocs * p;
08d1f311
DJ		 12379
12380 if (h->root.type == bfd_link_hash_warning)
12381 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12382
12383 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 12384 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 12385 {
0bdcacaf 12386 asection *s = p->sec;
08d1f311
DJ		 12387
12388 if (s != NULL && (s->flags & SEC_READONLY) != 0)
12389 {
12390 struct bfd_link_info *info = (struct bfd_link_info *) inf;
12391
12392 info->flags |= DF_TEXTREL;
12393
12394 /* Not an error, just cut short the traversal. */
12395 return FALSE;
12396 }
12397 }
12398 return TRUE;
12399}
12400
d504ffc8
DJ		 12401void
12402bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
12403 int byteswap_code)
12404{
12405 struct elf32_arm_link_hash_table *globals;
12406
12407 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12408 if (globals == NULL)
12409 return;
12410
d504ffc8
DJ		 12411 globals->byteswap_code = byteswap_code;
12412}
12413
252b5132
RH		 12414/* Set the sizes of the dynamic sections. */
12415
b34976b6 12416static bfd_boolean
57e8b36a
NC		 12417elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
12418 struct bfd_link_info * info)
252b5132
RH		 12419{
12420 bfd * dynobj;
12421 asection * s;
b34976b6
AM		 12422 bfd_boolean plt;
12423 bfd_boolean relocs;
5e681ec4
PB		 12424 bfd *ibfd;
12425 struct elf32_arm_link_hash_table *htab;
252b5132 12426
5e681ec4 12427 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12428 if (htab == NULL)
12429 return FALSE;
12430
252b5132
RH		 12431 dynobj = elf_hash_table (info)->dynobj;
12432 BFD_ASSERT (dynobj != NULL);
39b41c9c 12433 check_use_blx (htab);
252b5132
RH		 12434
12435 if (elf_hash_table (info)->dynamic_sections_created)
12436 {
12437 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 12438 if (info->executable)
252b5132
RH		 12439 {
12440 s = bfd_get_section_by_name (dynobj, ".interp");
12441 BFD_ASSERT (s != NULL);
eea6121a 12442 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 12443 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
12444 }
12445 }
5e681ec4
PB		 12446
12447 /* Set up .got offsets for local syms, and space for local dynamic
12448 relocs. */
12449 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 12450 {
5e681ec4
PB		 12451 bfd_signed_vma *local_got;
12452 bfd_signed_vma *end_local_got;
12453 char *local_tls_type;
0855e32b 12454 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 12455 bfd_size_type locsymcount;
12456 Elf_Internal_Shdr *symtab_hdr;
12457 asection *srel;
4dfe6ac6 12458 bfd_boolean is_vxworks = htab->vxworks_p;
5e681ec4 12459
0ffa91dd 12460 if (! is_arm_elf (ibfd))
5e681ec4
PB		 12461 continue;
12462
12463 for (s = ibfd->sections; s != NULL; s = s->next)
12464 {
0bdcacaf 12465 struct elf_dyn_relocs *p;
5e681ec4 12466
0bdcacaf 12467 for (p = (struct elf_dyn_relocs *)
21d799b5 12468 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 12469 {
0bdcacaf
RS		 12470 if (!bfd_is_abs_section (p->sec)
12471 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 12472 {
12473 /* Input section has been discarded, either because
12474 it is a copy of a linkonce section or due to
12475 linker script /DISCARD/, so we'll be discarding
12476 the relocs too. */
12477 }
3348747a 12478 else if (is_vxworks
0bdcacaf 12479 && strcmp (p->sec->output_section->name,
3348747a
NS		 12480 ".tls_vars") == 0)
12481 {
12482 /* Relocations in vxworks .tls_vars sections are
12483 handled specially by the loader. */
12484 }
5e681ec4
PB		 12485 else if (p->count != 0)
12486 {
0bdcacaf 12487 srel = elf_section_data (p->sec)->sreloc;
00a97672 12488 srel->size += p->count * RELOC_SIZE (htab);
0bdcacaf 12489 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 12490 info->flags |= DF_TEXTREL;
12491 }
12492 }
12493 }
12494
12495 local_got = elf_local_got_refcounts (ibfd);
12496 if (!local_got)
12497 continue;
12498
0ffa91dd 12499 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 12500 locsymcount = symtab_hdr->sh_info;
12501 end_local_got = local_got + locsymcount;
ba93b8ac 12502 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 12503 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
362d30a1
RS		 12504 s = htab->root.sgot;
12505 srel = htab->root.srelgot;
0855e32b
NS		 12506 for (; local_got < end_local_got;
12507 ++local_got, ++local_tls_type, ++local_tlsdesc_gotent)
5e681ec4 12508 {
0855e32b 12509 *local_tlsdesc_gotent = (bfd_vma) -1;
5e681ec4
PB		 12510 if (*local_got > 0)
12511 {
eea6121a 12512 *local_got = s->size;
ba93b8ac
DJ		 12513 if (*local_tls_type & GOT_TLS_GD)
12514 /* TLS_GD relocs need an 8-byte structure in the GOT. */
12515 s->size += 8;
0855e32b
NS		 12516 if (*local_tls_type & GOT_TLS_GDESC)
12517 {
12518 *local_tlsdesc_gotent = htab->root.sgotplt->size
12519 - elf32_arm_compute_jump_table_size (htab);
12520 htab->root.sgotplt->size += 8;
12521 *local_got = (bfd_vma) -2;
12522 /* plt_got_offset needs to know there's a TLS_DESC
12523 reloc in the middle of .got.plt. */
12524 htab->num_tls_desc++;
12525 }
ba93b8ac
DJ		 12526 if (*local_tls_type & GOT_TLS_IE)
12527 s->size += 4;
ba93b8ac 12528
0855e32b
NS		 12529 if (*local_tls_type & GOT_NORMAL)
12530 {
12531 /* If the symbol is both GD and GDESC, *local_got
12532 may have been overwritten. */
12533 *local_got = s->size;
12534 s->size += 4;
12535 }
12536
12537 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
12538 || *local_tls_type & GOT_TLS_GD)
00a97672 12539 srel->size += RELOC_SIZE (htab);
0855e32b
NS		 12540
12541 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
12542 {
12543 htab->root.srelplt->size += RELOC_SIZE (htab);
12544 htab->tls_trampoline = -1;
12545 }
5e681ec4
PB		 12546 }
12547 else
12548 *local_got = (bfd_vma) -1;
12549 }
252b5132
RH		 12550 }
12551
ba93b8ac
DJ		 12552 if (htab->tls_ldm_got.refcount > 0)
12553 {
12554 /* Allocate two GOT entries and one dynamic relocation (if necessary)
12555 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 12556 htab->tls_ldm_got.offset = htab->root.sgot->size;
12557 htab->root.sgot->size += 8;
ba93b8ac 12558 if (info->shared)
362d30a1 12559 htab->root.srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 12560 }
12561 else
12562 htab->tls_ldm_got.offset = -1;
12563
5e681ec4
PB		 12564 /* Allocate global sym .plt and .got entries, and space for global
12565 sym dynamic relocs. */
57e8b36a 12566 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 12567
d504ffc8
DJ		 12568 /* Here we rummage through the found bfds to collect glue information. */
12569 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 12570 {
0ffa91dd 12571 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 12572 continue;
12573
c7b8f16e
JB		 12574 /* Initialise mapping tables for code/data. */
12575 bfd_elf32_arm_init_maps (ibfd);
906e58ca 12576
c7b8f16e
JB		 12577 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
12578 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
12579 /* xgettext:c-format */
12580 _bfd_error_handler (_("Errors encountered processing file %s"),
12581 ibfd->filename);
12582 }
d504ffc8 12583
3e6b1042
DJ		 12584 /* Allocate space for the glue sections now that we've sized them. */
12585 bfd_elf32_arm_allocate_interworking_sections (info);
12586
0855e32b
NS		 12587 /* For every jump slot reserved in the sgotplt, reloc_count is
12588 incremented. However, when we reserve space for TLS descriptors,
12589 it's not incremented, so in order to compute the space reserved
12590 for them, it suffices to multiply the reloc count by the jump
12591 slot size. */
12592 if (htab->root.srelplt)
12593 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
12594
12595 if (htab->tls_trampoline)
12596 {
12597 if (htab->root.splt->size == 0)
12598 htab->root.splt->size += htab->plt_header_size;
12599
12600 htab->tls_trampoline = htab->root.splt->size;
12601 htab->root.splt->size += htab->plt_entry_size;
12602
12603 /* If we're not using lazy TLS relocations, don't generate the
12604 PLT and GOT entries they require. */
12605 if (!(info->flags & DF_BIND_NOW))
12606 {
12607 htab->dt_tlsdesc_got = htab->root.sgot->size;
12608 htab->root.sgot->size += 4;
12609
12610 htab->dt_tlsdesc_plt = htab->root.splt->size;
12611 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
12612 }
12613 }
12614
252b5132
RH		 12615 /* The check_relocs and adjust_dynamic_symbol entry points have
12616 determined the sizes of the various dynamic sections. Allocate
12617 memory for them. */
b34976b6
AM		 12618 plt = FALSE;
12619 relocs = FALSE;
252b5132
RH		 12620 for (s = dynobj->sections; s != NULL; s = s->next)
12621 {
12622 const char * name;
252b5132
RH		 12623
12624 if ((s->flags & SEC_LINKER_CREATED) == 0)
12625 continue;
12626
12627 /* It's OK to base decisions on the section name, because none
12628 of the dynobj section names depend upon the input files. */
12629 name = bfd_get_section_name (dynobj, s);
12630
24a1ba0f 12631 if (strcmp (name, ".plt") == 0)
252b5132 12632 {
c456f082
AM		 12633 /* Remember whether there is a PLT. */
12634 plt = s->size != 0;
252b5132 12635 }
0112cd26 12636 else if (CONST_STRNEQ (name, ".rel"))
252b5132 12637 {
c456f082 12638 if (s->size != 0)
252b5132 12639 {
252b5132 12640 /* Remember whether there are any reloc sections other
00a97672 12641 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 12642 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 12643 relocs = TRUE;
252b5132
RH		 12644
12645 /* We use the reloc_count field as a counter if we need
12646 to copy relocs into the output file. */
12647 s->reloc_count = 0;
12648 }
12649 }
0112cd26 12650 else if (! CONST_STRNEQ (name, ".got")
c456f082 12651 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 12652 {
12653 /* It's not one of our sections, so don't allocate space. */
12654 continue;
12655 }
12656
c456f082 12657 if (s->size == 0)
252b5132 12658 {
c456f082 12659 /* If we don't need this section, strip it from the
00a97672
RS		 12660 output file. This is mostly to handle .rel(a).bss and
12661 .rel(a).plt. We must create both sections in
c456f082
AM		 12662 create_dynamic_sections, because they must be created
12663 before the linker maps input sections to output
12664 sections. The linker does that before
12665 adjust_dynamic_symbol is called, and it is that
12666 function which decides whether anything needs to go
12667 into these sections. */
8423293d 12668 s->flags |= SEC_EXCLUDE;
252b5132
RH		 12669 continue;
12670 }
12671
c456f082
AM		 12672 if ((s->flags & SEC_HAS_CONTENTS) == 0)
12673 continue;
12674
252b5132 12675 /* Allocate memory for the section contents. */
21d799b5 12676 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 12677 if (s->contents == NULL)
b34976b6 12678 return FALSE;
252b5132
RH		 12679 }
12680
12681 if (elf_hash_table (info)->dynamic_sections_created)
12682 {
12683 /* Add some entries to the .dynamic section. We fill in the
12684 values later, in elf32_arm_finish_dynamic_sections, but we
12685 must add the entries now so that we get the correct size for
12686 the .dynamic section. The DT_DEBUG entry is filled in by the
12687 dynamic linker and used by the debugger. */
dc810e39 12688#define add_dynamic_entry(TAG, VAL) \
5a580b3a 12689 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 12690
8532796c 12691 if (info->executable)
252b5132 12692 {
dc810e39 12693 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 12694 return FALSE;
252b5132
RH		 12695 }
12696
12697 if (plt)
12698 {
dc810e39
AM		 12699 if ( !add_dynamic_entry (DT_PLTGOT, 0)
12700 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 12701 || !add_dynamic_entry (DT_PLTREL,
12702 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 12703 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 12704 return FALSE;
0855e32b
NS		 12705
12706 if (htab->dt_tlsdesc_plt &&
12707 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
12708 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
12709 return FALSE;
252b5132
RH		 12710 }
12711
12712 if (relocs)
12713 {
00a97672
RS		 12714 if (htab->use_rel)
12715 {
12716 if (!add_dynamic_entry (DT_REL, 0)
12717 || !add_dynamic_entry (DT_RELSZ, 0)
12718 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
12719 return FALSE;
12720 }
12721 else
12722 {
12723 if (!add_dynamic_entry (DT_RELA, 0)
12724 || !add_dynamic_entry (DT_RELASZ, 0)
12725 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12726 return FALSE;
12727 }
252b5132
RH		 12728 }
12729
08d1f311
DJ		 12730 /* If any dynamic relocs apply to a read-only section,
12731 then we need a DT_TEXTREL entry. */
12732 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 12733 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12734 info);
08d1f311 12735
99e4ae17 12736 if ((info->flags & DF_TEXTREL) != 0)
252b5132 12737 {
dc810e39 12738 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 12739 return FALSE;
252b5132 12740 }
7a2b07ff
NS		 12741 if (htab->vxworks_p
12742 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12743 return FALSE;
252b5132 12744 }
8532796c 12745#undef add_dynamic_entry
252b5132 12746
b34976b6 12747 return TRUE;
252b5132
RH		 12748}
12749
0855e32b
NS		 12750/* Size sections even though they're not dynamic. We use it to setup
12751 _TLS_MODULE_BASE_, if needed. */
12752
12753static bfd_boolean
12754elf32_arm_always_size_sections (bfd *output_bfd,
12755 struct bfd_link_info *info)
12756{
12757 asection *tls_sec;
12758
12759 if (info->relocatable)
12760 return TRUE;
12761
12762 tls_sec = elf_hash_table (info)->tls_sec;
12763
12764 if (tls_sec)
12765 {
12766 struct elf_link_hash_entry *tlsbase;
12767
12768 tlsbase = elf_link_hash_lookup
12769 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
12770
12771 if (tlsbase)
12772 {
12773 struct bfd_link_hash_entry *bh = NULL;
12774 const struct elf_backend_data *bed
12775 = get_elf_backend_data (output_bfd);
12776
12777 if (!(_bfd_generic_link_add_one_symbol
12778 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
12779 tls_sec, 0, NULL, FALSE,
12780 bed->collect, &bh)))
12781 return FALSE;
12782
12783 tlsbase->type = STT_TLS;
12784 tlsbase = (struct elf_link_hash_entry *)bh;
12785 tlsbase->def_regular = 1;
12786 tlsbase->other = STV_HIDDEN;
12787 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
12788 }
12789 }
12790 return TRUE;
12791}
12792
252b5132
RH		 12793/* Finish up dynamic symbol handling. We set the contents of various
12794 dynamic sections here. */
12795
b34976b6 12796static bfd_boolean
906e58ca
NC		 12797elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12798 struct bfd_link_info * info,
12799 struct elf_link_hash_entry * h,
12800 Elf_Internal_Sym * sym)
252b5132 12801{
e5a52504 12802 struct elf32_arm_link_hash_table *htab;
b7693d02 12803 struct elf32_arm_link_hash_entry *eh;
252b5132 12804
e5a52504 12805 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12806 if (htab == NULL)
12807 return FALSE;
12808
b7693d02 12809 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 12810
12811 if (h->plt.offset != (bfd_vma) -1)
12812 {
12813 asection * splt;
252b5132 12814 asection * srel;
e5a52504 12815 bfd_byte *loc;
24a1ba0f 12816 bfd_vma plt_index;
947216bf 12817 Elf_Internal_Rela rel;
252b5132
RH		 12818
12819 /* This symbol has an entry in the procedure linkage table. Set
12820 it up. */
12821
12822 BFD_ASSERT (h->dynindx != -1);
12823
362d30a1
RS		 12824 splt = htab->root.splt;
12825 srel = htab->root.srelplt;
e5a52504 12826 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 12827
e5a52504
MM		 12828 /* Fill in the entry in the procedure linkage table. */
12829 if (htab->symbian_p)
12830 {
906e58ca 12831 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12832 elf32_arm_symbian_plt_entry[0],
12833 splt->contents + h->plt.offset);
906e58ca 12834 bfd_put_32 (output_bfd,
52ab56c2
PB		 12835 elf32_arm_symbian_plt_entry[1],
12836 splt->contents + h->plt.offset + 4);
906e58ca 12837
e5a52504 12838 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12839 rel.r_offset = (splt->output_section->vma
12840 + splt->output_offset
52ab56c2 12841 + h->plt.offset + 4);
e5a52504 12842 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12843
12844 /* Get the index in the procedure linkage table which
12845 corresponds to this symbol. This is the index of this symbol
12846 in all the symbols for which we are making plt entries. The
12847 first entry in the procedure linkage table is reserved. */
906e58ca 12848 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12849 / htab->plt_entry_size);
e5a52504
MM		 12850 }
12851 else
12852 {
00a97672 12853 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12854 bfd_vma got_displacement;
12855 asection * sgot;
52ab56c2 12856 bfd_byte * ptr;
906e58ca 12857
362d30a1 12858 sgot = htab->root.sgotplt;
e5a52504
MM		 12859 BFD_ASSERT (sgot != NULL);
12860
b7693d02
DJ		 12861 /* Get the offset into the .got.plt table of the entry that
12862 corresponds to this function. */
12863 got_offset = eh->plt_got_offset;
12864
12865 /* Get the index in the procedure linkage table which
12866 corresponds to this symbol. This is the index of this symbol
12867 in all the symbols for which we are making plt entries. The
12868 first three entries in .got.plt are reserved; after that
12869 symbols appear in the same order as in .plt. */
12870 plt_index = (got_offset - 12) / 4;
e5a52504 12871
00a97672
RS		 12872 /* Calculate the address of the GOT entry. */
12873 got_address = (sgot->output_section->vma
12874 + sgot->output_offset
12875 + got_offset);
5e681ec4 12876
00a97672
RS		 12877 /* ...and the address of the PLT entry. */
12878 plt_address = (splt->output_section->vma
12879 + splt->output_offset
12880 + h->plt.offset);
5e681ec4 12881
362d30a1 12882 ptr = splt->contents + h->plt.offset;
00a97672
RS		 12883 if (htab->vxworks_p && info->shared)
12884 {
12885 unsigned int i;
12886 bfd_vma val;
12887
52ab56c2 12888 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12889 {
12890 val = elf32_arm_vxworks_shared_plt_entry[i];
12891 if (i == 2)
12892 val |= got_address - sgot->output_section->vma;
12893 if (i == 5)
12894 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12895 if (i == 2 || i == 5)
12896 bfd_put_32 (output_bfd, val, ptr);
12897 else
12898 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12899 }
12900 }
12901 else if (htab->vxworks_p)
b7693d02 12902 {
00a97672
RS		 12903 unsigned int i;
12904 bfd_vma val;
12905
d3753b85 12906 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12907 {
12908 val = elf32_arm_vxworks_exec_plt_entry[i];
12909 if (i == 2)
12910 val |= got_address;
12911 if (i == 4)
12912 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12913 if (i == 5)
12914 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12915 if (i == 2 || i == 5)
12916 bfd_put_32 (output_bfd, val, ptr);
12917 else
12918 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12919 }
12920
12921 loc = (htab->srelplt2->contents
12922 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12923
12924 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12925 referencing the GOT for this PLT entry. */
12926 rel.r_offset = plt_address + 8;
12927 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12928 rel.r_addend = got_offset;
12929 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12930 loc += RELOC_SIZE (htab);
12931
12932 /* Create the R_ARM_ABS32 relocation referencing the
12933 beginning of the PLT for this GOT entry. */
12934 rel.r_offset = got_address;
12935 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12936 rel.r_addend = 0;
12937 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12938 }
00a97672
RS		 12939 else
12940 {
bd97cb95 12941 bfd_signed_vma thumb_refs;
00a97672
RS		 12942 /* Calculate the displacement between the PLT slot and the
12943 entry in the GOT. The eight-byte offset accounts for the
12944 value produced by adding to pc in the first instruction
12945 of the PLT stub. */
12946 got_displacement = got_address - (plt_address + 8);
b7693d02 12947
00a97672
RS		 12948 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12949
bd97cb95
DJ		 12950 thumb_refs = eh->plt_thumb_refcount;
12951 if (!htab->use_blx)
12952 thumb_refs += eh->plt_maybe_thumb_refcount;
12953
12954 if (thumb_refs > 0)
00a97672 12955 {
52ab56c2
PB		 12956 put_thumb_insn (htab, output_bfd,
12957 elf32_arm_plt_thumb_stub[0], ptr - 4);
12958 put_thumb_insn (htab, output_bfd,
12959 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12960 }
12961
52ab56c2
PB		 12962 put_arm_insn (htab, output_bfd,
12963 elf32_arm_plt_entry[0]
12964 | ((got_displacement & 0x0ff00000) >> 20),
12965 ptr + 0);
12966 put_arm_insn (htab, output_bfd,
12967 elf32_arm_plt_entry[1]
12968 | ((got_displacement & 0x000ff000) >> 12),
12969 ptr+ 4);
12970 put_arm_insn (htab, output_bfd,
12971 elf32_arm_plt_entry[2]
12972 | (got_displacement & 0x00000fff),
12973 ptr + 8);
5e681ec4 12974#ifdef FOUR_WORD_PLT
52ab56c2 12975 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12976#endif
00a97672 12977 }
252b5132 12978
e5a52504
MM		 12979 /* Fill in the entry in the global offset table. */
12980 bfd_put_32 (output_bfd,
12981 (splt->output_section->vma
12982 + splt->output_offset),
12983 sgot->contents + got_offset);
906e58ca 12984
00a97672
RS		 12985 /* Fill in the entry in the .rel(a).plt section. */
12986 rel.r_addend = 0;
12987 rel.r_offset = got_address;
e5a52504
MM		 12988 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12989 }
57e8b36a 12990
00a97672
RS		 12991 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12992 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12993
f5385ebf 12994 if (!h->def_regular)
252b5132
RH		 12995 {
12996 /* Mark the symbol as undefined, rather than as defined in
12997 the .plt section. Leave the value alone. */
12998 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12999 /* If the symbol is weak, we do need to clear the value.
13000 Otherwise, the PLT entry would provide a definition for
13001 the symbol even if the symbol wasn't defined anywhere,
13002 and so the symbol would never be NULL. */
f5385ebf 13003 if (!h->ref_regular_nonweak)
d982ba73 13004 sym->st_value = 0;
252b5132
RH		 13005 }
13006 }
13007
ba93b8ac 13008 if (h->got.offset != (bfd_vma) -1
0855e32b 13009 && (! GOT_TLS_GD_ANY_P (elf32_arm_hash_entry (h)->tls_type))
ba93b8ac 13010 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 13011 {
13012 asection * sgot;
13013 asection * srel;
947216bf
AM		 13014 Elf_Internal_Rela rel;
13015 bfd_byte *loc;
00a97672 13016 bfd_vma offset;
252b5132
RH		 13017
13018 /* This symbol has an entry in the global offset table. Set it
13019 up. */
362d30a1
RS		 13020 sgot = htab->root.sgot;
13021 srel = htab->root.srelgot;
252b5132
RH		 13022 BFD_ASSERT (sgot != NULL && srel != NULL);
13023
00a97672
RS		 13024 offset = (h->got.offset & ~(bfd_vma) 1);
13025 rel.r_addend = 0;
252b5132
RH		 13026 rel.r_offset = (sgot->output_section->vma
13027 + sgot->output_offset
00a97672 13028 + offset);
252b5132 13029
5e681ec4
PB		 13030 /* If this is a static link, or it is a -Bsymbolic link and the
13031 symbol is defined locally or was forced to be local because
13032 of a version file, we just want to emit a RELATIVE reloc.
13033 The entry in the global offset table will already have been
13034 initialized in the relocate_section function. */
252b5132 13035 if (info->shared
5e681ec4
PB		 13036 && SYMBOL_REFERENCES_LOCAL (info, h))
13037 {
906e58ca 13038 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 13039 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 13040 if (!htab->use_rel)
13041 {
13042 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
13043 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
13044 }
5e681ec4 13045 }
252b5132
RH		 13046 else
13047 {
906e58ca 13048 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 13049 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 13050 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
13051 }
13052
00a97672
RS		 13053 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
13054 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 13055 }
13056
f5385ebf 13057 if (h->needs_copy)
252b5132
RH		 13058 {
13059 asection * s;
947216bf
AM		 13060 Elf_Internal_Rela rel;
13061 bfd_byte *loc;
252b5132
RH		 13062
13063 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 13064 BFD_ASSERT (h->dynindx != -1
13065 && (h->root.type == bfd_link_hash_defined
13066 || h->root.type == bfd_link_hash_defweak));
13067
362d30a1 13068 s = htab->srelbss;
252b5132
RH		 13069 BFD_ASSERT (s != NULL);
13070
00a97672 13071 rel.r_addend = 0;
252b5132
RH		 13072 rel.r_offset = (h->root.u.def.value
13073 + h->root.u.def.section->output_section->vma
13074 + h->root.u.def.section->output_offset);
13075 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 13076 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
13077 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 13078 }
13079
00a97672
RS		 13080 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13081 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13082 to the ".got" section. */
252b5132 13083 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 13084 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 13085 sym->st_shndx = SHN_ABS;
13086
b34976b6 13087 return TRUE;
252b5132
RH		 13088}
13089
0855e32b
NS		 13090static void
13091arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13092 void *contents,
13093 const unsigned long *template, unsigned count)
13094{
13095 unsigned ix;
13096
13097 for (ix = 0; ix != count; ix++)
13098 {
13099 unsigned long insn = template[ix];
13100
13101 /* Emit mov pc,rx if bx is not permitted. */
13102 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
13103 insn = (insn & 0xf000000f) | 0x01a0f000;
13104 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
13105 }
13106}
13107
252b5132
RH		 13108/* Finish up the dynamic sections. */
13109
b34976b6 13110static bfd_boolean
57e8b36a 13111elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 13112{
13113 bfd * dynobj;
13114 asection * sgot;
13115 asection * sdyn;
4dfe6ac6
NC		 13116 struct elf32_arm_link_hash_table *htab;
13117
13118 htab = elf32_arm_hash_table (info);
13119 if (htab == NULL)
13120 return FALSE;
252b5132
RH		 13121
13122 dynobj = elf_hash_table (info)->dynobj;
13123
362d30a1 13124 sgot = htab->root.sgotplt;
4dfe6ac6 13125 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 13126 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
13127
13128 if (elf_hash_table (info)->dynamic_sections_created)
13129 {
13130 asection *splt;
13131 Elf32_External_Dyn *dyncon, *dynconend;
13132
362d30a1 13133 splt = htab->root.splt;
24a1ba0f 13134 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 13135
13136 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 13137 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 13138
252b5132
RH		 13139 for (; dyncon < dynconend; dyncon++)
13140 {
13141 Elf_Internal_Dyn dyn;
13142 const char * name;
13143 asection * s;
13144
13145 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
13146
13147 switch (dyn.d_tag)
13148 {
229fcec5
MM		 13149 unsigned int type;
13150
252b5132 13151 default:
7a2b07ff
NS		 13152 if (htab->vxworks_p
13153 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
13154 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 13155 break;
13156
229fcec5
MM		 13157 case DT_HASH:
13158 name = ".hash";
13159 goto get_vma_if_bpabi;
13160 case DT_STRTAB:
13161 name = ".dynstr";
13162 goto get_vma_if_bpabi;
13163 case DT_SYMTAB:
13164 name = ".dynsym";
13165 goto get_vma_if_bpabi;
c0042f5d
MM		 13166 case DT_VERSYM:
13167 name = ".gnu.version";
13168 goto get_vma_if_bpabi;
13169 case DT_VERDEF:
13170 name = ".gnu.version_d";
13171 goto get_vma_if_bpabi;
13172 case DT_VERNEED:
13173 name = ".gnu.version_r";
13174 goto get_vma_if_bpabi;
13175
252b5132
RH		 13176 case DT_PLTGOT:
13177 name = ".got";
13178 goto get_vma;
13179 case DT_JMPREL:
00a97672 13180 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 13181 get_vma:
13182 s = bfd_get_section_by_name (output_bfd, name);
13183 BFD_ASSERT (s != NULL);
229fcec5
MM		 13184 if (!htab->symbian_p)
13185 dyn.d_un.d_ptr = s->vma;
13186 else
13187 /* In the BPABI, tags in the PT_DYNAMIC section point
13188 at the file offset, not the memory address, for the
13189 convenience of the post linker. */
13190 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 13191 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13192 break;
13193
229fcec5
MM		 13194 get_vma_if_bpabi:
13195 if (htab->symbian_p)
13196 goto get_vma;
13197 break;
13198
252b5132 13199 case DT_PLTRELSZ:
362d30a1 13200 s = htab->root.srelplt;
252b5132 13201 BFD_ASSERT (s != NULL);
eea6121a 13202 dyn.d_un.d_val = s->size;
252b5132
RH		 13203 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13204 break;
906e58ca 13205
252b5132 13206 case DT_RELSZ:
00a97672 13207 case DT_RELASZ:
229fcec5
MM		 13208 if (!htab->symbian_p)
13209 {
13210 /* My reading of the SVR4 ABI indicates that the
13211 procedure linkage table relocs (DT_JMPREL) should be
13212 included in the overall relocs (DT_REL). This is
13213 what Solaris does. However, UnixWare can not handle
13214 that case. Therefore, we override the DT_RELSZ entry
13215 here to make it not include the JMPREL relocs. Since
00a97672 13216 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 13217 other relocation sections, we don't have to worry
13218 about changing the DT_REL entry. */
362d30a1 13219 s = htab->root.srelplt;
229fcec5
MM		 13220 if (s != NULL)
13221 dyn.d_un.d_val -= s->size;
13222 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13223 break;
13224 }
8029a119 13225 /* Fall through. */
229fcec5
MM		 13226
13227 case DT_REL:
13228 case DT_RELA:
229fcec5
MM		 13229 /* In the BPABI, the DT_REL tag must point at the file
13230 offset, not the VMA, of the first relocation
13231 section. So, we use code similar to that in
13232 elflink.c, but do not check for SHF_ALLOC on the
13233 relcoation section, since relocations sections are
13234 never allocated under the BPABI. The comments above
13235 about Unixware notwithstanding, we include all of the
13236 relocations here. */
13237 if (htab->symbian_p)
13238 {
13239 unsigned int i;
13240 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
13241 ? SHT_REL : SHT_RELA);
13242 dyn.d_un.d_val = 0;
13243 for (i = 1; i < elf_numsections (output_bfd); i++)
13244 {
906e58ca 13245 Elf_Internal_Shdr *hdr
229fcec5
MM		 13246 = elf_elfsections (output_bfd)[i];
13247 if (hdr->sh_type == type)
13248 {
906e58ca 13249 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 13250 || dyn.d_tag == DT_RELASZ)
13251 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 13252 else if ((ufile_ptr) hdr->sh_offset
13253 <= dyn.d_un.d_val - 1)
229fcec5
MM		 13254 dyn.d_un.d_val = hdr->sh_offset;
13255 }
13256 }
13257 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13258 }
252b5132 13259 break;
88f7bcd5 13260
0855e32b
NS		 13261 case DT_TLSDESC_PLT:
13262 s = htab->root.splt;
13263 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13264 + htab->dt_tlsdesc_plt);
13265 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13266 break;
13267
13268 case DT_TLSDESC_GOT:
13269 s = htab->root.sgot;
13270 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13271 + htab->dt_tlsdesc_got);
13272 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13273 break;
13274
88f7bcd5
NC		 13275 /* Set the bottom bit of DT_INIT/FINI if the
13276 corresponding function is Thumb. */
13277 case DT_INIT:
13278 name = info->init_function;
13279 goto get_sym;
13280 case DT_FINI:
13281 name = info->fini_function;
13282 get_sym:
13283 /* If it wasn't set by elf_bfd_final_link
4cc11e76 13284 then there is nothing to adjust. */
88f7bcd5
NC		 13285 if (dyn.d_un.d_val != 0)
13286 {
13287 struct elf_link_hash_entry * eh;
13288
13289 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 13290 FALSE, FALSE, TRUE);
906e58ca 13291 if (eh != NULL
88f7bcd5
NC		 13292 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
13293 {
13294 dyn.d_un.d_val |= 1;
b34976b6 13295 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 13296 }
13297 }
13298 break;
252b5132
RH		 13299 }
13300 }
13301
24a1ba0f 13302 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 13303 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 13304 {
00a97672
RS		 13305 const bfd_vma *plt0_entry;
13306 bfd_vma got_address, plt_address, got_displacement;
13307
13308 /* Calculate the addresses of the GOT and PLT. */
13309 got_address = sgot->output_section->vma + sgot->output_offset;
13310 plt_address = splt->output_section->vma + splt->output_offset;
13311
13312 if (htab->vxworks_p)
13313 {
13314 /* The VxWorks GOT is relocated by the dynamic linker.
13315 Therefore, we must emit relocations rather than simply
13316 computing the values now. */
13317 Elf_Internal_Rela rel;
13318
13319 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 13320 put_arm_insn (htab, output_bfd, plt0_entry[0],
13321 splt->contents + 0);
13322 put_arm_insn (htab, output_bfd, plt0_entry[1],
13323 splt->contents + 4);
13324 put_arm_insn (htab, output_bfd, plt0_entry[2],
13325 splt->contents + 8);
00a97672
RS		 13326 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
13327
8029a119 13328 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 13329 rel.r_offset = plt_address + 12;
13330 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
13331 rel.r_addend = 0;
13332 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
13333 htab->srelplt2->contents);
13334 }
13335 else
13336 {
13337 got_displacement = got_address - (plt_address + 16);
13338
13339 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 13340 put_arm_insn (htab, output_bfd, plt0_entry[0],
13341 splt->contents + 0);
13342 put_arm_insn (htab, output_bfd, plt0_entry[1],
13343 splt->contents + 4);
13344 put_arm_insn (htab, output_bfd, plt0_entry[2],
13345 splt->contents + 8);
13346 put_arm_insn (htab, output_bfd, plt0_entry[3],
13347 splt->contents + 12);
5e681ec4 13348
5e681ec4 13349#ifdef FOUR_WORD_PLT
00a97672
RS		 13350 /* The displacement value goes in the otherwise-unused
13351 last word of the second entry. */
13352 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 13353#else
00a97672 13354 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 13355#endif
00a97672 13356 }
f7a74f8c 13357 }
252b5132
RH		 13358
13359 /* UnixWare sets the entsize of .plt to 4, although that doesn't
13360 really seem like the right value. */
74541ad4
AM		 13361 if (splt->output_section->owner == output_bfd)
13362 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 13363
0855e32b
NS		 13364 if (htab->dt_tlsdesc_plt)
13365 {
13366 bfd_vma got_address
13367 = sgot->output_section->vma + sgot->output_offset;
13368 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
13369 + htab->root.sgot->output_offset);
13370 bfd_vma plt_address
13371 = splt->output_section->vma + splt->output_offset;
13372
13373 arm_put_trampoline (htab, output_bfd,
13374 splt->contents + htab->dt_tlsdesc_plt,
13375 dl_tlsdesc_lazy_trampoline, 6);
13376
13377 bfd_put_32 (output_bfd,
13378 gotplt_address + htab->dt_tlsdesc_got
13379 - (plt_address + htab->dt_tlsdesc_plt)
13380 - dl_tlsdesc_lazy_trampoline[6],
13381 splt->contents + htab->dt_tlsdesc_plt + 24);
13382 bfd_put_32 (output_bfd,
13383 got_address - (plt_address + htab->dt_tlsdesc_plt)
13384 - dl_tlsdesc_lazy_trampoline[7],
13385 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
13386 }
13387
13388 if (htab->tls_trampoline)
13389 {
13390 arm_put_trampoline (htab, output_bfd,
13391 splt->contents + htab->tls_trampoline,
13392 tls_trampoline, 3);
13393#ifdef FOUR_WORD_PLT
13394 bfd_put_32 (output_bfd, 0x00000000,
13395 splt->contents + htab->tls_trampoline + 12);
13396#endif
13397 }
13398
362d30a1 13399 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 13400 {
13401 /* Correct the .rel(a).plt.unloaded relocations. They will have
13402 incorrect symbol indexes. */
13403 int num_plts;
eed62c48 13404 unsigned char *p;
00a97672 13405
362d30a1 13406 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 13407 / htab->plt_entry_size);
13408 p = htab->srelplt2->contents + RELOC_SIZE (htab);
13409
13410 for (; num_plts; num_plts--)
13411 {
13412 Elf_Internal_Rela rel;
13413
13414 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
13415 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
13416 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
13417 p += RELOC_SIZE (htab);
13418
13419 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
13420 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
13421 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
13422 p += RELOC_SIZE (htab);
13423 }
13424 }
252b5132
RH		 13425 }
13426
13427 /* Fill in the first three entries in the global offset table. */
229fcec5 13428 if (sgot)
252b5132 13429 {
229fcec5
MM		 13430 if (sgot->size > 0)
13431 {
13432 if (sdyn == NULL)
13433 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
13434 else
13435 bfd_put_32 (output_bfd,
13436 sdyn->output_section->vma + sdyn->output_offset,
13437 sgot->contents);
13438 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
13439 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
13440 }
252b5132 13441
229fcec5
MM		 13442 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
13443 }
252b5132 13444
b34976b6 13445 return TRUE;
252b5132
RH		 13446}
13447
ba96a88f 13448static void
57e8b36a 13449elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 13450{
9b485d32 13451 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 13452 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 13453
13454 i_ehdrp = elf_elfheader (abfd);
13455
94a3258f
PB		 13456 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
13457 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
13458 else
13459 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 13460 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 13461
93204d3a
PB		 13462 if (link_info)
13463 {
13464 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 13465 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 13466 i_ehdrp->e_flags |= EF_ARM_BE8;
13467 }
ba96a88f
NC		 13468}
13469
99e4ae17 13470static enum elf_reloc_type_class
57e8b36a 13471elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 13472{
f51e552e 13473 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 13474 {
13475 case R_ARM_RELATIVE:
13476 return reloc_class_relative;
13477 case R_ARM_JUMP_SLOT:
13478 return reloc_class_plt;
13479 case R_ARM_COPY:
13480 return reloc_class_copy;
13481 default:
13482 return reloc_class_normal;
13483 }
13484}
13485
e16bb312
NC		 13486/* Set the right machine number for an Arm ELF file. */
13487
13488static bfd_boolean
57e8b36a 13489elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 13490{
13491 if (hdr->sh_type == SHT_NOTE)
13492 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
13493
13494 return TRUE;
13495}
13496
e489d0ae 13497static void
57e8b36a 13498elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 13499{
5a6c6817 13500 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 13501}
13502
40a18ebd
NC		 13503/* Return TRUE if this is an unwinding table entry. */
13504
13505static bfd_boolean
13506is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
13507{
0112cd26
NC		 13508 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
13509 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 13510}
13511
13512
13513/* Set the type and flags for an ARM section. We do this by
13514 the section name, which is a hack, but ought to work. */
13515
13516static bfd_boolean
13517elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
13518{
13519 const char * name;
13520
13521 name = bfd_get_section_name (abfd, sec);
13522
13523 if (is_arm_elf_unwind_section_name (abfd, name))
13524 {
13525 hdr->sh_type = SHT_ARM_EXIDX;
13526 hdr->sh_flags |= SHF_LINK_ORDER;
13527 }
13528 return TRUE;
13529}
13530
6dc132d9
L		 13531/* Handle an ARM specific section when reading an object file. This is
13532 called when bfd_section_from_shdr finds a section with an unknown
13533 type. */
40a18ebd
NC		 13534
13535static bfd_boolean
13536elf32_arm_section_from_shdr (bfd *abfd,
13537 Elf_Internal_Shdr * hdr,
6dc132d9
L		 13538 const char *name,
13539 int shindex)
40a18ebd
NC		 13540{
13541 /* There ought to be a place to keep ELF backend specific flags, but
13542 at the moment there isn't one. We just keep track of the
13543 sections by their name, instead. Fortunately, the ABI gives
13544 names for all the ARM specific sections, so we will probably get
13545 away with this. */
13546 switch (hdr->sh_type)
13547 {
13548 case SHT_ARM_EXIDX:
0951f019
RE		 13549 case SHT_ARM_PREEMPTMAP:
13550 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 13551 break;
13552
13553 default:
13554 return FALSE;
13555 }
13556
6dc132d9 13557 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 13558 return FALSE;
13559
13560 return TRUE;
13561}
e489d0ae 13562
44444f50
NC		 13563static _arm_elf_section_data *
13564get_arm_elf_section_data (asection * sec)
13565{
47b2e99c
JZ		 13566 if (sec && sec->owner && is_arm_elf (sec->owner))
13567 return elf32_arm_section_data (sec);
44444f50
NC		 13568 else
13569 return NULL;
8e3de13a
NC		 13570}
13571
4e617b1e
PB		 13572typedef struct
13573{
13574 void *finfo;
13575 struct bfd_link_info *info;
91a5743d
PB		 13576 asection *sec;
13577 int sec_shndx;
6e0b88f1
AM		 13578 int (*func) (void *, const char *, Elf_Internal_Sym *,
13579 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 13580} output_arch_syminfo;
13581
13582enum map_symbol_type
13583{
13584 ARM_MAP_ARM,
13585 ARM_MAP_THUMB,
13586 ARM_MAP_DATA
13587};
13588
13589
7413f23f 13590/* Output a single mapping symbol. */
4e617b1e
PB		 13591
13592static bfd_boolean
7413f23f
DJ		 13593elf32_arm_output_map_sym (output_arch_syminfo *osi,
13594 enum map_symbol_type type,
13595 bfd_vma offset)
4e617b1e
PB		 13596{
13597 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 13598 Elf_Internal_Sym sym;
13599
91a5743d
PB		 13600 sym.st_value = osi->sec->output_section->vma
13601 + osi->sec->output_offset
13602 + offset;
4e617b1e
PB		 13603 sym.st_size = 0;
13604 sym.st_other = 0;
13605 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 13606 sym.st_shndx = osi->sec_shndx;
fe33d2fa 13607 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 13608 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 13609}
13610
13611
13612/* Output mapping symbols for PLT entries associated with H. */
13613
13614static bfd_boolean
13615elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
13616{
13617 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
13618 struct elf32_arm_link_hash_table *htab;
13619 struct elf32_arm_link_hash_entry *eh;
13620 bfd_vma addr;
13621
4e617b1e
PB		 13622 if (h->root.type == bfd_link_hash_indirect)
13623 return TRUE;
13624
13625 if (h->root.type == bfd_link_hash_warning)
13626 /* When warning symbols are created, they **replace** the "real"
13627 entry in the hash table, thus we never get to see the real
13628 symbol in a hash traversal. So look at it now. */
13629 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13630
13631 if (h->plt.offset == (bfd_vma) -1)
13632 return TRUE;
13633
4dfe6ac6
NC		 13634 htab = elf32_arm_hash_table (osi->info);
13635 if (htab == NULL)
13636 return FALSE;
13637
4e617b1e
PB		 13638 eh = (struct elf32_arm_link_hash_entry *) h;
13639 addr = h->plt.offset;
13640 if (htab->symbian_p)
13641 {
7413f23f 13642 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 13643 return FALSE;
7413f23f 13644 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 13645 return FALSE;
13646 }
13647 else if (htab->vxworks_p)
13648 {
7413f23f 13649 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 13650 return FALSE;
7413f23f 13651 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 13652 return FALSE;
7413f23f 13653 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 13654 return FALSE;
7413f23f 13655 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 13656 return FALSE;
13657 }
13658 else
13659 {
bd97cb95
DJ		 13660 bfd_signed_vma thumb_refs;
13661
13662 thumb_refs = eh->plt_thumb_refcount;
13663 if (!htab->use_blx)
13664 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 13665
bd97cb95 13666 if (thumb_refs > 0)
4e617b1e 13667 {
7413f23f 13668 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 13669 return FALSE;
13670 }
13671#ifdef FOUR_WORD_PLT
7413f23f 13672 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 13673 return FALSE;
7413f23f 13674 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 13675 return FALSE;
13676#else
906e58ca 13677 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 13678 so only need to output a mapping symbol for the first PLT entry and
13679 entries with thumb thunks. */
bd97cb95 13680 if (thumb_refs > 0 || addr == 20)
4e617b1e 13681 {
7413f23f 13682 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 13683 return FALSE;
13684 }
13685#endif
13686 }
13687
13688 return TRUE;
13689}
13690
7413f23f
DJ		 13691/* Output a single local symbol for a generated stub. */
13692
13693static bfd_boolean
13694elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
13695 bfd_vma offset, bfd_vma size)
13696{
7413f23f
DJ		 13697 Elf_Internal_Sym sym;
13698
7413f23f
DJ		 13699 sym.st_value = osi->sec->output_section->vma
13700 + osi->sec->output_offset
13701 + offset;
13702 sym.st_size = size;
13703 sym.st_other = 0;
13704 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13705 sym.st_shndx = osi->sec_shndx;
6e0b88f1 13706 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 13707}
4e617b1e 13708
da5938a2 13709static bfd_boolean
8029a119
NC		 13710arm_map_one_stub (struct bfd_hash_entry * gen_entry,
13711 void * in_arg)
da5938a2
NC		 13712{
13713 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 13714 asection *stub_sec;
13715 bfd_vma addr;
7413f23f 13716 char *stub_name;
9a008db3 13717 output_arch_syminfo *osi;
d3ce72d0 13718 const insn_sequence *template_sequence;
461a49ca
DJ		 13719 enum stub_insn_type prev_type;
13720 int size;
13721 int i;
13722 enum map_symbol_type sym_type;
da5938a2
NC		 13723
13724 /* Massage our args to the form they really have. */
13725 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 13726 osi = (output_arch_syminfo *) in_arg;
da5938a2 13727
da5938a2
NC		 13728 stub_sec = stub_entry->stub_sec;
13729
13730 /* Ensure this stub is attached to the current section being
7413f23f 13731 processed. */
da5938a2
NC		 13732 if (stub_sec != osi->sec)
13733 return TRUE;
13734
7413f23f
DJ		 13735 addr = (bfd_vma) stub_entry->stub_offset;
13736 stub_name = stub_entry->output_name;
da5938a2 13737
d3ce72d0
NC		 13738 template_sequence = stub_entry->stub_template;
13739 switch (template_sequence[0].type)
7413f23f 13740 {
461a49ca
DJ		 13741 case ARM_TYPE:
13742 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 13743 return FALSE;
13744 break;
461a49ca 13745 case THUMB16_TYPE:
48229727 13746 case THUMB32_TYPE:
461a49ca
DJ		 13747 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
13748 stub_entry->stub_size))
da5938a2
NC		 13749 return FALSE;
13750 break;
13751 default:
13752 BFD_FAIL ();
48229727 13753 return 0;
7413f23f 13754 }
da5938a2 13755
461a49ca
DJ		 13756 prev_type = DATA_TYPE;
13757 size = 0;
13758 for (i = 0; i < stub_entry->stub_template_size; i++)
13759 {
d3ce72d0 13760 switch (template_sequence[i].type)
461a49ca
DJ		 13761 {
13762 case ARM_TYPE:
13763 sym_type = ARM_MAP_ARM;
13764 break;
13765
13766 case THUMB16_TYPE:
48229727 13767 case THUMB32_TYPE:
461a49ca
DJ		 13768 sym_type = ARM_MAP_THUMB;
13769 break;
13770
13771 case DATA_TYPE:
13772 sym_type = ARM_MAP_DATA;
13773 break;
13774
13775 default:
13776 BFD_FAIL ();
4e31c731 13777 return FALSE;
461a49ca
DJ		 13778 }
13779
d3ce72d0 13780 if (template_sequence[i].type != prev_type)
461a49ca 13781 {
d3ce72d0 13782 prev_type = template_sequence[i].type;
461a49ca
DJ		 13783 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
13784 return FALSE;
13785 }
13786
d3ce72d0 13787 switch (template_sequence[i].type)
461a49ca
DJ		 13788 {
13789 case ARM_TYPE:
48229727 13790 case THUMB32_TYPE:
461a49ca
DJ		 13791 size += 4;
13792 break;
13793
13794 case THUMB16_TYPE:
13795 size += 2;
13796 break;
13797
13798 case DATA_TYPE:
13799 size += 4;
13800 break;
13801
13802 default:
13803 BFD_FAIL ();
4e31c731 13804 return FALSE;
461a49ca
DJ		 13805 }
13806 }
13807
da5938a2
NC		 13808 return TRUE;
13809}
13810
33811162
DG		 13811/* Output mapping symbols for linker generated sections,
13812 and for those data-only sections that do not have a
13813 $d. */
4e617b1e
PB		 13814
13815static bfd_boolean
13816elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 13817 struct bfd_link_info *info,
13818 void *finfo,
6e0b88f1
AM		 13819 int (*func) (void *, const char *,
13820 Elf_Internal_Sym *,
13821 asection *,
13822 struct elf_link_hash_entry *))
4e617b1e
PB		 13823{
13824 output_arch_syminfo osi;
13825 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 13826 bfd_vma offset;
13827 bfd_size_type size;
33811162 13828 bfd *input_bfd;
4e617b1e
PB		 13829
13830 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13831 if (htab == NULL)
13832 return FALSE;
13833
906e58ca 13834 check_use_blx (htab);
91a5743d 13835
4e617b1e
PB		 13836 osi.finfo = finfo;
13837 osi.info = info;
13838 osi.func = func;
906e58ca 13839
33811162
DG		 13840 /* Add a $d mapping symbol to data-only sections that
13841 don't have any mapping symbol. This may result in (harmless) redundant
13842 mapping symbols. */
13843 for (input_bfd = info->input_bfds;
13844 input_bfd != NULL;
13845 input_bfd = input_bfd->link_next)
13846 {
13847 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
13848 for (osi.sec = input_bfd->sections;
13849 osi.sec != NULL;
13850 osi.sec = osi.sec->next)
13851 {
13852 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 13853 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
13854 != 0)
33811162
DG		 13855 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
13856 == SEC_HAS_CONTENTS
13857 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0
DJ		 13858 && get_arm_elf_section_data (osi.sec)->mapcount == 0
13859 && osi.sec->size > 0)
33811162
DG		 13860 {
13861 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13862 (output_bfd, osi.sec->output_section);
13863 if (osi.sec_shndx != (int)SHN_BAD)
13864 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
13865 }
13866 }
13867 }
13868
91a5743d
PB		 13869 /* ARM->Thumb glue. */
13870 if (htab->arm_glue_size > 0)
13871 {
13872 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13873 ARM2THUMB_GLUE_SECTION_NAME);
13874
13875 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13876 (output_bfd, osi.sec->output_section);
13877 if (info->shared || htab->root.is_relocatable_executable
13878 || htab->pic_veneer)
13879 size = ARM2THUMB_PIC_GLUE_SIZE;
13880 else if (htab->use_blx)
13881 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13882 else
13883 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13884
91a5743d
PB		 13885 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13886 {
7413f23f
DJ		 13887 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13888 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13889 }
13890 }
13891
13892 /* Thumb->ARM glue. */
13893 if (htab->thumb_glue_size > 0)
13894 {
13895 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13896 THUMB2ARM_GLUE_SECTION_NAME);
13897
13898 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13899 (output_bfd, osi.sec->output_section);
13900 size = THUMB2ARM_GLUE_SIZE;
13901
13902 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13903 {
7413f23f
DJ		 13904 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13905 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13906 }
13907 }
13908
845b51d6
PB		 13909 /* ARMv4 BX veneers. */
13910 if (htab->bx_glue_size > 0)
13911 {
13912 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13913 ARM_BX_GLUE_SECTION_NAME);
13914
13915 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13916 (output_bfd, osi.sec->output_section);
13917
7413f23f 13918 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13919 }
13920
8029a119
NC		 13921 /* Long calls stubs. */
13922 if (htab->stub_bfd && htab->stub_bfd->sections)
13923 {
da5938a2 13924 asection* stub_sec;
8029a119 13925
da5938a2
NC		 13926 for (stub_sec = htab->stub_bfd->sections;
13927 stub_sec != NULL;
8029a119
NC		 13928 stub_sec = stub_sec->next)
13929 {
13930 /* Ignore non-stub sections. */
13931 if (!strstr (stub_sec->name, STUB_SUFFIX))
13932 continue;
da5938a2 13933
8029a119 13934 osi.sec = stub_sec;
da5938a2 13935
8029a119
NC		 13936 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13937 (output_bfd, osi.sec->output_section);
da5938a2 13938
8029a119
NC		 13939 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13940 }
13941 }
da5938a2 13942
91a5743d 13943 /* Finally, output mapping symbols for the PLT. */
362d30a1 13944 if (!htab->root.splt || htab->root.splt->size == 0)
91a5743d
PB		 13945 return TRUE;
13946
362d30a1 13947 osi.sec = htab->root.splt;
91a5743d 13948 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
362d30a1 13949 osi.sec->output_section);
4e617b1e
PB		 13950 /* Output mapping symbols for the plt header. SymbianOS does not have a
13951 plt header. */
13952 if (htab->vxworks_p)
13953 {
13954 /* VxWorks shared libraries have no PLT header. */
13955 if (!info->shared)
13956 {
7413f23f 13957 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13958 return FALSE;
7413f23f 13959 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13960 return FALSE;
13961 }
13962 }
13963 else if (!htab->symbian_p)
13964 {
7413f23f 13965 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13966 return FALSE;
13967#ifndef FOUR_WORD_PLT
7413f23f 13968 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13969 return FALSE;
13970#endif
13971 }
13972
0855e32b
NS		 13973 if (htab->dt_tlsdesc_plt != 0)
13974 {
13975 /* Mapping symbols for the lazy tls trampoline. */
13976 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
13977 return FALSE;
13978
13979 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
13980 htab->dt_tlsdesc_plt + 24))
13981 return FALSE;
13982 }
13983 if (htab->tls_trampoline != 0)
13984 {
13985 /* Mapping symbols for the tls trampoline. */
13986 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
13987 return FALSE;
13988#ifdef FOUR_WORD_PLT
13989 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
13990 htab->tls_trampoline + 12))
13991 return FALSE;
13992#endif
13993 }
13994
4e617b1e
PB		 13995 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13996 return TRUE;
13997}
13998
e489d0ae
PB		 13999/* Allocate target specific section data. */
14000
14001static bfd_boolean
14002elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14003{
f592407e
AM		 14004 if (!sec->used_by_bfd)
14005 {
14006 _arm_elf_section_data *sdata;
14007 bfd_size_type amt = sizeof (*sdata);
e489d0ae 14008
21d799b5 14009 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 14010 if (sdata == NULL)
14011 return FALSE;
14012 sec->used_by_bfd = sdata;
14013 }
e489d0ae
PB		 14014
14015 return _bfd_elf_new_section_hook (abfd, sec);
14016}
14017
14018
14019/* Used to order a list of mapping symbols by address. */
14020
14021static int
14022elf32_arm_compare_mapping (const void * a, const void * b)
14023{
7f6a71ff
JM		 14024 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14025 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14026
14027 if (amap->vma > bmap->vma)
14028 return 1;
14029 else if (amap->vma < bmap->vma)
14030 return -1;
14031 else if (amap->type > bmap->type)
14032 /* Ensure results do not depend on the host qsort for objects with
14033 multiple mapping symbols at the same address by sorting on type
14034 after vma. */
14035 return 1;
14036 else if (amap->type < bmap->type)
14037 return -1;
14038 else
14039 return 0;
e489d0ae
PB		 14040}
14041
2468f9c9
PB		 14042/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
14043
14044static unsigned long
14045offset_prel31 (unsigned long addr, bfd_vma offset)
14046{
14047 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
14048}
14049
14050/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
14051 relocations. */
14052
14053static void
14054copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
14055{
14056 unsigned long first_word = bfd_get_32 (output_bfd, from);
14057 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
14058
14059 /* High bit of first word is supposed to be zero. */
14060 if ((first_word & 0x80000000ul) == 0)
14061 first_word = offset_prel31 (first_word, offset);
14062
14063 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
14064 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
14065 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
14066 second_word = offset_prel31 (second_word, offset);
14067
14068 bfd_put_32 (output_bfd, first_word, to);
14069 bfd_put_32 (output_bfd, second_word, to + 4);
14070}
e489d0ae 14071
48229727
JB		 14072/* Data for make_branch_to_a8_stub(). */
14073
14074struct a8_branch_to_stub_data {
14075 asection *writing_section;
14076 bfd_byte *contents;
14077};
14078
14079
14080/* Helper to insert branches to Cortex-A8 erratum stubs in the right
14081 places for a particular section. */
14082
14083static bfd_boolean
14084make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
14085 void *in_arg)
14086{
14087 struct elf32_arm_stub_hash_entry *stub_entry;
14088 struct a8_branch_to_stub_data *data;
14089 bfd_byte *contents;
14090 unsigned long branch_insn;
14091 bfd_vma veneered_insn_loc, veneer_entry_loc;
14092 bfd_signed_vma branch_offset;
14093 bfd *abfd;
91d6fa6a 14094 unsigned int target;
48229727
JB		 14095
14096 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14097 data = (struct a8_branch_to_stub_data *) in_arg;
14098
14099 if (stub_entry->target_section != data->writing_section
4563a860 14100 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 14101 return TRUE;
14102
14103 contents = data->contents;
14104
14105 veneered_insn_loc = stub_entry->target_section->output_section->vma
14106 + stub_entry->target_section->output_offset
14107 + stub_entry->target_value;
14108
14109 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
14110 + stub_entry->stub_sec->output_offset
14111 + stub_entry->stub_offset;
14112
14113 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
14114 veneered_insn_loc &= ~3u;
14115
14116 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
14117
14118 abfd = stub_entry->target_section->owner;
91d6fa6a 14119 target = stub_entry->target_value;
48229727
JB		 14120
14121 /* We attempt to avoid this condition by setting stubs_always_after_branch
14122 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
14123 This check is just to be on the safe side... */
14124 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
14125 {
14126 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
14127 "allocated in unsafe location"), abfd);
14128 return FALSE;
14129 }
14130
14131 switch (stub_entry->stub_type)
14132 {
14133 case arm_stub_a8_veneer_b:
14134 case arm_stub_a8_veneer_b_cond:
14135 branch_insn = 0xf0009000;
14136 goto jump24;
14137
14138 case arm_stub_a8_veneer_blx:
14139 branch_insn = 0xf000e800;
14140 goto jump24;
14141
14142 case arm_stub_a8_veneer_bl:
14143 {
14144 unsigned int i1, j1, i2, j2, s;
14145
14146 branch_insn = 0xf000d000;
14147
14148 jump24:
14149 if (branch_offset < -16777216 || branch_offset > 16777214)
14150 {
14151 /* There's not much we can do apart from complain if this
14152 happens. */
14153 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
14154 "of range (input file too large)"), abfd);
14155 return FALSE;
14156 }
14157
14158 /* i1 = not(j1 eor s), so:
14159 not i1 = j1 eor s
14160 j1 = (not i1) eor s. */
14161
14162 branch_insn |= (branch_offset >> 1) & 0x7ff;
14163 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
14164 i2 = (branch_offset >> 22) & 1;
14165 i1 = (branch_offset >> 23) & 1;
14166 s = (branch_offset >> 24) & 1;
14167 j1 = (!i1) ^ s;
14168 j2 = (!i2) ^ s;
14169 branch_insn |= j2 << 11;
14170 branch_insn |= j1 << 13;
14171 branch_insn |= s << 26;
14172 }
14173 break;
14174
14175 default:
14176 BFD_FAIL ();
14177 return FALSE;
14178 }
14179
91d6fa6a
NC		 14180 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
14181 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 14182
14183 return TRUE;
14184}
14185
e489d0ae
PB		 14186/* Do code byteswapping. Return FALSE afterwards so that the section is
14187 written out as normal. */
14188
14189static bfd_boolean
c7b8f16e 14190elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 14191 struct bfd_link_info *link_info,
14192 asection *sec,
e489d0ae
PB		 14193 bfd_byte *contents)
14194{
48229727 14195 unsigned int mapcount, errcount;
8e3de13a 14196 _arm_elf_section_data *arm_data;
c7b8f16e 14197 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 14198 elf32_arm_section_map *map;
c7b8f16e 14199 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 14200 bfd_vma ptr;
14201 bfd_vma end;
c7b8f16e 14202 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 14203 bfd_byte tmp;
48229727 14204 unsigned int i;
57e8b36a 14205
4dfe6ac6
NC		 14206 if (globals == NULL)
14207 return FALSE;
14208
8e3de13a
NC		 14209 /* If this section has not been allocated an _arm_elf_section_data
14210 structure then we cannot record anything. */
14211 arm_data = get_arm_elf_section_data (sec);
14212 if (arm_data == NULL)
14213 return FALSE;
14214
14215 mapcount = arm_data->mapcount;
14216 map = arm_data->map;
c7b8f16e
JB		 14217 errcount = arm_data->erratumcount;
14218
14219 if (errcount != 0)
14220 {
14221 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
14222
14223 for (errnode = arm_data->erratumlist; errnode != 0;
14224 errnode = errnode->next)
14225 {
91d6fa6a 14226 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 14227
14228 switch (errnode->type)
14229 {
14230 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
14231 {
14232 bfd_vma branch_to_veneer;
14233 /* Original condition code of instruction, plus bit mask for
14234 ARM B instruction. */
14235 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
14236 | 0x0a000000;
14237
14238 /* The instruction is before the label. */
91d6fa6a 14239 target -= 4;
c7b8f16e
JB		 14240
14241 /* Above offset included in -4 below. */
14242 branch_to_veneer = errnode->u.b.veneer->vma
14243 - errnode->vma - 4;
14244
14245 if ((signed) branch_to_veneer < -(1 << 25)
14246 || (signed) branch_to_veneer >= (1 << 25))
14247 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14248 "range"), output_bfd);
14249
14250 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 14251 contents[endianflip ^ target] = insn & 0xff;
14252 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14253 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14254 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14255 }
14256 break;
14257
14258 case VFP11_ERRATUM_ARM_VENEER:
14259 {
14260 bfd_vma branch_from_veneer;
14261 unsigned int insn;
14262
14263 /* Take size of veneer into account. */
14264 branch_from_veneer = errnode->u.v.branch->vma
14265 - errnode->vma - 12;
14266
14267 if ((signed) branch_from_veneer < -(1 << 25)
14268 || (signed) branch_from_veneer >= (1 << 25))
14269 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14270 "range"), output_bfd);
14271
14272 /* Original instruction. */
14273 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 14274 contents[endianflip ^ target] = insn & 0xff;
14275 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14276 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14277 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14278
14279 /* Branch back to insn after original insn. */
14280 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 14281 contents[endianflip ^ (target + 4)] = insn & 0xff;
14282 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
14283 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
14284 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14285 }
14286 break;
14287
14288 default:
14289 abort ();
14290 }
14291 }
14292 }
e489d0ae 14293
2468f9c9
PB		 14294 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
14295 {
14296 arm_unwind_table_edit *edit_node
14297 = arm_data->u.exidx.unwind_edit_list;
14298 /* Now, sec->size is the size of the section we will write. The original
14299 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
14300 markers) was sec->rawsize. (This isn't the case if we perform no
14301 edits, then rawsize will be zero and we should use size). */
21d799b5 14302 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 14303 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
14304 unsigned int in_index, out_index;
14305 bfd_vma add_to_offsets = 0;
14306
14307 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
14308 {
14309 if (edit_node)
14310 {
14311 unsigned int edit_index = edit_node->index;
14312
14313 if (in_index < edit_index && in_index * 8 < input_size)
14314 {
14315 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
14316 contents + in_index * 8, add_to_offsets);
14317 out_index++;
14318 in_index++;
14319 }
14320 else if (in_index == edit_index
14321 || (in_index * 8 >= input_size
14322 && edit_index == UINT_MAX))
14323 {
14324 switch (edit_node->type)
14325 {
14326 case DELETE_EXIDX_ENTRY:
14327 in_index++;
14328 add_to_offsets += 8;
14329 break;
14330
14331 case INSERT_EXIDX_CANTUNWIND_AT_END:
14332 {
14333 asection *text_sec = edit_node->linked_section;
14334 bfd_vma text_offset = text_sec->output_section->vma
14335 + text_sec->output_offset
14336 + text_sec->size;
14337 bfd_vma exidx_offset = offset + out_index * 8;
14338 unsigned long prel31_offset;
14339
14340 /* Note: this is meant to be equivalent to an
14341 R_ARM_PREL31 relocation. These synthetic
14342 EXIDX_CANTUNWIND markers are not relocated by the
14343 usual BFD method. */
14344 prel31_offset = (text_offset - exidx_offset)
14345 & 0x7ffffffful;
14346
14347 /* First address we can't unwind. */
14348 bfd_put_32 (output_bfd, prel31_offset,
14349 &edited_contents[out_index * 8]);
14350
14351 /* Code for EXIDX_CANTUNWIND. */
14352 bfd_put_32 (output_bfd, 0x1,
14353 &edited_contents[out_index * 8 + 4]);
14354
14355 out_index++;
14356 add_to_offsets -= 8;
14357 }
14358 break;
14359 }
14360
14361 edit_node = edit_node->next;
14362 }
14363 }
14364 else
14365 {
14366 /* No more edits, copy remaining entries verbatim. */
14367 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
14368 contents + in_index * 8, add_to_offsets);
14369 out_index++;
14370 in_index++;
14371 }
14372 }
14373
14374 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
14375 bfd_set_section_contents (output_bfd, sec->output_section,
14376 edited_contents,
14377 (file_ptr) sec->output_offset, sec->size);
14378
14379 return TRUE;
14380 }
14381
48229727
JB		 14382 /* Fix code to point to Cortex-A8 erratum stubs. */
14383 if (globals->fix_cortex_a8)
14384 {
14385 struct a8_branch_to_stub_data data;
14386
14387 data.writing_section = sec;
14388 data.contents = contents;
14389
14390 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
14391 &data);
14392 }
14393
e489d0ae
PB		 14394 if (mapcount == 0)
14395 return FALSE;
14396
c7b8f16e 14397 if (globals->byteswap_code)
e489d0ae 14398 {
c7b8f16e 14399 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 14400
c7b8f16e
JB		 14401 ptr = map[0].vma;
14402 for (i = 0; i < mapcount; i++)
14403 {
14404 if (i == mapcount - 1)
14405 end = sec->size;
14406 else
14407 end = map[i + 1].vma;
e489d0ae 14408
c7b8f16e 14409 switch (map[i].type)
e489d0ae 14410 {
c7b8f16e
JB		 14411 case 'a':
14412 /* Byte swap code words. */
14413 while (ptr + 3 < end)
14414 {
14415 tmp = contents[ptr];
14416 contents[ptr] = contents[ptr + 3];
14417 contents[ptr + 3] = tmp;
14418 tmp = contents[ptr + 1];
14419 contents[ptr + 1] = contents[ptr + 2];
14420 contents[ptr + 2] = tmp;
14421 ptr += 4;
14422 }
14423 break;
e489d0ae 14424
c7b8f16e
JB		 14425 case 't':
14426 /* Byte swap code halfwords. */
14427 while (ptr + 1 < end)
14428 {
14429 tmp = contents[ptr];
14430 contents[ptr] = contents[ptr + 1];
14431 contents[ptr + 1] = tmp;
14432 ptr += 2;
14433 }
14434 break;
14435
14436 case 'd':
14437 /* Leave data alone. */
14438 break;
14439 }
14440 ptr = end;
14441 }
e489d0ae 14442 }
8e3de13a 14443
93204d3a 14444 free (map);
47b2e99c 14445 arm_data->mapcount = -1;
c7b8f16e 14446 arm_data->mapsize = 0;
8e3de13a 14447 arm_data->map = NULL;
8e3de13a 14448
e489d0ae
PB		 14449 return FALSE;
14450}
14451
b7693d02
DJ		 14452/* Display STT_ARM_TFUNC symbols as functions. */
14453
14454static void
14455elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
14456 asymbol *asym)
14457{
14458 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
14459
14460 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
14461 elfsym->symbol.flags |= BSF_FUNCTION;
14462}
14463
0beaef2b
PB		 14464
14465/* Mangle thumb function symbols as we read them in. */
14466
8384fb8f 14467static bfd_boolean
0beaef2b
PB		 14468elf32_arm_swap_symbol_in (bfd * abfd,
14469 const void *psrc,
14470 const void *pshn,
14471 Elf_Internal_Sym *dst)
14472{
8384fb8f
AM		 14473 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
14474 return FALSE;
0beaef2b
PB		 14475
14476 /* New EABI objects mark thumb function symbols by setting the low bit of
14477 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 14478 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 14479 && (dst->st_value & 1))
14480 {
14481 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
14482 dst->st_value &= ~(bfd_vma) 1;
14483 }
8384fb8f 14484 return TRUE;
0beaef2b
PB		 14485}
14486
14487
14488/* Mangle thumb function symbols as we write them out. */
14489
14490static void
14491elf32_arm_swap_symbol_out (bfd *abfd,
14492 const Elf_Internal_Sym *src,
14493 void *cdst,
14494 void *shndx)
14495{
14496 Elf_Internal_Sym newsym;
14497
14498 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
14499 of the address set, as per the new EABI. We do this unconditionally
14500 because objcopy does not set the elf header flags until after
14501 it writes out the symbol table. */
14502 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
14503 {
14504 newsym = *src;
14505 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 14506 if (newsym.st_shndx != SHN_UNDEF)
14507 {
14508 /* Do this only for defined symbols. At link type, the static
14509 linker will simulate the work of dynamic linker of resolving
14510 symbols and will carry over the thumbness of found symbols to
14511 the output symbol table. It's not clear how it happens, but
b0fead2b 14512 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 14513 runtime, and writing '1' for them will be confusing for users
14514 and possibly for dynamic linker itself.
14515 */
14516 newsym.st_value |= 1;
14517 }
906e58ca 14518
0beaef2b
PB		 14519 src = &newsym;
14520 }
14521 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
14522}
14523
b294bdf8
MM		 14524/* Add the PT_ARM_EXIDX program header. */
14525
14526static bfd_boolean
906e58ca 14527elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 14528 struct bfd_link_info *info ATTRIBUTE_UNUSED)
14529{
14530 struct elf_segment_map *m;
14531 asection *sec;
14532
14533 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
14534 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
14535 {
14536 /* If there is already a PT_ARM_EXIDX header, then we do not
14537 want to add another one. This situation arises when running
14538 "strip"; the input binary already has the header. */
14539 m = elf_tdata (abfd)->segment_map;
14540 while (m && m->p_type != PT_ARM_EXIDX)
14541 m = m->next;
14542 if (!m)
14543 {
21d799b5
NC		 14544 m = (struct elf_segment_map *)
14545 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 14546 if (m == NULL)
14547 return FALSE;
14548 m->p_type = PT_ARM_EXIDX;
14549 m->count = 1;
14550 m->sections[0] = sec;
14551
14552 m->next = elf_tdata (abfd)->segment_map;
14553 elf_tdata (abfd)->segment_map = m;
14554 }
14555 }
14556
14557 return TRUE;
14558}
14559
14560/* We may add a PT_ARM_EXIDX program header. */
14561
14562static int
a6b96beb
AM		 14563elf32_arm_additional_program_headers (bfd *abfd,
14564 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 14565{
14566 asection *sec;
14567
14568 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
14569 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
14570 return 1;
14571 else
14572 return 0;
14573}
14574
fcb93ecf 14575/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 14576
fcb93ecf
PB		 14577static bfd_boolean
14578elf32_arm_is_function_type (unsigned int type)
14579{
0f88be7a 14580 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 14581}
14582
0beaef2b 14583/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 14584const struct elf_size_info elf32_arm_size_info =
14585{
0beaef2b
PB		 14586 sizeof (Elf32_External_Ehdr),
14587 sizeof (Elf32_External_Phdr),
14588 sizeof (Elf32_External_Shdr),
14589 sizeof (Elf32_External_Rel),
14590 sizeof (Elf32_External_Rela),
14591 sizeof (Elf32_External_Sym),
14592 sizeof (Elf32_External_Dyn),
14593 sizeof (Elf_External_Note),
14594 4,
14595 1,
14596 32, 2,
14597 ELFCLASS32, EV_CURRENT,
14598 bfd_elf32_write_out_phdrs,
14599 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 14600 bfd_elf32_checksum_contents,
0beaef2b
PB		 14601 bfd_elf32_write_relocs,
14602 elf32_arm_swap_symbol_in,
14603 elf32_arm_swap_symbol_out,
14604 bfd_elf32_slurp_reloc_table,
14605 bfd_elf32_slurp_symbol_table,
14606 bfd_elf32_swap_dyn_in,
14607 bfd_elf32_swap_dyn_out,
14608 bfd_elf32_swap_reloc_in,
14609 bfd_elf32_swap_reloc_out,
14610 bfd_elf32_swap_reloca_in,
14611 bfd_elf32_swap_reloca_out
14612};
14613
252b5132 14614#define ELF_ARCH bfd_arch_arm
ae95ffa6 14615#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 14616#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 14617#ifdef __QNXTARGET__
14618#define ELF_MAXPAGESIZE 0x1000
14619#else
f21f3fe0 14620#define ELF_MAXPAGESIZE 0x8000
d0facd1b 14621#endif
b1342370 14622#define ELF_MINPAGESIZE 0x1000
24718e3b 14623#define ELF_COMMONPAGESIZE 0x1000
252b5132 14624
ba93b8ac
DJ		 14625#define bfd_elf32_mkobject elf32_arm_mkobject
14626
99e4ae17
AJ		 14627#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
14628#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 14629#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
14630#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
14631#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 14632#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 14633#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 14634#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 14635#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 14636#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 14637#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 14638#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 14639#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 14640
14641#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
14642#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 14643#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 14644#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
14645#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 14646#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 14647#define elf_backend_write_section elf32_arm_write_section
252b5132 14648#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 14649#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 14650#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
14651#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
14652#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 14653#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 14654#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 14655#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 14656#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 14657#define elf_backend_object_p elf32_arm_object_p
e16bb312 14658#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 14659#define elf_backend_fake_sections elf32_arm_fake_sections
14660#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 14661#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 14662#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 14663#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 14664#define elf_backend_size_info elf32_arm_size_info
b294bdf8 14665#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 14666#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
14667#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
14668#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
14669#define elf_backend_is_function_type elf32_arm_is_function_type
14670
14671#define elf_backend_can_refcount 1
14672#define elf_backend_can_gc_sections 1
14673#define elf_backend_plt_readonly 1
14674#define elf_backend_want_got_plt 1
14675#define elf_backend_want_plt_sym 0
14676#define elf_backend_may_use_rel_p 1
14677#define elf_backend_may_use_rela_p 0
4e7fd91e 14678#define elf_backend_default_use_rela_p 0
252b5132 14679
04f7c78d 14680#define elf_backend_got_header_size 12
04f7c78d 14681
906e58ca
NC		 14682#undef elf_backend_obj_attrs_vendor
14683#define elf_backend_obj_attrs_vendor "aeabi"
14684#undef elf_backend_obj_attrs_section
14685#define elf_backend_obj_attrs_section ".ARM.attributes"
14686#undef elf_backend_obj_attrs_arg_type
14687#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
14688#undef elf_backend_obj_attrs_section_type
104d59d1 14689#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 14690#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
e8b36cd1 14691#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 14692
252b5132 14693#include "elf32-target.h"
7f266840 14694
906e58ca 14695/* VxWorks Targets. */
4e7fd91e 14696
906e58ca 14697#undef TARGET_LITTLE_SYM
4e7fd91e 14698#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 14699#undef TARGET_LITTLE_NAME
4e7fd91e 14700#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 14701#undef TARGET_BIG_SYM
4e7fd91e 14702#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 14703#undef TARGET_BIG_NAME
4e7fd91e
PB		 14704#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
14705
14706/* Like elf32_arm_link_hash_table_create -- but overrides
14707 appropriately for VxWorks. */
906e58ca 14708
4e7fd91e
PB		 14709static struct bfd_link_hash_table *
14710elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
14711{
14712 struct bfd_link_hash_table *ret;
14713
14714 ret = elf32_arm_link_hash_table_create (abfd);
14715 if (ret)
14716 {
14717 struct elf32_arm_link_hash_table *htab
00a97672 14718 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 14719 htab->use_rel = 0;
00a97672 14720 htab->vxworks_p = 1;
4e7fd91e
PB		 14721 }
14722 return ret;
906e58ca 14723}
4e7fd91e 14724
00a97672
RS		 14725static void
14726elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
14727{
14728 elf32_arm_final_write_processing (abfd, linker);
14729 elf_vxworks_final_write_processing (abfd, linker);
14730}
14731
906e58ca 14732#undef elf32_bed
4e7fd91e
PB		 14733#define elf32_bed elf32_arm_vxworks_bed
14734
906e58ca
NC		 14735#undef bfd_elf32_bfd_link_hash_table_create
14736#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
14737#undef elf_backend_add_symbol_hook
14738#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
14739#undef elf_backend_final_write_processing
14740#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
14741#undef elf_backend_emit_relocs
14742#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 14743
906e58ca 14744#undef elf_backend_may_use_rel_p
00a97672 14745#define elf_backend_may_use_rel_p 0
906e58ca 14746#undef elf_backend_may_use_rela_p
00a97672 14747#define elf_backend_may_use_rela_p 1
906e58ca 14748#undef elf_backend_default_use_rela_p
00a97672 14749#define elf_backend_default_use_rela_p 1
906e58ca 14750#undef elf_backend_want_plt_sym
00a97672 14751#define elf_backend_want_plt_sym 1
906e58ca 14752#undef ELF_MAXPAGESIZE
00a97672 14753#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 14754
14755#include "elf32-target.h"
14756
14757
21d799b5
NC		 14758/* Merge backend specific data from an object file to the output
14759 object file when linking. */
14760
14761static bfd_boolean
14762elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
14763{
14764 flagword out_flags;
14765 flagword in_flags;
14766 bfd_boolean flags_compatible = TRUE;
14767 asection *sec;
14768
14769 /* Check if we have the same endianess. */
14770 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
14771 return FALSE;
14772
14773 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
14774 return TRUE;
14775
14776 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
14777 return FALSE;
14778
14779 /* The input BFD must have had its flags initialised. */
14780 /* The following seems bogus to me -- The flags are initialized in
14781 the assembler but I don't think an elf_flags_init field is
14782 written into the object. */
14783 /* BFD_ASSERT (elf_flags_init (ibfd)); */
14784
14785 in_flags = elf_elfheader (ibfd)->e_flags;
14786 out_flags = elf_elfheader (obfd)->e_flags;
14787
14788 /* In theory there is no reason why we couldn't handle this. However
14789 in practice it isn't even close to working and there is no real
14790 reason to want it. */
14791 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
14792 && !(ibfd->flags & DYNAMIC)
14793 && (in_flags & EF_ARM_BE8))
14794 {
14795 _bfd_error_handler (_("error: %B is already in final BE8 format"),
14796 ibfd);
14797 return FALSE;
14798 }
14799
14800 if (!elf_flags_init (obfd))
14801 {
14802 /* If the input is the default architecture and had the default
14803 flags then do not bother setting the flags for the output
14804 architecture, instead allow future merges to do this. If no
14805 future merges ever set these flags then they will retain their
14806 uninitialised values, which surprise surprise, correspond
14807 to the default values. */
14808 if (bfd_get_arch_info (ibfd)->the_default
14809 && elf_elfheader (ibfd)->e_flags == 0)
14810 return TRUE;
14811
14812 elf_flags_init (obfd) = TRUE;
14813 elf_elfheader (obfd)->e_flags = in_flags;
14814
14815 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
14816 && bfd_get_arch_info (obfd)->the_default)
14817 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
14818
14819 return TRUE;
14820 }
14821
14822 /* Determine what should happen if the input ARM architecture
14823 does not match the output ARM architecture. */
14824 if (! bfd_arm_merge_machines (ibfd, obfd))
14825 return FALSE;
14826
14827 /* Identical flags must be compatible. */
14828 if (in_flags == out_flags)
14829 return TRUE;
14830
14831 /* Check to see if the input BFD actually contains any sections. If
14832 not, its flags may not have been initialised either, but it
14833 cannot actually cause any incompatiblity. Do not short-circuit
14834 dynamic objects; their section list may be emptied by
14835 elf_link_add_object_symbols.
14836
14837 Also check to see if there are no code sections in the input.
14838 In this case there is no need to check for code specific flags.
14839 XXX - do we need to worry about floating-point format compatability
14840 in data sections ? */
14841 if (!(ibfd->flags & DYNAMIC))
14842 {
14843 bfd_boolean null_input_bfd = TRUE;
14844 bfd_boolean only_data_sections = TRUE;
14845
14846 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
14847 {
14848 /* Ignore synthetic glue sections. */
14849 if (strcmp (sec->name, ".glue_7")
14850 && strcmp (sec->name, ".glue_7t"))
14851 {
14852 if ((bfd_get_section_flags (ibfd, sec)
14853 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14854 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14855 only_data_sections = FALSE;
14856
14857 null_input_bfd = FALSE;
14858 break;
14859 }
14860 }
14861
14862 if (null_input_bfd || only_data_sections)
14863 return TRUE;
14864 }
14865
14866 /* Complain about various flag mismatches. */
14867 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
14868 EF_ARM_EABI_VERSION (out_flags)))
14869 {
14870 _bfd_error_handler
14871 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
14872 ibfd, obfd,
14873 (in_flags & EF_ARM_EABIMASK) >> 24,
14874 (out_flags & EF_ARM_EABIMASK) >> 24);
14875 return FALSE;
14876 }
14877
14878 /* Not sure what needs to be checked for EABI versions >= 1. */
14879 /* VxWorks libraries do not use these flags. */
14880 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
14881 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
14882 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
14883 {
14884 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14885 {
14886 _bfd_error_handler
14887 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
14888 ibfd, obfd,
14889 in_flags & EF_ARM_APCS_26 ? 26 : 32,
14890 out_flags & EF_ARM_APCS_26 ? 26 : 32);
14891 flags_compatible = FALSE;
14892 }
14893
14894 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14895 {
14896 if (in_flags & EF_ARM_APCS_FLOAT)
14897 _bfd_error_handler
14898 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14899 ibfd, obfd);
14900 else
14901 _bfd_error_handler
14902 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14903 ibfd, obfd);
14904
14905 flags_compatible = FALSE;
14906 }
14907
14908 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14909 {
14910 if (in_flags & EF_ARM_VFP_FLOAT)
14911 _bfd_error_handler
14912 (_("error: %B uses VFP instructions, whereas %B does not"),
14913 ibfd, obfd);
14914 else
14915 _bfd_error_handler
14916 (_("error: %B uses FPA instructions, whereas %B does not"),
14917 ibfd, obfd);
14918
14919 flags_compatible = FALSE;
14920 }
14921
14922 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14923 {
14924 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14925 _bfd_error_handler
14926 (_("error: %B uses Maverick instructions, whereas %B does not"),
14927 ibfd, obfd);
14928 else
14929 _bfd_error_handler
14930 (_("error: %B does not use Maverick instructions, whereas %B does"),
14931 ibfd, obfd);
14932
14933 flags_compatible = FALSE;
14934 }
14935
14936#ifdef EF_ARM_SOFT_FLOAT
14937 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14938 {
14939 /* We can allow interworking between code that is VFP format
14940 layout, and uses either soft float or integer regs for
14941 passing floating point arguments and results. We already
14942 know that the APCS_FLOAT flags match; similarly for VFP
14943 flags. */
14944 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14945 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14946 {
14947 if (in_flags & EF_ARM_SOFT_FLOAT)
14948 _bfd_error_handler
14949 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14950 ibfd, obfd);
14951 else
14952 _bfd_error_handler
14953 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14954 ibfd, obfd);
14955
14956 flags_compatible = FALSE;
14957 }
14958 }
14959#endif
14960
14961 /* Interworking mismatch is only a warning. */
14962 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14963 {
14964 if (in_flags & EF_ARM_INTERWORK)
14965 {
14966 _bfd_error_handler
14967 (_("Warning: %B supports interworking, whereas %B does not"),
14968 ibfd, obfd);
14969 }
14970 else
14971 {
14972 _bfd_error_handler
14973 (_("Warning: %B does not support interworking, whereas %B does"),
14974 ibfd, obfd);
14975 }
14976 }
14977 }
14978
14979 return flags_compatible;
14980}
14981
14982
906e58ca 14983/* Symbian OS Targets. */
7f266840 14984
906e58ca 14985#undef TARGET_LITTLE_SYM
7f266840 14986#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 14987#undef TARGET_LITTLE_NAME
7f266840 14988#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 14989#undef TARGET_BIG_SYM
7f266840 14990#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14991#undef TARGET_BIG_NAME
7f266840
DJ		 14992#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14993
14994/* Like elf32_arm_link_hash_table_create -- but overrides
14995 appropriately for Symbian OS. */
906e58ca 14996
7f266840
DJ		 14997static struct bfd_link_hash_table *
14998elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14999{
15000 struct bfd_link_hash_table *ret;
15001
15002 ret = elf32_arm_link_hash_table_create (abfd);
15003 if (ret)
15004 {
15005 struct elf32_arm_link_hash_table *htab
15006 = (struct elf32_arm_link_hash_table *)ret;
15007 /* There is no PLT header for Symbian OS. */
15008 htab->plt_header_size = 0;
95720a86
DJ		 15009 /* The PLT entries are each one instruction and one word. */
15010 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 15011 htab->symbian_p = 1;
33bfe774
JB		 15012 /* Symbian uses armv5t or above, so use_blx is always true. */
15013 htab->use_blx = 1;
67687978 15014 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 15015 }
15016 return ret;
906e58ca 15017}
7f266840 15018
b35d266b 15019static const struct bfd_elf_special_section
551b43fd 15020elf32_arm_symbian_special_sections[] =
7f266840 15021{
5cd3778d
MM		 15022 /* In a BPABI executable, the dynamic linking sections do not go in
15023 the loadable read-only segment. The post-linker may wish to
15024 refer to these sections, but they are not part of the final
15025 program image. */
0112cd26
NC		 15026 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
15027 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
15028 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
15029 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
15030 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 15031 /* These sections do not need to be writable as the SymbianOS
15032 postlinker will arrange things so that no dynamic relocation is
15033 required. */
0112cd26
NC		 15034 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
15035 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
15036 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
15037 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 15038};
15039
c3c76620 15040static void
906e58ca 15041elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 15042 struct bfd_link_info *link_info)
c3c76620
MM		 15043{
15044 /* BPABI objects are never loaded directly by an OS kernel; they are
15045 processed by a postlinker first, into an OS-specific format. If
15046 the D_PAGED bit is set on the file, BFD will align segments on
15047 page boundaries, so that an OS can directly map the file. With
15048 BPABI objects, that just results in wasted space. In addition,
15049 because we clear the D_PAGED bit, map_sections_to_segments will
15050 recognize that the program headers should not be mapped into any
15051 loadable segment. */
15052 abfd->flags &= ~D_PAGED;
906e58ca 15053 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 15054}
7f266840
DJ		 15055
15056static bfd_boolean
906e58ca 15057elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 15058 struct bfd_link_info *info)
7f266840
DJ		 15059{
15060 struct elf_segment_map *m;
15061 asection *dynsec;
15062
7f266840
DJ		 15063 /* BPABI shared libraries and executables should have a PT_DYNAMIC
15064 segment. However, because the .dynamic section is not marked
15065 with SEC_LOAD, the generic ELF code will not create such a
15066 segment. */
15067 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
15068 if (dynsec)
15069 {
8ded5a0f
AM		 15070 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
15071 if (m->p_type == PT_DYNAMIC)
15072 break;
15073
15074 if (m == NULL)
15075 {
15076 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
15077 m->next = elf_tdata (abfd)->segment_map;
15078 elf_tdata (abfd)->segment_map = m;
15079 }
7f266840
DJ		 15080 }
15081
b294bdf8
MM		 15082 /* Also call the generic arm routine. */
15083 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 15084}
15085
95720a86
DJ		 15086/* Return address for Ith PLT stub in section PLT, for relocation REL
15087 or (bfd_vma) -1 if it should not be included. */
15088
15089static bfd_vma
15090elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
15091 const arelent *rel ATTRIBUTE_UNUSED)
15092{
15093 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
15094}
15095
15096
8029a119 15097#undef elf32_bed
7f266840
DJ		 15098#define elf32_bed elf32_arm_symbian_bed
15099
15100/* The dynamic sections are not allocated on SymbianOS; the postlinker
15101 will process them and then discard them. */
906e58ca 15102#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 15103#define ELF_DYNAMIC_SEC_FLAGS \
15104 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
15105
00a97672 15106#undef elf_backend_add_symbol_hook
00a97672 15107#undef elf_backend_emit_relocs
c3c76620 15108
906e58ca
NC		 15109#undef bfd_elf32_bfd_link_hash_table_create
15110#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
15111#undef elf_backend_special_sections
15112#define elf_backend_special_sections elf32_arm_symbian_special_sections
15113#undef elf_backend_begin_write_processing
15114#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
15115#undef elf_backend_final_write_processing
15116#define elf_backend_final_write_processing elf32_arm_final_write_processing
15117
15118#undef elf_backend_modify_segment_map
7f266840
DJ		 15119#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
15120
15121/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 15122#undef elf_backend_got_header_size
7f266840
DJ		 15123#define elf_backend_got_header_size 0
15124
15125/* Similarly, there is no .got.plt section. */
906e58ca 15126#undef elf_backend_want_got_plt
7f266840
DJ		 15127#define elf_backend_want_got_plt 0
15128
906e58ca 15129#undef elf_backend_plt_sym_val
95720a86
DJ		 15130#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
15131
906e58ca 15132#undef elf_backend_may_use_rel_p
00a97672 15133#define elf_backend_may_use_rel_p 1
906e58ca 15134#undef elf_backend_may_use_rela_p
00a97672 15135#define elf_backend_may_use_rela_p 0
906e58ca 15136#undef elf_backend_default_use_rela_p
00a97672 15137#define elf_backend_default_use_rela_p 0
906e58ca 15138#undef elf_backend_want_plt_sym
00a97672 15139#define elf_backend_want_plt_sym 0
906e58ca 15140#undef ELF_MAXPAGESIZE
00a97672 15141#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 15142
7f266840 15143#include "elf32-target.h"
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