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16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
ca557f44 2
51603483 3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
16461d7d
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
d16aafd8 29#include "doublest.h"
fd0407d6 30#include "value.h"
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31
32#include "objfiles.h"
33#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 34#include "elf-bfd.h"
16461d7d 35
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36/* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
40
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
44
45CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
46
47/* An enumeration of the different IA-64 instruction types. */
48
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49typedef enum instruction_type
50{
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
59} instruction_type;
60
61/* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
68
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
75
76#define SLOT_MULTIPLIER 1
77
78/* Length in bytes of an instruction bundle */
79
80#define BUNDLE_LEN 16
81
d7fa2ae2 82/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 83extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 84extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 85
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86static gdbarch_init_ftype ia64_gdbarch_init;
87
88static gdbarch_register_name_ftype ia64_register_name;
89static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92static gdbarch_register_byte_ftype ia64_register_byte;
93static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
94static gdbarch_frame_chain_ftype ia64_frame_chain;
16461d7d 95static gdbarch_skip_prologue_ftype ia64_skip_prologue;
16461d7d 96static gdbarch_get_saved_register_ftype ia64_get_saved_register;
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97static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
98static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
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99static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
100static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
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101static gdbarch_store_struct_return_ftype ia64_store_struct_return;
102static gdbarch_push_arguments_ftype ia64_push_arguments;
103static gdbarch_push_return_address_ftype ia64_push_return_address;
16461d7d 104static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 105static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 106static struct type *is_float_or_hfa_type (struct type *t);
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107
108static int ia64_num_regs = 590;
109
110static int pc_regnum = IA64_IP_REGNUM;
111static int sp_regnum = IA64_GR12_REGNUM;
112static int fp_regnum = IA64_VFP_REGNUM;
113static int lr_regnum = IA64_VRAP_REGNUM;
114
115static LONGEST ia64_call_dummy_words[] = {0};
116
117/* Array of register names; There should be ia64_num_regs strings in
118 the initializer. */
119
120static char *ia64_register_names[] =
121{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
122 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
123 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
124 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
125 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
126 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
127 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
128 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
129 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
130 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
131 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
132 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
133 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
134 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
135 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
136 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
137
138 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
139 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
140 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
141 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
142 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
143 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
144 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
145 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
146 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
147 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
148 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
149 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
150 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
151 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
152 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
153 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
154
155 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
156 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
157 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
158 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
159 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
160 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
161 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
162 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
163
164 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
165
166 "vfp", "vrap",
167
168 "pr", "ip", "psr", "cfm",
169
170 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
171 "", "", "", "", "", "", "", "",
172 "rsc", "bsp", "bspstore", "rnat",
173 "", "fcr", "", "",
174 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
175 "ccv", "", "", "", "unat", "", "", "",
176 "fpsr", "", "", "", "itc",
177 "", "", "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "", "",
179 "pfs", "lc", "ec",
180 "", "", "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "",
187 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
188 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
189 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
190 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
191 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
192 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
193 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
194 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
195 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
196 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
197 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
198 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
199 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
200 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
201 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
202 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
203};
204
205struct frame_extra_info
244bc108
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206 {
207 CORE_ADDR bsp; /* points at r32 for the current frame */
208 CORE_ADDR cfm; /* cfm value for current frame */
209 int sof; /* Size of frame (decoded from cfm value) */
210 int sol; /* Size of locals (decoded from cfm value) */
211 CORE_ADDR after_prologue;
212 /* Address of first instruction after the last
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213 prologue instruction; Note that there may
214 be instructions from the function's body
215 intermingled with the prologue. */
244bc108
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216 int mem_stack_frame_size;
217 /* Size of the memory stack frame (may be zero),
16461d7d 218 or -1 if it has not been determined yet. */
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219 int fp_reg; /* Register number (if any) used a frame pointer
220 for this frame. 0 if no register is being used
16461d7d 221 as the frame pointer. */
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222 };
223
224struct gdbarch_tdep
225 {
226 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 227 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
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228 etc. */
229 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
230 /* OS specific function which, given a frame address
231 and register number, returns the offset to the
232 given register from the start of the frame. */
698cb3f0 233 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
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234 };
235
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236#define SIGCONTEXT_REGISTER_ADDRESS \
237 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
238#define FIND_GLOBAL_POINTER \
239 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d 240
fa88f677 241static const char *
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242ia64_register_name (int reg)
243{
244 return ia64_register_names[reg];
245}
246
247int
248ia64_register_raw_size (int reg)
249{
250 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
251}
252
253int
254ia64_register_virtual_size (int reg)
255{
256 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
257}
258
259/* Return true iff register N's virtual format is different from
260 its raw format. */
261int
262ia64_register_convertible (int nr)
263{
264 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
265}
266
267const struct floatformat floatformat_ia64_ext =
268{
269 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
270 floatformat_intbit_yes
271};
272
273void
274ia64_register_convert_to_virtual (int regnum, struct type *type,
275 char *from, char *to)
276{
277 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
278 {
279 DOUBLEST val;
280 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
281 store_floating(to, TYPE_LENGTH(type), val);
282 }
283 else
284 error("ia64_register_convert_to_virtual called with non floating point register number");
285}
286
287void
288ia64_register_convert_to_raw (struct type *type, int regnum,
289 char *from, char *to)
290{
291 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
292 {
293 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
294 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
295 }
296 else
297 error("ia64_register_convert_to_raw called with non floating point register number");
298}
299
300struct type *
301ia64_register_virtual_type (int reg)
302{
303 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
304 return builtin_type_long_double;
305 else
306 return builtin_type_long;
307}
308
309int
310ia64_register_byte (int reg)
311{
312 return (8 * reg) +
313 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
314}
315
244bc108
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316/* Read the given register from a sigcontext structure in the
317 specified frame. */
318
319static CORE_ADDR
320read_sigcontext_register (struct frame_info *frame, int regnum)
321{
322 CORE_ADDR regaddr;
323
324 if (frame == NULL)
8e65ff28
AC
325 internal_error (__FILE__, __LINE__,
326 "read_sigcontext_register: NULL frame");
5a203e44 327 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
8e65ff28 328 internal_error (__FILE__, __LINE__,
5a203e44 329 "read_sigcontext_register: frame not a signal trampoline");
244bc108 330 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
8e65ff28
AC
331 internal_error (__FILE__, __LINE__,
332 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108 333
1e2330ba 334 regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
244bc108
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335 if (regaddr)
336 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
337 else
8e65ff28
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338 internal_error (__FILE__, __LINE__,
339 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
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340}
341
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342/* Extract ``len'' bits from an instruction bundle starting at
343 bit ``from''. */
344
244bc108 345static long long
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346extract_bit_field (char *bundle, int from, int len)
347{
348 long long result = 0LL;
349 int to = from + len;
350 int from_byte = from / 8;
351 int to_byte = to / 8;
352 unsigned char *b = (unsigned char *) bundle;
353 unsigned char c;
354 int lshift;
355 int i;
356
357 c = b[from_byte];
358 if (from_byte == to_byte)
359 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
360 result = c >> (from % 8);
361 lshift = 8 - (from % 8);
362
363 for (i = from_byte+1; i < to_byte; i++)
364 {
365 result |= ((long long) b[i]) << lshift;
366 lshift += 8;
367 }
368
369 if (from_byte < to_byte && (to % 8 != 0))
370 {
371 c = b[to_byte];
372 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
373 result |= ((long long) c) << lshift;
374 }
375
376 return result;
377}
378
379/* Replace the specified bits in an instruction bundle */
380
244bc108 381static void
16461d7d
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382replace_bit_field (char *bundle, long long val, int from, int len)
383{
384 int to = from + len;
385 int from_byte = from / 8;
386 int to_byte = to / 8;
387 unsigned char *b = (unsigned char *) bundle;
388 unsigned char c;
389
390 if (from_byte == to_byte)
391 {
392 unsigned char left, right;
393 c = b[from_byte];
394 left = (c >> (to % 8)) << (to % 8);
395 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
396 c = (unsigned char) (val & 0xff);
397 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
398 c |= right | left;
399 b[from_byte] = c;
400 }
401 else
402 {
403 int i;
404 c = b[from_byte];
405 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
406 c = c | (val << (from % 8));
407 b[from_byte] = c;
408 val >>= 8 - from % 8;
409
410 for (i = from_byte+1; i < to_byte; i++)
411 {
412 c = val & 0xff;
413 val >>= 8;
414 b[i] = c;
415 }
416
417 if (to % 8 != 0)
418 {
419 unsigned char cv = (unsigned char) val;
420 c = b[to_byte];
421 c = c >> (to % 8) << (to % 8);
422 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
423 b[to_byte] = c;
424 }
425 }
426}
427
428/* Return the contents of slot N (for N = 0, 1, or 2) in
429 and instruction bundle */
430
244bc108 431static long long
2fc3ac7e 432slotN_contents (char *bundle, int slotnum)
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433{
434 return extract_bit_field (bundle, 5+41*slotnum, 41);
435}
436
437/* Store an instruction in an instruction bundle */
438
244bc108 439static void
2fc3ac7e 440replace_slotN_contents (char *bundle, long long instr, int slotnum)
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441{
442 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
443}
444
64a5b29c 445static enum instruction_type template_encoding_table[32][3] =
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446{
447 { M, I, I }, /* 00 */
448 { M, I, I }, /* 01 */
449 { M, I, I }, /* 02 */
450 { M, I, I }, /* 03 */
451 { M, L, X }, /* 04 */
452 { M, L, X }, /* 05 */
453 { undefined, undefined, undefined }, /* 06 */
454 { undefined, undefined, undefined }, /* 07 */
455 { M, M, I }, /* 08 */
456 { M, M, I }, /* 09 */
457 { M, M, I }, /* 0A */
458 { M, M, I }, /* 0B */
459 { M, F, I }, /* 0C */
460 { M, F, I }, /* 0D */
461 { M, M, F }, /* 0E */
462 { M, M, F }, /* 0F */
463 { M, I, B }, /* 10 */
464 { M, I, B }, /* 11 */
465 { M, B, B }, /* 12 */
466 { M, B, B }, /* 13 */
467 { undefined, undefined, undefined }, /* 14 */
468 { undefined, undefined, undefined }, /* 15 */
469 { B, B, B }, /* 16 */
470 { B, B, B }, /* 17 */
471 { M, M, B }, /* 18 */
472 { M, M, B }, /* 19 */
473 { undefined, undefined, undefined }, /* 1A */
474 { undefined, undefined, undefined }, /* 1B */
475 { M, F, B }, /* 1C */
476 { M, F, B }, /* 1D */
477 { undefined, undefined, undefined }, /* 1E */
478 { undefined, undefined, undefined }, /* 1F */
479};
480
481/* Fetch and (partially) decode an instruction at ADDR and return the
482 address of the next instruction to fetch. */
483
484static CORE_ADDR
485fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
486{
487 char bundle[BUNDLE_LEN];
488 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
489 long long template;
490 int val;
491
c26e1c2b
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492 /* Warn about slot numbers greater than 2. We used to generate
493 an error here on the assumption that the user entered an invalid
494 address. But, sometimes GDB itself requests an invalid address.
495 This can (easily) happen when execution stops in a function for
496 which there are no symbols. The prologue scanner will attempt to
497 find the beginning of the function - if the nearest symbol
498 happens to not be aligned on a bundle boundary (16 bytes), the
499 resulting starting address will cause GDB to think that the slot
500 number is too large.
501
502 So we warn about it and set the slot number to zero. It is
503 not necessarily a fatal condition, particularly if debugging
504 at the assembly language level. */
16461d7d 505 if (slotnum > 2)
c26e1c2b
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506 {
507 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
508 "Using slot 0 instead");
509 slotnum = 0;
510 }
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511
512 addr &= ~0x0f;
513
514 val = target_read_memory (addr, bundle, BUNDLE_LEN);
515
516 if (val != 0)
517 return 0;
518
519 *instr = slotN_contents (bundle, slotnum);
520 template = extract_bit_field (bundle, 0, 5);
521 *it = template_encoding_table[(int)template][slotnum];
522
64a5b29c 523 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB
524 addr += 16;
525 else
526 addr += (slotnum + 1) * SLOT_MULTIPLIER;
527
528 return addr;
529}
530
531/* There are 5 different break instructions (break.i, break.b,
532 break.m, break.f, and break.x), but they all have the same
533 encoding. (The five bit template in the low five bits of the
534 instruction bundle distinguishes one from another.)
535
536 The runtime architecture manual specifies that break instructions
537 used for debugging purposes must have the upper two bits of the 21
538 bit immediate set to a 0 and a 1 respectively. A breakpoint
539 instruction encodes the most significant bit of its 21 bit
540 immediate at bit 36 of the 41 bit instruction. The penultimate msb
541 is at bit 25 which leads to the pattern below.
542
543 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
544 it turns out that 0x80000 was used as the syscall break in the early
545 simulators. So I changed the pattern slightly to do "break.i 0x080001"
546 instead. But that didn't work either (I later found out that this
547 pattern was used by the simulator that I was using.) So I ended up
548 using the pattern seen below. */
549
550#if 0
551#define BREAKPOINT 0x00002000040LL
552#endif
553#define BREAKPOINT 0x00003333300LL
554
555static int
556ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
557{
558 char bundle[BUNDLE_LEN];
559 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
560 long long instr;
561 int val;
126fa72d 562 int template;
16461d7d
KB
563
564 if (slotnum > 2)
565 error("Can't insert breakpoint for slot numbers greater than 2.");
566
567 addr &= ~0x0f;
568
569 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
570
571 /* Check for L type instruction in 2nd slot, if present then
572 bump up the slot number to the 3rd slot */
573 template = extract_bit_field (bundle, 0, 5);
574 if (slotnum == 1 && template_encoding_table[template][1] == L)
575 {
576 slotnum = 2;
577 }
578
16461d7d
KB
579 instr = slotN_contents (bundle, slotnum);
580 memcpy(contents_cache, &instr, sizeof(instr));
581 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
582 if (val == 0)
583 target_write_memory (addr, bundle, BUNDLE_LEN);
584
585 return val;
586}
587
588static int
589ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
590{
591 char bundle[BUNDLE_LEN];
592 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
593 long long instr;
594 int val;
126fa72d 595 int template;
16461d7d
KB
596
597 addr &= ~0x0f;
598
599 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
600
601 /* Check for L type instruction in 2nd slot, if present then
602 bump up the slot number to the 3rd slot */
603 template = extract_bit_field (bundle, 0, 5);
604 if (slotnum == 1 && template_encoding_table[template][1] == L)
605 {
606 slotnum = 2;
607 }
608
16461d7d
KB
609 memcpy (&instr, contents_cache, sizeof instr);
610 replace_slotN_contents (bundle, instr, slotnum);
611 if (val == 0)
612 target_write_memory (addr, bundle, BUNDLE_LEN);
613
614 return val;
615}
616
617/* We don't really want to use this, but remote.c needs to call it in order
618 to figure out if Z-packets are supported or not. Oh, well. */
f4f9705a 619const unsigned char *
fba45db2 620ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB
621{
622 static unsigned char breakpoint[] =
623 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
624 *lenptr = sizeof (breakpoint);
625#if 0
626 *pcptr &= ~0x0f;
627#endif
628 return breakpoint;
629}
630
631CORE_ADDR
39f77062 632ia64_read_pc (ptid_t ptid)
16461d7d 633{
39f77062
KB
634 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
635 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
16461d7d
KB
636 int slot_num = (psr_value >> 41) & 3;
637
638 return pc_value | (slot_num * SLOT_MULTIPLIER);
639}
640
641void
39f77062 642ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
16461d7d
KB
643{
644 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
39f77062 645 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
16461d7d
KB
646 psr_value &= ~(3LL << 41);
647 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
648
649 new_pc &= ~0xfLL;
650
39f77062
KB
651 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
652 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
16461d7d
KB
653}
654
655#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
656
657/* Returns the address of the slot that's NSLOTS slots away from
658 the address ADDR. NSLOTS may be positive or negative. */
659static CORE_ADDR
660rse_address_add(CORE_ADDR addr, int nslots)
661{
662 CORE_ADDR new_addr;
663 int mandatory_nat_slots = nslots / 63;
664 int direction = nslots < 0 ? -1 : 1;
665
666 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
667
668 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
669 new_addr += 8 * direction;
670
671 if (IS_NaT_COLLECTION_ADDR(new_addr))
672 new_addr += 8 * direction;
673
674 return new_addr;
675}
676
677/* The IA-64 frame chain is a bit odd. We won't always have a frame
678 pointer, so we use the SP value as the FP for the purpose of
679 creating a frame. There is sometimes a register (not fixed) which
680 is used as a frame pointer. When this register exists, it is not
681 especially hard to determine which one is being used. It isn't
682 even really hard to compute the frame chain, but it can be
683 computationally expensive. So, instead of making life difficult
684 (and slow), we pick a more convenient representation of the frame
8227c0ff
AC
685 chain, knowing that we'll have to make some small adjustments in
686 other places. (E.g, note that read_fp() is actually read_sp() in
687 ia64_gdbarch_init() below.)
16461d7d
KB
688
689 Okay, so what is the frame chain exactly? It'll be the SP value
690 at the time that the function in question was entered.
691
692 Note that this *should* actually the frame pointer for the current
693 function! But as I note above, if we were to attempt to find the
694 address of the beginning of the previous frame, we'd waste a lot
695 of cycles for no good reason. So instead, we simply choose to
696 represent the frame chain as the end of the previous frame instead
697 of the beginning. */
698
699CORE_ADDR
700ia64_frame_chain (struct frame_info *frame)
701{
5a203e44 702 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 703 return read_sigcontext_register (frame, sp_regnum);
1e2330ba
AC
704 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
705 get_frame_base (frame),
706 get_frame_base (frame)))
707 return get_frame_base (frame);
16461d7d 708 else
244bc108 709 {
f30ee0bc 710 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
711 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
712 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
244bc108 713 else
1e2330ba 714 return (get_frame_base (frame)
da50a4b7 715 + get_frame_extra_info (frame)->mem_stack_frame_size);
244bc108 716 }
16461d7d
KB
717}
718
719CORE_ADDR
720ia64_frame_saved_pc (struct frame_info *frame)
721{
5a203e44 722 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 723 return read_sigcontext_register (frame, pc_regnum);
1e2330ba
AC
724 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
725 get_frame_base (frame),
726 get_frame_base (frame)))
727 return deprecated_read_register_dummy (get_frame_pc (frame),
728 get_frame_base (frame), pc_regnum);
244bc108
KB
729 else
730 {
f30ee0bc 731 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
16461d7d 732
b2fb4676
AC
733 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
734 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
11c02a10
AC
735 else if (get_next_frame (frame)
736 && (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
737 return read_sigcontext_register (get_next_frame (frame), IA64_BR0_REGNUM);
244bc108
KB
738 else /* either frameless, or not far enough along in the prologue... */
739 return ia64_saved_pc_after_call (frame);
740 }
16461d7d
KB
741}
742
58ab00f9
KB
743/* Limit the number of skipped non-prologue instructions since examining
744 of the prologue is expensive. */
745static int max_skip_non_prologue_insns = 10;
746
747/* Given PC representing the starting address of a function, and
748 LIM_PC which is the (sloppy) limit to which to scan when looking
749 for a prologue, attempt to further refine this limit by using
750 the line data in the symbol table. If successful, a better guess
751 on where the prologue ends is returned, otherwise the previous
752 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
753 which will be set to indicate whether the returned limit may be
754 used with no further scanning in the event that the function is
755 frameless. */
756
757static CORE_ADDR
758refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
759{
760 struct symtab_and_line prologue_sal;
761 CORE_ADDR start_pc = pc;
762
763 /* Start off not trusting the limit. */
764 *trust_limit = 0;
765
766 prologue_sal = find_pc_line (pc, 0);
767 if (prologue_sal.line != 0)
768 {
769 int i;
770 CORE_ADDR addr = prologue_sal.end;
771
772 /* Handle the case in which compiler's optimizer/scheduler
773 has moved instructions into the prologue. We scan ahead
774 in the function looking for address ranges whose corresponding
775 line number is less than or equal to the first one that we
776 found for the function. (It can be less than when the
777 scheduler puts a body instruction before the first prologue
778 instruction.) */
779 for (i = 2 * max_skip_non_prologue_insns;
780 i > 0 && (lim_pc == 0 || addr < lim_pc);
781 i--)
782 {
783 struct symtab_and_line sal;
784
785 sal = find_pc_line (addr, 0);
786 if (sal.line == 0)
787 break;
788 if (sal.line <= prologue_sal.line
789 && sal.symtab == prologue_sal.symtab)
790 {
791 prologue_sal = sal;
792 }
793 addr = sal.end;
794 }
795
796 if (lim_pc == 0 || prologue_sal.end < lim_pc)
797 {
798 lim_pc = prologue_sal.end;
799 if (start_pc == get_pc_function_start (lim_pc))
800 *trust_limit = 1;
801 }
802 }
803 return lim_pc;
804}
805
16461d7d
KB
806#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
807 || (8 <= (_regnum_) && (_regnum_) <= 11) \
808 || (14 <= (_regnum_) && (_regnum_) <= 31))
809#define imm9(_instr_) \
810 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
811 | (((_instr_) & 0x00008000000LL) >> 20) \
812 | (((_instr_) & 0x00000001fc0LL) >> 6))
813
814static CORE_ADDR
815examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
816{
817 CORE_ADDR next_pc;
818 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB
819 instruction_type it;
820 long long instr;
821 int do_fsr_stuff = 0;
822
823 int cfm_reg = 0;
824 int ret_reg = 0;
825 int fp_reg = 0;
826 int unat_save_reg = 0;
827 int pr_save_reg = 0;
828 int mem_stack_frame_size = 0;
829 int spill_reg = 0;
830 CORE_ADDR spill_addr = 0;
0927a22b
KB
831 char instores[8];
832 char infpstores[8];
58ab00f9 833 int trust_limit;
0927a22b
KB
834
835 memset (instores, 0, sizeof instores);
836 memset (infpstores, 0, sizeof infpstores);
16461d7d 837
b2fb4676 838 if (frame && !get_frame_saved_regs (frame))
16461d7d
KB
839 {
840 frame_saved_regs_zalloc (frame);
841 do_fsr_stuff = 1;
842 }
843
844 if (frame
845 && !do_fsr_stuff
da50a4b7
AC
846 && get_frame_extra_info (frame)->after_prologue != 0
847 && get_frame_extra_info (frame)->after_prologue <= lim_pc)
848 return get_frame_extra_info (frame)->after_prologue;
16461d7d 849
58ab00f9
KB
850 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
851
16461d7d
KB
852 /* Must start with an alloc instruction */
853 next_pc = fetch_instruction (pc, &it, &instr);
854 if (pc < lim_pc && next_pc
855 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
856 {
857 /* alloc */
858 int sor = (int) ((instr & 0x00078000000LL) >> 27);
859 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
860 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
861 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
862 we could compare against the size given to us via the cfm as
863 either a sanity check or possibly to see if the frame has been
864 changed by a later alloc instruction... */
865 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
866 cfm_reg = rN;
867 last_prologue_pc = next_pc;
868 pc = next_pc;
869 }
870 else
58ab00f9
KB
871 {
872 pc = lim_pc; /* Frameless: We're done early. */
873 if (trust_limit)
874 last_prologue_pc = lim_pc;
875 }
16461d7d
KB
876
877 /* Loop, looking for prologue instructions, keeping track of
878 where preserved registers were spilled. */
879 while (pc < lim_pc)
880 {
881 next_pc = fetch_instruction (pc, &it, &instr);
882 if (next_pc == 0)
883 break;
884
902d7086
KB
885 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
886 || ((instr & 0x3fLL) != 0LL))
0927a22b 887 {
902d7086
KB
888 /* Exit loop upon hitting a non-nop branch instruction
889 or a predicated instruction. */
0927a22b
KB
890 break;
891 }
892 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB
893 {
894 /* Move from BR */
895 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
896 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
897 int qp = (int) (instr & 0x0000000003f);
898
899 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
900 {
901 ret_reg = rN;
902 last_prologue_pc = next_pc;
903 }
904 }
905 else if ((it == I || it == M)
906 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
907 {
908 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
909 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
910 | ((instr & 0x001f8000000LL) >> 20)
911 | ((instr & 0x000000fe000LL) >> 13));
912 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
913 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
914 int qp = (int) (instr & 0x0000000003fLL);
915
916 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
917 {
918 /* mov rN, r12 */
919 fp_reg = rN;
920 last_prologue_pc = next_pc;
921 }
922 else if (qp == 0 && rN == 12 && rM == 12)
923 {
924 /* adds r12, -mem_stack_frame_size, r12 */
925 mem_stack_frame_size -= imm;
926 last_prologue_pc = next_pc;
927 }
928 else if (qp == 0 && rN == 2
929 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
930 {
931 /* adds r2, spilloffset, rFramePointer
932 or
933 adds r2, spilloffset, r12
934
935 Get ready for stf.spill or st8.spill instructions.
936 The address to start spilling at is loaded into r2.
937 FIXME: Why r2? That's what gcc currently uses; it
938 could well be different for other compilers. */
939
940 /* Hmm... whether or not this will work will depend on
941 where the pc is. If it's still early in the prologue
942 this'll be wrong. FIXME */
1e2330ba 943 spill_addr = (frame ? get_frame_base (frame) : 0)
16461d7d
KB
944 + (rM == 12 ? 0 : mem_stack_frame_size)
945 + imm;
946 spill_reg = rN;
947 last_prologue_pc = next_pc;
948 }
949 }
950 else if (it == M
951 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
952 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
953 {
954 /* stf.spill [rN] = fM, imm9
955 or
956 stf.spill [rN] = fM */
957
958 int imm = imm9(instr);
959 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
960 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
961 int qp = (int) (instr & 0x0000000003fLL);
962 if (qp == 0 && rN == spill_reg && spill_addr != 0
963 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
964 {
965 if (do_fsr_stuff)
b2fb4676 966 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
16461d7d
KB
967
968 if ((instr & 0x1efc0000000) == 0x0eec0000000)
969 spill_addr += imm;
970 else
971 spill_addr = 0; /* last one; must be done */
972 last_prologue_pc = next_pc;
973 }
974 }
975 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
976 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
977 {
978 /* mov.m rN = arM
979 or
980 mov.i rN = arM */
981
982 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
983 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
984 int qp = (int) (instr & 0x0000000003fLL);
985 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
986 {
987 /* We have something like "mov.m r3 = ar.unat". Remember the
988 r3 (or whatever) and watch for a store of this register... */
989 unat_save_reg = rN;
990 last_prologue_pc = next_pc;
991 }
992 }
993 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
994 {
995 /* mov rN = pr */
996 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
997 int qp = (int) (instr & 0x0000000003fLL);
998 if (qp == 0 && isScratch (rN))
999 {
1000 pr_save_reg = rN;
1001 last_prologue_pc = next_pc;
1002 }
1003 }
1004 else if (it == M
1005 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1006 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1007 {
1008 /* st8 [rN] = rM
1009 or
1010 st8 [rN] = rM, imm9 */
1011 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1012 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1013 int qp = (int) (instr & 0x0000000003fLL);
1014 if (qp == 0 && rN == spill_reg && spill_addr != 0
1015 && (rM == unat_save_reg || rM == pr_save_reg))
1016 {
1017 /* We've found a spill of either the UNAT register or the PR
1018 register. (Well, not exactly; what we've actually found is
1019 a spill of the register that UNAT or PR was moved to).
1020 Record that fact and move on... */
1021 if (rM == unat_save_reg)
1022 {
1023 /* Track UNAT register */
1024 if (do_fsr_stuff)
b2fb4676 1025 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
16461d7d
KB
1026 unat_save_reg = 0;
1027 }
1028 else
1029 {
1030 /* Track PR register */
1031 if (do_fsr_stuff)
b2fb4676 1032 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
16461d7d
KB
1033 pr_save_reg = 0;
1034 }
1035 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1036 /* st8 [rN] = rM, imm9 */
1037 spill_addr += imm9(instr);
1038 else
1039 spill_addr = 0; /* must be done spilling */
1040 last_prologue_pc = next_pc;
1041 }
0927a22b
KB
1042 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1043 {
1044 /* Allow up to one store of each input register. */
1045 instores[rM-32] = 1;
1046 last_prologue_pc = next_pc;
1047 }
1048 }
1049 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1050 {
1051 /* One of
1052 st1 [rN] = rM
1053 st2 [rN] = rM
1054 st4 [rN] = rM
1055 st8 [rN] = rM
1056 Note that the st8 case is handled in the clause above.
1057
1058 Advance over stores of input registers. One store per input
1059 register is permitted. */
1060 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1061 int qp = (int) (instr & 0x0000000003fLL);
1062 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1063 {
1064 instores[rM-32] = 1;
1065 last_prologue_pc = next_pc;
1066 }
1067 }
1068 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1069 {
1070 /* Either
1071 stfs [rN] = fM
1072 or
1073 stfd [rN] = fM
1074
1075 Advance over stores of floating point input registers. Again
1076 one store per register is permitted */
1077 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1078 int qp = (int) (instr & 0x0000000003fLL);
1079 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1080 {
1081 infpstores[fM-8] = 1;
1082 last_prologue_pc = next_pc;
1083 }
16461d7d
KB
1084 }
1085 else if (it == M
1086 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1087 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1088 {
1089 /* st8.spill [rN] = rM
1090 or
1091 st8.spill [rN] = rM, imm9 */
1092 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1093 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1094 int qp = (int) (instr & 0x0000000003fLL);
1095 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1096 {
1097 /* We've found a spill of one of the preserved general purpose
1098 regs. Record the spill address and advance the spill
1099 register if appropriate. */
1100 if (do_fsr_stuff)
b2fb4676 1101 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
16461d7d
KB
1102 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1103 /* st8.spill [rN] = rM, imm9 */
1104 spill_addr += imm9(instr);
1105 else
1106 spill_addr = 0; /* Done spilling */
1107 last_prologue_pc = next_pc;
1108 }
1109 }
16461d7d
KB
1110
1111 pc = next_pc;
1112 }
1113
1114 if (do_fsr_stuff) {
1115 int i;
1116 CORE_ADDR addr;
3a854e23
KB
1117 int sor, rrb_gr;
1118
1119 /* Extract the size of the rotating portion of the stack
1120 frame and the register rename base from the current
1121 frame marker. */
da50a4b7
AC
1122 sor = ((get_frame_extra_info (frame)->cfm >> 14) & 0xf) * 8;
1123 rrb_gr = (get_frame_extra_info (frame)->cfm >> 18) & 0x7f;
16461d7d 1124
da50a4b7
AC
1125 for (i = 0, addr = get_frame_extra_info (frame)->bsp;
1126 i < get_frame_extra_info (frame)->sof;
16461d7d
KB
1127 i++, addr += 8)
1128 {
1129 if (IS_NaT_COLLECTION_ADDR (addr))
1130 {
1131 addr += 8;
1132 }
3a854e23 1133 if (i < sor)
b2fb4676 1134 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
3a854e23
KB
1135 = addr;
1136 else
b2fb4676 1137 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB
1138
1139 if (i+32 == cfm_reg)
b2fb4676 1140 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
16461d7d 1141 if (i+32 == ret_reg)
b2fb4676 1142 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
16461d7d 1143 if (i+32 == fp_reg)
b2fb4676 1144 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
16461d7d
KB
1145 }
1146 }
1147
da50a4b7
AC
1148 if (frame && get_frame_extra_info (frame))
1149 {
1150 get_frame_extra_info (frame)->after_prologue = last_prologue_pc;
1151 get_frame_extra_info (frame)->mem_stack_frame_size = mem_stack_frame_size;
1152 get_frame_extra_info (frame)->fp_reg = fp_reg;
1153 }
16461d7d
KB
1154
1155 return last_prologue_pc;
1156}
1157
1158CORE_ADDR
1159ia64_skip_prologue (CORE_ADDR pc)
1160{
1161 return examine_prologue (pc, pc+1024, 0);
1162}
1163
1164void
1165ia64_frame_init_saved_regs (struct frame_info *frame)
1166{
b2fb4676 1167 if (get_frame_saved_regs (frame))
16461d7d
KB
1168 return;
1169
5a203e44 1170 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
244bc108
KB
1171 {
1172 int regno;
16461d7d 1173
244bc108 1174 frame_saved_regs_zalloc (frame);
16461d7d 1175
b2fb4676 1176 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
1e2330ba 1177 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
b2fb4676 1178 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
1e2330ba 1179 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
b2fb4676 1180 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
1e2330ba 1181 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
244bc108 1182#if 0
b2fb4676 1183 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
244bc108
KB
1184 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1185#endif
b2fb4676 1186 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
1e2330ba 1187 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
b2fb4676 1188 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
1e2330ba 1189 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
b2fb4676 1190 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
1e2330ba 1191 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
b2fb4676 1192 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
1e2330ba 1193 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
b2fb4676 1194 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
1e2330ba 1195 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
b2fb4676 1196 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
1e2330ba 1197 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
244bc108
KB
1198 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1199 if (regno != sp_regnum)
b2fb4676 1200 get_frame_saved_regs (frame)[regno] =
1e2330ba 1201 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1202 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1203 get_frame_saved_regs (frame)[regno] =
1e2330ba 1204 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1205 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1206 get_frame_saved_regs (frame)[regno] =
1e2330ba 1207 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
16461d7d
KB
1208 }
1209 else
1210 {
244bc108 1211 CORE_ADDR func_start;
16461d7d 1212
50abf9e5
AC
1213 func_start = get_pc_function_start (get_frame_pc (frame));
1214 examine_prologue (func_start, get_frame_pc (frame), frame);
244bc108 1215 }
16461d7d
KB
1216}
1217
1218void
1219ia64_get_saved_register (char *raw_buffer,
1220 int *optimized,
1221 CORE_ADDR *addrp,
1222 struct frame_info *frame,
1223 int regnum,
1224 enum lval_type *lval)
1225{
244bc108 1226 int is_dummy_frame;
16461d7d
KB
1227
1228 if (!target_has_registers)
1229 error ("No registers.");
1230
1231 if (optimized != NULL)
1232 *optimized = 0;
244bc108
KB
1233
1234 if (addrp != NULL)
1235 *addrp = 0;
1236
1237 if (lval != NULL)
1238 *lval = not_lval;
1239
1e2330ba
AC
1240 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1241 get_frame_base (frame),
1242 get_frame_base (frame));
244bc108 1243
11c02a10 1244 if (regnum == SP_REGNUM && get_next_frame (frame))
16461d7d
KB
1245 {
1246 /* Handle SP values for all frames but the topmost. */
1e2330ba
AC
1247 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1248 get_frame_base (frame));
16461d7d
KB
1249 }
1250 else if (regnum == IA64_BSP_REGNUM)
1251 {
16461d7d 1252 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
da50a4b7 1253 get_frame_extra_info (frame)->bsp);
16461d7d
KB
1254 }
1255 else if (regnum == IA64_VFP_REGNUM)
1256 {
1257 /* If the function in question uses an automatic register (r32-r127)
1258 for the frame pointer, it'll be found by ia64_find_saved_register()
1259 above. If the function lacks one of these frame pointers, we can
1260 still provide a value since we know the size of the frame */
1e2330ba 1261 CORE_ADDR vfp = (get_frame_base (frame)
da50a4b7 1262 + get_frame_extra_info (frame)->mem_stack_frame_size);
16461d7d
KB
1263 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1264 }
1265 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1266 {
2fc3ac7e 1267 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1268 int pr_optim;
1269 enum lval_type pr_lval;
1270 CORE_ADDR pr_addr;
1271 int prN_val;
1272 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1273 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB
1274 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1275 {
1276 /* Fetch predicate register rename base from current frame
1277 marker for this frame. */
da50a4b7 1278 int rrb_pr = (get_frame_extra_info (frame)->cfm >> 32) & 0x3f;
3a854e23
KB
1279
1280 /* Adjust the register number to account for register rotation. */
1281 regnum = IA64_PR16_REGNUM
1282 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1283 }
16461d7d
KB
1284 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1285 regnum - IA64_PR0_REGNUM, 1);
1286 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB
1287 }
1288 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1289 {
2fc3ac7e 1290 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1291 int unat_optim;
1292 enum lval_type unat_lval;
1293 CORE_ADDR unat_addr;
1294 int unatN_val;
1295 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1296 frame, IA64_UNAT_REGNUM, &unat_lval);
1297 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1298 regnum - IA64_NAT0_REGNUM, 1);
1299 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1300 unatN_val);
16461d7d
KB
1301 }
1302 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1303 {
1304 int natval = 0;
1305 /* Find address of general register corresponding to nat bit we're
1306 interested in. */
244bc108
KB
1307 CORE_ADDR gr_addr = 0;
1308
1309 if (!is_dummy_frame)
1310 {
f30ee0bc 1311 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
1312 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1313 + IA64_GR0_REGNUM];
244bc108 1314 }
16461d7d
KB
1315 if (gr_addr)
1316 {
1317 /* Compute address of nat collection bits */
1318 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1319 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1320 CORE_ADDR nat_collection;
1321 int nat_bit;
1322 /* If our nat collection address is bigger than bsp, we have to get
1323 the nat collection from rnat. Otherwise, we fetch the nat
1324 collection from the computed address. */
1325 if (nat_addr >= bsp)
1326 nat_collection = read_register (IA64_RNAT_REGNUM);
1327 else
1328 nat_collection = read_memory_integer (nat_addr, 8);
1329 nat_bit = (gr_addr >> 3) & 0x3f;
1330 natval = (nat_collection >> nat_bit) & 1;
1331 }
1332 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB
1333 }
1334 else if (regnum == IA64_IP_REGNUM)
1335 {
1336 CORE_ADDR pc;
11c02a10 1337 if (get_next_frame (frame))
244bc108
KB
1338 {
1339 /* FIXME: Set *addrp, *lval when possible. */
11c02a10 1340 pc = ia64_frame_saved_pc (get_next_frame (frame));
244bc108
KB
1341 }
1342 else
1343 {
1344 pc = read_pc ();
1345 }
1346 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1347 }
1348 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1349 {
1350 CORE_ADDR addr = 0;
1351 if (!is_dummy_frame)
1352 {
f30ee0bc 1353 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676 1354 addr = get_frame_saved_regs (frame)[regnum];
244bc108
KB
1355 }
1356
1357 if (addr != 0)
1358 {
1359 if (lval != NULL)
1360 *lval = lval_memory;
1361 if (addrp != NULL)
1362 *addrp = addr;
1363 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1364 }
1365 else
1366 {
1367 /* r32 - r127 must be fetchable via memory. If they aren't,
1368 then the register is unavailable */
1369 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1370 }
16461d7d
KB
1371 }
1372 else
1373 {
3a854e23
KB
1374 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1375 {
1376 /* Fetch floating point register rename base from current
1377 frame marker for this frame. */
da50a4b7 1378 int rrb_fr = (get_frame_extra_info (frame)->cfm >> 25) & 0x7f;
3a854e23
KB
1379
1380 /* Adjust the floating point register number to account for
1381 register rotation. */
1382 regnum = IA64_FR32_REGNUM
1383 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1384 }
1385
bdcdd535
AC
1386 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1387 frame, regnum, lval);
16461d7d 1388 }
16461d7d
KB
1389}
1390
1391/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1392 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1393 and TYPE is the type (which is known to be struct, union or array). */
1394int
1395ia64_use_struct_convention (int gcc_p, struct type *type)
1396{
64a5b29c
KB
1397 struct type *float_elt_type;
1398
1399 /* HFAs are structures (or arrays) consisting entirely of floating
1400 point values of the same length. Up to 8 of these are returned
1401 in registers. Don't use the struct convention when this is the
1402 case. */
1403 float_elt_type = is_float_or_hfa_type (type);
1404 if (float_elt_type != NULL
1405 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1406 return 0;
1407
1408 /* Other structs of length 32 or less are returned in r8-r11.
1409 Don't use the struct convention for those either. */
16461d7d
KB
1410 return TYPE_LENGTH (type) > 32;
1411}
1412
1413void
1414ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1415{
64a5b29c
KB
1416 struct type *float_elt_type;
1417
1418 float_elt_type = is_float_or_hfa_type (type);
1419 if (float_elt_type != NULL)
1420 {
1421 int offset = 0;
1422 int regnum = IA64_FR8_REGNUM;
1423 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1424
1425 while (n-- > 0)
1426 {
1427 ia64_register_convert_to_virtual (regnum, float_elt_type,
1428 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1429 offset += TYPE_LENGTH (float_elt_type);
1430 regnum++;
1431 }
1432 }
16461d7d 1433 else
64a5b29c
KB
1434 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1435 TYPE_LENGTH (type));
16461d7d
KB
1436}
1437
1438/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1439 like this is necessary though since the IA-64 calling conventions specify
1440 that r8 is not preserved. */
1441static CORE_ADDR struct_return_address;
1442
1443CORE_ADDR
1444ia64_extract_struct_value_address (char *regbuf)
1445{
1446 /* FIXME: See above. */
1447 return struct_return_address;
1448}
1449
1450void
1451ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1452{
1453 /* FIXME: See above. */
1454 /* Note that most of the work was done in ia64_push_arguments() */
1455 struct_return_address = addr;
1456}
1457
1458int
1459ia64_frameless_function_invocation (struct frame_info *frame)
1460{
f30ee0bc 1461 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
da50a4b7 1462 return (get_frame_extra_info (frame)->mem_stack_frame_size == 0);
16461d7d
KB
1463}
1464
1465CORE_ADDR
1466ia64_saved_pc_after_call (struct frame_info *frame)
1467{
1468 return read_register (IA64_BR0_REGNUM);
1469}
1470
1471CORE_ADDR
1472ia64_frame_args_address (struct frame_info *frame)
1473{
1474 /* frame->frame points at the SP for this frame; But we want the start
1475 of the frame, not the end. Calling frame chain will get his for us. */
1476 return ia64_frame_chain (frame);
1477}
1478
1479CORE_ADDR
1480ia64_frame_locals_address (struct frame_info *frame)
1481{
1482 /* frame->frame points at the SP for this frame; But we want the start
1483 of the frame, not the end. Calling frame chain will get his for us. */
1484 return ia64_frame_chain (frame);
1485}
1486
1487void
1488ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1489{
1490 CORE_ADDR bsp, cfm;
11c02a10
AC
1491 int next_frame_is_call_dummy = ((get_next_frame (frame) != NULL)
1492 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frame)),
1493 get_frame_base (get_next_frame (frame)),
1494 get_frame_base (get_next_frame (frame))));
16461d7d 1495
a00a19e9 1496 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
16461d7d 1497
11c02a10 1498 if (get_next_frame (frame) == 0)
16461d7d
KB
1499 {
1500 bsp = read_register (IA64_BSP_REGNUM);
1501 cfm = read_register (IA64_CFM_REGNUM);
1502
1503 }
11c02a10 1504 else if ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
244bc108 1505 {
11c02a10
AC
1506 bsp = read_sigcontext_register (get_next_frame (frame), IA64_BSP_REGNUM);
1507 cfm = read_sigcontext_register (get_next_frame (frame), IA64_CFM_REGNUM);
244bc108
KB
1508 }
1509 else if (next_frame_is_call_dummy)
1510 {
11c02a10
AC
1511 bsp = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1512 get_frame_base (get_next_frame (frame)),
135c175f 1513 IA64_BSP_REGNUM);
11c02a10
AC
1514 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1515 get_frame_base (get_next_frame (frame)),
135c175f 1516 IA64_CFM_REGNUM);
244bc108 1517 }
16461d7d
KB
1518 else
1519 {
11c02a10 1520 struct frame_info *frn = get_next_frame (frame);
16461d7d 1521
f30ee0bc 1522 DEPRECATED_FRAME_INIT_SAVED_REGS (frn);
16461d7d 1523
b2fb4676
AC
1524 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1525 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
11c02a10
AC
1526 else if (get_next_frame (frn) && (get_frame_type (get_next_frame (frn)) == SIGTRAMP_FRAME))
1527 cfm = read_sigcontext_register (get_next_frame (frn), IA64_PFS_REGNUM);
1528 else if (get_next_frame (frn)
1529 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frn)),
1530 get_frame_base (get_next_frame (frn)),
1531 get_frame_base (get_next_frame (frn))))
1532 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frn)),
1533 get_frame_base (get_next_frame (frn)),
135c175f 1534 IA64_PFS_REGNUM);
16461d7d 1535 else
76d689a6 1536 cfm = read_register (IA64_PFS_REGNUM);
16461d7d 1537
da50a4b7 1538 bsp = get_frame_extra_info (frn)->bsp;
16461d7d 1539 }
da50a4b7
AC
1540 get_frame_extra_info (frame)->cfm = cfm;
1541 get_frame_extra_info (frame)->sof = cfm & 0x7f;
1542 get_frame_extra_info (frame)->sol = (cfm >> 7) & 0x7f;
11c02a10
AC
1543 if (get_next_frame (frame) == 0
1544 || (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME)
244bc108 1545 || next_frame_is_call_dummy)
da50a4b7
AC
1546 get_frame_extra_info (frame)->bsp =
1547 rse_address_add (bsp, -get_frame_extra_info (frame)->sof);
16461d7d 1548 else
da50a4b7
AC
1549 get_frame_extra_info (frame)->bsp =
1550 rse_address_add (bsp, -get_frame_extra_info (frame)->sol);
16461d7d 1551
da50a4b7
AC
1552 get_frame_extra_info (frame)->after_prologue = 0;
1553 get_frame_extra_info (frame)->mem_stack_frame_size = -1; /* Not yet determined */
1554 get_frame_extra_info (frame)->fp_reg = 0;
16461d7d
KB
1555}
1556
64a5b29c
KB
1557static int
1558is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1559{
1560 switch (TYPE_CODE (t))
1561 {
1562 case TYPE_CODE_FLT:
1563 if (*etp)
1564 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1565 else
1566 {
1567 *etp = t;
1568 return 1;
1569 }
1570 break;
1571 case TYPE_CODE_ARRAY:
98f96ba1
KB
1572 return
1573 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1574 etp);
64a5b29c
KB
1575 break;
1576 case TYPE_CODE_STRUCT:
1577 {
1578 int i;
1579
1580 for (i = 0; i < TYPE_NFIELDS (t); i++)
98f96ba1
KB
1581 if (!is_float_or_hfa_type_recurse
1582 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
64a5b29c
KB
1583 return 0;
1584 return 1;
1585 }
1586 break;
1587 default:
1588 return 0;
1589 break;
1590 }
1591}
1592
1593/* Determine if the given type is one of the floating point types or
1594 and HFA (which is a struct, array, or combination thereof whose
1595 bottom-most elements are all of the same floating point type.) */
1596
1597static struct type *
1598is_float_or_hfa_type (struct type *t)
1599{
1600 struct type *et = 0;
1601
1602 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1603}
1604
1605
98f96ba1
KB
1606/* Return 1 if the alignment of T is such that the next even slot
1607 should be used. Return 0, if the next available slot should
1608 be used. (See section 8.5.1 of the IA-64 Software Conventions
1609 and Runtime manual.) */
1610
1611static int
1612slot_alignment_is_next_even (struct type *t)
1613{
1614 switch (TYPE_CODE (t))
1615 {
1616 case TYPE_CODE_INT:
1617 case TYPE_CODE_FLT:
1618 if (TYPE_LENGTH (t) > 8)
1619 return 1;
1620 else
1621 return 0;
1622 case TYPE_CODE_ARRAY:
1623 return
1624 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1625 case TYPE_CODE_STRUCT:
1626 {
1627 int i;
1628
1629 for (i = 0; i < TYPE_NFIELDS (t); i++)
1630 if (slot_alignment_is_next_even
1631 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1632 return 1;
1633 return 0;
1634 }
1635 default:
1636 return 0;
1637 }
1638}
1639
64a5b29c
KB
1640/* Attempt to find (and return) the global pointer for the given
1641 function.
1642
1643 This is a rather nasty bit of code searchs for the .dynamic section
1644 in the objfile corresponding to the pc of the function we're trying
1645 to call. Once it finds the addresses at which the .dynamic section
1646 lives in the child process, it scans the Elf64_Dyn entries for a
1647 DT_PLTGOT tag. If it finds one of these, the corresponding
1648 d_un.d_ptr value is the global pointer. */
1649
1650static CORE_ADDR
698cb3f0 1651generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1652{
76d689a6 1653 struct obj_section *faddr_sect;
64a5b29c 1654
76d689a6
KB
1655 faddr_sect = find_pc_section (faddr);
1656 if (faddr_sect != NULL)
64a5b29c
KB
1657 {
1658 struct obj_section *osect;
1659
76d689a6 1660 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1661 {
1662 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1663 break;
1664 }
1665
76d689a6 1666 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1667 {
1668 CORE_ADDR addr;
1669
1670 addr = osect->addr;
1671 while (addr < osect->endaddr)
1672 {
1673 int status;
1674 LONGEST tag;
1675 char buf[8];
1676
1677 status = target_read_memory (addr, buf, sizeof (buf));
1678 if (status != 0)
1679 break;
1680 tag = extract_signed_integer (buf, sizeof (buf));
1681
1682 if (tag == DT_PLTGOT)
1683 {
1684 CORE_ADDR global_pointer;
1685
1686 status = target_read_memory (addr + 8, buf, sizeof (buf));
1687 if (status != 0)
1688 break;
1689 global_pointer = extract_address (buf, sizeof (buf));
1690
1691 /* The payoff... */
1692 return global_pointer;
1693 }
1694
1695 if (tag == DT_NULL)
1696 break;
1697
1698 addr += 16;
1699 }
1700 }
1701 }
1702 return 0;
1703}
1704
1705/* Given a function's address, attempt to find (and return) the
1706 corresponding (canonical) function descriptor. Return 0 if
1707 not found. */
1708static CORE_ADDR
1709find_extant_func_descr (CORE_ADDR faddr)
1710{
76d689a6 1711 struct obj_section *faddr_sect;
64a5b29c
KB
1712
1713 /* Return early if faddr is already a function descriptor */
76d689a6
KB
1714 faddr_sect = find_pc_section (faddr);
1715 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB
1716 return faddr;
1717
76d689a6 1718 if (faddr_sect != NULL)
64a5b29c 1719 {
76d689a6
KB
1720 struct obj_section *osect;
1721 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1722 {
1723 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1724 break;
1725 }
1726
76d689a6 1727 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1728 {
1729 CORE_ADDR addr;
1730
1731 addr = osect->addr;
1732 while (addr < osect->endaddr)
1733 {
1734 int status;
1735 LONGEST faddr2;
1736 char buf[8];
1737
1738 status = target_read_memory (addr, buf, sizeof (buf));
1739 if (status != 0)
1740 break;
1741 faddr2 = extract_signed_integer (buf, sizeof (buf));
1742
1743 if (faddr == faddr2)
1744 return addr;
1745
1746 addr += 16;
1747 }
1748 }
1749 }
1750 return 0;
1751}
1752
1753/* Attempt to find a function descriptor corresponding to the
1754 given address. If none is found, construct one on the
1755 stack using the address at fdaptr */
1756
1757static CORE_ADDR
1758find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1759{
1760 CORE_ADDR fdesc;
1761
1762 fdesc = find_extant_func_descr (faddr);
1763
1764 if (fdesc == 0)
1765 {
1766 CORE_ADDR global_pointer;
1767 char buf[16];
1768
1769 fdesc = *fdaptr;
1770 *fdaptr += 16;
1771
698cb3f0 1772 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB
1773
1774 if (global_pointer == 0)
1775 global_pointer = read_register (IA64_GR1_REGNUM);
1776
1777 store_address (buf, 8, faddr);
1778 store_address (buf + 8, 8, global_pointer);
1779
1780 write_memory (fdesc, buf, 16);
1781 }
1782
1783 return fdesc;
1784}
16461d7d
KB
1785
1786CORE_ADDR
ea7c478f 1787ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
16461d7d
KB
1788 int struct_return, CORE_ADDR struct_addr)
1789{
1790 int argno;
ea7c478f 1791 struct value *arg;
16461d7d
KB
1792 struct type *type;
1793 int len, argoffset;
64a5b29c 1794 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1795 int floatreg;
64a5b29c 1796 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB
1797
1798 nslots = 0;
64a5b29c 1799 nfuncargs = 0;
16461d7d
KB
1800 /* Count the number of slots needed for the arguments */
1801 for (argno = 0; argno < nargs; argno++)
1802 {
1803 arg = args[argno];
1804 type = check_typedef (VALUE_TYPE (arg));
1805 len = TYPE_LENGTH (type);
1806
98f96ba1 1807 if ((nslots & 1) && slot_alignment_is_next_even (type))
16461d7d
KB
1808 nslots++;
1809
64a5b29c
KB
1810 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1811 nfuncargs++;
1812
16461d7d
KB
1813 nslots += (len + 7) / 8;
1814 }
1815
64a5b29c 1816 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB
1817 rseslots = (nslots > 8) ? 8 : nslots;
1818 memslots = nslots - rseslots;
1819
64a5b29c 1820 /* Allocate a new RSE frame */
16461d7d
KB
1821 cfm = read_register (IA64_CFM_REGNUM);
1822
1823 bsp = read_register (IA64_BSP_REGNUM);
1824 bsp = rse_address_add (bsp, cfm & 0x7f);
1825 new_bsp = rse_address_add (bsp, rseslots);
1826 write_register (IA64_BSP_REGNUM, new_bsp);
1827
1828 pfs = read_register (IA64_PFS_REGNUM);
1829 pfs &= 0xc000000000000000LL;
1830 pfs |= (cfm & 0xffffffffffffLL);
1831 write_register (IA64_PFS_REGNUM, pfs);
1832
1833 cfm &= 0xc000000000000000LL;
1834 cfm |= rseslots;
1835 write_register (IA64_CFM_REGNUM, cfm);
1836
64a5b29c
KB
1837 /* We will attempt to find function descriptors in the .opd segment,
1838 but if we can't we'll construct them ourselves. That being the
1839 case, we'll need to reserve space on the stack for them. */
1840 funcdescaddr = sp - nfuncargs * 16;
1841 funcdescaddr &= ~0xfLL;
1842
1843 /* Adjust the stack pointer to it's new value. The calling conventions
1844 require us to have 16 bytes of scratch, plus whatever space is
1845 necessary for the memory slots and our function descriptors */
1846 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB
1847 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1848
64a5b29c
KB
1849 /* Place the arguments where they belong. The arguments will be
1850 either placed in the RSE backing store or on the memory stack.
1851 In addition, floating point arguments or HFAs are placed in
1852 floating point registers. */
16461d7d
KB
1853 slotnum = 0;
1854 floatreg = IA64_FR8_REGNUM;
1855 for (argno = 0; argno < nargs; argno++)
1856 {
64a5b29c
KB
1857 struct type *float_elt_type;
1858
16461d7d
KB
1859 arg = args[argno];
1860 type = check_typedef (VALUE_TYPE (arg));
1861 len = TYPE_LENGTH (type);
64a5b29c
KB
1862
1863 /* Special handling for function parameters */
1864 if (len == 8
1865 && TYPE_CODE (type) == TYPE_CODE_PTR
1866 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1867 {
1868 char val_buf[8];
1869
1870 store_address (val_buf, 8,
1871 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1872 &funcdescaddr));
1873 if (slotnum < rseslots)
1874 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1875 else
1876 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1877 slotnum++;
1878 continue;
1879 }
1880
1881 /* Normal slots */
98f96ba1
KB
1882
1883 /* Skip odd slot if necessary... */
1884 if ((slotnum & 1) && slot_alignment_is_next_even (type))
16461d7d 1885 slotnum++;
98f96ba1 1886
16461d7d
KB
1887 argoffset = 0;
1888 while (len > 0)
1889 {
1890 char val_buf[8];
1891
1892 memset (val_buf, 0, 8);
1893 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1894
1895 if (slotnum < rseslots)
1896 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1897 else
1898 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1899
1900 argoffset += 8;
1901 len -= 8;
1902 slotnum++;
1903 }
64a5b29c
KB
1904
1905 /* Handle floating point types (including HFAs) */
1906 float_elt_type = is_float_or_hfa_type (type);
1907 if (float_elt_type != NULL)
1908 {
1909 argoffset = 0;
1910 len = TYPE_LENGTH (type);
1911 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1912 {
1913 ia64_register_convert_to_raw (
1914 float_elt_type,
1915 floatreg,
1916 VALUE_CONTENTS (arg) + argoffset,
524d7c18 1917 &deprecated_registers[REGISTER_BYTE (floatreg)]);
64a5b29c
KB
1918 floatreg++;
1919 argoffset += TYPE_LENGTH (float_elt_type);
1920 len -= TYPE_LENGTH (float_elt_type);
1921 }
16461d7d
KB
1922 }
1923 }
1924
64a5b29c 1925 /* Store the struct return value in r8 if necessary. */
16461d7d
KB
1926 if (struct_return)
1927 {
524d7c18 1928 store_address (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
16461d7d
KB
1929 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1930 struct_addr);
1931 }
1932
64a5b29c 1933 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB
1934 target_store_registers (-1);
1935
1936 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1937 to be defined to call generic_save_dummy_frame_tos(). But at the
1938 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1939 I chose to put this call here instead of using the old mechanisms.
1940 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1941 line
1942
1943 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1944
1945 to ia64_gdbarch_init() and remove the line below. */
1946 generic_save_dummy_frame_tos (sp);
1947
1948 return sp;
1949}
1950
1951CORE_ADDR
1952ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1953{
698cb3f0 1954 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1955
64a5b29c
KB
1956 if (global_pointer != 0)
1957 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB
1958
1959 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1960 return sp;
1961}
1962
1963void
1964ia64_store_return_value (struct type *type, char *valbuf)
1965{
1966 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1967 {
1968 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
524d7c18 1969 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
16461d7d
KB
1970 target_store_registers (IA64_FR8_REGNUM);
1971 }
1972 else
73937e03
AC
1973 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1974 valbuf, TYPE_LENGTH (type));
16461d7d
KB
1975}
1976
1977void
1978ia64_pop_frame (void)
1979{
1980 generic_pop_current_frame (ia64_pop_frame_regular);
1981}
1982
1983static void
1984ia64_pop_frame_regular (struct frame_info *frame)
1985{
1986 int regno;
1987 CORE_ADDR bsp, cfm, pfs;
1988
f30ee0bc 1989 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
16461d7d
KB
1990
1991 for (regno = 0; regno < ia64_num_regs; regno++)
1992 {
b2fb4676 1993 if (get_frame_saved_regs (frame)[regno]
16461d7d
KB
1994 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1995 && regno != pc_regnum
1996 && regno != sp_regnum
1997 && regno != IA64_PFS_REGNUM
1998 && regno != IA64_CFM_REGNUM
1999 && regno != IA64_BSP_REGNUM
2000 && regno != IA64_BSPSTORE_REGNUM)
2001 {
2002 write_register (regno,
b2fb4676 2003 read_memory_integer (get_frame_saved_regs (frame)[regno],
16461d7d
KB
2004 REGISTER_RAW_SIZE (regno)));
2005 }
2006 }
2007
2008 write_register (sp_regnum, FRAME_CHAIN (frame));
8bedc050 2009 write_pc (DEPRECATED_FRAME_SAVED_PC (frame));
16461d7d
KB
2010
2011 cfm = read_register (IA64_CFM_REGNUM);
2012
b2fb4676 2013 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
16461d7d 2014 {
b2fb4676 2015 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
16461d7d
KB
2016 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2017 }
2018 else
2019 pfs = read_register (IA64_PFS_REGNUM);
2020
2021 /* Compute the new bsp by *adding* the difference between the
2022 size of the frame and the size of the locals (both wrt the
2023 frame that we're going back to). This seems kind of strange,
2024 especially since it seems like we ought to be subtracting the
ca557f44 2025 size of the locals... and we should; but the Linux kernel
16461d7d
KB
2026 wants bsp to be set at the end of all used registers. It's
2027 likely that this code will need to be revised to accomodate
2028 other operating systems. */
da50a4b7 2029 bsp = rse_address_add (get_frame_extra_info (frame)->bsp,
16461d7d
KB
2030 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2031 write_register (IA64_BSP_REGNUM, bsp);
2032
2033 /* FIXME: What becomes of the epilog count in the PFS? */
2034 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2035 write_register (IA64_CFM_REGNUM, cfm);
2036
2037 flush_cached_frames ();
2038}
2039
2040static void
2041ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2042 CORE_ADDR *targ_addr, int *targ_len)
2043{
2044 *targ_addr = memaddr;
2045 *targ_len = nr_bytes;
2046}
2047
244bc108
KB
2048static void
2049process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2050{
2051 int *os_ident_ptr = obj;
2052 const char *name;
2053 unsigned int sectsize;
2054
2055 name = bfd_get_section_name (abfd, sect);
2056 sectsize = bfd_section_size (abfd, sect);
2057 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2058 {
2059 unsigned int name_length, data_length, note_type;
2060 char *note = alloca (sectsize);
2061
2062 bfd_get_section_contents (abfd, sect, note,
2063 (file_ptr) 0, (bfd_size_type) sectsize);
2064
2065 name_length = bfd_h_get_32 (abfd, note);
2066 data_length = bfd_h_get_32 (abfd, note + 4);
2067 note_type = bfd_h_get_32 (abfd, note + 8);
2068
2069 if (name_length == 4 && data_length == 16 && note_type == 1
2070 && strcmp (note + 12, "GNU") == 0)
2071 {
2072 int os_number = bfd_h_get_32 (abfd, note + 16);
2073
2074 /* The case numbers are from abi-tags in glibc */
2075 switch (os_number)
2076 {
2077 case 0 :
2078 *os_ident_ptr = ELFOSABI_LINUX;
2079 break;
244bc108
KB
2080 case 1 :
2081 *os_ident_ptr = ELFOSABI_HURD;
2082 break;
2083 case 2 :
2084 *os_ident_ptr = ELFOSABI_SOLARIS;
2085 break;
244bc108 2086 default :
8e65ff28
AC
2087 internal_error (__FILE__, __LINE__,
2088 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB
2089 break;
2090 }
2091 }
2092 }
2093}
2094
16461d7d
KB
2095static struct gdbarch *
2096ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2097{
2098 struct gdbarch *gdbarch;
244bc108
KB
2099 struct gdbarch_tdep *tdep;
2100 int os_ident;
2101
2102 if (info.abfd != NULL
2103 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2104 {
2105 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2106
ca557f44
AC
2107 /* If os_ident is 0, it is not necessarily the case that we're
2108 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2109 GNU/Linux uses a note section to record OS/ABI info, but
2110 leaves e_ident[EI_OSABI] zero. So we have to check for note
2111 sections too. */
244bc108
KB
2112 if (os_ident == 0)
2113 {
2114 bfd_map_over_sections (info.abfd,
2115 process_note_abi_tag_sections,
2116 &os_ident);
2117 }
2118 }
2119 else
2120 os_ident = -1;
16461d7d 2121
244bc108
KB
2122 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2123 arches != NULL;
2124 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2125 {
57bc8964
KB
2126 tdep = gdbarch_tdep (arches->gdbarch);
2127 if (tdep &&tdep->os_ident == os_ident)
2128 return arches->gdbarch;
244bc108 2129 }
16461d7d 2130
244bc108
KB
2131 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2132 gdbarch = gdbarch_alloc (&info, tdep);
2133 tdep->os_ident = os_ident;
2134
a5afb99f
AC
2135 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2136 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2137 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
d7fa2ae2
KB
2138
2139 /* Set the method of obtaining the sigcontext addresses at which
2140 registers are saved. The method of checking to see if
2141 native_find_global_pointer is nonzero to indicate that we're
2142 on AIX is kind of hokey, but I can't think of a better way
2143 to do it. */
244bc108
KB
2144 if (os_ident == ELFOSABI_LINUX)
2145 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB
2146 else if (native_find_global_pointer != 0)
2147 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB
2148 else
2149 tdep->sigcontext_register_address = 0;
16461d7d 2150
ca557f44
AC
2151 /* We know that GNU/Linux won't have to resort to the
2152 native_find_global_pointer hackery. But that's the only one we
2153 know about so far, so if native_find_global_pointer is set to
2154 something non-zero, then use it. Otherwise fall back to using
2155 generic_elf_find_global_pointer. This arrangement should (in
2156 theory) allow us to cross debug GNU/Linux binaries from an AIX
2157 machine. */
698cb3f0
KB
2158 if (os_ident == ELFOSABI_LINUX)
2159 tdep->find_global_pointer = generic_elf_find_global_pointer;
2160 else if (native_find_global_pointer != 0)
2161 tdep->find_global_pointer = native_find_global_pointer;
2162 else
2163 tdep->find_global_pointer = generic_elf_find_global_pointer;
2164
16461d7d
KB
2165 set_gdbarch_short_bit (gdbarch, 16);
2166 set_gdbarch_int_bit (gdbarch, 32);
2167 set_gdbarch_long_bit (gdbarch, 64);
2168 set_gdbarch_long_long_bit (gdbarch, 64);
2169 set_gdbarch_float_bit (gdbarch, 32);
2170 set_gdbarch_double_bit (gdbarch, 64);
2171 set_gdbarch_long_double_bit (gdbarch, 64);
2172 set_gdbarch_ptr_bit (gdbarch, 64);
2173
2174 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2175 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2176 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2177 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2178 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB
2179
2180 set_gdbarch_register_name (gdbarch, ia64_register_name);
2181 set_gdbarch_register_size (gdbarch, 8);
2182 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2183 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2184 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
a0ed5532 2185 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 16);
16461d7d 2186 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
a0ed5532 2187 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 16);
16461d7d
KB
2188 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2189
2190 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2191
2192 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2193 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2194
2195 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2196
2197 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
8bedc050 2198 set_gdbarch_deprecated_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
16461d7d 2199
f30ee0bc 2200 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
16461d7d
KB
2201 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2202
2203 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2204 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2205 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2206
2207 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
26e9b323 2208 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
16461d7d
KB
2209
2210 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
ebba8386 2211 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
26e9b323 2212 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
16461d7d
KB
2213
2214 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2215 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2216 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2217 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2218 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2219
2220 /* Settings for calling functions in the inferior. */
16461d7d
KB
2221 set_gdbarch_call_dummy_length (gdbarch, 0);
2222 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2223 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
749b82f6 2224 set_gdbarch_deprecated_pop_frame (gdbarch, ia64_pop_frame);
16461d7d
KB
2225
2226 set_gdbarch_call_dummy_p (gdbarch, 1);
2227 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2228 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2229 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
e9582e71 2230 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
16461d7d
KB
2231 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2232 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2233
2234 /* We won't necessarily have a frame pointer and even if we do,
2235 it winds up being extraordinarly messy when attempting to find
2236 the frame chain. So for the purposes of creating frames (which
2237 is all read_fp() is used for), simply use the stack pointer value
2238 instead. */
2239 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
16461d7d
KB
2240
2241 /* Settings that should be unnecessary. */
2242 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2243
2244 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2245 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2246
16461d7d
KB
2247 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2248 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2249 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
16461d7d 2250 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
16461d7d
KB
2251 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2252
2253 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2254 set_gdbarch_function_start_offset (gdbarch, 0);
4156bb53 2255 set_gdbarch_frame_args_skip (gdbarch, 0);
16461d7d
KB
2256
2257 set_gdbarch_remote_translate_xfer_address (
2258 gdbarch, ia64_remote_translate_xfer_address);
2259
2260 return gdbarch;
2261}
2262
2263void
2264_initialize_ia64_tdep (void)
2265{
2266 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2267
2268 tm_print_insn = print_insn_ia64;
2269 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2270}
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