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5749c497 KR |
1 | /* |
2 | * Mach Operating System | |
3 | * Copyright (c) 1993 Carnegie Mellon University | |
4 | * All Rights Reserved. | |
5 | * | |
6 | * Permission to use, copy, modify and distribute this software and its | |
7 | * documentation is hereby granted, provided that both the copyright | |
8 | * notice and this permission notice appear in all copies of the | |
9 | * software, derivative works or modified versions, and any portions | |
10 | * thereof, and that both notices appear in supporting documentation. | |
11 | * | |
12 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS | |
13 | * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR | |
14 | * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. | |
15 | * | |
16 | * Carnegie Mellon requests users of this software to return to | |
17 | * | |
18 | * Software Distribution Coordinator or [email protected] | |
19 | * School of Computer Science | |
20 | * Carnegie Mellon University | |
21 | * Pittsburgh PA 15213-3890 | |
22 | * | |
23 | * any improvements or extensions that they make and grant Carnegie the | |
24 | * rights to redistribute these changes. | |
25 | */ | |
26 | /* | |
27 | * HISTORY | |
28 | * 5-Oct-93 Alessandro Forin (af) at Carnegie-Mellon University | |
29 | * First checkin. | |
30 | * | |
5749c497 KR |
31 | * Author: Alessandro Forin, Carnegie Mellon University |
32 | * Date: Jan 1993 | |
33 | */ | |
34 | ||
35 | /* Table of opcodes for the alpha. | |
36 | Copyright (C) 1989 Free Software Foundation, Inc. | |
37 | ||
38 | This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler. | |
39 | ||
40 | GAS/GDB is free software; you can redistribute it and/or modify | |
41 | it under the terms of the GNU General Public License as published by | |
42 | the Free Software Foundation; either version 1, or (at your option) | |
43 | any later version. | |
44 | ||
45 | GAS/GDB is distributed in the hope that it will be useful, | |
46 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
47 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
48 | GNU General Public License for more details. | |
49 | ||
50 | You should have received a copy of the GNU General Public License | |
51 | along with GAS or GDB; see the file COPYING. If not, write to | |
52 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
53 | ||
54 | #if !defined(__STDC__) && !defined(const) | |
55 | #define const | |
56 | #endif | |
57 | ||
58 | /* | |
59 | * Structure of an opcode table entry. | |
60 | */ | |
61 | struct alpha_opcode | |
62 | { | |
63 | const char *name; | |
64 | const unsigned int match; /* fixed encoding part of instruction */ | |
65 | const int isa_float; | |
66 | const char *args; | |
67 | }; | |
68 | ||
69 | /* | |
70 | All alpha opcodes are 32 bits, except for the `set' instruction (really | |
71 | a macro), which is 64 bits. It is handled as a special case. | |
72 | ||
73 | The match component is a mask saying which bits must match a | |
74 | particular opcode in order for an instruction to be an instance | |
75 | of that opcode. | |
76 | ||
77 | The args component is a string containing one character | |
78 | for each operand of the instruction. | |
79 | ||
80 | Kinds of operands: | |
81 | 1 ra register | |
82 | 2 rb register | |
83 | 3 rc register | |
84 | r same register for ra and rc | |
85 | R same register for ra and rb | |
86 | e fa floating point register. | |
87 | f fb floating point register. | |
88 | g fc floating point register. | |
89 | I 26 bit immediate | |
90 | l 16 low bits of immediate | |
91 | h 16 high(er) bits of immediate [Never used. KR] | |
92 | L 22 bit PC relative immediate. | |
93 | i 14 bit immediate jmp/jsr/ret operand -- PC-rel or not, | |
94 | dependent on opcode | |
95 | b 8 bit literal, shifted left 13 bits (literal in `operate' fmt) | |
96 | G Base-register GET at address, needs macro-expansion | |
97 | P Base-register PUT at address, needs macro-expansion | |
98 | Bn builtin macro | |
99 | t twelve bit displacement | |
100 | 8 eight bit index | |
101 | ||
102 | Syntactic elements | |
103 | ( | |
104 | ) base register in "offset(base)" addressing | |
105 | , separator | |
106 | ||
107 | Builtin functions (look like macros to the programmer) | |
108 | %br the current base register | |
109 | la %r,A load the (64bit) address in register %r | |
110 | li %r,N load the constant N in register %r | |
111 | #if 0 | |
112 | lo(A) low 16 bits of Address (relocatable) | |
113 | uml(A) med-low 16 bits, unchanged | |
114 | umh(A) med-high 16 bits, unchanged | |
115 | uhi(A) high 16 bits, unchanged | |
116 | ml(A) med-low, adjusted viz sign of lo(A) | |
117 | mh(A) med-high, adjusted viz sign of ml(A) | |
118 | hi(A) high, adjusted viz sign of mh(A) | |
119 | #endif | |
120 | ||
121 | */ | |
122 | ||
123 | /* The order of the opcodes in this table is significant: | |
124 | ||
125 | * The assembler requires that all instances of the same mnemonic must be | |
126 | consecutive. If they aren't, the assembler will bomb at runtime. | |
127 | ||
128 | * The disassembler should not care about the order of the opcodes. */ | |
129 | ||
130 | static const struct alpha_opcode alpha_opcodes[] = | |
131 | { | |
132 | ||
133 | { "ldgp", 0x00000000, 0, "3,l(1)Ba" }, /* builtin */ | |
134 | { "setgp", 0x00000000, 0, "0(1)Bb" }, /* builtin */ | |
135 | ||
136 | { "reml", 0x00000000, 0, "1,2,3B0" }, /* builtin */ | |
137 | { "divl", 0x00000000, 0, "1,2,3B1" }, /* builtin */ | |
138 | { "remq", 0x00000000, 0, "1,2,3B2" }, /* builtin */ | |
139 | { "divq", 0x00000000, 0, "1,2,3B3" }, /* builtin */ | |
140 | { "remlu", 0x00000000, 0, "1,2,3B4" }, /* builtin */ | |
141 | { "divlu", 0x00000000, 0, "1,2,3B5" }, /* builtin */ | |
142 | { "remqu", 0x00000000, 0, "1,2,3B6" }, /* builtin */ | |
143 | { "divqu", 0x00000000, 0, "1,2,3B7" }, /* builtin */ | |
144 | ||
145 | { "lda", 0x20000000, 0, "1,l(2)" }, /* 6o+5a+5b+16d */ | |
146 | { "lda", 0x20000000, 0, "1,G" }, /* regbase macro */ | |
147 | { "ldi", 0x201F0000, 0, "1,l"}, /* ldi ra,lit == lda ra,lit(r31) */ | |
148 | { "ldah", 0x24000000, 0, "1,l(2)" }, | |
149 | { "ldah", 0x24000000, 0, "1,G" }, /* regbase macro */ | |
150 | { "lui", 0x241F0000, 0, "1,l"}, /* lui ra,lit == ldah ra,lit(r31) */ | |
151 | { "ldil", 0x20000000, 0, "1,G" }, /* macro */ | |
152 | { "ldiq", 0x20000000, 0, "1,G" }, /* (broken) macro */ | |
153 | ||
154 | { "ldl", 0xa0000000, 0, "1,l(2)" }, | |
155 | { "ldl", 0xa0000000, 0, "1,G" }, /* regbase macro */ | |
156 | { "ldl_l", 0xa8000000, 0, "1,l(2)" }, | |
157 | { "ldl_l", 0xa8000000, 0, "1,G" }, /* regbase macro */ | |
158 | { "ldq", 0xa4000000, 0, "1,l(2)" }, | |
159 | { "ldq", 0xa4000000, 0, "1,G" }, /* regbase macro */ | |
160 | { "ldq_u", 0x2c000000, 0, "1,l(2)" }, | |
161 | { "ldq_u", 0x2c000000, 0, "1,G" }, /* regbase macro */ | |
162 | { "ldq_l", 0xac000000, 0, "1,l(2)" }, | |
163 | { "ldq_l", 0xac000000, 0, "1,G" }, /* regbase macro */ | |
164 | ||
165 | { "stl", 0xb0000000, 0, "1,l(2)" }, | |
166 | { "stl", 0xb0000000, 0, "1,P" }, /* regbase macro */ | |
167 | { "stl_c", 0xb8000000, 0, "1,l(2)" }, | |
168 | { "stl_c", 0xb8000000, 0, "1,P" }, /* regbase macro */ | |
169 | { "stq", 0xb4000000, 0, "1,l(2)" }, | |
170 | { "stq", 0xb4000000, 0, "1,P" }, /* regbase macro */ | |
171 | { "stq_u", 0x3c000000, 0, "1,l(2)" }, | |
172 | { "stq_u", 0x3c000000, 0, "1,P" }, /* regbase macro */ | |
173 | { "stq_c", 0xbc000000, 0, "1,l(2)" }, | |
174 | { "stq_c", 0xbc000000, 0, "1,P" }, /* regbase macro */ | |
175 | ||
176 | { "beq", 0xe4000000, 0, "1,L" }, /* 6o+5a+21d */ | |
177 | { "bne", 0xf4000000, 0, "1,L" }, | |
178 | { "blt", 0xe8000000, 0, "1,L" }, | |
179 | { "ble", 0xec000000, 0, "1,L" }, | |
180 | { "bgt", 0xfc000000, 0, "1,L" }, | |
181 | { "bge", 0xf8000000, 0, "1,L" }, | |
182 | { "blbc", 0xe0000000, 0, "1,L" }, | |
183 | { "blbs", 0xf0000000, 0, "1,L" }, | |
184 | ||
185 | { "br", 0xc0000000, 0, "1,L" }, | |
186 | { "br", 0xc3e00000, 0, "L" }, /* macro: br zero,disp */ | |
187 | { "bsr", 0xd0000000, 0, "1,L" }, | |
188 | { "bsr", 0xd3500000, 0, "L" }, /* macro: bsr $ra,L */ | |
189 | ||
190 | { "jmp", 0x68000000, 0, "1,(2),i" }, /* 6o+5a+5b+2A+14d */ | |
191 | { "jmp", 0x68000000, 0, "1,(2)" }, | |
192 | { "jsr", 0x68004000, 0, "1,(2),i" }, | |
193 | { "jsr", 0x68004000, 0, "1,(2)" }, | |
194 | { "jsr", 0x68004000, 0, "1,Bc" }, /* macro: lda $pv,L;jsr .. */ | |
195 | { "ret", 0x68008000, 0, "1,(2),i" }, | |
196 | { "ret", 0x68008000, 0, "1,(2)" }, | |
197 | { "ret", 0x6b5a8000, 0, "" }, /* macro: ret ra,(ra) */ | |
198 | { "ret", 0x6be08000, 0, "(2)" }, /* macro: ret zero,(2) */ | |
199 | { "ret", 0x681a8000, 0, "1" }, /* macro: ret 1,(ra) */ | |
200 | { "jcr", 0x6800c000, 0, "1,(2)" }, | |
201 | { "jsr_coroutine", 0x6800c000, 0, "1,(2)" }, | |
202 | ||
203 | { "addl", 0x40000000, 0, "1,2,3" }, /* 6o+5a+5b+4z+7f+5c */ | |
204 | { "addl", 0x40001000, 0, "1,b,3" }, /* 6o+5a+8n+1+7f+5c */ | |
205 | { "addl/v", 0x40000800, 0, "1,2,3" }, | |
206 | { "addl/v", 0x40001800, 0, "1,b,3" }, | |
207 | { "s4addl", 0x40000040, 0, "1,2,3" }, | |
208 | { "s4addl", 0x40001040, 0, "1,b,3" }, | |
209 | { "s8addl", 0x40000240, 0, "1,2,3" }, | |
210 | { "s8addl", 0x40001240, 0, "1,b,3" }, | |
211 | { "addq", 0x40000400, 0, "1,2,3" }, | |
212 | { "addq", 0x40001400, 0, "1,b,3" }, | |
213 | { "addq/v", 0x40000c00, 0, "1,2,3" }, | |
214 | ||
215 | { "addq/v", 0x40001c00, 0, "1,b,3" }, | |
216 | { "s4addq", 0x40000440, 0, "1,2,3" }, | |
217 | { "s4addq", 0x40001440, 0, "1,b,3" }, | |
218 | { "s8addq", 0x40000640, 0, "1,2,3" }, | |
219 | { "s8addq", 0x40001640, 0, "1,b,3" }, | |
220 | { "cmpeq", 0x400005a0, 0, "1,2,3" }, | |
221 | { "cmpeq", 0x400015a0, 0, "1,b,3" }, | |
222 | { "cmplt", 0x400009a0, 0, "1,2,3" }, | |
223 | { "cmplt", 0x400019a0, 0, "1,b,3" }, | |
224 | { "cmple", 0x40000da0, 0, "1,2,3" }, | |
225 | { "cmple", 0x40001da0, 0, "1,b,3" }, | |
226 | { "cmpult", 0x400003a0, 0, "1,2,3" }, | |
227 | { "cmpult", 0x400013a0, 0, "1,b,3" }, | |
228 | { "cmpule", 0x400007a0, 0, "1,2,3" }, | |
229 | { "cmpule", 0x400017a0, 0, "1,b,3" }, | |
230 | { "subl", 0x40000120, 0, "1,2,3" }, | |
231 | { "subl", 0x40001120, 0, "1,b,3" }, | |
232 | { "subl/v", 0x40000920, 0, "1,2,3" }, | |
233 | { "subl/v", 0x40001920, 0, "1,b,3" }, | |
234 | { "s4subl", 0x40000160, 0, "1,2,3" }, | |
235 | { "s4subl", 0x40001160, 0, "1,b,3" }, | |
236 | { "s8subl", 0x40000360, 0, "1,2,3" }, | |
237 | { "s8subl", 0x40001360, 0, "1,b,3" }, | |
238 | { "subq", 0x40000520, 0, "1,2,3" }, | |
239 | { "subq", 0x40001520, 0, "1,b,3" }, | |
240 | { "subq/v", 0x40000d20, 0, "1,2,3" }, | |
241 | { "subq/v", 0x40001d20, 0, "1,b,3" }, | |
242 | { "s4subq", 0x40000560, 0, "1,2,3" }, | |
243 | { "s4subq", 0x40001560, 0, "1,b,3" }, | |
244 | { "s8subq", 0x40000760, 0, "1,2,3" }, | |
245 | { "s8subq", 0x40001760, 0, "1,b,3" }, | |
246 | { "cmpbge", 0x400001e0, 0, "1,2,3" }, | |
247 | { "cmpbge", 0x400011e0, 0, "1,b,3" }, | |
248 | ||
249 | { "mull", 0x4c000000, 0, "1,2,3" }, | |
250 | { "mull", 0x4c001000, 0, "1,b,3" }, | |
251 | { "mull/v", 0x4c000800, 0, "1,2,3" }, | |
252 | { "mull/v", 0x4c001800, 0, "1,b,3" }, | |
253 | { "mulq", 0x4c000400, 0, "1,2,3" }, | |
254 | { "mulq", 0x4c001400, 0, "1,b,3" }, | |
255 | { "mulq/v", 0x4c000c00, 0, "1,2,3" }, | |
256 | { "mulq/v", 0x4c001c00, 0, "1,b,3" }, | |
257 | { "umulh", 0x4c000600, 0, "1,2,3" }, | |
258 | { "umulh", 0x4c001600, 0, "1,b,3" }, | |
259 | ||
260 | { "clr", 0x47ff0400, 0, "3" }, /* macro: or zero,zero,rc */ | |
261 | { "negl", 0x43e00120, 0, "2,3" }, /* macro: subl zero,rb,rc */ | |
262 | { "negl_v", 0x43e00920, 0, "2,3" }, /* macro: subl_v zero,rb,rc */ | |
263 | { "negq", 0x43e00520, 0, "2,3" }, /* macro: subq zero,rb,rc */ | |
264 | { "negq_v", 0x43e00d20, 0, "2,3" }, /* macro: subq_v zero,rb,rc */ | |
265 | { "sextl", 0x43e00000, 0, "2,3" }, /* macro: addl zero,rb,rc */ | |
266 | ||
267 | { "and", 0x44000000, 0, "1,2,3" }, | |
268 | { "and", 0x44001000, 0, "1,b,3" }, | |
269 | { "and", 0x44000000, 0, "r,2" }, /* macro: and ra,rb,ra */ | |
270 | { "and", 0x44001000, 0, "r,b" }, /* macro: and ra,#,ra */ | |
271 | { "or", 0x44000400, 0, "1,2,3" }, | |
272 | { "or", 0x44001400, 0, "1,b,3" }, | |
273 | { "or", 0x44000400, 0, "r,2" }, /* macro: or ra,rb,ra */ | |
274 | { "or", 0x44001400, 0, "r,b" }, /* macro: or ra,#,ra */ | |
275 | { "bis", 0x44000400, 0, "1,2,3" }, | |
276 | { "bis", 0x44001400, 0, "1,b,3" }, | |
277 | { "bis", 0x44000400, 0, "r,2" }, /* macro: or ra,rb,ra */ | |
278 | { "bis", 0x44001400, 0, "r,b" }, /* macro: or ra,#,ra */ | |
279 | { "movi", 0x47E01400, 0, "b,3"}, /* movi lit,rc == bis r31,lit,rc */ | |
280 | { "xor", 0x44000800, 0, "1,2,3" }, | |
281 | { "xor", 0x44001800, 0, "1,b,3" }, | |
282 | { "xor", 0x44000800, 0, "r,2" }, /* macro: ra,rb,ra */ | |
283 | { "xor", 0x44001800, 0, "r,b" }, /* macro: ra,#,ra */ | |
284 | { "andnot", 0x44000100, 0, "1,2,3" }, | |
285 | { "andnot", 0x44001100, 0, "1,b,3" }, | |
286 | { "andnot", 0x44000100, 0, "r,2" }, /* macro: ra,#,ra */ | |
287 | { "andnot", 0x44001100, 0, "r,b" }, /* macro: ra,#,ra */ | |
288 | { "bic", 0x44000100, 0, "1,2,3" }, | |
289 | { "bic", 0x44001100, 0, "1,b,3" }, | |
290 | { "bic", 0x44000100, 0, "r,2" }, /* macro: ra,#,ra */ | |
291 | { "bic", 0x44001100, 0, "r,b" }, /* macro: ra,#,ra */ | |
292 | { "ornot", 0x44000500, 0, "1,2,3" }, | |
293 | { "ornot", 0x44001500, 0, "1,b,3" }, | |
294 | { "ornot", 0x44000500, 0, "r,2" }, /* macro: ra,#,ra */ | |
295 | { "ornot", 0x44001500, 0, "r,b" }, /* macro: ra,#,ra */ | |
296 | { "not", 0x47e00500, 0, "2,3" }, /* macro: ornot zero,.. */ | |
297 | { "not", 0x47e01500, 0, "b,3" }, | |
298 | { "xornot", 0x44000900, 0, "1,2,3" }, | |
299 | { "xornot", 0x44001900, 0, "1,b,3" }, | |
300 | { "xornot", 0x44000900, 0, "r,2" }, /* macro: ra,#,ra */ | |
301 | { "xornot", 0x44001900, 0, "r,b" }, /* macro: ra,#,ra */ | |
302 | { "eqv", 0x44000900, 0, "1,2,3" }, | |
303 | { "eqv", 0x44001900, 0, "1,b,3" }, | |
304 | { "eqv", 0x44000900, 0, "r,2" }, /* macro: ra,#,ra */ | |
305 | { "eqv", 0x44001900, 0, "r,b" }, /* macro: ra,#,ra */ | |
306 | ||
307 | { "cmoveq", 0x44000480, 0, "1,2,3" }, | |
308 | { "cmoveq", 0x44001480, 0, "1,b,3" }, | |
309 | { "cmovne", 0x440004c0, 0, "1,2,3" }, | |
310 | { "cmovne", 0x440014c0, 0, "1,b,3" }, | |
311 | { "cmovlt", 0x44000880, 0, "1,2,3" }, | |
312 | { "cmovlt", 0x44001880, 0, "1,b,3" }, | |
313 | { "cmovle", 0x44000c80, 0, "1,2,3" }, | |
314 | { "cmovle", 0x44001c80, 0, "1,b,3" }, | |
315 | { "cmovgt", 0x44000cc0, 0, "1,2,3" }, | |
316 | { "cmovgt", 0x44001cc0, 0, "1,b,3" }, | |
317 | { "cmovge", 0x440008c0, 0, "1,2,3" }, | |
318 | { "cmovge", 0x440018c0, 0, "1,b,3" }, | |
319 | { "cmovlbc", 0x440002c0, 0, "1,2,3" }, | |
320 | { "cmovlbc", 0x440012c0, 0, "1,b,3" }, | |
321 | { "cmovlbs", 0x44000280, 0, "1,2,3" }, | |
322 | { "cmovlbs", 0x44001280, 0, "1,b,3" }, | |
323 | ||
324 | { "sll", 0x48000720, 0, "1,2,3" }, | |
325 | { "sll", 0x48001720, 0, "1,b,3" }, | |
326 | { "srl", 0x48000680, 0, "1,2,3" }, | |
327 | { "srl", 0x48001680, 0, "1,b,3" }, | |
328 | { "sra", 0x48000780, 0, "1,2,3" }, | |
329 | { "sra", 0x48001780, 0, "1,b,3" }, | |
330 | ||
331 | { "extbl", 0x480000c0, 0, "1,2,3" }, | |
332 | { "extbl", 0x480010c0, 0, "1,b,3" }, | |
333 | { "extwl", 0x480002c0, 0, "1,2,3" }, | |
334 | { "extwl", 0x480012c0, 0, "1,b,3" }, | |
335 | { "extll", 0x480004c0, 0, "1,2,3" }, | |
336 | { "extll", 0x480014c0, 0, "1,b,3" }, | |
337 | { "extql", 0x480006c0, 0, "1,2,3" }, | |
338 | { "extql", 0x480016c0, 0, "1,b,3" }, | |
339 | { "extwh", 0x48000b40, 0, "1,2,3" }, | |
340 | { "extwh", 0x48001b40, 0, "1,b,3" }, | |
341 | { "extlh", 0x48000d40, 0, "1,2,3" }, | |
342 | { "extlh", 0x48001d40, 0, "1,b,3" }, | |
343 | { "extqh", 0x48000f40, 0, "1,2,3" }, | |
344 | { "extqh", 0x48001f40, 0, "1,b,3" }, | |
345 | { "insbl", 0x48000160, 0, "1,2,3" }, | |
346 | { "insbl", 0x48001160, 0, "1,b,3" }, | |
347 | { "inswl", 0x48000360, 0, "1,2,3" }, | |
348 | { "inswl", 0x48001360, 0, "1,b,3" }, | |
349 | { "insll", 0x48000560, 0, "1,2,3" }, | |
350 | { "insll", 0x48001560, 0, "1,b,3" }, | |
351 | { "insql", 0x48000760, 0, "1,2,3" }, | |
352 | { "insql", 0x48001760, 0, "1,b,3" }, | |
353 | { "inswh", 0x48000ae0, 0, "1,2,3" }, | |
354 | { "inswh", 0x48001ae0, 0, "1,b,3" }, | |
355 | { "inslh", 0x48000ce0, 0, "1,2,3" }, | |
356 | { "inslh", 0x48001ce0, 0, "1,b,3" }, | |
357 | { "insqh", 0x48000ee0, 0, "1,2,3" }, | |
358 | { "insqh", 0x48001ee0, 0, "1,b,3" }, | |
359 | { "mskbl", 0x48000040, 0, "1,2,3" }, | |
360 | { "mskbl", 0x48001040, 0, "1,b,3" }, | |
361 | { "mskwl", 0x48000240, 0, "1,2,3" }, | |
362 | { "mskwl", 0x48001240, 0, "1,b,3" }, | |
363 | { "mskll", 0x48000440, 0, "1,2,3" }, | |
364 | { "mskll", 0x48001440, 0, "1,b,3" }, | |
365 | { "mskql", 0x48000640, 0, "1,2,3" }, | |
366 | { "mskql", 0x48001640, 0, "1,b,3" }, | |
367 | { "mskwh", 0x48000a40, 0, "1,2,3" }, | |
368 | { "mskwh", 0x48001a40, 0, "1,b,3" }, | |
369 | { "msklh", 0x48000c40, 0, "1,2,3" }, | |
370 | { "msklh", 0x48001c40, 0, "1,b,3" }, | |
371 | { "mskqh", 0x48000e40, 0, "1,2,3" }, | |
372 | { "mskqh", 0x48001e40, 0, "1,b,3" }, | |
373 | { "zap", 0x48000600, 0, "1,2,3" }, | |
374 | { "zap", 0x48001600, 0, "1,b,3" }, | |
375 | { "zapnot", 0x48000620, 0, "1,2,3" }, | |
376 | { "zapnot", 0x48001620, 0, "1,b,3" }, | |
377 | ||
378 | /* | |
379 | * Floating point instructions | |
380 | */ | |
381 | { "ldf", 0x80000000, 1, "e,l(2)" }, /* 6o+5a+5b+16d */ | |
382 | { "ldf", 0x80000000, 1, "e,G" }, /* regbase macro */ | |
383 | { "ldg", 0x84000000, 1, "e,l(2)" }, | |
384 | { "ldg", 0x84000000, 1, "e,G" }, /* regbase macro */ | |
385 | { "lds", 0x88000000, 1, "e,l(2)" }, | |
386 | { "lds", 0x88000000, 1, "e,G" }, /* regbase macro */ | |
387 | { "ldt", 0x8c000000, 1, "e,l(2)" }, | |
388 | { "ldt", 0x8c000000, 1, "e,G" }, /* regbase macro */ | |
389 | { "stf", 0x90000000, 1, "e,l(2)" }, | |
390 | { "stf", 0x90000000, 1, "e,P" }, /* regbase macro */ | |
391 | { "stg", 0x94000000, 1, "e,l(2)" }, | |
392 | { "stg", 0x94000000, 1, "e,P" }, /* regbase macro */ | |
393 | { "sts", 0x98000000, 1, "e,l(2)" }, | |
394 | { "sts", 0x98000000, 1, "e,P" }, /* regbase macro */ | |
395 | { "stt", 0x9c000000, 1, "e,l(2)" }, | |
396 | { "stt", 0x9c000000, 1, "e,P" }, /* regbase macro */ | |
397 | ||
398 | { "fbeq", 0xc4000000, 1, "e,L" }, /* 6o+5a+21d */ | |
399 | { "fbne", 0xd4000000, 1, "e,L" }, | |
400 | { "fblt", 0xc8000000, 1, "e,L" }, | |
401 | { "fble", 0xcc000000, 1, "e,L" }, | |
402 | { "fbgt", 0xdc000000, 1, "e,L" }, | |
403 | { "fbge", 0xd8000000, 1, "e,L" }, | |
404 | ||
405 | /* All subsets (opcode 0x17) */ | |
406 | { "cpys", 0x5c000400, 1, "e,f,g" }, /* 6o+5a+5b+11f+5c */ | |
407 | { "cpysn", 0x5c000420, 1, "e,f,g" }, | |
408 | { "cpyse", 0x5c000440, 1, "e,f,g" }, | |
409 | ||
410 | { "cvtlq", 0x5fe00200, 1, "f,g" }, | |
411 | { "cvtql", 0x5fe00600, 1, "f,g" }, | |
412 | { "cvtql/v", 0x5fe02600, 1, "f,g" }, | |
413 | { "cvtql/sv", 0x5fe06600, 1, "f,g" }, | |
414 | ||
415 | { "fcmoveq", 0x5c000540, 1, "e,f,g" }, | |
416 | { "fcmovne", 0x5c000560, 1, "e,f,g" }, | |
417 | { "fcmovlt", 0x5c000580, 1, "e,f,g" }, | |
418 | { "fcmovle", 0x5c0005c0, 1, "e,f,g" }, | |
419 | { "fcmovgt", 0x5c0005e0, 1, "e,f,g" }, | |
420 | { "fcmovge", 0x5c0005a0, 1, "e,f,g" }, | |
421 | ||
422 | { "mf_fpcr", 0x5c0004a0, 1, "E" }, | |
423 | { "mt_fpcr", 0x5c000480, 1, "E" }, | |
424 | ||
425 | /* Vax subset (opcode 0x15) */ | |
426 | { "addf", 0x54001000, 1, "e,f,g" }, | |
427 | { "addf/c", 0x54000000, 1, "e,f,g" }, | |
428 | { "addf/u", 0x54003000, 1, "e,f,g" }, | |
429 | { "addf/uc", 0x54002000, 1, "e,f,g" }, | |
430 | { "addf/s", 0x54009000, 1, "e,f,g" }, | |
431 | { "addf/sc", 0x54008000, 1, "e,f,g" }, | |
432 | { "addf/su", 0x5400b000, 1, "e,f,g" }, | |
433 | { "addf/suc", 0x5400a000, 1, "e,f,g" }, | |
434 | { "addg", 0x54001400, 1, "e,f,g" }, | |
435 | { "addg/c", 0x54000400, 1, "e,f,g" }, | |
436 | { "addg/u", 0x54003400, 1, "e,f,g" }, | |
437 | { "addg/uc", 0x54002400, 1, "e,f,g" }, | |
438 | { "addg/s", 0x54009400, 1, "e,f,g" }, | |
439 | { "addg/sc", 0x54008400, 1, "e,f,g" }, | |
440 | { "addg/su", 0x5400b400, 1, "e,f,g" }, | |
441 | { "addg/suc", 0x5400a400, 1, "e,f,g" }, | |
442 | { "subf", 0x54001020, 1, "e,f,g" }, | |
443 | { "subf/c", 0x54000020, 1, "e,f,g" }, | |
444 | { "subf/u", 0x54003020, 1, "e,f,g" }, | |
445 | { "subf/uc", 0x54002020, 1, "e,f,g" }, | |
446 | { "subf/s", 0x54009020, 1, "e,f,g" }, | |
447 | { "subf/sc", 0x54008020, 1, "e,f,g" }, | |
448 | { "subf/su", 0x5400b020, 1, "e,f,g" }, | |
449 | { "subf/suc", 0x5400a020, 1, "e,f,g" }, | |
450 | { "subg", 0x54001420, 1, "e,f,g" }, | |
451 | { "subg/c", 0x54000420, 1, "e,f,g" }, | |
452 | { "subg/u", 0x54003420, 1, "e,f,g" }, | |
453 | { "subg/uc", 0x54002420, 1, "e,f,g" }, | |
454 | { "subg/s", 0x54009420, 1, "e,f,g" }, | |
455 | { "subg/sc", 0x54008420, 1, "e,f,g" }, | |
456 | { "subg/su", 0x5400b420, 1, "e,f,g" }, | |
457 | { "subg/suc", 0x5400a420, 1, "e,f,g" }, | |
458 | ||
459 | { "cmpgeq", 0x540014a0, 1, "e,f,g" }, | |
460 | { "cmpgeq/s", 0x540094a0, 1, "e,f,g" }, | |
461 | { "cmpglt", 0x540014c0, 1, "e,f,g" }, | |
462 | { "cmpglt/s", 0x540094c0, 1, "e,f,g" }, | |
463 | { "cmpgle", 0x540014e0, 1, "e,f,g" }, | |
464 | { "cmpgle/s", 0x540094e0, 1, "e,f,g" }, | |
465 | ||
466 | { "cvtgq", 0x57e015e0, 1, "f,g" }, | |
467 | { "cvtgq/c", 0x57e005e0, 1, "f,g" }, | |
468 | { "cvtgq/v", 0x57e035e0, 1, "f,g" }, | |
469 | { "cvtgq/vc", 0x57e025e0, 1, "f,g" }, | |
470 | { "cvtgq/s", 0x57e095e0, 1, "f,g" }, | |
471 | { "cvtgq/sc", 0x57e085e0, 1, "f,g" }, | |
472 | { "cvtgq/sv", 0x57e0b5e0, 1, "f,g" }, | |
473 | { "cvtgq/svc", 0x57e0a5e0, 1, "f,g" }, | |
474 | { "cvtqf", 0x57e01780, 1, "f,g" }, | |
475 | { "cvtqf/c", 0x57e00780, 1, "f,g" }, | |
476 | { "cvtqf/s", 0x57e09780, 1, "f,g" }, | |
477 | { "cvtqf/sc", 0x57e08780, 1, "f,g" }, | |
478 | { "cvtqg", 0x57e017c0, 1, "f,g" }, | |
479 | { "cvtqg/c", 0x57e007c0, 1, "f,g" }, | |
480 | { "cvtqg/s", 0x57e097c0, 1, "f,g" }, | |
481 | { "cvtqg/sc", 0x57e087c0, 1, "f,g" }, | |
482 | { "cvtdg", 0x57e013c0, 1, "f,g" }, | |
483 | { "cvtdg/c", 0x57e003c0, 1, "f,g" }, | |
484 | { "cvtdg/u", 0x57e033c0, 1, "f,g" }, | |
485 | { "cvtdg/uc", 0x57e023c0, 1, "f,g" }, | |
486 | { "cvtdg/s", 0x57e093c0, 1, "f,g" }, | |
487 | { "cvtdg/sc", 0x57e083c0, 1, "f,g" }, | |
488 | { "cvtdg/su", 0x57e0b3c0, 1, "f,g" }, | |
489 | { "cvtdg/suc", 0x57e0a3c0, 1, "f,g" }, | |
490 | { "cvtgd", 0x57e015a0, 1, "f,g" }, | |
491 | { "cvtgd/c", 0x57e005a0, 1, "f,g" }, | |
492 | { "cvtgd/u", 0x57e035a0, 1, "f,g" }, | |
493 | { "cvtgd/uc", 0x57e025a0, 1, "f,g" }, | |
494 | { "cvtgd/s", 0x57e095a0, 1, "f,g" }, | |
495 | { "cvtgd/sc", 0x57e085a0, 1, "f,g" }, | |
496 | { "cvtgd/su", 0x57e0b5a0, 1, "f,g" }, | |
497 | { "cvtgd/suc", 0x57e0a5a0, 1, "f,g" }, | |
498 | { "cvtgf", 0x57e01580, 1, "f,g" }, | |
499 | { "cvtgf/c", 0x57e00580, 1, "f,g" }, | |
500 | { "cvtgf/u", 0x57e03580, 1, "f,g" }, | |
501 | { "cvtgf/uc", 0x57e02580, 1, "f,g" }, | |
502 | { "cvtgf/s", 0x57e09580, 1, "f,g" }, | |
503 | { "cvtgf/sc", 0x57e08580, 1, "f,g" }, | |
504 | { "cvtgf/su", 0x57e0b580, 1, "f,g" }, | |
505 | { "cvtgf/suc", 0x57e0a580, 1, "f,g" }, | |
506 | ||
507 | { "divf", 0x54001060, 1, "e,f,g" }, | |
508 | { "divf/c", 0x54000060, 1, "e,f,g" }, | |
509 | { "divf/u", 0x54003060, 1, "e,f,g" }, | |
510 | { "divf/uc", 0x54002060, 1, "e,f,g" }, | |
511 | { "divf/s", 0x54009060, 1, "e,f,g" }, | |
512 | { "divf/sc", 0x54008060, 1, "e,f,g" }, | |
513 | { "divf/su", 0x5400b060, 1, "e,f,g" }, | |
514 | { "divf/suc", 0x5400a060, 1, "e,f,g" }, | |
515 | { "divg", 0x54001460, 1, "e,f,g" }, | |
516 | { "divg/c", 0x54000460, 1, "e,f,g" }, | |
517 | { "divg/u", 0x54003460, 1, "e,f,g" }, | |
518 | { "divg/uc", 0x54002460, 1, "e,f,g" }, | |
519 | { "divg/s", 0x54009460, 1, "e,f,g" }, | |
520 | { "divg/sc", 0x54008460, 1, "e,f,g" }, | |
521 | { "divg/su", 0x5400b460, 1, "e,f,g" }, | |
522 | { "divg/suc", 0x5400a460, 1, "e,f,g" }, | |
523 | { "mulf", 0x54001040, 1, "e,f,g" }, | |
524 | { "mulf/c", 0x54000040, 1, "e,f,g" }, | |
525 | { "mulf/u", 0x54003040, 1, "e,f,g" }, | |
526 | { "mulf/uc", 0x54002040, 1, "e,f,g" }, | |
527 | { "mulf/s", 0x54009040, 1, "e,f,g" }, | |
528 | { "mulf/sc", 0x54008040, 1, "e,f,g" }, | |
529 | { "mulf/su", 0x5400b040, 1, "e,f,g" }, | |
530 | { "mulf/suc", 0x5400a040, 1, "e,f,g" }, | |
531 | { "mulg", 0x54001440, 1, "e,f,g" }, | |
532 | { "mulg/c", 0x54000440, 1, "e,f,g" }, | |
533 | { "mulg/u", 0x54003440, 1, "e,f,g" }, | |
534 | { "mulg/uc", 0x54002440, 1, "e,f,g" }, | |
535 | { "mulg/s", 0x54009440, 1, "e,f,g" }, | |
536 | { "mulg/sc", 0x54008440, 1, "e,f,g" }, | |
537 | { "mulg/su", 0x5400b440, 1, "e,f,g" }, | |
538 | { "mulg/suc", 0x5400a440, 1, "e,f,g" }, | |
539 | ||
540 | /* IEEE subset (opcode 0x16) */ | |
541 | { "adds", 0x58001000, 1, "e,f,g" }, | |
542 | { "adds/c", 0x58000000, 1, "e,f,g" }, | |
543 | { "adds/m", 0x58000800, 1, "e,f,g" }, | |
544 | { "adds/d", 0x58001800, 1, "e,f,g" }, | |
545 | { "adds/u", 0x58003000, 1, "e,f,g" }, | |
546 | { "adds/uc", 0x58002000, 1, "e,f,g" }, | |
547 | { "adds/um", 0x58002800, 1, "e,f,g" }, | |
548 | { "adds/ud", 0x58003800, 1, "e,f,g" }, | |
549 | { "adds/su", 0x5800b000, 1, "e,f,g" }, | |
550 | { "adds/suc", 0x5800a000, 1, "e,f,g" }, | |
551 | { "adds/sum", 0x5800a800, 1, "e,f,g" }, | |
552 | { "adds/sud", 0x5800b800, 1, "e,f,g" }, | |
553 | { "adds/sui", 0x5800f000, 1, "e,f,g" }, | |
554 | { "adds/suic", 0x5800e000, 1, "e,f,g" }, | |
555 | { "adds/suim", 0x5800e800, 1, "e,f,g" }, | |
556 | { "adds/suid", 0x5800f800, 1, "e,f,g" }, | |
557 | { "addt", 0x58001400, 1, "e,f,g" }, | |
558 | { "addt/c", 0x58000400, 1, "e,f,g" }, | |
559 | { "addt/m", 0x58000c00, 1, "e,f,g" }, | |
560 | { "addt/d", 0x58001c00, 1, "e,f,g" }, | |
561 | { "addt/u", 0x58003400, 1, "e,f,g" }, | |
562 | { "addt/uc", 0x58002400, 1, "e,f,g" }, | |
563 | { "addt/um", 0x58002c00, 1, "e,f,g" }, | |
564 | { "addt/ud", 0x58003c00, 1, "e,f,g" }, | |
565 | { "addt/su", 0x5800b400, 1, "e,f,g" }, | |
566 | { "addt/suc", 0x5800a400, 1, "e,f,g" }, | |
567 | { "addt/sum", 0x5800ac00, 1, "e,f,g" }, | |
568 | { "addt/sud", 0x5800bc00, 1, "e,f,g" }, | |
569 | { "addt/sui", 0x5800f400, 1, "e,f,g" }, | |
570 | { "addt/suic", 0x5800e400, 1, "e,f,g" }, | |
571 | { "addt/suim", 0x5800ec00, 1, "e,f,g" }, | |
572 | { "addt/suid", 0x5800fc00, 1, "e,f,g" }, | |
573 | { "subs", 0x58001020, 1, "e,f,g" }, | |
574 | { "subs/c", 0x58000020, 1, "e,f,g" }, | |
575 | { "subs/m", 0x58000820, 1, "e,f,g" }, | |
576 | { "subs/d", 0x58001820, 1, "e,f,g" }, | |
577 | { "subs/u", 0x58003020, 1, "e,f,g" }, | |
578 | { "subs/uc", 0x58002020, 1, "e,f,g" }, | |
579 | { "subs/um", 0x58002820, 1, "e,f,g" }, | |
580 | { "subs/ud", 0x58003820, 1, "e,f,g" }, | |
581 | { "subs/su", 0x5800b020, 1, "e,f,g" }, | |
582 | { "subs/suc", 0x5800a020, 1, "e,f,g" }, | |
583 | { "subs/sum", 0x5800a820, 1, "e,f,g" }, | |
584 | { "subs/sud", 0x5800b820, 1, "e,f,g" }, | |
585 | { "subs/sui", 0x5800f020, 1, "e,f,g" }, | |
586 | { "subs/suic", 0x5800e020, 1, "e,f,g" }, | |
587 | { "subs/suim", 0x5800e820, 1, "e,f,g" }, | |
588 | { "subs/suid", 0x5800f820, 1, "e,f,g" }, | |
589 | { "subt", 0x58001420, 1, "e,f,g" }, | |
590 | { "subt/c", 0x58000420, 1, "e,f,g" }, | |
591 | { "subt/m", 0x58000c20, 1, "e,f,g" }, | |
592 | { "subt/d", 0x58001c20, 1, "e,f,g" }, | |
593 | { "subt/u", 0x58003420, 1, "e,f,g" }, | |
594 | { "subt/uc", 0x58002420, 1, "e,f,g" }, | |
595 | { "subt/um", 0x58002c20, 1, "e,f,g" }, | |
596 | { "subt/ud", 0x58003c20, 1, "e,f,g" }, | |
597 | { "subt/su", 0x5800b420, 1, "e,f,g" }, | |
598 | { "subt/suc", 0x5800a420, 1, "e,f,g" }, | |
599 | { "subt/sum", 0x5800ac20, 1, "e,f,g" }, | |
600 | { "subt/sud", 0x5800bc20, 1, "e,f,g" }, | |
601 | { "subt/sui", 0x5800f420, 1, "e,f,g" }, | |
602 | { "subt/suic", 0x5800e420, 1, "e,f,g" }, | |
603 | { "subt/suim", 0x5800ec20, 1, "e,f,g" }, | |
604 | { "subt/suid", 0x5800fc20, 1, "e,f,g" }, | |
605 | ||
606 | { "cmpteq", 0x580014a0, 1, "e,f,g" }, | |
607 | { "cmpteq/su", 0x5800b4a0, 1, "e,f,g" }, | |
608 | { "cmptlt", 0x580014c0, 1, "e,f,g" }, | |
609 | { "cmptlt/su", 0x5800b4c0, 1, "e,f,g" }, | |
610 | { "cmptle", 0x580014e0, 1, "e,f,g" }, | |
611 | { "cmptle/su", 0x5800b4e0, 1, "e,f,g" }, | |
612 | { "cmptun", 0x58001480, 1, "e,f,g" }, | |
613 | { "cmptun/su", 0x5800b480, 1, "e,f,g" }, | |
614 | ||
615 | { "cvttq", 0x5be015e0, 1, "f,g" }, | |
616 | { "cvttq/c", 0x5be005e0, 1, "f,g" }, | |
617 | { "cvttq/v", 0x5be035e0, 1, "f,g" }, | |
618 | { "cvttq/vc", 0x5be025e0, 1, "f,g" }, | |
619 | { "cvttq/sv", 0x5be0b5e0, 1, "f,g" }, | |
620 | { "cvttq/svc", 0x5be0a5e0, 1, "f,g" }, | |
621 | { "cvttq/svi", 0x5be0f5e0, 1, "f,g" }, | |
622 | { "cvttq/svic", 0x5be0e5e0, 1, "f,g" }, | |
623 | { "cvtqs", 0x5be01780, 1, "f,g" }, | |
624 | { "cvtqs/c", 0x5be00780, 1, "f,g" }, | |
625 | { "cvtqs/m", 0x5be00f80, 1, "f,g" }, | |
626 | { "cvtqs/d", 0x5be01f80, 1, "f,g" }, | |
627 | { "cvtqs/sui", 0x5be0f780, 1, "f,g" }, | |
628 | { "cvtqs/suic", 0x5be0e780, 1, "f,g" }, | |
629 | { "cvtqs/suim", 0x5be0ef80, 1, "f,g" }, | |
630 | { "cvtqs/suid", 0x5be0ff80, 1, "f,g" }, | |
631 | { "cvtqt", 0x5be017c0, 1, "f,g" }, | |
632 | { "cvtqt/c", 0x5be007c0, 1, "f,g" }, | |
633 | { "cvtqt/m", 0x5be00fc0, 1, "f,g" }, | |
634 | { "cvtqt/d", 0x5be01fc0, 1, "f,g" }, | |
635 | { "cvtqt/sui", 0x5be0f7c0, 1, "f,g" }, | |
636 | { "cvtqt/suic", 0x5be0e7c0, 1, "f,g" }, | |
637 | { "cvtqt/suim", 0x5be0efc0, 1, "f,g" }, | |
638 | { "cvtqt/suid", 0x5be0ffc0, 1, "f,g" }, | |
639 | { "cvtts", 0x5be01580, 1, "f,g" }, | |
640 | { "cvtts/c", 0x5be00580, 1, "f,g" }, | |
641 | { "cvtts/m", 0x5be00d80, 1, "f,g" }, | |
642 | { "cvtts/d", 0x5be01d80, 1, "f,g" }, | |
643 | { "cvtts/u", 0x5be03580, 1, "f,g" }, | |
644 | { "cvtts/uc", 0x5be02580, 1, "f,g" }, | |
645 | { "cvtts/um", 0x5be02d80, 1, "f,g" }, | |
646 | { "cvtts/ud", 0x5be03d80, 1, "f,g" }, | |
647 | { "cvtts/su", 0x5be0b580, 1, "f,g" }, | |
648 | { "cvtts/suc", 0x5be0a580, 1, "f,g" }, | |
649 | { "cvtts/sum", 0x5be0ad80, 1, "f,g" }, | |
650 | { "cvtts/sud", 0x5be0bd80, 1, "f,g" }, | |
651 | { "cvtts/sui", 0x5be0f580, 1, "f,g" }, | |
652 | { "cvtts/suic", 0x5be0e580, 1, "f,g" }, | |
653 | { "cvtts/suim", 0x5be0ed80, 1, "f,g" }, | |
654 | { "cvtts/suid", 0x5be0fd80, 1, "f,g" }, | |
655 | ||
656 | { "divs", 0x58001060, 1, "e,f,g" }, | |
657 | { "divs/c", 0x58000060, 1, "e,f,g" }, | |
658 | { "divs/m", 0x58000860, 1, "e,f,g" }, | |
659 | { "divs/d", 0x58001860, 1, "e,f,g" }, | |
660 | { "divs/u", 0x58003060, 1, "e,f,g" }, | |
661 | { "divs/uc", 0x58002060, 1, "e,f,g" }, | |
662 | { "divs/um", 0x58002860, 1, "e,f,g" }, | |
663 | { "divs/ud", 0x58003860, 1, "e,f,g" }, | |
664 | { "divs/su", 0x5800b060, 1, "e,f,g" }, | |
665 | { "divs/suc", 0x5800a060, 1, "e,f,g" }, | |
666 | { "divs/sum", 0x5800a860, 1, "e,f,g" }, | |
667 | { "divs/sud", 0x5800b860, 1, "e,f,g" }, | |
668 | { "divs/sui", 0x5800f060, 1, "e,f,g" }, | |
669 | { "divs/suic", 0x5800e060, 1, "e,f,g" }, | |
670 | { "divs/suim", 0x5800e860, 1, "e,f,g" }, | |
671 | { "divs/suid", 0x5800f860, 1, "e,f,g" }, | |
672 | { "divt", 0x58001460, 1, "e,f,g" }, | |
673 | { "divt/c", 0x58000460, 1, "e,f,g" }, | |
674 | { "divt/m", 0x58000c60, 1, "e,f,g" }, | |
675 | { "divt/d", 0x58001c60, 1, "e,f,g" }, | |
676 | { "divt/u", 0x58003460, 1, "e,f,g" }, | |
677 | { "divt/uc", 0x58002460, 1, "e,f,g" }, | |
678 | { "divt/um", 0x58002c60, 1, "e,f,g" }, | |
679 | { "divt/ud", 0x58003c60, 1, "e,f,g" }, | |
680 | { "divt/su", 0x5800b460, 1, "e,f,g" }, | |
681 | { "divt/suc", 0x5800a460, 1, "e,f,g" }, | |
682 | { "divt/sum", 0x5800ac60, 1, "e,f,g" }, | |
683 | { "divt/sud", 0x5800bc60, 1, "e,f,g" }, | |
684 | { "divt/sui", 0x5800f460, 1, "e,f,g" }, | |
685 | { "divt/suic", 0x5800e460, 1, "e,f,g" }, | |
686 | { "divt/suim", 0x5800ec60, 1, "e,f,g" }, | |
687 | { "divt/suid", 0x5800fc60, 1, "e,f,g" }, | |
688 | { "muls", 0x58001040, 1, "e,f,g" }, | |
689 | { "muls/c", 0x58000040, 1, "e,f,g" }, | |
690 | { "muls/m", 0x58000840, 1, "e,f,g" }, | |
691 | { "muls/d", 0x58001840, 1, "e,f,g" }, | |
692 | { "muls/u", 0x58003040, 1, "e,f,g" }, | |
693 | { "muls/uc", 0x58002040, 1, "e,f,g" }, | |
694 | { "muls/um", 0x58002840, 1, "e,f,g" }, | |
695 | { "muls/ud", 0x58003840, 1, "e,f,g" }, | |
696 | { "muls/su", 0x5800b040, 1, "e,f,g" }, | |
697 | { "muls/suc", 0x5800a040, 1, "e,f,g" }, | |
698 | { "muls/sum", 0x5800a840, 1, "e,f,g" }, | |
699 | { "muls/sud", 0x5800b840, 1, "e,f,g" }, | |
700 | { "muls/sui", 0x5800f040, 1, "e,f,g" }, | |
701 | { "muls/suic", 0x5800e040, 1, "e,f,g" }, | |
702 | { "muls/suim", 0x5800e840, 1, "e,f,g" }, | |
703 | { "muls/suid", 0x5800f840, 1, "e,f,g" }, | |
704 | { "mult", 0x58001440, 1, "e,f,g" }, | |
705 | { "mult/c", 0x58000440, 1, "e,f,g" }, | |
706 | { "mult/m", 0x58000c40, 1, "e,f,g" }, | |
707 | { "mult/d", 0x58001c40, 1, "e,f,g" }, | |
708 | { "mult/u", 0x58003440, 1, "e,f,g" }, | |
709 | { "mult/uc", 0x58002440, 1, "e,f,g" }, | |
710 | { "mult/um", 0x58002c40, 1, "e,f,g" }, | |
711 | { "mult/ud", 0x58003c40, 1, "e,f,g" }, | |
712 | { "mult/su", 0x5800b440, 1, "e,f,g" }, | |
713 | { "mult/suc", 0x5800a440, 1, "e,f,g" }, | |
714 | { "mult/sum", 0x5800ac40, 1, "e,f,g" }, | |
715 | { "mult/sud", 0x5800bc40, 1, "e,f,g" }, | |
716 | { "mult/sui", 0x5800f440, 1, "e,f,g" }, | |
717 | { "mult/suic", 0x5800e440, 1, "e,f,g" }, | |
718 | { "mult/suim", 0x5800ec40, 1, "e,f,g" }, | |
719 | { "mult/suid", 0x5800fc40, 1, "e,f,g" }, | |
720 | ||
721 | /* | |
722 | * Miscellaneous | |
723 | */ | |
724 | { "pal", 0x00000000, 0, "I" }, /* 6o+26f */ | |
725 | { "call_pal", 0x00000000, 0, "I" }, /* alias */ | |
726 | { "bpt", 0x00000080, 0, "" }, | |
727 | { "chmk", 0x00000083, 0, "" }, | |
728 | { "imb", 0x00000086, 0, "" }, | |
729 | ||
730 | { "draint", 0x60000000, 0, "" }, /* 6o+5a+5b+16d */ | |
731 | { "trapb", 0x60000000, 0, "" }, /* 6o+5a+5b+16d */ | |
732 | { "fetch", 0x60008000, 0, "0(2)" }, | |
733 | { "fetch_m", 0x6000a000, 0, "0(2)" }, | |
734 | { "mb", 0x60004000, 0, "" }, | |
735 | { "rpcc", 0x6000c000, 0, "1" }, | |
736 | { "rc", 0x6000e000, 0, "1" }, | |
737 | { "rs", 0x6000f000, 0, "1" }, | |
738 | ||
739 | /* | |
740 | * PAL instructions | |
741 | */ | |
742 | { "hw_ld", 0x6c000000, 0, "1,t(2)" }, | |
743 | { "hw_ld/p", 0x6c008000, 0, "1,t(2)" }, | |
744 | { "hw_ld/a", 0x6c004000, 0, "1,t(2)" }, | |
745 | { "hw_ld/r", 0x6c002000, 0, "1,t(2)" }, | |
746 | { "hw_ld/q", 0x6c001000, 0, "1,t(2)" }, | |
747 | { "hw_ld/pa", 0x6c00C000, 0, "1,t(2)" }, | |
748 | { "hw_ld/pr", 0x6c00A000, 0, "1,t(2)" }, | |
749 | { "hw_ld/pq", 0x6c009000, 0, "1,t(2)" }, | |
750 | { "hw_ld/ar", 0x6c006000, 0, "1,t(2)" }, | |
751 | { "hw_ld/aq", 0x6c005000, 0, "1,t(2)" }, | |
752 | { "hw_ld/rq", 0x6c003000, 0, "1,t(2)" }, | |
753 | { "hw_ld/par", 0x6c00e000, 0, "1,t(2)" }, | |
754 | { "hw_ld/paq", 0x6c00d000, 0, "1,t(2)" }, | |
755 | { "hw_ld/prq", 0x6c00b000, 0, "1,t(2)" }, | |
756 | { "hw_ld/arq", 0x6c007000, 0, "1,t(2)" }, | |
757 | { "hw_ld/parq", 0x6c00f000, 0, "1,t(2)" }, | |
758 | ||
759 | { "hw_ldq", 0x6c001000, 0, "1,t(2)" }, /* ldq/ldl variants for Eric */ | |
760 | { "hw_ldq/p", 0x6c009000, 0, "1,t(2)" }, | |
761 | { "hw_ldq/a", 0x6c005000, 0, "1,t(2)" }, | |
762 | { "hw_ldq/r", 0x6c003000, 0, "1,t(2)" }, | |
763 | { "hw_ldq/pa", 0x6c00d000, 0, "1,t(2)" }, | |
764 | { "hw_ldq/pr", 0x6c00b000, 0, "1,t(2)" }, | |
765 | { "hw_ldq/ar", 0x6c007000, 0, "1,t(2)" }, | |
766 | { "hw_ldq/par", 0x6c00f000, 0, "1,t(2)" }, | |
767 | { "hw_ldl", 0x6c000000, 0, "1,t(2)" }, | |
768 | { "hw_ldl/p", 0x6c008000, 0, "1,t(2)" }, | |
769 | { "hw_ldl/a", 0x6c004000, 0, "1,t(2)" }, | |
770 | { "hw_ldl/r", 0x6c002000, 0, "1,t(2)" }, | |
771 | { "hw_ldl/pa", 0x6c00C000, 0, "1,t(2)" }, | |
772 | { "hw_ldl/pr", 0x6c00A000, 0, "1,t(2)" }, | |
773 | { "hw_ldl/ar", 0x6c006000, 0, "1,t(2)" }, | |
774 | { "hw_ldl/par", 0x6c00e000, 0, "1,t(2)" }, | |
775 | ||
776 | { "hw_st/paq", 0x7c00c000, 0, "1,t(2)" }, | |
777 | { "hw_st/pa", 0x7c00b000, 0, "1,t(2)" }, | |
778 | { "hw_st/pq", 0x7c009000, 0, "1,t(2)" }, | |
779 | { "hw_st/aq", 0x7c005000, 0, "1,t(2)" }, | |
780 | { "hw_st/p", 0x7c008000, 0, "1,t(2)" }, | |
781 | { "hw_st/a", 0x7c004000, 0, "1,t(2)" }, | |
782 | { "hw_st/q", 0x7c001000, 0, "1,t(2)" }, | |
783 | { "hw_st", 0x7c000000, 0, "1,t(2)" }, | |
784 | ||
785 | { "hw_stq/pa", 0x7c00c000, 0, "1,t(2)" }, /* stq/stl variants for Eric */ | |
786 | { "hw_stq/p", 0x7c009000, 0, "1,t(2)" }, | |
787 | { "hw_stq", 0x7c001000, 0, "1,t(2)" }, | |
788 | { "hw_stq/a", 0x7c005000, 0, "1,t(2)" }, | |
789 | { "hw_stl/pa", 0x7c00b000, 0, "1,t(2)" }, | |
790 | { "hw_stl/p", 0x7c008000, 0, "1,t(2)" }, | |
791 | { "hw_stl/a", 0x7c004000, 0, "1,t(2)" }, | |
792 | { "hw_stl", 0x7c000000, 0, "1,t(2)" }, | |
793 | ||
794 | { "hw_mfpr/p", 0x64000080, 0, "R,3" }, | |
795 | { "hw_mfpr/a", 0x64000040, 0, "R,3" }, | |
796 | { "hw_mfpr/i", 0x64000020, 0, "R,3" }, | |
797 | { "hw_mfpr/pa", 0x640000c0, 0, "R,3" }, | |
798 | { "hw_mfpr/pi", 0x640000a0, 0, "R,3" }, | |
799 | { "hw_mfpr/ai", 0x64000060, 0, "R,3" }, | |
800 | { "hw_mfpr/pai",0x640000e0, 0, "R,3" }, | |
801 | { "hw_mfpr", 0x64000000, 0, "R,8" }, | |
802 | ||
803 | { "hw_mtpr/p", 0x74000080, 0, "R,3" }, | |
804 | { "hw_mtpr/a", 0x74000040, 0, "R,3" }, | |
805 | { "hw_mtpr/i", 0x74000020, 0, "R,3" }, | |
806 | { "hw_mtpr/pa", 0x740000c0, 0, "R,3" }, | |
807 | { "hw_mtpr/pi", 0x740000a0, 0, "R,3" }, | |
808 | { "hw_mtpr/ai", 0x74000060, 0, "R,3" }, | |
809 | { "hw_mtpr/pai",0x740000e0, 0, "R,3" }, | |
810 | { "hw_mtpr", 0x74000000, 0, "R,8" }, | |
811 | ||
812 | { "hw_rei", 0x7bff8000, 0, "" }, | |
813 | /* | |
814 | * More macros | |
815 | */ | |
816 | { "nop", 0x47ff041f, 0, "" }, /* or zero,zero,zero */ | |
817 | { "mov", 0x47e00400, 0, "2,3" }, /* or zero,r2,r3 */ | |
818 | }; | |
819 | ||
820 | #define NUMOPCODES ((sizeof alpha_opcodes)/(sizeof alpha_opcodes[0])) |