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c7927a3c 1/* -*- c -*- */
5bf135a7
NC		 2/* Copyright 2012 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4 Written by DJ Delorie.
5
6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
df7b86aa 23#include "sysdep.h"
c7927a3c
NC		 24#include <stdio.h>
25#include <stdlib.h>
26#include <string.h>
c7927a3c
NC		 27#include "ansidecl.h"
28#include "opcode/rx.h"
29
30#define RX_OPCODE_BIG_ENDIAN 0
31
32typedef struct
33{
34 RX_Opcode_Decoded * rx;
35 int (* getbyte)(void *);
36 void * ptr;
37 unsigned char * op;
38} LocalData;
39
40static int trace = 0;
41
42#define BSIZE 0
43#define WSIZE 1
44#define LSIZE 2
45
46/* These are for when the upper bits are "don't care" or "undefined". */
47static int bwl[] =
48{
49 RX_Byte,
50 RX_Word,
51 RX_Long
52};
53
54static int sbwl[] =
55{
56 RX_SByte,
57 RX_SWord,
58 RX_Long
59};
60
61static int ubwl[] =
62{
63 RX_UByte,
64 RX_UWord,
65 RX_Long
66};
67
68static int memex[] =
69{
70 RX_SByte,
71 RX_SWord,
72 RX_Long,
73 RX_UWord
74};
75
76#define ID(x) rx->id = RXO_##x
77#define OP(n,t,r,a) (rx->op[n].type = t, \
78 rx->op[n].reg = r, \
79 rx->op[n].addend = a )
80#define OPs(n,t,r,a,s) (OP (n,t,r,a), \
81 rx->op[n].size = s )
82
83/* This is for the BWL and BW bitfields. */
84static int SCALE[] = { 1, 2, 4 };
85/* This is for the prefix size enum. */
86static int PSCALE[] = { 4, 1, 1, 1, 2, 2, 2, 3, 4 };
87
88static int flagmap[] = {0, 1, 2, 3, 0, 0, 0, 0,
89 16, 17, 0, 0, 0, 0, 0, 0 };
90
91static int dsp3map[] = { 8, 9, 10, 3, 4, 5, 6, 7 };
92
93/*
94 *C a constant (immediate) c
95 *R A register
96 *I Register indirect, no offset
97 *Is Register indirect, with offset
98 *D standard displacement: type (r,[r],dsp8,dsp16 code), register, BWL code
99 *P standard displacement: type (r,[r]), reg, assumes UByte
100 *Pm memex displacement: type (r,[r]), reg, memex code
101 *cc condition code. */
102
103#define DC(c) OP (0, RX_Operand_Immediate, 0, c)
104#define DR(r) OP (0, RX_Operand_Register, r, 0)
105#define DI(r,a) OP (0, RX_Operand_Indirect, r, a)
106#define DIs(r,a,s) OP (0, RX_Operand_Indirect, r, (a) * SCALE[s])
107#define DD(t,r,s) rx_disp (0, t, r, bwl[s], ld);
108#define DF(r) OP (0, RX_Operand_Flag, flagmap[r], 0)
109
110#define SC(i) OP (1, RX_Operand_Immediate, 0, i)
111#define SR(r) OP (1, RX_Operand_Register, r, 0)
f9c7014e 112#define SRR(r) OP (1, RX_Operand_TwoReg, r, 0)
c7927a3c
NC		 113#define SI(r,a) OP (1, RX_Operand_Indirect, r, a)
114#define SIs(r,a,s) OP (1, RX_Operand_Indirect, r, (a) * SCALE[s])
115#define SD(t,r,s) rx_disp (1, t, r, bwl[s], ld);
116#define SP(t,r) rx_disp (1, t, r, (t!=3) ? RX_UByte : RX_Long, ld); P(t, 1);
117#define SPm(t,r,m) rx_disp (1, t, r, memex[m], ld); rx->op[1].size = memex[m];
118#define Scc(cc) OP (1, RX_Operand_Condition, cc, 0)
119
120#define S2C(i) OP (2, RX_Operand_Immediate, 0, i)
121#define S2R(r) OP (2, RX_Operand_Register, r, 0)
122#define S2I(r,a) OP (2, RX_Operand_Indirect, r, a)
123#define S2Is(r,a,s) OP (2, RX_Operand_Indirect, r, (a) * SCALE[s])
124#define S2D(t,r,s) rx_disp (2, t, r, bwl[s], ld);
125#define S2P(t,r) rx_disp (2, t, r, (t!=3) ? RX_UByte : RX_Long, ld); P(t, 2);
126#define S2Pm(t,r,m) rx_disp (2, t, r, memex[m], ld); rx->op[2].size = memex[m];
127#define S2cc(cc) OP (2, RX_Operand_Condition, cc, 0)
128
129#define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz]
130#define sBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = sbwl[sz]
131#define uBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = ubwl[sz]
132#define P(t, n) rx->op[n].size = (t!=3) ? RX_UByte : RX_Long;
133
134#define F(f) store_flags(rx, f)
135
136#define AU ATTRIBUTE_UNUSED
137#define GETBYTE() (ld->op [ld->rx->n_bytes++] = ld->getbyte (ld->ptr))
138
139#define SYNTAX(x) rx->syntax = x
140
141#define UNSUPPORTED() \
142 rx->syntax = "*unknown*"
143
144#define IMM(sf) immediate (sf, 0, ld)
145#define IMMex(sf) immediate (sf, 1, ld)
146
147static int
148immediate (int sfield, int ex, LocalData * ld)
149{
150 unsigned long i = 0, j;
151
152 switch (sfield)
153 {
154#define B ((unsigned long) GETBYTE())
155 case 0:
156#if RX_OPCODE_BIG_ENDIAN
157 i = B;
158 if (ex && (i & 0x80))
159 i -= 0x100;
160 i <<= 24;
161 i |= B << 16;
162 i |= B << 8;
163 i |= B;
164#else
165 i = B;
166 i |= B << 8;
167 i |= B << 16;
168 j = B;
169 if (ex && (j & 0x80))
170 j -= 0x100;
171 i |= j << 24;
172#endif
173 break;
174 case 3:
175#if RX_OPCODE_BIG_ENDIAN
176 i = B << 16;
177 i |= B << 8;
178 i |= B;
179#else
180 i = B;
181 i |= B << 8;
182 i |= B << 16;
183#endif
184 if (ex && (i & 0x800000))
185 i -= 0x1000000;
186 break;
187 case 2:
188#if RX_OPCODE_BIG_ENDIAN
189 i |= B << 8;
190 i |= B;
191#else
192 i |= B;
193 i |= B << 8;
194#endif
195 if (ex && (i & 0x8000))
196 i -= 0x10000;
197 break;
198 case 1:
199 i |= B;
200 if (ex && (i & 0x80))
201 i -= 0x100;
202 break;
203 default:
204 abort();
205 }
206 return i;
207}
208
209static void
210rx_disp (int n, int type, int reg, int size, LocalData * ld)
211{
212 int disp;
213
214 ld->rx->op[n].reg = reg;
215 switch (type)
216 {
217 case 3:
218 ld->rx->op[n].type = RX_Operand_Register;
219 break;
220 case 0:
221 ld->rx->op[n].type = RX_Operand_Indirect;
222 ld->rx->op[n].addend = 0;
223 break;
224 case 1:
225 ld->rx->op[n].type = RX_Operand_Indirect;
226 disp = GETBYTE ();
227 ld->rx->op[n].addend = disp * PSCALE[size];
228 break;
229 case 2:
230 ld->rx->op[n].type = RX_Operand_Indirect;
231 disp = GETBYTE ();
232#if RX_OPCODE_BIG_ENDIAN
233 disp = disp * 256 + GETBYTE ();
234#else
235 disp = disp + GETBYTE () * 256;
236#endif
237 ld->rx->op[n].addend = disp * PSCALE[size];
238 break;
239 default:
240 abort ();
241 }
242}
243
3cf79a01
DD		 244#define xO 8
245#define xS 4
246#define xZ 2
247#define xC 1
248
249#define F_____
250#define F___ZC rx->flags_0 = rx->flags_s = xZ|xC;
251#define F__SZ_ rx->flags_0 = rx->flags_s = xS|xZ;
252#define F__SZC rx->flags_0 = rx->flags_s = xS|xZ|xC;
253#define F_0SZC rx->flags_0 = xO|xS|xZ|xC; rx->flags_s = xS|xZ|xC;
254#define F_O___ rx->flags_0 = rx->flags_s = xO;
255#define F_OS__ rx->flags_0 = rx->flags_s = xO|xS;
256#define F_OSZ_ rx->flags_0 = rx->flags_s = xO|xS|xZ;
257#define F_OSZC rx->flags_0 = rx->flags_s = xO|xS|xZ|xC;
c7927a3c
NC		 258
259int
260rx_decode_opcode (unsigned long pc AU,
261 RX_Opcode_Decoded * rx,
262 int (* getbyte)(void *),
263 void * ptr)
264{
265 LocalData lds, * ld = &lds;
266 unsigned char op[20] = {0};
267
268 lds.rx = rx;
269 lds.getbyte = getbyte;
270 lds.ptr = ptr;
271 lds.op = op;
272
273 memset (rx, 0, sizeof (*rx));
274 BWL(LSIZE);
275
276/** VARY sz 00 01 10 */
277
278/*----------------------------------------------------------------------*/
279/* MOV */
280
281/** 0111 0101 0100 rdst mov%s #%1, %0 */
3cf79a01 282 ID(mov); DR(rdst); SC(IMM (1)); F_____;
c7927a3c
NC		 283
284/** 1111 10sd rdst im sz mov%s #%1, %0 */
78e98aab
DD		 285 ID(mov); DD(sd, rdst, sz);
286 if ((im == 1 && sz == 0)
287 || (im == 2 && sz == 1)
288 || (im == 0 && sz == 2))
289 {
290 BWL (sz);
291 SC(IMM(im));
292 }
293 else
294 {
295 sBWL (sz);
296 SC(IMMex(im));
297 }
298 F_____;
c7927a3c
NC		 299
300/** 0110 0110 immm rdst mov%s #%1, %0 */
3cf79a01 301 ID(mov); DR(rdst); SC(immm); F_____;
c7927a3c
NC		 302
303/** 0011 11sz d dst sppp mov%s #%1, %0 */
3cf79a01 304 ID(mov); sBWL (sz); DIs(dst, d*16+sppp, sz); SC(IMM(1)); F_____;
c7927a3c
NC		 305
306/** 11sz sd ss rsrc rdst mov%s %1, %0 */
f9c7014e 307 if (ss == 3 && sz == 2 && rsrc == 0 && rdst == 0)
c7927a3c 308 {
f9c7014e 309 ID(nop2);
9887672f 310 rx->syntax = "nop";
c7927a3c
NC		 311 }
312 else
313 {
f9c7014e
DD		 314 ID(mov); sBWL(sz); F_____;
315 if ((ss == 3) && (sd != 3))
316 {
317 SD(ss, rdst, sz); DD(sd, rsrc, sz);
318 }
319 else
320 {
321 SD(ss, rsrc, sz); DD(sd, rdst, sz);
322 }
c7927a3c
NC		 323 }
324
325/** 10sz 1dsp a src b dst mov%s %1, %0 */
3cf79a01 326 ID(mov); sBWL(sz); DR(dst); SIs(src, dsp*4+a*2+b, sz); F_____;
c7927a3c
NC		 327
328/** 10sz 0dsp a dst b src mov%s %1, %0 */
3cf79a01 329 ID(mov); sBWL(sz); DIs(dst, dsp*4+a*2+b, sz); SR(src); F_____;
c7927a3c
NC		 330
331/** 1111 1110 01sz isrc bsrc rdst mov%s [%1, %2], %0 */
f9c7014e 332 ID(movbi); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
c7927a3c
NC		 333
334/** 1111 1110 00sz isrc bsrc rdst mov%s %0, [%1, %2] */
f9c7014e 335 ID(movbir); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
c7927a3c
NC		 336
337/** 1111 1110 11sz isrc bsrc rdst movu%s [%1, %2], %0 */
f9c7014e 338 ID(movbi); uBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
c7927a3c
NC		 339
340/** 1111 1101 0010 0p sz rdst rsrc mov%s %1, %0 */
3cf79a01 341 ID(mov); sBWL (sz); SR(rsrc); F_____;
c7927a3c
NC		 342 OP(0, p ? RX_Operand_Predec : RX_Operand_Postinc, rdst, 0);
343
344/** 1111 1101 0010 1p sz rsrc rdst mov%s %1, %0 */
3cf79a01 345 ID(mov); sBWL (sz); DR(rdst); F_____;
c7927a3c
NC		 346 OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
347
348/** 1011 w dsp a src b dst movu%s %1, %0 */
3cf79a01 349 ID(mov); uBWL(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____;
c7927a3c
NC		 350
351/** 0101 1 s ss rsrc rdst movu%s %1, %0 */
3cf79a01 352 ID(mov); uBWL(s); SD(ss, rsrc, s); DR(rdst); F_____;
c7927a3c
NC		 353
354/** 1111 1101 0011 1p sz rsrc rdst movu%s %1, %0 */
3cf79a01 355 ID(mov); uBWL (sz); DR(rdst); F_____;
c7927a3c
NC		 356 OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
357
358/*----------------------------------------------------------------------*/
359/* PUSH/POP */
360
361/** 0110 1111 dsta dstb popm %1-%2 */
3cf79a01 362 ID(popm); SR(dsta); S2R(dstb); F_____;
c7927a3c
NC		 363
364/** 0110 1110 dsta dstb pushm %1-%2 */
3cf79a01 365 ID(pushm); SR(dsta); S2R(dstb); F_____;
c7927a3c
NC		 366
367/** 0111 1110 1011 rdst pop %0 */
3cf79a01 368 ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(rdst); F_____;
c7927a3c
NC		 369
370/** 0111 1110 10sz rsrc push%s %1 */
3cf79a01 371 ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SR(rsrc); F_____;
c7927a3c
NC		 372
373/** 1111 01ss rsrc 10sz push%s %1 */
3cf79a01 374 ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SD(ss, rsrc, sz); F_____;
c7927a3c
NC		 375
376/*----------------------------------------------------------------------*/
377/* XCHG */
378
379/** 1111 1100 0100 00ss rsrc rdst xchg %1%S1, %0 */
380 ID(xchg); DR(rdst); SP(ss, rsrc);
381
382/** 0000 0110 mx10 00ss 0001 0000 rsrc rdst xchg %1%S1, %0 */
383 ID(xchg); DR(rdst); SPm(ss, rsrc, mx);
384
385/*----------------------------------------------------------------------*/
386/* STZ/STNZ */
387
388/** 1111 1101 0111 im00 1110rdst stz #%1, %0 */
389 ID(stcc); SC(IMMex(im)); DR(rdst); S2cc(RXC_z);
390
391/** 1111 1101 0111 im00 1111rdst stnz #%1, %0 */
392 ID(stcc); SC(IMMex(im)); DR(rdst); S2cc(RXC_nz);
393
394/*----------------------------------------------------------------------*/
395/* RTSD */
396
397/** 0110 0111 rtsd #%1 */
398 ID(rtsd); SC(IMM(1) * 4);
399
400/** 0011 1111 rega regb rtsd #%1, %2-%0 */
401 ID(rtsd); SC(IMM(1) * 4); S2R(rega); DR(regb);
402
403/*----------------------------------------------------------------------*/
404/* AND */
405
406/** 0110 0100 immm rdst and #%1, %0 */
3cf79a01 407 ID(and); SC(immm); DR(rdst); F__SZ_;
c7927a3c
NC		 408
409/** 0111 01im 0010 rdst and #%1, %0 */
3cf79a01 410 ID(and); SC(IMMex(im)); DR(rdst); F__SZ_;
c7927a3c
NC		 411
412/** 0101 00ss rsrc rdst and %1%S1, %0 */
3cf79a01 413 ID(and); SP(ss, rsrc); DR(rdst); F__SZ_;
c7927a3c
NC		 414
415/** 0000 0110 mx01 00ss rsrc rdst and %1%S1, %0 */
3cf79a01 416 ID(and); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
c7927a3c
NC		 417
418/** 1111 1111 0100 rdst srca srcb and %2, %1, %0 */
3cf79a01 419 ID(and); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
c7927a3c
NC		 420
421/*----------------------------------------------------------------------*/
422/* OR */
423
424/** 0110 0101 immm rdst or #%1, %0 */
3cf79a01 425 ID(or); SC(immm); DR(rdst); F__SZ_;
c7927a3c
NC		 426
427/** 0111 01im 0011 rdst or #%1, %0 */
3cf79a01 428 ID(or); SC(IMMex(im)); DR(rdst); F__SZ_;
c7927a3c
NC		 429
430/** 0101 01ss rsrc rdst or %1%S1, %0 */
3cf79a01 431 ID(or); SP(ss, rsrc); DR(rdst); F__SZ_;
c7927a3c
NC		 432
433/** 0000 0110 mx01 01ss rsrc rdst or %1%S1, %0 */
3cf79a01 434 ID(or); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
c7927a3c
NC		 435
436/** 1111 1111 0101 rdst srca srcb or %2, %1, %0 */
3cf79a01 437 ID(or); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
c7927a3c
NC		 438
439/*----------------------------------------------------------------------*/
440/* XOR */
441
442/** 1111 1101 0111 im00 1101rdst xor #%1, %0 */
3cf79a01 443 ID(xor); SC(IMMex(im)); DR(rdst); F__SZ_;
c7927a3c
NC		 444
445/** 1111 1100 0011 01ss rsrc rdst xor %1%S1, %0 */
3cf79a01 446 ID(xor); SP(ss, rsrc); DR(rdst); F__SZ_;
c7927a3c
NC		 447
448/** 0000 0110 mx10 00ss 0000 1101 rsrc rdst xor %1%S1, %0 */
3cf79a01 449 ID(xor); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
c7927a3c
NC		 450
451/*----------------------------------------------------------------------*/
452/* NOT */
453
454/** 0111 1110 0000 rdst not %0 */
3cf79a01 455 ID(xor); DR(rdst); SR(rdst); S2C(~0); F__SZ_;
c7927a3c
NC		 456
457/** 1111 1100 0011 1011 rsrc rdst not %1, %0 */
3cf79a01 458 ID(xor); DR(rdst); SR(rsrc); S2C(~0); F__SZ_;
c7927a3c
NC		 459
460/*----------------------------------------------------------------------*/
461/* TST */
462
463/** 1111 1101 0111 im00 1100rdst tst #%1, %2 */
3cf79a01 464 ID(and); SC(IMMex(im)); S2R(rdst); F__SZ_;
c7927a3c
NC		 465
466/** 1111 1100 0011 00ss rsrc rdst tst %1%S1, %2 */
3cf79a01 467 ID(and); SP(ss, rsrc); S2R(rdst); F__SZ_;
c7927a3c
NC		 468
469/** 0000 0110 mx10 00ss 0000 1100 rsrc rdst tst %1%S1, %2 */
3cf79a01 470 ID(and); SPm(ss, rsrc, mx); S2R(rdst); F__SZ_;
c7927a3c
NC		 471
472/*----------------------------------------------------------------------*/
473/* NEG */
474
475/** 0111 1110 0001 rdst neg %0 */
3cf79a01 476 ID(sub); DR(rdst); SC(0); S2R(rdst); F_OSZC;
c7927a3c
NC		 477
478/** 1111 1100 0000 0111 rsrc rdst neg %2, %0 */
3cf79a01 479 ID(sub); DR(rdst); SC(0); S2R(rsrc); F_OSZC;
c7927a3c
NC		 480
481/*----------------------------------------------------------------------*/
482/* ADC */
483
484/** 1111 1101 0111 im00 0010rdst adc #%1, %0 */
3cf79a01 485 ID(adc); SC(IMMex(im)); DR(rdst); F_OSZC;
c7927a3c
NC		 486
487/** 1111 1100 0000 1011 rsrc rdst adc %1, %0 */
3cf79a01 488 ID(adc); SR(rsrc); DR(rdst); F_OSZC;
c7927a3c
NC		 489
490/** 0000 0110 1010 00ss 0000 0010 rsrc rdst adc %1%S1, %0 */
3cf79a01 491 ID(adc); SPm(ss, rsrc, 2); DR(rdst); F_OSZC;
c7927a3c
NC		 492
493/*----------------------------------------------------------------------*/
494/* ADD */
495
496/** 0110 0010 immm rdst add #%1, %0 */
3cf79a01 497 ID(add); SC(immm); DR(rdst); F_OSZC;
c7927a3c
NC		 498
499/** 0100 10ss rsrc rdst add %1%S1, %0 */
3cf79a01 500 ID(add); SP(ss, rsrc); DR(rdst); F_OSZC;
c7927a3c
NC		 501
502/** 0000 0110 mx00 10ss rsrc rdst add %1%S1, %0 */
3cf79a01 503 ID(add); SPm(ss, rsrc, mx); DR(rdst); F_OSZC;
c7927a3c
NC		 504
505/** 0111 00im rsrc rdst add #%1, %2, %0 */
3cf79a01 506 ID(add); SC(IMMex(im)); S2R(rsrc); DR(rdst); F_OSZC;
c7927a3c
NC		 507
508/** 1111 1111 0010 rdst srca srcb add %2, %1, %0 */
3cf79a01 509 ID(add); DR(rdst); SR(srcb); S2R(srca); F_OSZC;
c7927a3c
NC		 510
511/*----------------------------------------------------------------------*/
512/* CMP */
513
514/** 0110 0001 immm rdst cmp #%2, %1 */
3cf79a01 515 ID(sub); S2C(immm); SR(rdst); F_OSZC;
c7927a3c
NC		 516
517/** 0111 01im 0000 rsrc cmp #%2, %1%S1 */
3cf79a01 518 ID(sub); SR(rsrc); S2C(IMMex(im)); F_OSZC;
c7927a3c
NC		 519
520/** 0111 0101 0101 rsrc cmp #%2, %1 */
3cf79a01 521 ID(sub); SR(rsrc); S2C(IMM(1)); F_OSZC;
c7927a3c
NC		 522
523/** 0100 01ss rsrc rdst cmp %2%S2, %1 */
3cf79a01 524 ID(sub); S2P(ss, rsrc); SR(rdst); F_OSZC;
c7927a3c
NC		 525
526/** 0000 0110 mx00 01ss rsrc rdst cmp %2%S2, %1 */
3cf79a01 527 ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); F_OSZC;
c7927a3c
NC		 528
529/*----------------------------------------------------------------------*/
530/* SUB */
531
532/** 0110 0000 immm rdst sub #%2, %0 */
3cf79a01 533 ID(sub); S2C(immm); SR(rdst); DR(rdst); F_OSZC;
c7927a3c
NC		 534
535/** 0100 00ss rsrc rdst sub %2%S2, %1 */
3cf79a01 536 ID(sub); S2P(ss, rsrc); SR(rdst); DR(rdst); F_OSZC;
c7927a3c
NC		 537
538/** 0000 0110 mx00 00ss rsrc rdst sub %2%S2, %1 */
3cf79a01 539 ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); DR(rdst); F_OSZC;
c7927a3c
NC		 540
541/** 1111 1111 0000 rdst srca srcb sub %2, %1, %0 */
3cf79a01 542 ID(sub); DR(rdst); SR(srcb); S2R(srca); F_OSZC;
c7927a3c
NC		 543
544/*----------------------------------------------------------------------*/
545/* SBB */
546
547/** 1111 1100 0000 0011 rsrc rdst sbb %1, %0 */
3cf79a01 548 ID(sbb); SR (rsrc); DR(rdst); F_OSZC;
c7927a3c
NC		 549
550 /* FIXME: only supports .L */
551/** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */
3cf79a01 552 ID(sbb); SPm(sp, rsrc, mx); DR(rdst); F_OSZC;
c7927a3c
NC		 553
554/*----------------------------------------------------------------------*/
555/* ABS */
556
557/** 0111 1110 0010 rdst abs %0 */
3cf79a01 558 ID(abs); DR(rdst); SR(rdst); F_OSZ_;
c7927a3c
NC		 559
560/** 1111 1100 0000 1111 rsrc rdst abs %1, %0 */
3cf79a01 561 ID(abs); DR(rdst); SR(rsrc); F_OSZ_;
c7927a3c
NC		 562
563/*----------------------------------------------------------------------*/
564/* MAX */
565
566/** 1111 1101 0111 im00 0100rdst max #%1, %0 */
567 ID(max); DR(rdst); SC(IMMex(im));
568
569/** 1111 1100 0001 00ss rsrc rdst max %1%S1, %0 */
f9c7014e
DD		 570 if (ss == 3 && rsrc == 0 && rdst == 0)
571 {
572 ID(nop3);
9887672f 573 rx->syntax = "nop";
f9c7014e
DD		 574 }
575 else
576 {
577 ID(max); SP(ss, rsrc); DR(rdst);
578 }
c7927a3c
NC		 579
580/** 0000 0110 mx10 00ss 0000 0100 rsrc rdst max %1%S1, %0 */
581 ID(max); SPm(ss, rsrc, mx); DR(rdst);
582
583/*----------------------------------------------------------------------*/
584/* MIN */
585
586/** 1111 1101 0111 im00 0101rdst min #%1, %0 */
587 ID(min); DR(rdst); SC(IMMex(im));
588
589/** 1111 1100 0001 01ss rsrc rdst min %1%S1, %0 */
590 ID(min); SP(ss, rsrc); DR(rdst);
591
592/** 0000 0110 mx10 00ss 0000 0101 rsrc rdst min %1%S1, %0 */
593 ID(min); SPm(ss, rsrc, mx); DR(rdst);
594
595/*----------------------------------------------------------------------*/
596/* MUL */
597
598/** 0110 0011 immm rdst mul #%1, %0 */
3cf79a01 599 ID(mul); DR(rdst); SC(immm); F_____;
c7927a3c
NC		 600
601/** 0111 01im 0001rdst mul #%1, %0 */
3cf79a01 602 ID(mul); DR(rdst); SC(IMMex(im)); F_____;
c7927a3c
NC		 603
604/** 0100 11ss rsrc rdst mul %1%S1, %0 */
3cf79a01 605 ID(mul); SP(ss, rsrc); DR(rdst); F_____;
c7927a3c
NC		 606
607/** 0000 0110 mx00 11ss rsrc rdst mul %1%S1, %0 */
3cf79a01 608 ID(mul); SPm(ss, rsrc, mx); DR(rdst); F_____;
c7927a3c
NC		 609
610/** 1111 1111 0011 rdst srca srcb mul %2, %1, %0 */
3cf79a01 611 ID(mul); DR(rdst); SR(srcb); S2R(srca); F_____;
c7927a3c
NC		 612
613/*----------------------------------------------------------------------*/
614/* EMUL */
615
616/** 1111 1101 0111 im00 0110rdst emul #%1, %0 */
617 ID(emul); DR(rdst); SC(IMMex(im));
618
619/** 1111 1100 0001 10ss rsrc rdst emul %1%S1, %0 */
620 ID(emul); SP(ss, rsrc); DR(rdst);
621
622/** 0000 0110 mx10 00ss 0000 0110 rsrc rdst emul %1%S1, %0 */
623 ID(emul); SPm(ss, rsrc, mx); DR(rdst);
624
625/*----------------------------------------------------------------------*/
626/* EMULU */
627
628/** 1111 1101 0111 im00 0111rdst emulu #%1, %0 */
629 ID(emulu); DR(rdst); SC(IMMex(im));
630
631/** 1111 1100 0001 11ss rsrc rdst emulu %1%S1, %0 */
632 ID(emulu); SP(ss, rsrc); DR(rdst);
633
634/** 0000 0110 mx10 00ss 0000 0111 rsrc rdst emulu %1%S1, %0 */
635 ID(emulu); SPm(ss, rsrc, mx); DR(rdst);
636
637/*----------------------------------------------------------------------*/
638/* DIV */
639
640/** 1111 1101 0111 im00 1000rdst div #%1, %0 */
3cf79a01 641 ID(div); DR(rdst); SC(IMMex(im)); F_O___;
c7927a3c
NC		 642
643/** 1111 1100 0010 00ss rsrc rdst div %1%S1, %0 */
3cf79a01 644 ID(div); SP(ss, rsrc); DR(rdst); F_O___;
c7927a3c
NC		 645
646/** 0000 0110 mx10 00ss 0000 1000 rsrc rdst div %1%S1, %0 */
3cf79a01 647 ID(div); SPm(ss, rsrc, mx); DR(rdst); F_O___;
c7927a3c
NC		 648
649/*----------------------------------------------------------------------*/
650/* DIVU */
651
652/** 1111 1101 0111 im00 1001rdst divu #%1, %0 */
3cf79a01 653 ID(divu); DR(rdst); SC(IMMex(im)); F_O___;
c7927a3c
NC		 654
655/** 1111 1100 0010 01ss rsrc rdst divu %1%S1, %0 */
3cf79a01 656 ID(divu); SP(ss, rsrc); DR(rdst); F_O___;
c7927a3c
NC		 657
658/** 0000 0110 mx10 00ss 0000 1001 rsrc rdst divu %1%S1, %0 */
3cf79a01 659 ID(divu); SPm(ss, rsrc, mx); DR(rdst); F_O___;
c7927a3c
NC		 660
661/*----------------------------------------------------------------------*/
662/* SHIFT */
663
664/** 0110 110i mmmm rdst shll #%2, %0 */
3cf79a01 665 ID(shll); S2C(i*16+mmmm); SR(rdst); DR(rdst); F_OSZC;
c7927a3c
NC		 666
667/** 1111 1101 0110 0010 rsrc rdst shll %2, %0 */
3cf79a01 668 ID(shll); S2R(rsrc); SR(rdst); DR(rdst); F_OSZC;
c7927a3c
NC		 669
670/** 1111 1101 110immmm rsrc rdst shll #%2, %1, %0 */
3cf79a01 671 ID(shll); S2C(immmm); SR(rsrc); DR(rdst); F_OSZC;
c7927a3c
NC		 672
673
674/** 0110 101i mmmm rdst shar #%2, %0 */
3cf79a01 675 ID(shar); S2C(i*16+mmmm); SR(rdst); DR(rdst); F_0SZC;
c7927a3c
NC		 676
677/** 1111 1101 0110 0001 rsrc rdst shar %2, %0 */
3cf79a01 678 ID(shar); S2R(rsrc); SR(rdst); DR(rdst); F_0SZC;
c7927a3c
NC		 679
680/** 1111 1101 101immmm rsrc rdst shar #%2, %1, %0 */
3cf79a01 681 ID(shar); S2C(immmm); SR(rsrc); DR(rdst); F_0SZC;
c7927a3c
NC		 682
683
684/** 0110 100i mmmm rdst shlr #%2, %0 */
3cf79a01 685 ID(shlr); S2C(i*16+mmmm); SR(rdst); DR(rdst); F__SZC;
c7927a3c
NC		 686
687/** 1111 1101 0110 0000 rsrc rdst shlr %2, %0 */
3cf79a01 688 ID(shlr); S2R(rsrc); SR(rdst); DR(rdst); F__SZC;
c7927a3c
NC		 689
690/** 1111 1101 100immmm rsrc rdst shlr #%2, %1, %0 */
3cf79a01 691 ID(shlr); S2C(immmm); SR(rsrc); DR(rdst); F__SZC;
c7927a3c
NC		 692
693/*----------------------------------------------------------------------*/
694/* ROTATE */
695
696/** 0111 1110 0101 rdst rolc %0 */
3cf79a01 697 ID(rolc); DR(rdst); F__SZC;
c7927a3c
NC		 698
699/** 0111 1110 0100 rdst rorc %0 */
3cf79a01 700 ID(rorc); DR(rdst); F__SZC;
c7927a3c
NC		 701
702/** 1111 1101 0110 111i mmmm rdst rotl #%1, %0 */
3cf79a01 703 ID(rotl); SC(i*16+mmmm); DR(rdst); F__SZC;
c7927a3c
NC		 704
705/** 1111 1101 0110 0110 rsrc rdst rotl %1, %0 */
3cf79a01 706 ID(rotl); SR(rsrc); DR(rdst); F__SZC;
c7927a3c
NC		 707
708/** 1111 1101 0110 110i mmmm rdst rotr #%1, %0 */
3cf79a01 709 ID(rotr); SC(i*16+mmmm); DR(rdst); F__SZC;
c7927a3c
NC		 710
711/** 1111 1101 0110 0100 rsrc rdst rotr %1, %0 */
3cf79a01 712 ID(rotr); SR(rsrc); DR(rdst); F__SZC;
c7927a3c
NC		 713
714/** 1111 1101 0110 0101 rsrc rdst revw %1, %0 */
715 ID(revw); SR(rsrc); DR(rdst);
716
717/** 1111 1101 0110 0111 rsrc rdst revl %1, %0 */
718 ID(revl); SR(rsrc); DR(rdst);
719
720/*----------------------------------------------------------------------*/
721/* BRANCH */
722
723/** 0001 n dsp b%1.s %a0 */
724 ID(branch); Scc(n); DC(pc + dsp3map[dsp]);
725
726/** 0010 cond b%1.b %a0 */
727 ID(branch); Scc(cond); DC(pc + IMMex (1));
728
729/** 0011 101c b%1.w %a0 */
730 ID(branch); Scc(c); DC(pc + IMMex (2));
731
732
733/** 0000 1dsp bra.s %a0 */
f9c7014e 734 ID(branch); DC(pc + dsp3map[dsp]);
c7927a3c
NC		 735
736/** 0010 1110 bra.b %a0 */
f9c7014e 737 ID(branch); DC(pc + IMMex(1));
c7927a3c
NC		 738
739/** 0011 1000 bra.w %a0 */
f9c7014e 740 ID(branch); DC(pc + IMMex(2));
c7927a3c
NC		 741
742/** 0000 0100 bra.a %a0 */
f9c7014e 743 ID(branch); DC(pc + IMMex(3));
c7927a3c
NC		 744
745/** 0111 1111 0100 rsrc bra.l %0 */
f9c7014e 746 ID(branchrel); DR(rsrc);
c7927a3c
NC		 747
748
749/** 0111 1111 0000 rsrc jmp %0 */
f9c7014e 750 ID(branch); DR(rsrc);
c7927a3c
NC		 751
752/** 0111 1111 0001 rsrc jsr %0 */
753 ID(jsr); DR(rsrc);
754
755/** 0011 1001 bsr.w %a0 */
756 ID(jsr); DC(pc + IMMex(2));
757
758/** 0000 0101 bsr.a %a0 */
759 ID(jsr); DC(pc + IMMex(3));
760
761/** 0111 1111 0101 rsrc bsr.l %0 */
762 ID(jsrrel); DR(rsrc);
763
764/** 0000 0010 rts */
765 ID(rts);
766
767/*----------------------------------------------------------------------*/
768/* NOP */
769
770/** 0000 0011 nop */
771 ID(nop);
772
773/*----------------------------------------------------------------------*/
774/* STRING FUNCTIONS */
775
776/** 0111 1111 1000 0011 scmpu */
3cf79a01 777 ID(scmpu); F___ZC;
c7927a3c
NC		 778
779/** 0111 1111 1000 0111 smovu */
780 ID(smovu);
781
782/** 0111 1111 1000 1011 smovb */
783 ID(smovb);
784
785/** 0111 1111 1000 00sz suntil%s */
3cf79a01 786 ID(suntil); BWL(sz); F___ZC;
c7927a3c
NC		 787
788/** 0111 1111 1000 01sz swhile%s */
3cf79a01 789 ID(swhile); BWL(sz); F___ZC;
c7927a3c
NC		 790
791/** 0111 1111 1000 1111 smovf */
792 ID(smovf);
793
794/** 0111 1111 1000 10sz sstr%s */
795 ID(sstr); BWL(sz);
796
797/*----------------------------------------------------------------------*/
798/* RMPA */
799
800/** 0111 1111 1000 11sz rmpa%s */
3cf79a01 801 ID(rmpa); BWL(sz); F_OS__;
c7927a3c
NC		 802
803/*----------------------------------------------------------------------*/
804/* HI/LO stuff */
805
806/** 1111 1101 0000 0000 srca srcb mulhi %1, %2 */
3cf79a01 807 ID(mulhi); SR(srca); S2R(srcb); F_____;
c7927a3c
NC		 808
809/** 1111 1101 0000 0001 srca srcb mullo %1, %2 */
3cf79a01 810 ID(mullo); SR(srca); S2R(srcb); F_____;
c7927a3c
NC		 811
812/** 1111 1101 0000 0100 srca srcb machi %1, %2 */
3cf79a01 813 ID(machi); SR(srca); S2R(srcb); F_____;
c7927a3c
NC		 814
815/** 1111 1101 0000 0101 srca srcb maclo %1, %2 */
3cf79a01 816 ID(maclo); SR(srca); S2R(srcb); F_____;
c7927a3c
NC		 817
818/** 1111 1101 0001 0111 0000 rsrc mvtachi %1 */
3cf79a01 819 ID(mvtachi); SR(rsrc); F_____;
c7927a3c
NC		 820
821/** 1111 1101 0001 0111 0001 rsrc mvtaclo %1 */
3cf79a01 822 ID(mvtaclo); SR(rsrc); F_____;
c7927a3c
NC		 823
824/** 1111 1101 0001 1111 0000 rdst mvfachi %0 */
3cf79a01 825 ID(mvfachi); DR(rdst); F_____;
c7927a3c
NC		 826
827/** 1111 1101 0001 1111 0010 rdst mvfacmi %0 */
3cf79a01 828 ID(mvfacmi); DR(rdst); F_____;
c7927a3c
NC		 829
830/** 1111 1101 0001 1111 0001 rdst mvfaclo %0 */
3cf79a01 831 ID(mvfaclo); DR(rdst); F_____;
c7927a3c
NC		 832
833/** 1111 1101 0001 1000 000i 0000 racw #%1 */
3cf79a01 834 ID(racw); SC(i+1); F_____;
c7927a3c
NC		 835
836/*----------------------------------------------------------------------*/
837/* SAT */
838
839/** 0111 1110 0011 rdst sat %0 */
840 ID(sat); DR (rdst);
841
842/** 0111 1111 1001 0011 satr */
843 ID(satr);
844
845/*----------------------------------------------------------------------*/
846/* FLOAT */
847
848/** 1111 1101 0111 0010 0010 rdst fadd #%1, %0 */
3cf79a01 849 ID(fadd); DR(rdst); SC(IMM(0)); F__SZ_;
c7927a3c
NC		 850
851/** 1111 1100 1000 10sd rsrc rdst fadd %1%S1, %0 */
3cf79a01 852 ID(fadd); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 853
854/** 1111 1101 0111 0010 0001 rdst fcmp #%1, %0 */
3cf79a01 855 ID(fcmp); DR(rdst); SC(IMM(0)); F_OSZ_;
c7927a3c
NC		 856
857/** 1111 1100 1000 01sd rsrc rdst fcmp %1%S1, %0 */
3cf79a01 858 ID(fcmp); DR(rdst); SD(sd, rsrc, LSIZE); F_OSZ_;
c7927a3c
NC		 859
860/** 1111 1101 0111 0010 0000 rdst fsub #%1, %0 */
3cf79a01 861 ID(fsub); DR(rdst); SC(IMM(0)); F__SZ_;
c7927a3c
NC		 862
863/** 1111 1100 1000 00sd rsrc rdst fsub %1%S1, %0 */
3cf79a01 864 ID(fsub); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 865
866/** 1111 1100 1001 01sd rsrc rdst ftoi %1%S1, %0 */
3cf79a01 867 ID(ftoi); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 868
869/** 1111 1101 0111 0010 0011 rdst fmul #%1, %0 */
3cf79a01 870 ID(fmul); DR(rdst); SC(IMM(0)); F__SZ_;
c7927a3c
NC		 871
872/** 1111 1100 1000 11sd rsrc rdst fmul %1%S1, %0 */
3cf79a01 873 ID(fmul); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 874
875/** 1111 1101 0111 0010 0100 rdst fdiv #%1, %0 */
3cf79a01 876 ID(fdiv); DR(rdst); SC(IMM(0)); F__SZ_;
c7927a3c
NC		 877
878/** 1111 1100 1001 00sd rsrc rdst fdiv %1%S1, %0 */
3cf79a01 879 ID(fdiv); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 880
881/** 1111 1100 1001 10sd rsrc rdst round %1%S1, %0 */
3cf79a01 882 ID(round); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
c7927a3c
NC		 883
884/** 1111 1100 0100 01sd rsrc rdst itof %1%S1, %0 */
3cf79a01 885 ID(itof); DR (rdst); SP(sd, rsrc); F__SZ_;
c7927a3c
NC		 886
887/** 0000 0110 mx10 00sd 0001 0001 rsrc rdst itof %1%S1, %0 */
3cf79a01 888 ID(itof); DR (rdst); SPm(sd, rsrc, mx); F__SZ_;
c7927a3c
NC		 889
890/*----------------------------------------------------------------------*/
891/* BIT OPS */
892
893/** 1111 00sd rdst 0bit bset #%1, %0%S0 */
3cf79a01 894 ID(bset); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F_____;
c7927a3c
NC		 895
896/** 1111 1100 0110 00sd rdst rsrc bset %1, %0%S0 */
3cf79a01 897 ID(bset); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
c7927a3c
NC		 898
899/** 0111 100b ittt rdst bset #%1, %0 */
3cf79a01 900 ID(bset); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F_____;
c7927a3c
NC		 901
902
903/** 1111 00sd rdst 1bit bclr #%1, %0%S0 */
3cf79a01 904 ID(bclr); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F_____;
c7927a3c
NC		 905
906/** 1111 1100 0110 01sd rdst rsrc bclr %1, %0%S0 */
3cf79a01 907 ID(bclr); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
c7927a3c
NC		 908
909/** 0111 101b ittt rdst bclr #%1, %0 */
3cf79a01 910 ID(bclr); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F_____;
c7927a3c
NC		 911
912
913/** 1111 01sd rdst 0bit btst #%2, %1%S1 */
3cf79a01 914 ID(btst); BWL(BSIZE); S2C(bit); SD(sd, rdst, BSIZE); F___ZC;
c7927a3c
NC		 915
916/** 1111 1100 0110 10sd rdst rsrc btst %2, %1%S1 */
3cf79a01 917 ID(btst); BWL(BSIZE); S2R(rsrc); SD(sd, rdst, BSIZE); F___ZC;
c7927a3c
NC		 918
919/** 0111 110b ittt rdst btst #%2, %1 */
3cf79a01 920 ID(btst); BWL(LSIZE); S2C(b*16+ittt); SR(rdst); F___ZC;
c7927a3c
NC		 921
922
923/** 1111 1100 111bit sd rdst 1111 bnot #%1, %0%S0 */
924 ID(bnot); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE);
925
926/** 1111 1100 0110 11sd rdst rsrc bnot %1, %0%S0 */
927 ID(bnot); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE);
928
929/** 1111 1101 111bittt 1111 rdst bnot #%1, %0 */
930 ID(bnot); BWL(LSIZE); SC(bittt); DR(rdst);
931
932
933/** 1111 1100 111bit sd rdst cond bm%2 #%1, %0%S0 */
934 ID(bmcc); BWL(BSIZE); S2cc(cond); SC(bit); DD(sd, rdst, BSIZE);
935
936/** 1111 1101 111 bittt cond rdst bm%2 #%1, %0%S0 */
937 ID(bmcc); BWL(LSIZE); S2cc(cond); SC(bittt); DR(rdst);
938
939/*----------------------------------------------------------------------*/
940/* CONTROL REGISTERS */
941
942/** 0111 1111 1011 rdst clrpsw %0 */
943 ID(clrpsw); DF(rdst);
944
945/** 0111 1111 1010 rdst setpsw %0 */
946 ID(setpsw); DF(rdst);
947
0d734b5d
DD		 948/** 0111 0101 0111 0000 0000 immm mvtipl #%1 */
949 ID(mvtipl); SC(immm);
950
c7927a3c
NC		 951/** 0111 1110 111 crdst popc %0 */
952 ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(crdst + 16);
953
954/** 0111 1110 110 crsrc pushc %1 */
955 ID(mov); OP(0, RX_Operand_Predec, 0, 0); SR(crsrc + 16);
956
957/** 1111 1101 0111 im11 000crdst mvtc #%1, %0 */
958 ID(mov); SC(IMMex(im)); DR(crdst + 16);
959
960/** 1111 1101 0110 100c rsrc rdst mvtc %1, %0 */
961 ID(mov); SR(rsrc); DR(c*16+rdst + 16);
962
963/** 1111 1101 0110 101s rsrc rdst mvfc %1, %0 */
964 ID(mov); SR((s*16+rsrc) + 16); DR(rdst);
965
c7927a3c
NC		 966/*----------------------------------------------------------------------*/
967/* INTERRUPTS */
968
969/** 0111 1111 1001 0100 rtfi */
970 ID(rtfi);
971
972/** 0111 1111 1001 0101 rte */
973 ID(rte);
974
975/** 0000 0000 brk */
976 ID(brk);
977
978/** 0000 0001 dbt */
979 ID(dbt);
980
981/** 0111 0101 0110 0000 int #%1 */
982 ID(int); SC(IMM(1));
983
984/** 0111 1111 1001 0110 wait */
985 ID(wait);
986
987/*----------------------------------------------------------------------*/
988/* SCcnd */
989
990/** 1111 1100 1101 sz sd rdst cond sc%1%s %0 */
991 ID(sccnd); BWL(sz); DD (sd, rdst, sz); Scc(cond);
992
993/** */
994
995 return rx->n_bytes;
996}
Empty description
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