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1f29e30b | 1 | /* BFD back-end for MIPS Extended-Coff files. |
dfc1c006 | 2 | Copyright 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc. |
8fa0d3a0 | 3 | Original version by Per Bothner. |
f6409552 | 4 | Full support added by Ian Lance Taylor, [email protected]. |
1327fb29 | 5 | |
68b70212 | 6 | This file is part of BFD, the Binary File Descriptor library. |
23b0b558 | 7 | |
68b70212 | 8 | This program is free software; you can redistribute it and/or modify |
23b0b558 | 9 | it under the terms of the GNU General Public License as published by |
68b70212 JG |
10 | the Free Software Foundation; either version 2 of the License, or |
11 | (at your option) any later version. | |
23b0b558 | 12 | |
68b70212 | 13 | This program is distributed in the hope that it will be useful, |
23b0b558 JG |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
68b70212 JG |
19 | along with this program; if not, write to the Free Software |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
1327fb29 | 21 | |
23b0b558 | 22 | #include "bfd.h" |
dd4646ca | 23 | #include "sysdep.h" |
4991ebb9 | 24 | #include "bfdlink.h" |
1327fb29 | 25 | #include "libbfd.h" |
dae31cf5 ILT |
26 | #include "coff/internal.h" |
27 | #include "coff/sym.h" | |
28 | #include "coff/symconst.h" | |
29 | #include "coff/ecoff.h" | |
30 | #include "coff/mips.h" | |
31 | #include "libcoff.h" | |
32 | #include "libecoff.h" | |
33 | \f | |
34 | /* Prototypes for static functions. */ | |
c3fe0c41 | 35 | |
dae31cf5 | 36 | static boolean mips_ecoff_bad_format_hook PARAMS ((bfd *abfd, PTR filehdr)); |
dae31cf5 ILT |
37 | static void mips_ecoff_swap_reloc_in PARAMS ((bfd *, PTR, |
38 | struct internal_reloc *)); | |
39 | static void mips_ecoff_swap_reloc_out PARAMS ((bfd *, | |
40 | const struct internal_reloc *, | |
41 | PTR)); | |
5fa2aaa2 ILT |
42 | static void mips_adjust_reloc_in PARAMS ((bfd *, |
43 | const struct internal_reloc *, | |
44 | arelent *)); | |
45 | static void mips_adjust_reloc_out PARAMS ((bfd *, const arelent *, | |
46 | struct internal_reloc *)); | |
23f44e6f ILT |
47 | static bfd_reloc_status_type mips_generic_reloc PARAMS ((bfd *abfd, |
48 | arelent *reloc, | |
49 | asymbol *symbol, | |
50 | PTR data, | |
51 | asection *section, | |
4991ebb9 ILT |
52 | bfd *output_bfd, |
53 | char **error)); | |
23f44e6f ILT |
54 | static bfd_reloc_status_type mips_refhi_reloc PARAMS ((bfd *abfd, |
55 | arelent *reloc, | |
56 | asymbol *symbol, | |
57 | PTR data, | |
58 | asection *section, | |
4991ebb9 ILT |
59 | bfd *output_bfd, |
60 | char **error)); | |
23f44e6f ILT |
61 | static bfd_reloc_status_type mips_reflo_reloc PARAMS ((bfd *abfd, |
62 | arelent *reloc, | |
63 | asymbol *symbol, | |
64 | PTR data, | |
65 | asection *section, | |
4991ebb9 ILT |
66 | bfd *output_bfd, |
67 | char **error)); | |
23f44e6f ILT |
68 | static bfd_reloc_status_type mips_gprel_reloc PARAMS ((bfd *abfd, |
69 | arelent *reloc, | |
70 | asymbol *symbol, | |
71 | PTR data, | |
72 | asection *section, | |
4991ebb9 ILT |
73 | bfd *output_bfd, |
74 | char **error)); | |
4f996613 ILT |
75 | static bfd_reloc_status_type mips_relhi_reloc PARAMS ((bfd *abfd, |
76 | arelent *reloc, | |
77 | asymbol *symbol, | |
78 | PTR data, | |
79 | asection *section, | |
80 | bfd *output_bfd, | |
81 | char **error)); | |
82 | static bfd_reloc_status_type mips_rello_reloc PARAMS ((bfd *abfd, | |
83 | arelent *reloc, | |
84 | asymbol *symbol, | |
85 | PTR data, | |
86 | asection *section, | |
87 | bfd *output_bfd, | |
88 | char **error)); | |
dabf906e ILT |
89 | static bfd_reloc_status_type mips_switch_reloc PARAMS ((bfd *abfd, |
90 | arelent *reloc, | |
91 | asymbol *symbol, | |
92 | PTR data, | |
93 | asection *section, | |
94 | bfd *output_bfd, | |
95 | char **error)); | |
4f996613 ILT |
96 | static void mips_relocate_hi PARAMS ((struct internal_reloc *refhi, |
97 | struct internal_reloc *reflo, | |
98 | bfd *input_bfd, | |
99 | asection *input_section, | |
100 | bfd_byte *contents, | |
101 | size_t adjust, | |
102 | bfd_vma relocation, | |
103 | boolean pcrel)); | |
4991ebb9 ILT |
104 | static boolean mips_relocate_section PARAMS ((bfd *, struct bfd_link_info *, |
105 | bfd *, asection *, | |
106 | bfd_byte *, PTR)); | |
a3a33af3 ILT |
107 | static boolean mips_relax_section PARAMS ((bfd *, asection *, |
108 | struct bfd_link_info *, | |
109 | boolean *)); | |
110 | static boolean mips_relax_pcrel16 PARAMS ((struct bfd_link_info *, bfd *, | |
111 | asection *, | |
112 | struct ecoff_link_hash_entry *, | |
113 | bfd_byte *, bfd_vma)); | |
dae31cf5 | 114 | \f |
dae31cf5 ILT |
115 | /* ECOFF has COFF sections, but the debugging information is stored in |
116 | a completely different format. ECOFF targets use some of the | |
117 | swapping routines from coffswap.h, and some of the generic COFF | |
118 | routines in coffgen.c, but, unlike the real COFF targets, do not | |
119 | use coffcode.h itself. | |
8fa0d3a0 | 120 | |
dae31cf5 | 121 | Get the generic COFF swapping routines, except for the reloc, |
23f44e6f | 122 | symbol, and lineno ones. Give them ECOFF names. */ |
dae31cf5 ILT |
123 | #define MIPSECOFF |
124 | #define NO_COFF_RELOCS | |
125 | #define NO_COFF_SYMBOLS | |
126 | #define NO_COFF_LINENOS | |
127 | #define coff_swap_filehdr_in mips_ecoff_swap_filehdr_in | |
128 | #define coff_swap_filehdr_out mips_ecoff_swap_filehdr_out | |
129 | #define coff_swap_aouthdr_in mips_ecoff_swap_aouthdr_in | |
130 | #define coff_swap_aouthdr_out mips_ecoff_swap_aouthdr_out | |
131 | #define coff_swap_scnhdr_in mips_ecoff_swap_scnhdr_in | |
132 | #define coff_swap_scnhdr_out mips_ecoff_swap_scnhdr_out | |
133 | #include "coffswap.h" | |
8fa0d3a0 | 134 | |
dae31cf5 ILT |
135 | /* Get the ECOFF swapping routines. */ |
136 | #define ECOFF_32 | |
137 | #include "ecoffswap.h" | |
138 | \f | |
23f44e6f | 139 | /* How to process the various relocs types. */ |
dae31cf5 | 140 | |
23f44e6f | 141 | static reloc_howto_type mips_howto_table[] = |
dae31cf5 | 142 | { |
23f44e6f ILT |
143 | /* Reloc type 0 is ignored. The reloc reading code ensures that |
144 | this is a reference to the .abs section, which will cause | |
145 | bfd_perform_relocation to do nothing. */ | |
146 | HOWTO (MIPS_R_IGNORE, /* type */ | |
147 | 0, /* rightshift */ | |
148 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
149 | 8, /* bitsize */ | |
150 | false, /* pc_relative */ | |
151 | 0, /* bitpos */ | |
152 | complain_overflow_dont, /* complain_on_overflow */ | |
153 | 0, /* special_function */ | |
154 | "IGNORE", /* name */ | |
155 | false, /* partial_inplace */ | |
156 | 0, /* src_mask */ | |
157 | 0, /* dst_mask */ | |
158 | false), /* pcrel_offset */ | |
159 | ||
160 | /* A 16 bit reference to a symbol, normally from a data section. */ | |
161 | HOWTO (MIPS_R_REFHALF, /* type */ | |
162 | 0, /* rightshift */ | |
163 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
164 | 16, /* bitsize */ | |
165 | false, /* pc_relative */ | |
166 | 0, /* bitpos */ | |
167 | complain_overflow_bitfield, /* complain_on_overflow */ | |
168 | mips_generic_reloc, /* special_function */ | |
169 | "REFHALF", /* name */ | |
170 | true, /* partial_inplace */ | |
171 | 0xffff, /* src_mask */ | |
172 | 0xffff, /* dst_mask */ | |
173 | false), /* pcrel_offset */ | |
174 | ||
175 | /* A 32 bit reference to a symbol, normally from a data section. */ | |
176 | HOWTO (MIPS_R_REFWORD, /* type */ | |
177 | 0, /* rightshift */ | |
178 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
179 | 32, /* bitsize */ | |
180 | false, /* pc_relative */ | |
181 | 0, /* bitpos */ | |
182 | complain_overflow_bitfield, /* complain_on_overflow */ | |
183 | mips_generic_reloc, /* special_function */ | |
184 | "REFWORD", /* name */ | |
185 | true, /* partial_inplace */ | |
186 | 0xffffffff, /* src_mask */ | |
187 | 0xffffffff, /* dst_mask */ | |
188 | false), /* pcrel_offset */ | |
189 | ||
190 | /* A 26 bit absolute jump address. */ | |
191 | HOWTO (MIPS_R_JMPADDR, /* type */ | |
192 | 2, /* rightshift */ | |
193 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
194 | 26, /* bitsize */ | |
195 | false, /* pc_relative */ | |
196 | 0, /* bitpos */ | |
5fa2aaa2 ILT |
197 | complain_overflow_dont, /* complain_on_overflow */ |
198 | /* This needs complex overflow | |
199 | detection, because the upper four | |
200 | bits must match the PC. */ | |
23f44e6f ILT |
201 | mips_generic_reloc, /* special_function */ |
202 | "JMPADDR", /* name */ | |
203 | true, /* partial_inplace */ | |
204 | 0x3ffffff, /* src_mask */ | |
205 | 0x3ffffff, /* dst_mask */ | |
206 | false), /* pcrel_offset */ | |
207 | ||
208 | /* The high 16 bits of a symbol value. Handled by the function | |
209 | mips_refhi_reloc. */ | |
210 | HOWTO (MIPS_R_REFHI, /* type */ | |
211 | 16, /* rightshift */ | |
212 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
213 | 16, /* bitsize */ | |
214 | false, /* pc_relative */ | |
215 | 0, /* bitpos */ | |
216 | complain_overflow_bitfield, /* complain_on_overflow */ | |
217 | mips_refhi_reloc, /* special_function */ | |
218 | "REFHI", /* name */ | |
219 | true, /* partial_inplace */ | |
220 | 0xffff, /* src_mask */ | |
221 | 0xffff, /* dst_mask */ | |
222 | false), /* pcrel_offset */ | |
223 | ||
224 | /* The low 16 bits of a symbol value. */ | |
225 | HOWTO (MIPS_R_REFLO, /* type */ | |
226 | 0, /* rightshift */ | |
227 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
228 | 16, /* bitsize */ | |
229 | false, /* pc_relative */ | |
230 | 0, /* bitpos */ | |
231 | complain_overflow_dont, /* complain_on_overflow */ | |
232 | mips_reflo_reloc, /* special_function */ | |
233 | "REFLO", /* name */ | |
234 | true, /* partial_inplace */ | |
235 | 0xffff, /* src_mask */ | |
236 | 0xffff, /* dst_mask */ | |
237 | false), /* pcrel_offset */ | |
238 | ||
239 | /* A reference to an offset from the gp register. Handled by the | |
240 | function mips_gprel_reloc. */ | |
241 | HOWTO (MIPS_R_GPREL, /* type */ | |
242 | 0, /* rightshift */ | |
243 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
244 | 16, /* bitsize */ | |
245 | false, /* pc_relative */ | |
246 | 0, /* bitpos */ | |
247 | complain_overflow_signed, /* complain_on_overflow */ | |
248 | mips_gprel_reloc, /* special_function */ | |
249 | "GPREL", /* name */ | |
250 | true, /* partial_inplace */ | |
251 | 0xffff, /* src_mask */ | |
252 | 0xffff, /* dst_mask */ | |
253 | false), /* pcrel_offset */ | |
254 | ||
255 | /* A reference to a literal using an offset from the gp register. | |
256 | Handled by the function mips_gprel_reloc. */ | |
257 | HOWTO (MIPS_R_LITERAL, /* type */ | |
258 | 0, /* rightshift */ | |
259 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
260 | 16, /* bitsize */ | |
261 | false, /* pc_relative */ | |
262 | 0, /* bitpos */ | |
263 | complain_overflow_signed, /* complain_on_overflow */ | |
264 | mips_gprel_reloc, /* special_function */ | |
265 | "LITERAL", /* name */ | |
266 | true, /* partial_inplace */ | |
267 | 0xffff, /* src_mask */ | |
268 | 0xffff, /* dst_mask */ | |
a3a33af3 ILT |
269 | false), /* pcrel_offset */ |
270 | ||
4f996613 ILT |
271 | { 8 }, |
272 | { 9 }, | |
273 | { 10 }, | |
274 | { 11 }, | |
275 | ||
a3a33af3 ILT |
276 | /* This reloc is a Cygnus extension used when generating position |
277 | independent code for embedded systems. It represents a 16 bit PC | |
278 | relative reloc rightshifted twice as used in the MIPS branch | |
279 | instructions. */ | |
280 | HOWTO (MIPS_R_PCREL16, /* type */ | |
281 | 2, /* rightshift */ | |
282 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
283 | 16, /* bitsize */ | |
284 | true, /* pc_relative */ | |
285 | 0, /* bitpos */ | |
286 | complain_overflow_signed, /* complain_on_overflow */ | |
287 | mips_generic_reloc, /* special_function */ | |
288 | "PCREL16", /* name */ | |
289 | true, /* partial_inplace */ | |
290 | 0xffff, /* src_mask */ | |
291 | 0xffff, /* dst_mask */ | |
dabf906e ILT |
292 | true), /* pcrel_offset */ |
293 | ||
4f996613 ILT |
294 | /* This reloc is a Cygnus extension used when generating position |
295 | independent code for embedded systems. It represents the high 16 | |
296 | bits of a PC relative reloc. The next reloc must be | |
297 | MIPS_R_RELLO, and the addend is formed from the addends of the | |
298 | two instructions, just as in MIPS_R_REFHI and MIPS_R_REFLO. The | |
299 | final value is actually PC relative to the location of the | |
300 | MIPS_R_RELLO reloc, not the MIPS_R_RELHI reloc. */ | |
301 | HOWTO (MIPS_R_RELHI, /* type */ | |
302 | 16, /* rightshift */ | |
303 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
304 | 16, /* bitsize */ | |
305 | true, /* pc_relative */ | |
306 | 0, /* bitpos */ | |
307 | complain_overflow_bitfield, /* complain_on_overflow */ | |
308 | mips_relhi_reloc, /* special_function */ | |
309 | "RELHI", /* name */ | |
310 | true, /* partial_inplace */ | |
311 | 0xffff, /* src_mask */ | |
312 | 0xffff, /* dst_mask */ | |
313 | true), /* pcrel_offset */ | |
314 | ||
315 | /* This reloc is a Cygnus extension used when generating position | |
316 | independent code for embedded systems. It represents the low 16 | |
317 | bits of a PC relative reloc. */ | |
318 | HOWTO (MIPS_R_RELLO, /* type */ | |
319 | 0, /* rightshift */ | |
320 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
321 | 16, /* bitsize */ | |
322 | true, /* pc_relative */ | |
323 | 0, /* bitpos */ | |
324 | complain_overflow_dont, /* complain_on_overflow */ | |
325 | mips_rello_reloc, /* special_function */ | |
326 | "RELLO", /* name */ | |
327 | true, /* partial_inplace */ | |
328 | 0xffff, /* src_mask */ | |
329 | 0xffff, /* dst_mask */ | |
330 | true), /* pcrel_offset */ | |
331 | ||
332 | { 15 }, | |
333 | { 16 }, | |
334 | { 17 }, | |
335 | { 18 }, | |
336 | { 19 }, | |
337 | { 20 }, | |
338 | { 21 }, | |
339 | ||
dabf906e ILT |
340 | /* This reloc is a Cygnus extension used when generating position |
341 | independent code for embedded systems. It represents an entry in | |
342 | a switch table, which is the difference between two symbols in | |
343 | the .text section. The symndx is actually the offset from the | |
344 | reloc address to the subtrahend. See include/coff/mips.h for | |
345 | more details. */ | |
346 | HOWTO (MIPS_R_SWITCH, /* type */ | |
347 | 0, /* rightshift */ | |
348 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
349 | 32, /* bitsize */ | |
350 | true, /* pc_relative */ | |
351 | 0, /* bitpos */ | |
352 | complain_overflow_dont, /* complain_on_overflow */ | |
353 | mips_switch_reloc, /* special_function */ | |
354 | "SWITCH", /* name */ | |
355 | true, /* partial_inplace */ | |
356 | 0xffffffff, /* src_mask */ | |
357 | 0xffffffff, /* dst_mask */ | |
a3a33af3 | 358 | true) /* pcrel_offset */ |
dae31cf5 | 359 | }; |
23f44e6f ILT |
360 | |
361 | #define MIPS_HOWTO_COUNT \ | |
362 | (sizeof mips_howto_table / sizeof mips_howto_table[0]) | |
a3a33af3 ILT |
363 | |
364 | /* When the linker is doing relaxing, it may change a external PCREL16 | |
365 | reloc. This typically represents an instruction like | |
366 | bal foo | |
367 | We change it to | |
368 | .set noreorder | |
369 | bal $L1 | |
370 | lui $at,%hi(foo - $L1) | |
371 | $L1: | |
372 | addiu $at,%lo(foo - $L1) | |
373 | addu $at,$at,$31 | |
374 | jalr $at | |
375 | PCREL16_EXPANSION_ADJUSTMENT is the number of bytes this changes the | |
376 | instruction by. */ | |
377 | ||
378 | #define PCREL16_EXPANSION_ADJUSTMENT (4 * 4) | |
dae31cf5 ILT |
379 | \f |
380 | /* See whether the magic number matches. */ | |
8fa0d3a0 | 381 | |
dae31cf5 ILT |
382 | static boolean |
383 | mips_ecoff_bad_format_hook (abfd, filehdr) | |
384 | bfd *abfd; | |
385 | PTR filehdr; | |
386 | { | |
387 | struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr; | |
8fa0d3a0 | 388 | |
5fa2aaa2 ILT |
389 | switch (internal_f->f_magic) |
390 | { | |
391 | case MIPS_MAGIC_1: | |
392 | /* I don't know what endianness this implies. */ | |
393 | return true; | |
c3fe0c41 | 394 | |
5fa2aaa2 ILT |
395 | case MIPS_MAGIC_BIG: |
396 | case MIPS_MAGIC_BIG2: | |
397 | case MIPS_MAGIC_BIG3: | |
398 | return abfd->xvec->byteorder_big_p; | |
c3fe0c41 | 399 | |
5fa2aaa2 ILT |
400 | case MIPS_MAGIC_LITTLE: |
401 | case MIPS_MAGIC_LITTLE2: | |
402 | case MIPS_MAGIC_LITTLE3: | |
403 | return abfd->xvec->byteorder_big_p == false; | |
23ba15b7 | 404 | |
5fa2aaa2 ILT |
405 | default: |
406 | return false; | |
c3fe0c41 | 407 | } |
dae31cf5 ILT |
408 | } |
409 | \f | |
410 | /* Reloc handling. MIPS ECOFF relocs are packed into 8 bytes in | |
411 | external form. They use a bit which indicates whether the symbol | |
412 | is external. */ | |
23ba15b7 | 413 | |
dae31cf5 | 414 | /* Swap a reloc in. */ |
23ba15b7 | 415 | |
dae31cf5 ILT |
416 | static void |
417 | mips_ecoff_swap_reloc_in (abfd, ext_ptr, intern) | |
418 | bfd *abfd; | |
419 | PTR ext_ptr; | |
420 | struct internal_reloc *intern; | |
421 | { | |
422 | const RELOC *ext = (RELOC *) ext_ptr; | |
23ba15b7 | 423 | |
dae31cf5 ILT |
424 | intern->r_vaddr = bfd_h_get_32 (abfd, (bfd_byte *) ext->r_vaddr); |
425 | if (abfd->xvec->header_byteorder_big_p != false) | |
426 | { | |
427 | intern->r_symndx = (((int) ext->r_bits[0] | |
428 | << RELOC_BITS0_SYMNDX_SH_LEFT_BIG) | |
429 | | ((int) ext->r_bits[1] | |
430 | << RELOC_BITS1_SYMNDX_SH_LEFT_BIG) | |
431 | | ((int) ext->r_bits[2] | |
432 | << RELOC_BITS2_SYMNDX_SH_LEFT_BIG)); | |
433 | intern->r_type = ((ext->r_bits[3] & RELOC_BITS3_TYPE_BIG) | |
434 | >> RELOC_BITS3_TYPE_SH_BIG); | |
435 | intern->r_extern = (ext->r_bits[3] & RELOC_BITS3_EXTERN_BIG) != 0; | |
23ba15b7 | 436 | } |
dae31cf5 | 437 | else |
23ba15b7 | 438 | { |
dae31cf5 ILT |
439 | intern->r_symndx = (((int) ext->r_bits[0] |
440 | << RELOC_BITS0_SYMNDX_SH_LEFT_LITTLE) | |
441 | | ((int) ext->r_bits[1] | |
442 | << RELOC_BITS1_SYMNDX_SH_LEFT_LITTLE) | |
443 | | ((int) ext->r_bits[2] | |
444 | << RELOC_BITS2_SYMNDX_SH_LEFT_LITTLE)); | |
4f996613 ILT |
445 | intern->r_type = (((ext->r_bits[3] & RELOC_BITS3_TYPE_LITTLE) |
446 | >> RELOC_BITS3_TYPE_SH_LITTLE) | |
447 | | ((ext->r_bits[3] & RELOC_BITS3_TYPEHI_LITTLE) | |
448 | << RELOC_BITS3_TYPEHI_SH_LITTLE)); | |
dae31cf5 | 449 | intern->r_extern = (ext->r_bits[3] & RELOC_BITS3_EXTERN_LITTLE) != 0; |
23ba15b7 | 450 | } |
dabf906e | 451 | |
4f996613 ILT |
452 | /* If this is a MIPS_R_SWITCH reloc, or an internal MIPS_R_RELHI or |
453 | MIPS_R_RELLO reloc, r_symndx is actually the offset from the | |
454 | reloc address to the base of the difference (see | |
dabf906e ILT |
455 | include/coff/mips.h for more details). We copy symndx into the |
456 | r_offset field so as not to confuse ecoff_slurp_reloc_table in | |
457 | ecoff.c. In adjust_reloc_in we then copy r_offset into the reloc | |
458 | addend. */ | |
4f996613 ILT |
459 | if (intern->r_type == MIPS_R_SWITCH |
460 | || (! intern->r_extern | |
461 | && (intern->r_type == MIPS_R_RELLO | |
462 | || intern->r_type == MIPS_R_RELHI))) | |
dabf906e ILT |
463 | { |
464 | BFD_ASSERT (! intern->r_extern); | |
465 | intern->r_offset = intern->r_symndx; | |
4f996613 ILT |
466 | if (intern->r_offset & 0x800000) |
467 | intern->r_offset -= 0x1000000; | |
dabf906e ILT |
468 | intern->r_symndx = RELOC_SECTION_TEXT; |
469 | } | |
c3fe0c41 ILT |
470 | } |
471 | ||
dae31cf5 | 472 | /* Swap a reloc out. */ |
c3fe0c41 | 473 | |
dae31cf5 ILT |
474 | static void |
475 | mips_ecoff_swap_reloc_out (abfd, intern, dst) | |
f6409552 | 476 | bfd *abfd; |
dae31cf5 ILT |
477 | const struct internal_reloc *intern; |
478 | PTR dst; | |
c3fe0c41 | 479 | { |
dae31cf5 | 480 | RELOC *ext = (RELOC *) dst; |
dabf906e | 481 | long r_symndx; |
c3fe0c41 | 482 | |
5fa2aaa2 ILT |
483 | BFD_ASSERT (intern->r_extern |
484 | || (intern->r_symndx >= 0 && intern->r_symndx <= 12)); | |
485 | ||
4f996613 ILT |
486 | /* If this is a MIPS_R_SWITCH reloc, or an internal MIPS_R_RELLO or |
487 | MIPS_R_RELHI reloc, we actually want to write the contents of | |
488 | r_offset out as the symbol index. This undoes the change made by | |
489 | mips_ecoff_swap_reloc_in. */ | |
490 | if (intern->r_type != MIPS_R_SWITCH | |
491 | && (intern->r_extern | |
492 | || (intern->r_type != MIPS_R_RELHI | |
493 | && intern->r_type != MIPS_R_RELLO))) | |
dabf906e ILT |
494 | r_symndx = intern->r_symndx; |
495 | else | |
496 | { | |
497 | BFD_ASSERT (intern->r_symndx == RELOC_SECTION_TEXT); | |
4f996613 | 498 | r_symndx = intern->r_offset & 0xffffff; |
dabf906e ILT |
499 | } |
500 | ||
dae31cf5 ILT |
501 | bfd_h_put_32 (abfd, intern->r_vaddr, (bfd_byte *) ext->r_vaddr); |
502 | if (abfd->xvec->header_byteorder_big_p != false) | |
c3fe0c41 | 503 | { |
dabf906e ILT |
504 | ext->r_bits[0] = r_symndx >> RELOC_BITS0_SYMNDX_SH_LEFT_BIG; |
505 | ext->r_bits[1] = r_symndx >> RELOC_BITS1_SYMNDX_SH_LEFT_BIG; | |
506 | ext->r_bits[2] = r_symndx >> RELOC_BITS2_SYMNDX_SH_LEFT_BIG; | |
dae31cf5 ILT |
507 | ext->r_bits[3] = (((intern->r_type << RELOC_BITS3_TYPE_SH_BIG) |
508 | & RELOC_BITS3_TYPE_BIG) | |
509 | | (intern->r_extern ? RELOC_BITS3_EXTERN_BIG : 0)); | |
c3fe0c41 | 510 | } |
dae31cf5 | 511 | else |
c3fe0c41 | 512 | { |
dabf906e ILT |
513 | ext->r_bits[0] = r_symndx >> RELOC_BITS0_SYMNDX_SH_LEFT_LITTLE; |
514 | ext->r_bits[1] = r_symndx >> RELOC_BITS1_SYMNDX_SH_LEFT_LITTLE; | |
515 | ext->r_bits[2] = r_symndx >> RELOC_BITS2_SYMNDX_SH_LEFT_LITTLE; | |
dae31cf5 ILT |
516 | ext->r_bits[3] = (((intern->r_type << RELOC_BITS3_TYPE_SH_LITTLE) |
517 | & RELOC_BITS3_TYPE_LITTLE) | |
4f996613 ILT |
518 | | ((intern->r_type >> RELOC_BITS3_TYPEHI_SH_LITTLE |
519 | & RELOC_BITS3_TYPEHI_LITTLE)) | |
dae31cf5 | 520 | | (intern->r_extern ? RELOC_BITS3_EXTERN_LITTLE : 0)); |
c3fe0c41 | 521 | } |
c3fe0c41 | 522 | } |
23f44e6f ILT |
523 | |
524 | /* Finish canonicalizing a reloc. Part of this is generic to all | |
525 | ECOFF targets, and that part is in ecoff.c. The rest is done in | |
526 | this backend routine. It must fill in the howto field. */ | |
527 | ||
528 | static void | |
5fa2aaa2 | 529 | mips_adjust_reloc_in (abfd, intern, rptr) |
23f44e6f | 530 | bfd *abfd; |
5fa2aaa2 | 531 | const struct internal_reloc *intern; |
23f44e6f ILT |
532 | arelent *rptr; |
533 | { | |
dabf906e | 534 | if (intern->r_type > MIPS_R_SWITCH) |
23f44e6f ILT |
535 | abort (); |
536 | ||
537 | if (! intern->r_extern | |
538 | && (intern->r_type == MIPS_R_GPREL | |
539 | || intern->r_type == MIPS_R_LITERAL)) | |
540 | rptr->addend += ecoff_data (abfd)->gp; | |
541 | ||
542 | /* If the type is MIPS_R_IGNORE, make sure this is a reference to | |
543 | the absolute section so that the reloc is ignored. */ | |
544 | if (intern->r_type == MIPS_R_IGNORE) | |
545 | rptr->sym_ptr_ptr = bfd_abs_section.symbol_ptr_ptr; | |
546 | ||
4f996613 ILT |
547 | /* If this is a MIPS_R_SWITCH reloc, or an internal MIPS_R_RELHI or |
548 | MIPS_R_RELLO reloc, we want the addend field of the BFD relocto | |
549 | hold the value which was originally in the symndx field of the | |
550 | internal MIPS ECOFF reloc. This value was copied into | |
551 | intern->r_offset by mips_swap_reloc_in, and here we copy it into | |
552 | the addend field. */ | |
553 | if (intern->r_type == MIPS_R_SWITCH | |
554 | || (! intern->r_extern | |
555 | && (intern->r_type == MIPS_R_RELHI | |
556 | || intern->r_type == MIPS_R_RELLO))) | |
dabf906e ILT |
557 | rptr->addend = intern->r_offset; |
558 | ||
23f44e6f ILT |
559 | rptr->howto = &mips_howto_table[intern->r_type]; |
560 | } | |
561 | ||
5fa2aaa2 ILT |
562 | /* Make any adjustments needed to a reloc before writing it out. None |
563 | are needed for MIPS. */ | |
564 | ||
565 | static void | |
4991ebb9 | 566 | mips_adjust_reloc_out (abfd, rel, intern) |
5fa2aaa2 ILT |
567 | bfd *abfd; |
568 | const arelent *rel; | |
569 | struct internal_reloc *intern; | |
570 | { | |
4f996613 ILT |
571 | /* For a MIPS_R_SWITCH reloc, or an internal MIPS_R_RELHI or |
572 | MIPS_R_RELLO reloc, we must copy rel->addend into | |
dabf906e ILT |
573 | intern->r_offset. This will then be written out as the symbol |
574 | index by mips_ecoff_swap_reloc_out. This operation parallels the | |
575 | action of mips_adjust_reloc_in. */ | |
4f996613 ILT |
576 | if (intern->r_type == MIPS_R_SWITCH |
577 | || (! intern->r_extern | |
578 | && (intern->r_type == MIPS_R_RELHI | |
579 | || intern->r_type == MIPS_R_RELLO))) | |
dabf906e | 580 | intern->r_offset = rel->addend; |
5fa2aaa2 ILT |
581 | } |
582 | ||
23f44e6f ILT |
583 | /* ECOFF relocs are either against external symbols, or against |
584 | sections. If we are producing relocateable output, and the reloc | |
585 | is against an external symbol, and nothing has given us any | |
586 | additional addend, the resulting reloc will also be against the | |
587 | same symbol. In such a case, we don't want to change anything | |
588 | about the way the reloc is handled, since it will all be done at | |
589 | final link time. Rather than put special case code into | |
590 | bfd_perform_relocation, all the reloc types use this howto | |
591 | function. It just short circuits the reloc if producing | |
592 | relocateable output against an external symbol. */ | |
593 | ||
594 | static bfd_reloc_status_type | |
595 | mips_generic_reloc (abfd, | |
596 | reloc_entry, | |
597 | symbol, | |
598 | data, | |
599 | input_section, | |
4991ebb9 ILT |
600 | output_bfd, |
601 | error_message) | |
23f44e6f ILT |
602 | bfd *abfd; |
603 | arelent *reloc_entry; | |
604 | asymbol *symbol; | |
605 | PTR data; | |
606 | asection *input_section; | |
607 | bfd *output_bfd; | |
4991ebb9 | 608 | char **error_message; |
23f44e6f ILT |
609 | { |
610 | if (output_bfd != (bfd *) NULL | |
611 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
612 | && reloc_entry->addend == 0) | |
613 | { | |
614 | reloc_entry->address += input_section->output_offset; | |
615 | return bfd_reloc_ok; | |
616 | } | |
617 | ||
618 | return bfd_reloc_continue; | |
619 | } | |
620 | ||
621 | /* Do a REFHI relocation. This has to be done in combination with a | |
622 | REFLO reloc, because there is a carry from the REFLO to the REFHI. | |
623 | Here we just save the information we need; we do the actual | |
624 | relocation when we see the REFLO. MIPS ECOFF requires that the | |
625 | REFLO immediately follow the REFHI, so this ought to work. */ | |
626 | ||
627 | static bfd_byte *mips_refhi_addr; | |
628 | static bfd_vma mips_refhi_addend; | |
629 | ||
630 | static bfd_reloc_status_type | |
631 | mips_refhi_reloc (abfd, | |
632 | reloc_entry, | |
633 | symbol, | |
634 | data, | |
635 | input_section, | |
4991ebb9 ILT |
636 | output_bfd, |
637 | error_message) | |
23f44e6f ILT |
638 | bfd *abfd; |
639 | arelent *reloc_entry; | |
640 | asymbol *symbol; | |
641 | PTR data; | |
642 | asection *input_section; | |
643 | bfd *output_bfd; | |
4991ebb9 | 644 | char **error_message; |
23f44e6f ILT |
645 | { |
646 | bfd_reloc_status_type ret; | |
647 | bfd_vma relocation; | |
648 | ||
649 | /* If we're relocating, and this an external symbol, we don't want | |
650 | to change anything. */ | |
651 | if (output_bfd != (bfd *) NULL | |
652 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
653 | && reloc_entry->addend == 0) | |
654 | { | |
655 | reloc_entry->address += input_section->output_offset; | |
656 | return bfd_reloc_ok; | |
657 | } | |
658 | ||
659 | ret = bfd_reloc_ok; | |
660 | if (symbol->section == &bfd_und_section | |
661 | && output_bfd == (bfd *) NULL) | |
662 | ret = bfd_reloc_undefined; | |
663 | ||
664 | if (bfd_is_com_section (symbol->section)) | |
665 | relocation = 0; | |
666 | else | |
667 | relocation = symbol->value; | |
668 | ||
669 | relocation += symbol->section->output_section->vma; | |
670 | relocation += symbol->section->output_offset; | |
671 | relocation += reloc_entry->addend; | |
672 | ||
673 | if (reloc_entry->address > input_section->_cooked_size) | |
674 | return bfd_reloc_outofrange; | |
675 | ||
676 | /* Save the information, and let REFLO do the actual relocation. */ | |
677 | mips_refhi_addr = (bfd_byte *) data + reloc_entry->address; | |
678 | mips_refhi_addend = relocation; | |
679 | ||
680 | if (output_bfd != (bfd *) NULL) | |
681 | reloc_entry->address += input_section->output_offset; | |
682 | ||
683 | return ret; | |
684 | } | |
685 | ||
686 | /* Do a REFLO relocation. This is a straightforward 16 bit inplace | |
687 | relocation; this function exists in order to do the REFHI | |
688 | relocation described above. */ | |
689 | ||
690 | static bfd_reloc_status_type | |
691 | mips_reflo_reloc (abfd, | |
692 | reloc_entry, | |
693 | symbol, | |
694 | data, | |
695 | input_section, | |
4991ebb9 ILT |
696 | output_bfd, |
697 | error_message) | |
23f44e6f ILT |
698 | bfd *abfd; |
699 | arelent *reloc_entry; | |
700 | asymbol *symbol; | |
701 | PTR data; | |
702 | asection *input_section; | |
703 | bfd *output_bfd; | |
4991ebb9 | 704 | char **error_message; |
23f44e6f ILT |
705 | { |
706 | if (mips_refhi_addr != (bfd_byte *) NULL) | |
707 | { | |
708 | unsigned long insn; | |
709 | unsigned long val; | |
710 | unsigned long vallo; | |
711 | ||
712 | /* Do the REFHI relocation. Note that we actually don't need to | |
713 | know anything about the REFLO itself, except where to find | |
714 | the low 16 bits of the addend needed by the REFHI. */ | |
715 | insn = bfd_get_32 (abfd, mips_refhi_addr); | |
716 | vallo = (bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address) | |
717 | & 0xffff); | |
718 | val = ((insn & 0xffff) << 16) + vallo; | |
719 | val += mips_refhi_addend; | |
720 | ||
721 | /* The low order 16 bits are always treated as a signed value. | |
722 | Therefore, a negative value in the low order bits requires an | |
723 | adjustment in the high order bits. We need to make this | |
724 | adjustment in two ways: once for the bits we took from the | |
725 | data, and once for the bits we are putting back in to the | |
726 | data. */ | |
727 | if ((vallo & 0x8000) != 0) | |
728 | val -= 0x10000; | |
729 | if ((val & 0x8000) != 0) | |
730 | val += 0x10000; | |
731 | ||
732 | insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff); | |
733 | bfd_put_32 (abfd, insn, mips_refhi_addr); | |
734 | ||
735 | mips_refhi_addr = (bfd_byte *) NULL; | |
736 | } | |
737 | ||
738 | /* Now do the REFLO reloc in the usual way. */ | |
739 | return mips_generic_reloc (abfd, reloc_entry, symbol, data, | |
4991ebb9 | 740 | input_section, output_bfd, error_message); |
23f44e6f ILT |
741 | } |
742 | ||
743 | /* Do a GPREL relocation. This is a 16 bit value which must become | |
744 | the offset from the gp register. */ | |
745 | ||
746 | static bfd_reloc_status_type | |
747 | mips_gprel_reloc (abfd, | |
4991ebb9 ILT |
748 | reloc_entry, |
749 | symbol, | |
750 | data, | |
751 | input_section, | |
752 | output_bfd, | |
753 | error_message) | |
23f44e6f ILT |
754 | bfd *abfd; |
755 | arelent *reloc_entry; | |
756 | asymbol *symbol; | |
757 | PTR data; | |
758 | asection *input_section; | |
759 | bfd *output_bfd; | |
4991ebb9 | 760 | char **error_message; |
23f44e6f ILT |
761 | { |
762 | boolean relocateable; | |
763 | bfd_vma relocation; | |
764 | unsigned long val; | |
765 | unsigned long insn; | |
766 | ||
767 | /* If we're relocating, and this is an external symbol with no | |
768 | addend, we don't want to change anything. We will only have an | |
769 | addend if this is a newly created reloc, not read from an ECOFF | |
770 | file. */ | |
771 | if (output_bfd != (bfd *) NULL | |
772 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
773 | && reloc_entry->addend == 0) | |
774 | { | |
775 | reloc_entry->address += input_section->output_offset; | |
776 | return bfd_reloc_ok; | |
777 | } | |
778 | ||
779 | if (output_bfd != (bfd *) NULL) | |
780 | relocateable = true; | |
781 | else | |
782 | { | |
783 | relocateable = false; | |
784 | output_bfd = symbol->section->output_section->owner; | |
785 | } | |
786 | ||
787 | if (symbol->section == &bfd_und_section | |
788 | && relocateable == false) | |
789 | return bfd_reloc_undefined; | |
790 | ||
791 | /* We have to figure out the gp value, so that we can adjust the | |
792 | symbol value correctly. We look up the symbol _gp in the output | |
793 | BFD. If we can't find it, we're stuck. We cache it in the ECOFF | |
794 | target data. We don't need to adjust the symbol value for an | |
795 | external symbol if we are producing relocateable output. */ | |
796 | if (ecoff_data (output_bfd)->gp == 0 | |
797 | && (relocateable == false | |
798 | || (symbol->flags & BSF_SECTION_SYM) != 0)) | |
799 | { | |
800 | if (relocateable != false) | |
801 | { | |
802 | /* Make up a value. */ | |
803 | ecoff_data (output_bfd)->gp = | |
804 | symbol->section->output_section->vma + 0x4000; | |
805 | } | |
806 | else | |
807 | { | |
808 | unsigned int count; | |
809 | asymbol **sym; | |
810 | unsigned int i; | |
811 | ||
812 | count = bfd_get_symcount (output_bfd); | |
813 | sym = bfd_get_outsymbols (output_bfd); | |
814 | ||
815 | if (sym == (asymbol **) NULL) | |
816 | i = count; | |
817 | else | |
818 | { | |
819 | for (i = 0; i < count; i++, sym++) | |
820 | { | |
821 | register CONST char *name; | |
822 | ||
823 | name = bfd_asymbol_name (*sym); | |
824 | if (*name == '_' && strcmp (name, "_gp") == 0) | |
825 | { | |
826 | ecoff_data (output_bfd)->gp = bfd_asymbol_value (*sym); | |
827 | break; | |
828 | } | |
829 | } | |
830 | } | |
831 | ||
832 | if (i >= count) | |
833 | { | |
834 | /* Only get the error once. */ | |
835 | ecoff_data (output_bfd)->gp = 4; | |
4991ebb9 ILT |
836 | *error_message = |
837 | (char *) "GP relative relocation when _gp not defined"; | |
23f44e6f ILT |
838 | return bfd_reloc_dangerous; |
839 | } | |
840 | } | |
841 | } | |
842 | ||
843 | if (bfd_is_com_section (symbol->section)) | |
844 | relocation = 0; | |
845 | else | |
846 | relocation = symbol->value; | |
847 | ||
848 | relocation += symbol->section->output_section->vma; | |
849 | relocation += symbol->section->output_offset; | |
850 | ||
851 | if (reloc_entry->address > input_section->_cooked_size) | |
852 | return bfd_reloc_outofrange; | |
853 | ||
854 | insn = bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address); | |
855 | ||
856 | /* Set val to the offset into the section or symbol. */ | |
857 | val = ((insn & 0xffff) + reloc_entry->addend) & 0xffff; | |
858 | if (val & 0x8000) | |
859 | val -= 0x10000; | |
860 | ||
861 | /* Adjust val for the final section location and GP value. If we | |
862 | are producing relocateable output, we don't want to do this for | |
863 | an external symbol. */ | |
864 | if (relocateable == false | |
865 | || (symbol->flags & BSF_SECTION_SYM) != 0) | |
866 | val += relocation - ecoff_data (output_bfd)->gp; | |
867 | ||
868 | insn = (insn &~ 0xffff) | (val & 0xffff); | |
869 | bfd_put_32 (abfd, insn, (bfd_byte *) data + reloc_entry->address); | |
870 | ||
871 | if (relocateable != false) | |
872 | reloc_entry->address += input_section->output_offset; | |
873 | ||
874 | /* Make sure it fit in 16 bits. */ | |
875 | if (val >= 0x8000 && val < 0xffff8000) | |
4991ebb9 | 876 | return bfd_reloc_overflow; |
23f44e6f ILT |
877 | |
878 | return bfd_reloc_ok; | |
879 | } | |
880 | ||
4f996613 ILT |
881 | /* Do a RELHI relocation. We do this in conjunction with a RELLO |
882 | reloc, just as REFHI and REFLO are done together. RELHI and RELLO | |
883 | are Cygnus extensions used when generating position independent | |
884 | code for embedded systems. */ | |
885 | ||
886 | static bfd_byte *mips_relhi_addr; | |
887 | static bfd_vma mips_relhi_addend; | |
888 | ||
889 | static bfd_reloc_status_type | |
890 | mips_relhi_reloc (abfd, | |
891 | reloc_entry, | |
892 | symbol, | |
893 | data, | |
894 | input_section, | |
895 | output_bfd, | |
896 | error_message) | |
897 | bfd *abfd; | |
898 | arelent *reloc_entry; | |
899 | asymbol *symbol; | |
900 | PTR data; | |
901 | asection *input_section; | |
902 | bfd *output_bfd; | |
903 | char **error_message; | |
904 | { | |
905 | bfd_reloc_status_type ret; | |
906 | bfd_vma relocation; | |
907 | ||
908 | /* If this is a reloc against a section symbol, then it is correct | |
909 | in the object file. The only time we want to change this case is | |
910 | when we are relaxing, and that is handled entirely by | |
911 | mips_relocate_section and never calls this function. */ | |
912 | if ((symbol->flags & BSF_SECTION_SYM) != 0) | |
913 | { | |
914 | if (output_bfd != (bfd *) NULL) | |
915 | reloc_entry->address += input_section->output_offset; | |
916 | return bfd_reloc_ok; | |
917 | } | |
918 | ||
919 | /* This is an external symbol. If we're relocating, we don't want | |
920 | to change anything. */ | |
921 | if (output_bfd != (bfd *) NULL) | |
922 | { | |
923 | reloc_entry->address += input_section->output_offset; | |
924 | return bfd_reloc_ok; | |
925 | } | |
926 | ||
927 | ret = bfd_reloc_ok; | |
928 | if (symbol->section == &bfd_und_section | |
929 | && output_bfd == (bfd *) NULL) | |
930 | ret = bfd_reloc_undefined; | |
931 | ||
932 | if (bfd_is_com_section (symbol->section)) | |
933 | relocation = 0; | |
934 | else | |
935 | relocation = symbol->value; | |
936 | ||
937 | relocation += symbol->section->output_section->vma; | |
938 | relocation += symbol->section->output_offset; | |
939 | relocation += reloc_entry->addend; | |
940 | ||
941 | if (reloc_entry->address > input_section->_cooked_size) | |
942 | return bfd_reloc_outofrange; | |
943 | ||
944 | /* Save the information, and let RELLO do the actual relocation. */ | |
945 | mips_relhi_addr = (bfd_byte *) data + reloc_entry->address; | |
946 | mips_relhi_addend = relocation; | |
947 | ||
948 | if (output_bfd != (bfd *) NULL) | |
949 | reloc_entry->address += input_section->output_offset; | |
950 | ||
951 | return ret; | |
952 | } | |
953 | ||
954 | /* Do a RELLO relocation. This is a straightforward 16 bit PC | |
955 | relative relocation; this function exists in order to do the RELHI | |
956 | relocation described above. */ | |
957 | ||
958 | static bfd_reloc_status_type | |
959 | mips_rello_reloc (abfd, | |
960 | reloc_entry, | |
961 | symbol, | |
962 | data, | |
963 | input_section, | |
964 | output_bfd, | |
965 | error_message) | |
966 | bfd *abfd; | |
967 | arelent *reloc_entry; | |
968 | asymbol *symbol; | |
969 | PTR data; | |
970 | asection *input_section; | |
971 | bfd *output_bfd; | |
972 | char **error_message; | |
973 | { | |
974 | if (mips_relhi_addr != (bfd_byte *) NULL) | |
975 | { | |
976 | unsigned long insn; | |
977 | unsigned long val; | |
978 | unsigned long vallo; | |
979 | ||
980 | /* Do the RELHI relocation. Note that we actually don't need to | |
981 | know anything about the RELLO itself, except where to find | |
982 | the low 16 bits of the addend needed by the RELHI. */ | |
983 | insn = bfd_get_32 (abfd, mips_relhi_addr); | |
984 | vallo = (bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address) | |
985 | & 0xffff); | |
986 | val = ((insn & 0xffff) << 16) + vallo; | |
987 | val += mips_relhi_addend; | |
988 | ||
989 | /* If the symbol is defined, make val PC relative. If the | |
990 | symbol is not defined we don't want to do this, because we | |
991 | don't want the value in the object file to incorporate the | |
992 | address of the reloc. */ | |
993 | if (bfd_get_section (symbol) != &bfd_und_section | |
994 | && ! bfd_is_com_section (bfd_get_section (symbol))) | |
995 | val -= (input_section->output_section->vma | |
996 | + input_section->output_offset | |
997 | + reloc_entry->address); | |
998 | ||
999 | /* The low order 16 bits are always treated as a signed value. | |
1000 | Therefore, a negative value in the low order bits requires an | |
1001 | adjustment in the high order bits. We need to make this | |
1002 | adjustment in two ways: once for the bits we took from the | |
1003 | data, and once for the bits we are putting back in to the | |
1004 | data. */ | |
1005 | if ((vallo & 0x8000) != 0) | |
1006 | val -= 0x10000; | |
1007 | if ((val & 0x8000) != 0) | |
1008 | val += 0x10000; | |
1009 | ||
1010 | insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff); | |
1011 | bfd_put_32 (abfd, insn, mips_relhi_addr); | |
1012 | ||
1013 | mips_relhi_addr = (bfd_byte *) NULL; | |
1014 | } | |
1015 | ||
1016 | /* If this is a reloc against a section symbol, then it is correct | |
1017 | in the object file. The only time we want to change this case is | |
1018 | when we are relaxing, and that is handled entirely by | |
1019 | mips_relocate_section and never calls this function. */ | |
1020 | if ((symbol->flags & BSF_SECTION_SYM) != 0) | |
1021 | { | |
1022 | if (output_bfd != (bfd *) NULL) | |
1023 | reloc_entry->address += input_section->output_offset; | |
1024 | return bfd_reloc_ok; | |
1025 | } | |
1026 | ||
1027 | /* bfd_perform_relocation does not handle pcrel_offset relocations | |
1028 | correctly when generating a relocateable file, so handle them | |
1029 | directly here. */ | |
1030 | if (output_bfd != (bfd *) NULL) | |
1031 | { | |
1032 | reloc_entry->address += input_section->output_offset; | |
1033 | return bfd_reloc_ok; | |
1034 | } | |
1035 | ||
1036 | /* Now do the RELLO reloc in the usual way. */ | |
1037 | return mips_generic_reloc (abfd, reloc_entry, symbol, data, | |
1038 | input_section, output_bfd, error_message); | |
1039 | } | |
1040 | ||
dabf906e ILT |
1041 | /* This is the special function for the MIPS_R_SWITCH reloc. This |
1042 | special reloc is normally correct in the object file, and only | |
1043 | requires special handling when relaxing. We don't want | |
1044 | bfd_perform_relocation to tamper with it at all. */ | |
1045 | ||
1046 | /*ARGSUSED*/ | |
1047 | static bfd_reloc_status_type | |
1048 | mips_switch_reloc (abfd, | |
1049 | reloc_entry, | |
1050 | symbol, | |
1051 | data, | |
1052 | input_section, | |
1053 | output_bfd, | |
1054 | error_message) | |
1055 | bfd *abfd; | |
1056 | arelent *reloc_entry; | |
1057 | asymbol *symbol; | |
1058 | PTR data; | |
1059 | asection *input_section; | |
1060 | bfd *output_bfd; | |
1061 | char **error_message; | |
1062 | { | |
1063 | return bfd_reloc_ok; | |
1064 | } | |
1065 | ||
23f44e6f ILT |
1066 | /* Get the howto structure for a generic reloc type. */ |
1067 | ||
1068 | static CONST struct reloc_howto_struct * | |
1069 | mips_bfd_reloc_type_lookup (abfd, code) | |
1070 | bfd *abfd; | |
1071 | bfd_reloc_code_real_type code; | |
1072 | { | |
1073 | int mips_type; | |
1074 | ||
1075 | switch (code) | |
1076 | { | |
1077 | case BFD_RELOC_16: | |
1078 | mips_type = MIPS_R_REFHALF; | |
1079 | break; | |
1080 | case BFD_RELOC_32: | |
f1cca647 | 1081 | case BFD_RELOC_CTOR: |
23f44e6f ILT |
1082 | mips_type = MIPS_R_REFWORD; |
1083 | break; | |
1084 | case BFD_RELOC_MIPS_JMP: | |
1085 | mips_type = MIPS_R_JMPADDR; | |
1086 | break; | |
1087 | case BFD_RELOC_HI16_S: | |
1088 | mips_type = MIPS_R_REFHI; | |
1089 | break; | |
1090 | case BFD_RELOC_LO16: | |
1091 | mips_type = MIPS_R_REFLO; | |
1092 | break; | |
1093 | case BFD_RELOC_MIPS_GPREL: | |
1094 | mips_type = MIPS_R_GPREL; | |
1095 | break; | |
4991ebb9 ILT |
1096 | case BFD_RELOC_MIPS_LITERAL: |
1097 | mips_type = MIPS_R_LITERAL; | |
1098 | break; | |
a3a33af3 ILT |
1099 | case BFD_RELOC_16_PCREL_S2: |
1100 | mips_type = MIPS_R_PCREL16; | |
1101 | break; | |
4f996613 ILT |
1102 | case BFD_RELOC_PCREL_HI16_S: |
1103 | mips_type = MIPS_R_RELHI; | |
1104 | break; | |
1105 | case BFD_RELOC_PCREL_LO16: | |
1106 | mips_type = MIPS_R_RELLO; | |
1107 | break; | |
dabf906e ILT |
1108 | case BFD_RELOC_GPREL32: |
1109 | mips_type = MIPS_R_SWITCH; | |
1110 | break; | |
23f44e6f ILT |
1111 | default: |
1112 | return (CONST struct reloc_howto_struct *) NULL; | |
1113 | } | |
1114 | ||
1115 | return &mips_howto_table[mips_type]; | |
1116 | } | |
c3fe0c41 | 1117 | \f |
4991ebb9 | 1118 | /* A helper routine for mips_relocate_section which handles the REFHI |
4f996613 ILT |
1119 | and RELHI relocations. The REFHI relocation must be followed by a |
1120 | REFLO relocation (and RELHI by a RELLO), and the addend used is | |
1121 | formed from the addends of both instructions. */ | |
de17306e | 1122 | |
4991ebb9 | 1123 | static void |
4f996613 ILT |
1124 | mips_relocate_hi (refhi, reflo, input_bfd, input_section, contents, adjust, |
1125 | relocation, pcrel) | |
4991ebb9 ILT |
1126 | struct internal_reloc *refhi; |
1127 | struct internal_reloc *reflo; | |
1128 | bfd *input_bfd; | |
1129 | asection *input_section; | |
1130 | bfd_byte *contents; | |
a3a33af3 | 1131 | size_t adjust; |
4991ebb9 | 1132 | bfd_vma relocation; |
4f996613 | 1133 | boolean pcrel; |
de17306e | 1134 | { |
4991ebb9 ILT |
1135 | unsigned long insn; |
1136 | unsigned long val; | |
1137 | unsigned long vallo; | |
1138 | ||
1139 | insn = bfd_get_32 (input_bfd, | |
a3a33af3 | 1140 | contents + adjust + refhi->r_vaddr - input_section->vma); |
4991ebb9 | 1141 | vallo = (bfd_get_32 (input_bfd, |
a3a33af3 | 1142 | contents + adjust + reflo->r_vaddr - input_section->vma) |
4991ebb9 ILT |
1143 | & 0xffff); |
1144 | val = ((insn & 0xffff) << 16) + vallo; | |
1145 | val += relocation; | |
1146 | ||
1147 | /* The low order 16 bits are always treated as a signed value. | |
1148 | Therefore, a negative value in the low order bits requires an | |
1149 | adjustment in the high order bits. We need to make this | |
1150 | adjustment in two ways: once for the bits we took from the data, | |
1151 | and once for the bits we are putting back in to the data. */ | |
1152 | if ((vallo & 0x8000) != 0) | |
1153 | val -= 0x10000; | |
4f996613 ILT |
1154 | |
1155 | if (pcrel) | |
1156 | val -= (input_section->output_section->vma | |
1157 | + input_section->output_offset | |
1158 | + (reflo->r_vaddr - input_section->vma + adjust)); | |
1159 | ||
4991ebb9 ILT |
1160 | if ((val & 0x8000) != 0) |
1161 | val += 0x10000; | |
de17306e | 1162 | |
4991ebb9 ILT |
1163 | insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff); |
1164 | bfd_put_32 (input_bfd, (bfd_vma) insn, | |
a3a33af3 | 1165 | contents + adjust + refhi->r_vaddr - input_section->vma); |
4991ebb9 | 1166 | } |
de17306e | 1167 | |
4991ebb9 | 1168 | /* Relocate a section while linking a MIPS ECOFF file. */ |
de17306e | 1169 | |
4991ebb9 ILT |
1170 | static boolean |
1171 | mips_relocate_section (output_bfd, info, input_bfd, input_section, | |
1172 | contents, external_relocs) | |
1173 | bfd *output_bfd; | |
1174 | struct bfd_link_info *info; | |
1175 | bfd *input_bfd; | |
1176 | asection *input_section; | |
1177 | bfd_byte *contents; | |
1178 | PTR external_relocs; | |
1179 | { | |
1180 | asection **symndx_to_section; | |
1181 | struct ecoff_link_hash_entry **sym_hashes; | |
1182 | bfd_vma gp; | |
1183 | boolean gp_undefined; | |
a3a33af3 ILT |
1184 | size_t adjust; |
1185 | long *offsets; | |
4991ebb9 ILT |
1186 | struct external_reloc *ext_rel; |
1187 | struct external_reloc *ext_rel_end; | |
a3a33af3 | 1188 | unsigned int i; |
4f996613 ILT |
1189 | boolean got_lo; |
1190 | struct internal_reloc lo_int_rel; | |
4991ebb9 ILT |
1191 | |
1192 | BFD_ASSERT (input_bfd->xvec->header_byteorder_big_p | |
1193 | == output_bfd->xvec->header_byteorder_big_p); | |
1194 | ||
1195 | /* We keep a table mapping the symndx found in an internal reloc to | |
1196 | the appropriate section. This is faster than looking up the | |
1197 | section by name each time. */ | |
1198 | symndx_to_section = ecoff_data (input_bfd)->symndx_to_section; | |
1199 | if (symndx_to_section == (asection **) NULL) | |
1200 | { | |
1201 | symndx_to_section = ((asection **) | |
1202 | bfd_alloc (input_bfd, | |
1203 | (NUM_RELOC_SECTIONS | |
1204 | * sizeof (asection *)))); | |
9783e04a DM |
1205 | if (!symndx_to_section) |
1206 | { | |
f1cca647 | 1207 | bfd_set_error (bfd_error_no_memory); |
9783e04a DM |
1208 | return false; |
1209 | } | |
4991ebb9 ILT |
1210 | |
1211 | symndx_to_section[RELOC_SECTION_NONE] = NULL; | |
1212 | symndx_to_section[RELOC_SECTION_TEXT] = | |
1213 | bfd_get_section_by_name (input_bfd, ".text"); | |
1214 | symndx_to_section[RELOC_SECTION_RDATA] = | |
1215 | bfd_get_section_by_name (input_bfd, ".rdata"); | |
1216 | symndx_to_section[RELOC_SECTION_DATA] = | |
1217 | bfd_get_section_by_name (input_bfd, ".data"); | |
1218 | symndx_to_section[RELOC_SECTION_SDATA] = | |
1219 | bfd_get_section_by_name (input_bfd, ".sdata"); | |
1220 | symndx_to_section[RELOC_SECTION_SBSS] = | |
1221 | bfd_get_section_by_name (input_bfd, ".sbss"); | |
1222 | symndx_to_section[RELOC_SECTION_BSS] = | |
1223 | bfd_get_section_by_name (input_bfd, ".bss"); | |
1224 | symndx_to_section[RELOC_SECTION_INIT] = | |
1225 | bfd_get_section_by_name (input_bfd, ".init"); | |
1226 | symndx_to_section[RELOC_SECTION_LIT8] = | |
1227 | bfd_get_section_by_name (input_bfd, ".lit8"); | |
1228 | symndx_to_section[RELOC_SECTION_LIT4] = | |
1229 | bfd_get_section_by_name (input_bfd, ".lit4"); | |
1230 | symndx_to_section[RELOC_SECTION_XDATA] = NULL; | |
1231 | symndx_to_section[RELOC_SECTION_PDATA] = NULL; | |
1232 | symndx_to_section[RELOC_SECTION_FINI] = | |
1233 | bfd_get_section_by_name (input_bfd, ".fini"); | |
1234 | symndx_to_section[RELOC_SECTION_LITA] = NULL; | |
1235 | symndx_to_section[RELOC_SECTION_ABS] = NULL; | |
1236 | ||
1237 | ecoff_data (input_bfd)->symndx_to_section = symndx_to_section; | |
1238 | } | |
de17306e | 1239 | |
4991ebb9 | 1240 | sym_hashes = ecoff_data (input_bfd)->sym_hashes; |
de17306e | 1241 | |
4991ebb9 ILT |
1242 | gp = ecoff_data (output_bfd)->gp; |
1243 | if (gp == 0) | |
1244 | gp_undefined = true; | |
1245 | else | |
1246 | gp_undefined = false; | |
de17306e | 1247 | |
4f996613 | 1248 | got_lo = false; |
de17306e | 1249 | |
a3a33af3 ILT |
1250 | adjust = 0; |
1251 | ||
1252 | if (ecoff_section_data (input_bfd, input_section) == NULL) | |
1253 | offsets = NULL; | |
1254 | else | |
1255 | offsets = ecoff_section_data (input_bfd, input_section)->offsets; | |
1256 | ||
4991ebb9 ILT |
1257 | ext_rel = (struct external_reloc *) external_relocs; |
1258 | ext_rel_end = ext_rel + input_section->reloc_count; | |
a3a33af3 | 1259 | for (i = 0; ext_rel < ext_rel_end; ext_rel++, i++) |
4991ebb9 ILT |
1260 | { |
1261 | struct internal_reloc int_rel; | |
4991ebb9 ILT |
1262 | bfd_vma addend; |
1263 | reloc_howto_type *howto; | |
1264 | struct ecoff_link_hash_entry *h = NULL; | |
1265 | asection *s = NULL; | |
1266 | bfd_vma relocation; | |
1267 | bfd_reloc_status_type r; | |
1268 | ||
4f996613 | 1269 | if (! got_lo) |
4991ebb9 ILT |
1270 | mips_ecoff_swap_reloc_in (input_bfd, (PTR) ext_rel, &int_rel); |
1271 | else | |
1272 | { | |
4f996613 ILT |
1273 | int_rel = lo_int_rel; |
1274 | got_lo = false; | |
4991ebb9 | 1275 | } |
de17306e | 1276 | |
4991ebb9 ILT |
1277 | BFD_ASSERT (int_rel.r_type |
1278 | < sizeof mips_howto_table / sizeof mips_howto_table[0]); | |
de17306e | 1279 | |
4f996613 ILT |
1280 | /* The REFHI and RELHI relocs requires special handling. they |
1281 | must be followed by a REFLO or RELLO reloc, respectively, and | |
1282 | the addend is formed from both relocs. */ | |
1283 | if (int_rel.r_type == MIPS_R_REFHI | |
1284 | || int_rel.r_type == MIPS_R_RELHI) | |
4991ebb9 ILT |
1285 | { |
1286 | BFD_ASSERT ((ext_rel + 1) < ext_rel_end); | |
1287 | mips_ecoff_swap_reloc_in (input_bfd, (PTR) (ext_rel + 1), | |
4f996613 ILT |
1288 | &lo_int_rel); |
1289 | BFD_ASSERT ((lo_int_rel.r_type | |
1290 | == (int_rel.r_type == MIPS_R_REFHI | |
1291 | ? MIPS_R_REFLO | |
1292 | : MIPS_R_RELLO)) | |
1293 | && int_rel.r_extern == lo_int_rel.r_extern | |
1294 | && int_rel.r_symndx == lo_int_rel.r_symndx); | |
1295 | got_lo = true; | |
4991ebb9 | 1296 | } |
de17306e | 1297 | |
4991ebb9 | 1298 | howto = &mips_howto_table[int_rel.r_type]; |
de17306e | 1299 | |
dabf906e ILT |
1300 | /* The SWITCH reloc must be handled specially. This reloc is |
1301 | marks the location of a difference between two portions of an | |
1302 | object file. The symbol index does not reference a symbol, | |
1303 | but is actually the offset from the reloc to the subtrahend | |
1304 | of the difference. This reloc is correct in the object file, | |
1305 | and needs no further adjustment, unless we are relaxing. If | |
1306 | we are relaxing, we may have to add in an offset. Since no | |
1307 | symbols are involved in this reloc, we handle it completely | |
1308 | here. */ | |
1309 | if (int_rel.r_type == MIPS_R_SWITCH) | |
1310 | { | |
1311 | if (offsets != NULL | |
1312 | && offsets[i] != 0) | |
1313 | { | |
1314 | r = _bfd_relocate_contents (howto, input_bfd, | |
1315 | (bfd_vma) offsets[i], | |
1316 | (contents | |
1317 | + adjust | |
1318 | + int_rel.r_vaddr | |
1319 | - input_section->vma)); | |
1320 | BFD_ASSERT (r == bfd_reloc_ok); | |
1321 | } | |
1322 | ||
1323 | continue; | |
1324 | } | |
1325 | ||
4991ebb9 ILT |
1326 | if (int_rel.r_extern) |
1327 | { | |
1328 | h = sym_hashes[int_rel.r_symndx]; | |
1329 | /* If h is NULL, that means that there is a reloc against an | |
1330 | external symbol which we thought was just a debugging | |
1331 | symbol. This should not happen. */ | |
1332 | if (h == (struct ecoff_link_hash_entry *) NULL) | |
1333 | abort (); | |
1334 | } | |
1335 | else | |
1336 | { | |
1337 | if (int_rel.r_symndx < 0 || int_rel.r_symndx >= NUM_RELOC_SECTIONS) | |
1338 | s = NULL; | |
1339 | else | |
1340 | s = symndx_to_section[int_rel.r_symndx]; | |
de17306e | 1341 | |
4991ebb9 ILT |
1342 | if (s == (asection *) NULL) |
1343 | abort (); | |
1344 | } | |
de17306e | 1345 | |
4991ebb9 ILT |
1346 | /* The GPREL reloc uses an addend: the difference in the GP |
1347 | values. */ | |
f1cca647 ILT |
1348 | if (int_rel.r_type != MIPS_R_GPREL |
1349 | && int_rel.r_type != MIPS_R_LITERAL) | |
4991ebb9 ILT |
1350 | addend = 0; |
1351 | else | |
de17306e | 1352 | { |
4991ebb9 ILT |
1353 | if (gp_undefined) |
1354 | { | |
1355 | if (! ((*info->callbacks->reloc_dangerous) | |
1356 | (info, "GP relative relocation when GP not defined", | |
1357 | input_bfd, input_section, | |
1358 | int_rel.r_vaddr - input_section->vma))) | |
1359 | return false; | |
1360 | /* Only give the error once per link. */ | |
1361 | ecoff_data (output_bfd)->gp = gp = 4; | |
1362 | gp_undefined = false; | |
1363 | } | |
1364 | if (! int_rel.r_extern) | |
1365 | { | |
1366 | /* This is a relocation against a section. The current | |
1367 | addend in the instruction is the difference between | |
1368 | INPUT_SECTION->vma and the GP value of INPUT_BFD. We | |
1369 | must change this to be the difference between the | |
1370 | final definition (which will end up in RELOCATION) | |
1371 | and the GP value of OUTPUT_BFD (which is in GP). */ | |
1372 | addend = ecoff_data (input_bfd)->gp - gp; | |
1373 | } | |
1374 | else if (! info->relocateable | |
1375 | || h->root.type == bfd_link_hash_defined) | |
1376 | { | |
1377 | /* This is a relocation against an undefined or common | |
1378 | symbol. The current addend in the instruction is | |
1379 | simply the desired offset into the symbol (normally | |
1380 | zero). We are going to change this into a relocation | |
1381 | against a defined symbol, so we want the instruction | |
1382 | to hold the difference between the final definition | |
1383 | of the symbol (which will end up in RELOCATION) and | |
1384 | the GP value of OUTPUT_BFD (which is in GP). */ | |
1385 | addend = - gp; | |
1386 | } | |
1387 | else | |
1388 | { | |
1389 | /* This is a relocation against an undefined or common | |
1390 | symbol. The current addend in the instruction is | |
1391 | simply the desired offset into the symbol (normally | |
1392 | zero). We are generating relocateable output, and we | |
1393 | aren't going to define this symbol, so we just leave | |
1394 | the instruction alone. */ | |
1395 | addend = 0; | |
1396 | } | |
de17306e ILT |
1397 | } |
1398 | ||
a3a33af3 ILT |
1399 | /* If we are relaxing, mips_relax_section may have set |
1400 | offsets[i] to some value. A value of 1 means we must expand | |
1401 | a PC relative branch into a multi-instruction of sequence, | |
1402 | and any other value is an addend. */ | |
1403 | if (offsets != NULL | |
1404 | && offsets[i] != 0) | |
1405 | { | |
1406 | BFD_ASSERT (! info->relocateable); | |
4f996613 ILT |
1407 | BFD_ASSERT (int_rel.r_type == MIPS_R_PCREL16 |
1408 | || int_rel.r_type == MIPS_R_RELHI | |
1409 | || int_rel.r_type == MIPS_R_RELLO); | |
a3a33af3 | 1410 | if (offsets[i] != 1) |
4f996613 | 1411 | addend += offsets[i]; |
a3a33af3 ILT |
1412 | else |
1413 | { | |
1414 | bfd_byte *here; | |
1415 | ||
4f996613 ILT |
1416 | BFD_ASSERT (int_rel.r_extern |
1417 | && int_rel.r_type == MIPS_R_PCREL16); | |
a3a33af3 ILT |
1418 | |
1419 | /* Move the rest of the instructions up. */ | |
1420 | here = (contents | |
1421 | + adjust | |
1422 | + int_rel.r_vaddr | |
1423 | - input_section->vma); | |
1424 | memmove (here + PCREL16_EXPANSION_ADJUSTMENT, here, | |
1425 | (input_section->_raw_size | |
1426 | - (int_rel.r_vaddr - input_section->vma))); | |
1427 | ||
1428 | /* Generate the new instructions. */ | |
1429 | if (! mips_relax_pcrel16 (info, input_bfd, input_section, | |
1430 | h, here, | |
1431 | (input_section->output_section->vma | |
1432 | + input_section->output_offset | |
1433 | + (int_rel.r_vaddr | |
1434 | - input_section->vma) | |
1435 | + adjust))) | |
1436 | return false; | |
1437 | ||
1438 | /* We must adjust everything else up a notch. */ | |
1439 | adjust += PCREL16_EXPANSION_ADJUSTMENT; | |
1440 | ||
1441 | /* mips_relax_pcrel16 handles all the details of this | |
1442 | relocation. */ | |
1443 | continue; | |
1444 | } | |
1445 | } | |
1446 | ||
ac9ed096 ILT |
1447 | /* If we are relaxing, and this is a reloc against the .text |
1448 | segment, we may need to adjust it if some branches have been | |
1449 | expanded. The reloc types which are likely to occur in the | |
1450 | .text section are handled efficiently by mips_relax_section, | |
1451 | and thus do not need to be handled here. */ | |
1452 | if (ecoff_data (input_bfd)->debug_info.adjust != NULL | |
1453 | && ! int_rel.r_extern | |
1454 | && int_rel.r_symndx == RELOC_SECTION_TEXT | |
1455 | && (strcmp (bfd_get_section_name (input_bfd, input_section), | |
1456 | ".text") != 0 | |
1457 | || (int_rel.r_type != MIPS_R_PCREL16 | |
1458 | && int_rel.r_type != MIPS_R_SWITCH | |
1459 | && int_rel.r_type != MIPS_R_RELHI | |
1460 | && int_rel.r_type != MIPS_R_RELLO))) | |
1461 | { | |
1462 | bfd_vma adr; | |
1463 | struct ecoff_value_adjust *a; | |
1464 | ||
1465 | /* We need to get the addend so that we know whether we need | |
1466 | to adjust the address. */ | |
1467 | BFD_ASSERT (int_rel.r_type == MIPS_R_REFWORD); | |
1468 | ||
1469 | adr = bfd_get_32 (input_bfd, | |
1470 | (contents | |
1471 | + adjust | |
1472 | + int_rel.r_vaddr | |
1473 | - input_section->vma)); | |
1474 | ||
1475 | for (a = ecoff_data (input_bfd)->debug_info.adjust; | |
1476 | a != (struct ecoff_value_adjust *) NULL; | |
1477 | a = a->next) | |
1478 | { | |
1479 | if (adr >= a->start && adr < a->end) | |
1480 | addend += a->adjust; | |
1481 | } | |
1482 | } | |
1483 | ||
4991ebb9 ILT |
1484 | if (info->relocateable) |
1485 | { | |
1486 | /* We are generating relocateable output, and must convert | |
1487 | the existing reloc. */ | |
1488 | if (int_rel.r_extern) | |
1489 | { | |
1490 | if (h->root.type == bfd_link_hash_defined) | |
1491 | { | |
4991ebb9 | 1492 | const char *name; |
de17306e | 1493 | |
4991ebb9 ILT |
1494 | /* This symbol is defined in the output. Convert |
1495 | the reloc from being against the symbol to being | |
1496 | against the section. */ | |
de17306e | 1497 | |
4991ebb9 ILT |
1498 | /* Clear the r_extern bit. */ |
1499 | int_rel.r_extern = 0; | |
de17306e | 1500 | |
4991ebb9 | 1501 | /* Compute a new r_symndx value. */ |
a3a33af3 | 1502 | s = h->root.u.def.section; |
4991ebb9 | 1503 | name = bfd_get_section_name (output_bfd, |
a3a33af3 | 1504 | s->output_section); |
de17306e | 1505 | |
4991ebb9 ILT |
1506 | int_rel.r_symndx = -1; |
1507 | switch (name[1]) | |
1508 | { | |
1509 | case 'b': | |
1510 | if (strcmp (name, ".bss") == 0) | |
1511 | int_rel.r_symndx = RELOC_SECTION_BSS; | |
1512 | break; | |
1513 | case 'd': | |
1514 | if (strcmp (name, ".data") == 0) | |
1515 | int_rel.r_symndx = RELOC_SECTION_DATA; | |
1516 | break; | |
1517 | case 'f': | |
1518 | if (strcmp (name, ".fini") == 0) | |
1519 | int_rel.r_symndx = RELOC_SECTION_FINI; | |
1520 | break; | |
1521 | case 'i': | |
1522 | if (strcmp (name, ".init") == 0) | |
1523 | int_rel.r_symndx = RELOC_SECTION_INIT; | |
1524 | break; | |
1525 | case 'l': | |
1526 | if (strcmp (name, ".lit8") == 0) | |
1527 | int_rel.r_symndx = RELOC_SECTION_LIT8; | |
1528 | else if (strcmp (name, ".lit4") == 0) | |
1529 | int_rel.r_symndx = RELOC_SECTION_LIT4; | |
1530 | break; | |
1531 | case 'r': | |
1532 | if (strcmp (name, ".rdata") == 0) | |
1533 | int_rel.r_symndx = RELOC_SECTION_RDATA; | |
1534 | break; | |
1535 | case 's': | |
1536 | if (strcmp (name, ".sdata") == 0) | |
1537 | int_rel.r_symndx = RELOC_SECTION_SDATA; | |
1538 | else if (strcmp (name, ".sbss") == 0) | |
1539 | int_rel.r_symndx = RELOC_SECTION_SBSS; | |
1540 | break; | |
1541 | case 't': | |
1542 | if (strcmp (name, ".text") == 0) | |
1543 | int_rel.r_symndx = RELOC_SECTION_TEXT; | |
1544 | break; | |
1545 | } | |
1546 | ||
1547 | if (int_rel.r_symndx == -1) | |
1548 | abort (); | |
1549 | ||
1550 | /* Add the section VMA and the symbol value. */ | |
1551 | relocation = (h->root.u.def.value | |
a3a33af3 ILT |
1552 | + s->output_section->vma |
1553 | + s->output_offset); | |
1554 | ||
1555 | /* For a PC relative relocation, the object file | |
1556 | currently holds just the addend. We must adjust | |
1557 | by the address to get the right value. */ | |
1558 | if (howto->pc_relative) | |
4f996613 ILT |
1559 | { |
1560 | relocation -= int_rel.r_vaddr - input_section->vma; | |
1561 | ||
1562 | /* If we are converting a RELHI or RELLO reloc | |
1563 | from being against an external symbol to | |
1564 | being against a section, we must put a | |
1565 | special value into the r_offset field. This | |
1566 | value is the old addend. The r_offset for | |
1567 | both the RELOHI and RELLO relocs are the | |
1568 | same, and we set both when we see RELHI. */ | |
1569 | if (int_rel.r_type == MIPS_R_RELHI) | |
1570 | { | |
1571 | long addhi, addlo; | |
1572 | ||
1573 | addhi = bfd_get_32 (input_bfd, | |
1574 | (contents | |
1575 | + adjust | |
1576 | + int_rel.r_vaddr | |
1577 | - input_section->vma)); | |
1578 | addhi &= 0xffff; | |
1579 | if (addhi & 0x8000) | |
1580 | addhi -= 0x10000; | |
1581 | addhi <<= 16; | |
1582 | ||
1583 | addlo = bfd_get_32 (input_bfd, | |
1584 | (contents | |
1585 | + adjust | |
1586 | + lo_int_rel.r_vaddr | |
1587 | - input_section->vma)); | |
1588 | addlo &= 0xffff; | |
1589 | if (addlo & 0x8000) | |
1590 | addlo -= 0x10000; | |
1591 | ||
1592 | int_rel.r_offset = addhi + addlo; | |
1593 | lo_int_rel.r_offset = int_rel.r_offset; | |
1594 | } | |
1595 | } | |
a3a33af3 ILT |
1596 | |
1597 | h = NULL; | |
4991ebb9 ILT |
1598 | } |
1599 | else | |
1600 | { | |
1601 | /* Change the symndx value to the right one for the | |
1602 | output BFD. */ | |
1603 | int_rel.r_symndx = h->indx; | |
1604 | if (int_rel.r_symndx == -1) | |
1605 | { | |
1606 | /* This symbol is not being written out. */ | |
1607 | if (! ((*info->callbacks->unattached_reloc) | |
1608 | (info, h->root.root.string, input_bfd, | |
1609 | input_section, | |
1610 | int_rel.r_vaddr - input_section->vma))) | |
1611 | return false; | |
1612 | int_rel.r_symndx = 0; | |
1613 | } | |
1614 | relocation = 0; | |
1615 | } | |
1616 | } | |
1617 | else | |
1618 | { | |
1619 | /* This is a relocation against a section. Adjust the | |
1620 | value by the amount the section moved. */ | |
1621 | relocation = (s->output_section->vma | |
1622 | + s->output_offset | |
1623 | - s->vma); | |
1624 | } | |
de17306e | 1625 | |
4991ebb9 | 1626 | relocation += addend; |
ac9ed096 | 1627 | addend = 0; |
de17306e | 1628 | |
a3a33af3 ILT |
1629 | /* Adjust a PC relative relocation by removing the reference |
1630 | to the original address in the section and including the | |
4f996613 ILT |
1631 | reference to the new address. However, external RELHI |
1632 | and RELLO relocs are PC relative, but don't include any | |
1633 | reference to the address. The addend is merely an | |
1634 | addend. */ | |
1635 | if (howto->pc_relative | |
1636 | && (! int_rel.r_extern | |
1637 | || (int_rel.r_type != MIPS_R_RELHI | |
1638 | && int_rel.r_type != MIPS_R_RELLO))) | |
a3a33af3 ILT |
1639 | relocation -= (input_section->output_section->vma |
1640 | + input_section->output_offset | |
1641 | - input_section->vma); | |
1642 | ||
4991ebb9 ILT |
1643 | /* Adjust the contents. */ |
1644 | if (relocation == 0) | |
1645 | r = bfd_reloc_ok; | |
1646 | else | |
1647 | { | |
4f996613 ILT |
1648 | if (int_rel.r_type != MIPS_R_REFHI |
1649 | && int_rel.r_type != MIPS_R_RELHI) | |
4991ebb9 ILT |
1650 | r = _bfd_relocate_contents (howto, input_bfd, relocation, |
1651 | (contents | |
a3a33af3 | 1652 | + adjust |
4991ebb9 ILT |
1653 | + int_rel.r_vaddr |
1654 | - input_section->vma)); | |
1655 | else | |
1656 | { | |
4f996613 ILT |
1657 | mips_relocate_hi (&int_rel, &lo_int_rel, |
1658 | input_bfd, input_section, contents, | |
1659 | adjust, relocation, | |
1660 | int_rel.r_type == MIPS_R_RELHI); | |
4991ebb9 ILT |
1661 | r = bfd_reloc_ok; |
1662 | } | |
1663 | } | |
de17306e | 1664 | |
4991ebb9 ILT |
1665 | /* Adjust the reloc address. */ |
1666 | int_rel.r_vaddr += (input_section->output_section->vma | |
1667 | + input_section->output_offset | |
1668 | - input_section->vma); | |
de17306e | 1669 | |
4991ebb9 ILT |
1670 | /* Save the changed reloc information. */ |
1671 | mips_ecoff_swap_reloc_out (input_bfd, &int_rel, (PTR) ext_rel); | |
1672 | } | |
1673 | else | |
1674 | { | |
1675 | /* We are producing a final executable. */ | |
1676 | if (int_rel.r_extern) | |
1677 | { | |
1678 | /* This is a reloc against a symbol. */ | |
1679 | if (h->root.type == bfd_link_hash_defined) | |
1680 | { | |
1681 | asection *hsec; | |
de17306e | 1682 | |
4991ebb9 ILT |
1683 | hsec = h->root.u.def.section; |
1684 | relocation = (h->root.u.def.value | |
1685 | + hsec->output_section->vma | |
1686 | + hsec->output_offset); | |
1687 | } | |
1688 | else | |
1689 | { | |
1690 | if (! ((*info->callbacks->undefined_symbol) | |
1691 | (info, h->root.root.string, input_bfd, | |
1692 | input_section, | |
1693 | int_rel.r_vaddr - input_section->vma))) | |
1694 | return false; | |
1695 | relocation = 0; | |
1696 | } | |
1697 | } | |
1698 | else | |
1699 | { | |
1700 | /* This is a reloc against a section. */ | |
1701 | relocation = (s->output_section->vma | |
1702 | + s->output_offset | |
1703 | - s->vma); | |
1704 | ||
a3a33af3 ILT |
1705 | /* A PC relative reloc is already correct in the object |
1706 | file. Make it look like a pcrel_offset relocation by | |
1707 | adding in the start address. */ | |
4991ebb9 | 1708 | if (howto->pc_relative) |
4f996613 ILT |
1709 | { |
1710 | if (int_rel.r_type != MIPS_R_RELHI) | |
1711 | relocation += int_rel.r_vaddr + adjust; | |
1712 | else | |
1713 | relocation += lo_int_rel.r_vaddr + adjust; | |
1714 | } | |
4991ebb9 | 1715 | } |
de17306e | 1716 | |
4f996613 ILT |
1717 | if (int_rel.r_type != MIPS_R_REFHI |
1718 | && int_rel.r_type != MIPS_R_RELHI) | |
4991ebb9 ILT |
1719 | r = _bfd_final_link_relocate (howto, |
1720 | input_bfd, | |
1721 | input_section, | |
1722 | contents, | |
a3a33af3 ILT |
1723 | (int_rel.r_vaddr |
1724 | - input_section->vma | |
1725 | + adjust), | |
4991ebb9 ILT |
1726 | relocation, |
1727 | addend); | |
1728 | else | |
1729 | { | |
4f996613 ILT |
1730 | mips_relocate_hi (&int_rel, &lo_int_rel, input_bfd, |
1731 | input_section, contents, adjust, | |
1732 | relocation, | |
1733 | int_rel.r_type == MIPS_R_RELHI); | |
4991ebb9 ILT |
1734 | r = bfd_reloc_ok; |
1735 | } | |
1736 | } | |
1737 | ||
ac9ed096 ILT |
1738 | /* MIPS_R_JMPADDR requires peculiar overflow detection. The |
1739 | instruction provides a 28 bit address (the two lower bits are | |
1740 | implicit zeroes) which is combined with the upper four bits | |
1741 | of the instruction address. */ | |
1742 | if (r == bfd_reloc_ok | |
1743 | && int_rel.r_type == MIPS_R_JMPADDR | |
1744 | && (((relocation | |
1745 | + addend | |
1746 | + (int_rel.r_extern ? 0 : s->vma)) | |
1747 | & 0xf0000000) | |
1748 | != ((input_section->output_section->vma | |
1749 | + input_section->output_offset | |
1750 | + (int_rel.r_vaddr - input_section->vma) | |
1751 | + adjust) | |
1752 | & 0xf0000000))) | |
1753 | r = bfd_reloc_overflow; | |
1754 | ||
4991ebb9 ILT |
1755 | if (r != bfd_reloc_ok) |
1756 | { | |
1757 | switch (r) | |
1758 | { | |
1759 | default: | |
1760 | case bfd_reloc_outofrange: | |
1761 | abort (); | |
1762 | case bfd_reloc_overflow: | |
1763 | { | |
1764 | const char *name; | |
1765 | ||
1766 | if (int_rel.r_extern) | |
1767 | name = h->root.root.string; | |
1768 | else | |
1769 | name = bfd_section_name (input_bfd, s); | |
1770 | if (! ((*info->callbacks->reloc_overflow) | |
1771 | (info, name, howto->name, (bfd_vma) 0, | |
1772 | input_bfd, input_section, | |
1773 | int_rel.r_vaddr - input_section->vma))) | |
1774 | return false; | |
1775 | } | |
1776 | break; | |
1777 | } | |
1778 | } | |
1779 | } | |
1780 | ||
1781 | return true; | |
de17306e | 1782 | } |
de17306e | 1783 | \f |
a3a33af3 ILT |
1784 | /* Relax a section when linking a MIPS ECOFF file. This is used for |
1785 | embedded PIC code, which always uses PC relative branches which | |
1786 | only have an 18 bit range on MIPS. If a branch is not in range, we | |
1787 | generate a long instruction sequence to compensate. Each time we | |
1788 | find a branch to expand, we have to check all the others again to | |
1789 | make sure they are still in range. This is slow, but it only has | |
1790 | to be done when -relax is passed to the linker. | |
1791 | ||
1792 | This routine figures out which branches need to expand; the actual | |
1793 | expansion is done in mips_relocate_section when the section | |
1794 | contents are relocated. The information is stored in the offsets | |
1795 | field of the ecoff_section_tdata structure. An offset of 1 means | |
1796 | that the branch must be expanded into a multi-instruction PC | |
1797 | relative branch (such an offset will only occur for a PC relative | |
1798 | branch to an external symbol). Any other offset must be a multiple | |
1799 | of four, and is the amount to change the branch by (such an offset | |
1800 | will only occur for a PC relative branch within the same section). | |
1801 | ||
1802 | We do not modify the section relocs or contents themselves so that | |
1803 | if memory usage becomes an issue we can discard them and read them | |
1804 | again. The only information we must save in memory between this | |
1805 | routine and the mips_relocate_section routine is the table of | |
1806 | offsets. */ | |
1807 | ||
1808 | static boolean | |
1809 | mips_relax_section (abfd, sec, info, again) | |
1810 | bfd *abfd; | |
1811 | asection *sec; | |
1812 | struct bfd_link_info *info; | |
1813 | boolean *again; | |
1814 | { | |
1815 | struct ecoff_section_tdata *section_tdata; | |
1816 | bfd_byte *contents = NULL; | |
1817 | long *offsets; | |
1818 | struct external_reloc *ext_rel; | |
1819 | struct external_reloc *ext_rel_end; | |
1820 | unsigned int i; | |
1821 | ||
1822 | /* Assume we are not going to need another pass. */ | |
1823 | *again = false; | |
1824 | ||
1825 | /* If we are not generating an ECOFF file, this is much too | |
1826 | confusing to deal with. */ | |
1827 | if (info->hash->creator->flavour != bfd_get_flavour (abfd)) | |
1828 | return true; | |
1829 | ||
1830 | /* If there are no relocs, there is nothing to do. */ | |
1831 | if (sec->reloc_count == 0) | |
1832 | return true; | |
1833 | ||
1834 | /* We are only interested in PC relative relocs, and why would there | |
1835 | ever be one from anything but the .text section? */ | |
1836 | if (strcmp (bfd_get_section_name (abfd, sec), ".text") != 0) | |
1837 | return true; | |
1838 | ||
1839 | /* Read in the relocs, if we haven't already got them. */ | |
1840 | section_tdata = ecoff_section_data (abfd, sec); | |
1841 | if (section_tdata == (struct ecoff_section_tdata *) NULL) | |
1842 | { | |
1843 | bfd_size_type external_reloc_size; | |
1844 | bfd_size_type external_relocs_size; | |
1845 | ||
1846 | sec->used_by_bfd = | |
1847 | (PTR) bfd_alloc_by_size_t (abfd, sizeof (struct ecoff_section_tdata)); | |
1848 | if (sec->used_by_bfd == NULL) | |
1849 | { | |
1850 | bfd_set_error (bfd_error_no_memory); | |
1851 | goto error_return; | |
1852 | } | |
1853 | ||
1854 | section_tdata = ecoff_section_data (abfd, sec); | |
1855 | section_tdata->contents = NULL; | |
1856 | section_tdata->offsets = NULL; | |
1857 | ||
1858 | external_reloc_size = ecoff_backend (abfd)->external_reloc_size; | |
1859 | external_relocs_size = external_reloc_size * sec->reloc_count; | |
1860 | ||
1861 | section_tdata->external_relocs = | |
1862 | (PTR) bfd_alloc (abfd, external_relocs_size); | |
1863 | if (section_tdata->external_relocs == NULL && external_relocs_size != 0) | |
1864 | { | |
1865 | bfd_set_error (bfd_error_no_memory); | |
1866 | goto error_return; | |
1867 | } | |
1868 | ||
1869 | if (bfd_seek (abfd, sec->rel_filepos, SEEK_SET) != 0 | |
1870 | || (bfd_read (section_tdata->external_relocs, 1, | |
1871 | external_relocs_size, abfd) | |
1872 | != external_relocs_size)) | |
1873 | goto error_return; | |
1874 | ||
1875 | /* We must initialize _cooked_size only the first time we are | |
1876 | called. */ | |
1877 | sec->_cooked_size = sec->_raw_size; | |
1878 | } | |
1879 | ||
1880 | contents = section_tdata->contents; | |
1881 | offsets = section_tdata->offsets; | |
1882 | ||
1883 | /* Look for any external PC relative relocs. Internal PC relative | |
1884 | relocs are already correct in the object file, so they certainly | |
1885 | can not overflow. */ | |
1886 | ext_rel = (struct external_reloc *) section_tdata->external_relocs; | |
1887 | ext_rel_end = ext_rel + sec->reloc_count; | |
1888 | for (i = 0; ext_rel < ext_rel_end; ext_rel++, i++) | |
1889 | { | |
1890 | struct internal_reloc int_rel; | |
1891 | struct ecoff_link_hash_entry *h; | |
1892 | asection *hsec; | |
1893 | bfd_signed_vma relocation; | |
1894 | struct external_reloc *adj_ext_rel; | |
1895 | unsigned int adj_i; | |
1896 | unsigned long ext_count; | |
1897 | struct ecoff_link_hash_entry **adj_h_ptr; | |
1898 | struct ecoff_link_hash_entry **adj_h_ptr_end; | |
1899 | struct ecoff_value_adjust *adjust; | |
1900 | ||
1901 | /* If we have already expanded this reloc, we certainly don't | |
1902 | need to do it again. */ | |
1903 | if (offsets != (long *) NULL && offsets[i] == 1) | |
1904 | continue; | |
1905 | ||
1906 | /* Quickly check that this reloc is external PCREL16. */ | |
1907 | if (abfd->xvec->header_byteorder_big_p) | |
1908 | { | |
1909 | if ((ext_rel->r_bits[3] & RELOC_BITS3_EXTERN_BIG) == 0 | |
1910 | || (((ext_rel->r_bits[3] & RELOC_BITS3_TYPE_BIG) | |
1911 | >> RELOC_BITS3_TYPE_SH_BIG) | |
1912 | != MIPS_R_PCREL16)) | |
1913 | continue; | |
1914 | } | |
1915 | else | |
1916 | { | |
1917 | if ((ext_rel->r_bits[3] & RELOC_BITS3_EXTERN_LITTLE) == 0 | |
1918 | || (((ext_rel->r_bits[3] & RELOC_BITS3_TYPE_LITTLE) | |
1919 | >> RELOC_BITS3_TYPE_SH_LITTLE) | |
1920 | != MIPS_R_PCREL16)) | |
1921 | continue; | |
1922 | } | |
1923 | ||
1924 | mips_ecoff_swap_reloc_in (abfd, (PTR) ext_rel, &int_rel); | |
1925 | ||
1926 | h = ecoff_data (abfd)->sym_hashes[int_rel.r_symndx]; | |
1927 | if (h == (struct ecoff_link_hash_entry *) NULL) | |
1928 | abort (); | |
1929 | ||
1930 | if (h->root.type != bfd_link_hash_defined) | |
1931 | { | |
1932 | /* Just ignore undefined symbols. These will presumably | |
1933 | generate an error later in the link. */ | |
1934 | continue; | |
1935 | } | |
1936 | ||
1937 | /* Get the value of the symbol. */ | |
1938 | hsec = h->root.u.def.section; | |
1939 | relocation = (h->root.u.def.value | |
1940 | + hsec->output_section->vma | |
1941 | + hsec->output_offset); | |
1942 | ||
1943 | /* Subtract out the current address. */ | |
1944 | relocation -= (sec->output_section->vma | |
1945 | + sec->output_offset | |
1946 | + (int_rel.r_vaddr - sec->vma)); | |
1947 | ||
1948 | /* The addend is stored in the object file. In the normal case | |
1949 | of ``bal symbol'', the addend will be -4. It will only be | |
1950 | different in the case of ``bal symbol+constant''. To avoid | |
1951 | always reading in the section contents, we don't check the | |
1952 | addend in the object file (we could easily check the contents | |
1953 | if we happen to have already read them in, but I fear that | |
1954 | this could be confusing). This means we will screw up if | |
1955 | there is a branch to a symbol that is in range, but added to | |
1956 | a constant which puts it out of range; in such a case the | |
1957 | link will fail with a reloc overflow error. Since the | |
1958 | compiler will never generate such code, it should be easy | |
1959 | enough to work around it by changing the assembly code in the | |
1960 | source file. */ | |
1961 | relocation -= 4; | |
1962 | ||
1963 | /* Now RELOCATION is the number we want to put in the object | |
1964 | file. See whether it fits. */ | |
1965 | if (relocation >= -0x20000 && relocation < 0x20000) | |
1966 | continue; | |
1967 | ||
1968 | /* Now that we know this reloc needs work, which will rarely | |
1969 | happen, go ahead and grab the section contents. */ | |
1970 | if (contents == (bfd_byte *) NULL) | |
1971 | { | |
1972 | if (info->keep_memory) | |
1973 | contents = (bfd_byte *) bfd_alloc (abfd, sec->_raw_size); | |
1974 | else | |
1975 | contents = (bfd_byte *) malloc (sec->_raw_size); | |
1976 | if (contents == (bfd_byte *) NULL) | |
1977 | { | |
1978 | bfd_set_error (bfd_error_no_memory); | |
1979 | goto error_return; | |
1980 | } | |
1981 | if (! bfd_get_section_contents (abfd, sec, (PTR) contents, | |
1982 | (file_ptr) 0, sec->_raw_size)) | |
1983 | goto error_return; | |
1984 | if (info->keep_memory) | |
1985 | section_tdata->contents = contents; | |
1986 | } | |
1987 | ||
1988 | /* We only support changing the bal instruction. It would be | |
1989 | possible to handle other PC relative branches, but some of | |
1990 | them (the conditional branches) would require a different | |
1991 | length instruction sequence which would complicate both this | |
1992 | routine and mips_relax_pcrel16. It could be written if | |
1993 | somebody felt it were important. Ignoring this reloc will | |
1994 | presumably cause a reloc overflow error later on. */ | |
1995 | if (bfd_get_32 (abfd, contents + int_rel.r_vaddr - sec->vma) | |
1996 | != 0x0411ffff) /* bgezal $0,. == bal . */ | |
1997 | continue; | |
1998 | ||
1999 | /* Bother. We need to expand this reloc, and we will need to | |
2000 | make another relaxation pass since this change may put other | |
2001 | relocs out of range. We need to examine the local branches | |
2002 | and we need to allocate memory to hold the offsets we must | |
2003 | add to them. We also need to adjust the values of all | |
2004 | symbols in the object file following this location. */ | |
2005 | ||
2006 | sec->_cooked_size += PCREL16_EXPANSION_ADJUSTMENT; | |
2007 | *again = true; | |
2008 | ||
2009 | if (offsets == (long *) NULL) | |
2010 | { | |
2011 | size_t size; | |
2012 | ||
2013 | size = sec->reloc_count * sizeof (long); | |
2014 | offsets = (long *) bfd_alloc_by_size_t (abfd, size); | |
2015 | if (offsets == (long *) NULL) | |
2016 | { | |
2017 | bfd_set_error (bfd_error_no_memory); | |
2018 | goto error_return; | |
2019 | } | |
2020 | memset (offsets, 0, size); | |
2021 | section_tdata->offsets = offsets; | |
2022 | } | |
2023 | ||
2024 | offsets[i] = 1; | |
2025 | ||
4f996613 ILT |
2026 | /* Now look for all PC relative references that cross this reloc |
2027 | and adjust their offsets. */ | |
a3a33af3 ILT |
2028 | adj_ext_rel = (struct external_reloc *) section_tdata->external_relocs; |
2029 | for (adj_i = 0; adj_ext_rel < ext_rel_end; adj_ext_rel++, adj_i++) | |
2030 | { | |
2031 | struct internal_reloc adj_int_rel; | |
4f996613 ILT |
2032 | bfd_vma start, stop; |
2033 | int change; | |
a3a33af3 ILT |
2034 | |
2035 | mips_ecoff_swap_reloc_in (abfd, (PTR) adj_ext_rel, &adj_int_rel); | |
2036 | ||
4f996613 | 2037 | if (adj_int_rel.r_type == MIPS_R_PCREL16) |
dabf906e ILT |
2038 | { |
2039 | unsigned long insn; | |
4f996613 ILT |
2040 | |
2041 | /* We only care about local references. External ones | |
2042 | will be relocated correctly anyhow. */ | |
2043 | if (adj_int_rel.r_extern) | |
2044 | continue; | |
dabf906e ILT |
2045 | |
2046 | /* We are only interested in a PC relative reloc within | |
2047 | this section. FIXME: Cross section PC relative | |
2048 | relocs may not be handled correctly; does anybody | |
2049 | care? */ | |
2050 | if (adj_int_rel.r_symndx != RELOC_SECTION_TEXT) | |
2051 | continue; | |
a3a33af3 | 2052 | |
4f996613 ILT |
2053 | start = adj_int_rel.r_vaddr; |
2054 | ||
dabf906e ILT |
2055 | insn = bfd_get_32 (abfd, |
2056 | contents + adj_int_rel.r_vaddr - sec->vma); | |
2057 | ||
4f996613 ILT |
2058 | stop = (insn & 0xffff) << 2; |
2059 | if ((stop & 0x20000) != 0) | |
2060 | stop -= 0x40000; | |
2061 | stop += adj_int_rel.r_vaddr + 4; | |
dabf906e | 2062 | } |
4f996613 ILT |
2063 | else if (adj_int_rel.r_type == MIPS_R_RELHI) |
2064 | { | |
2065 | struct internal_reloc rello; | |
2066 | long addhi, addlo; | |
2067 | ||
2068 | /* The next reloc must be MIPS_R_RELLO, and we handle | |
2069 | them together. */ | |
2070 | BFD_ASSERT (adj_ext_rel + 1 < ext_rel_end); | |
2071 | ||
2072 | mips_ecoff_swap_reloc_in (abfd, (PTR) (adj_ext_rel + 1), &rello); | |
2073 | ||
2074 | BFD_ASSERT (rello.r_type == MIPS_R_RELLO); | |
2075 | ||
2076 | addhi = bfd_get_32 (abfd, | |
2077 | contents + adj_int_rel.r_vaddr - sec->vma); | |
2078 | addhi &= 0xffff; | |
2079 | if (addhi & 0x8000) | |
2080 | addhi -= 0x10000; | |
2081 | addhi <<= 16; | |
2082 | ||
2083 | addlo = bfd_get_32 (abfd, contents + rello.r_vaddr - sec->vma); | |
2084 | addlo &= 0xffff; | |
2085 | if (addlo & 0x8000) | |
2086 | addlo -= 0x10000; | |
2087 | ||
2088 | if (adj_int_rel.r_extern) | |
2089 | { | |
2090 | /* The value we want here is | |
2091 | sym - RELLOaddr + addend | |
2092 | which we can express as | |
2093 | sym - (RELLOaddr - addend) | |
2094 | Therefore if we are expanding the area between | |
2095 | RELLOaddr and RELLOaddr - addend we must adjust | |
2096 | the addend. This is admittedly ambiguous, since | |
2097 | we might mean (sym + addend) - RELLOaddr, but in | |
2098 | practice we don't, and there is no way to handle | |
2099 | that case correctly since at this point we have | |
2100 | no idea whether any reloc is being expanded | |
2101 | between sym and sym + addend. */ | |
2102 | start = rello.r_vaddr - (addhi + addlo); | |
2103 | stop = rello.r_vaddr; | |
2104 | } | |
2105 | else | |
2106 | { | |
2107 | /* An internal RELHI/RELLO pair represents the | |
2108 | difference between two addresses, $LC0 - foo. | |
2109 | The symndx value is actually the difference | |
2110 | between the reloc address and $LC0. This lets us | |
2111 | compute $LC0, and, by considering the addend, | |
2112 | foo. If the reloc we are expanding falls between | |
2113 | those two relocs, we must adjust the addend. At | |
2114 | this point, the symndx value is actually in the | |
2115 | r_offset field, where it was put by | |
2116 | mips_ecoff_swap_reloc_in. */ | |
2117 | start = rello.r_vaddr - adj_int_rel.r_offset; | |
2118 | stop = start + addhi + addlo; | |
2119 | } | |
2120 | } | |
2121 | else if (adj_int_rel.r_type == MIPS_R_SWITCH) | |
dabf906e | 2122 | { |
dabf906e ILT |
2123 | /* A MIPS_R_SWITCH reloc represents a word of the form |
2124 | .word $L3-$LS12 | |
2125 | The value in the object file is correct, assuming the | |
2126 | original value of $L3. The symndx value is actually | |
2127 | the difference between the reloc address and $LS12. | |
2128 | This lets us compute the original value of $LS12 as | |
2129 | vaddr - symndx | |
2130 | and the original value of $L3 as | |
2131 | vaddr - symndx + addend | |
2132 | where addend is the value from the object file. At | |
2133 | this point, the symndx value is actually found in the | |
2134 | r_offset field, since it was moved by | |
2135 | mips_ecoff_swap_reloc_in. */ | |
dabf906e ILT |
2136 | start = adj_int_rel.r_vaddr - adj_int_rel.r_offset; |
2137 | stop = start + bfd_get_32 (abfd, | |
2138 | (contents | |
2139 | + adj_int_rel.r_vaddr | |
2140 | - sec->vma)); | |
4f996613 ILT |
2141 | } |
2142 | else | |
2143 | continue; | |
2144 | ||
2145 | /* If the range expressed by this reloc, which is the | |
2146 | distance between START and STOP crosses the reloc we are | |
2147 | expanding, we must adjust the offset. The sign of the | |
2148 | adjustment depends upon the direction in which the range | |
2149 | crosses the reloc being expanded. */ | |
2150 | if (start <= int_rel.r_vaddr && stop > int_rel.r_vaddr) | |
2151 | change = PCREL16_EXPANSION_ADJUSTMENT; | |
2152 | else if (start > int_rel.r_vaddr && stop <= int_rel.r_vaddr) | |
2153 | change = - PCREL16_EXPANSION_ADJUSTMENT; | |
2154 | else | |
2155 | change = 0; | |
dabf906e | 2156 | |
4f996613 ILT |
2157 | offsets[adj_i] += change; |
2158 | ||
2159 | if (adj_int_rel.r_type == MIPS_R_RELHI) | |
2160 | { | |
2161 | adj_ext_rel++; | |
2162 | adj_i++; | |
2163 | offsets[adj_i] += change; | |
dabf906e | 2164 | } |
a3a33af3 ILT |
2165 | } |
2166 | ||
2167 | /* Find all symbols in this section defined by this object file | |
2168 | and adjust their values. Note that we decide whether to | |
2169 | adjust the value based on the value stored in the ECOFF EXTR | |
2170 | structure, because the value stored in the hash table may | |
2171 | have been changed by an earlier expanded reloc and thus may | |
2172 | no longer correctly indicate whether the symbol is before or | |
2173 | after the expanded reloc. */ | |
2174 | ext_count = ecoff_data (abfd)->debug_info.symbolic_header.iextMax; | |
2175 | adj_h_ptr = ecoff_data (abfd)->sym_hashes; | |
2176 | adj_h_ptr_end = adj_h_ptr + ext_count; | |
2177 | for (; adj_h_ptr < adj_h_ptr_end; adj_h_ptr++) | |
2178 | { | |
2179 | struct ecoff_link_hash_entry *adj_h; | |
2180 | ||
2181 | adj_h = *adj_h_ptr; | |
2182 | if (adj_h != (struct ecoff_link_hash_entry *) NULL | |
2183 | && adj_h->root.type == bfd_link_hash_defined | |
2184 | && adj_h->root.u.def.section == sec | |
2185 | && adj_h->esym.asym.value > int_rel.r_vaddr) | |
2186 | adj_h->root.u.def.value += PCREL16_EXPANSION_ADJUSTMENT; | |
2187 | } | |
2188 | ||
2189 | /* Add an entry to the symbol value adjust list. This is used | |
2190 | by bfd_ecoff_debug_accumulate to adjust the values of | |
2191 | internal symbols and FDR's. */ | |
2192 | adjust = ((struct ecoff_value_adjust *) | |
2193 | bfd_alloc (abfd, sizeof (struct ecoff_value_adjust))); | |
2194 | if (adjust == (struct ecoff_value_adjust *) NULL) | |
2195 | { | |
2196 | bfd_set_error (bfd_error_no_memory); | |
2197 | goto error_return; | |
2198 | } | |
2199 | ||
2200 | adjust->start = int_rel.r_vaddr; | |
2201 | adjust->end = sec->vma + sec->_raw_size; | |
2202 | adjust->adjust = PCREL16_EXPANSION_ADJUSTMENT; | |
2203 | ||
2204 | adjust->next = ecoff_data (abfd)->debug_info.adjust; | |
2205 | ecoff_data (abfd)->debug_info.adjust = adjust; | |
2206 | } | |
2207 | ||
2208 | if (contents != (bfd_byte *) NULL && ! info->keep_memory) | |
2209 | free (contents); | |
2210 | ||
2211 | return true; | |
2212 | ||
2213 | error_return: | |
2214 | if (contents != (bfd_byte *) NULL && ! info->keep_memory) | |
2215 | free (contents); | |
2216 | return false; | |
2217 | } | |
2218 | ||
2219 | /* This routine is called from mips_relocate_section when a PC | |
2220 | relative reloc must be expanded into the five instruction sequence. | |
2221 | It handles all the details of the expansion, including resolving | |
2222 | the reloc. */ | |
2223 | ||
2224 | static boolean | |
2225 | mips_relax_pcrel16 (info, input_bfd, input_section, h, location, address) | |
2226 | struct bfd_link_info *info; | |
2227 | bfd *input_bfd; | |
2228 | asection *input_section; | |
2229 | struct ecoff_link_hash_entry *h; | |
2230 | bfd_byte *location; | |
2231 | bfd_vma address; | |
2232 | { | |
2233 | bfd_vma relocation; | |
2234 | ||
2235 | /* 0x0411ffff is bgezal $0,. == bal . */ | |
2236 | BFD_ASSERT (bfd_get_32 (input_bfd, location) == 0x0411ffff); | |
2237 | ||
2238 | /* We need to compute the distance between the symbol and the | |
2239 | current address plus eight. */ | |
2240 | relocation = (h->root.u.def.value | |
2241 | + h->root.u.def.section->output_section->vma | |
2242 | + h->root.u.def.section->output_offset); | |
2243 | relocation -= address + 8; | |
2244 | ||
2245 | /* If the lower half is negative, increment the upper 16 half. */ | |
2246 | if ((relocation & 0x8000) != 0) | |
2247 | relocation += 0x10000; | |
2248 | ||
2249 | bfd_put_32 (input_bfd, 0x04110001, location); /* bal .+8 */ | |
2250 | bfd_put_32 (input_bfd, | |
2251 | 0x3c010000 | ((relocation >> 16) & 0xffff), /* lui $at,XX */ | |
2252 | location + 4); | |
2253 | bfd_put_32 (input_bfd, | |
2254 | 0x24210000 | (relocation & 0xffff), /* addiu $at,$at,XX */ | |
2255 | location + 8); | |
2256 | bfd_put_32 (input_bfd, 0x003f0821, location + 12); /* addu $at,$at,$ra */ | |
2257 | bfd_put_32 (input_bfd, 0x0020f809, location + 16); /* jalr $at */ | |
2258 | ||
2259 | return true; | |
2260 | } | |
2261 | \f | |
23f44e6f ILT |
2262 | /* This is the ECOFF backend structure. The backend field of the |
2263 | target vector points to this. */ | |
2264 | ||
2265 | static const struct ecoff_backend_data mips_ecoff_backend_data = | |
2266 | { | |
2267 | /* COFF backend structure. */ | |
2268 | { | |
9783e04a | 2269 | (void (*) PARAMS ((bfd *,PTR,int,int,int,int,PTR))) bfd_void, /* aux_in */ |
23f44e6f ILT |
2270 | (void (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* sym_in */ |
2271 | (void (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* lineno_in */ | |
9783e04a | 2272 | (unsigned (*) PARAMS ((bfd *,PTR,int,int,int,int,PTR)))bfd_void,/*aux_out*/ |
23f44e6f ILT |
2273 | (unsigned (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* sym_out */ |
2274 | (unsigned (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* lineno_out */ | |
2275 | (unsigned (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* reloc_out */ | |
2276 | mips_ecoff_swap_filehdr_out, mips_ecoff_swap_aouthdr_out, | |
2277 | mips_ecoff_swap_scnhdr_out, | |
2278 | FILHSZ, AOUTSZ, SCNHSZ, 0, 0, 0, true, | |
2279 | mips_ecoff_swap_filehdr_in, mips_ecoff_swap_aouthdr_in, | |
2280 | mips_ecoff_swap_scnhdr_in, mips_ecoff_bad_format_hook, | |
75f3ef7a ILT |
2281 | _bfd_ecoff_set_arch_mach_hook, _bfd_ecoff_mkobject_hook, |
2282 | _bfd_ecoff_styp_to_sec_flags, _bfd_ecoff_make_section_hook, | |
2283 | _bfd_ecoff_set_alignment_hook, _bfd_ecoff_slurp_symbol_table, | |
2284 | NULL, NULL | |
23f44e6f ILT |
2285 | }, |
2286 | /* Supported architecture. */ | |
2287 | bfd_arch_mips, | |
23f44e6f ILT |
2288 | /* Initial portion of armap string. */ |
2289 | "__________", | |
23f44e6f ILT |
2290 | /* The page boundary used to align sections in a demand-paged |
2291 | executable file. E.g., 0x1000. */ | |
2292 | 0x1000, | |
5fa2aaa2 ILT |
2293 | /* True if the .rdata section is part of the text segment, as on the |
2294 | Alpha. False if .rdata is part of the data segment, as on the | |
2295 | MIPS. */ | |
2296 | false, | |
23f44e6f ILT |
2297 | /* Bitsize of constructor entries. */ |
2298 | 32, | |
2299 | /* Reloc to use for constructor entries. */ | |
2300 | &mips_howto_table[MIPS_R_REFWORD], | |
4991ebb9 ILT |
2301 | { |
2302 | /* Symbol table magic number. */ | |
2303 | magicSym, | |
2304 | /* Alignment of debugging information. E.g., 4. */ | |
2305 | 4, | |
2306 | /* Sizes of external symbolic information. */ | |
2307 | sizeof (struct hdr_ext), | |
2308 | sizeof (struct dnr_ext), | |
2309 | sizeof (struct pdr_ext), | |
2310 | sizeof (struct sym_ext), | |
2311 | sizeof (struct opt_ext), | |
2312 | sizeof (struct fdr_ext), | |
2313 | sizeof (struct rfd_ext), | |
2314 | sizeof (struct ext_ext), | |
2315 | /* Functions to swap in external symbolic data. */ | |
2316 | ecoff_swap_hdr_in, | |
2317 | ecoff_swap_dnr_in, | |
2318 | ecoff_swap_pdr_in, | |
2319 | ecoff_swap_sym_in, | |
2320 | ecoff_swap_opt_in, | |
2321 | ecoff_swap_fdr_in, | |
2322 | ecoff_swap_rfd_in, | |
2323 | ecoff_swap_ext_in, | |
75f3ef7a ILT |
2324 | _bfd_ecoff_swap_tir_in, |
2325 | _bfd_ecoff_swap_rndx_in, | |
4991ebb9 ILT |
2326 | /* Functions to swap out external symbolic data. */ |
2327 | ecoff_swap_hdr_out, | |
2328 | ecoff_swap_dnr_out, | |
2329 | ecoff_swap_pdr_out, | |
2330 | ecoff_swap_sym_out, | |
2331 | ecoff_swap_opt_out, | |
2332 | ecoff_swap_fdr_out, | |
2333 | ecoff_swap_rfd_out, | |
aac6b32f | 2334 | ecoff_swap_ext_out, |
75f3ef7a ILT |
2335 | _bfd_ecoff_swap_tir_out, |
2336 | _bfd_ecoff_swap_rndx_out, | |
aac6b32f | 2337 | /* Function to read in symbolic data. */ |
75f3ef7a | 2338 | _bfd_ecoff_slurp_symbolic_info |
4991ebb9 | 2339 | }, |
23f44e6f ILT |
2340 | /* External reloc size. */ |
2341 | RELSZ, | |
2342 | /* Reloc swapping functions. */ | |
2343 | mips_ecoff_swap_reloc_in, | |
2344 | mips_ecoff_swap_reloc_out, | |
2345 | /* Backend reloc tweaking. */ | |
5fa2aaa2 | 2346 | mips_adjust_reloc_in, |
4991ebb9 ILT |
2347 | mips_adjust_reloc_out, |
2348 | /* Relocate section contents while linking. */ | |
2349 | mips_relocate_section | |
515c4292 ILT |
2350 | }; |
2351 | ||
23f44e6f | 2352 | /* Looking up a reloc type is MIPS specific. */ |
75f3ef7a | 2353 | #define _bfd_ecoff_bfd_reloc_type_lookup mips_bfd_reloc_type_lookup |
23f44e6f | 2354 | |
5fa2aaa2 | 2355 | /* Getting relocated section contents is generic. */ |
75f3ef7a | 2356 | #define _bfd_ecoff_bfd_get_relocated_section_contents \ |
5fa2aaa2 ILT |
2357 | bfd_generic_get_relocated_section_contents |
2358 | ||
a3a33af3 | 2359 | /* Relaxing sections is MIPS specific. */ |
75f3ef7a | 2360 | #define _bfd_ecoff_bfd_relax_section mips_relax_section |
a3a33af3 | 2361 | |
2f3508ad | 2362 | const bfd_target ecoff_little_vec = |
294eaca4 SC |
2363 | { |
2364 | "ecoff-littlemips", /* name */ | |
515c4292 | 2365 | bfd_target_ecoff_flavour, |
294eaca4 SC |
2366 | false, /* data byte order is little */ |
2367 | false, /* header byte order is little */ | |
2368 | ||
2369 | (HAS_RELOC | EXEC_P | /* object flags */ | |
2370 | HAS_LINENO | HAS_DEBUG | | |
4991ebb9 | 2371 | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED), |
294eaca4 SC |
2372 | |
2373 | (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* sect | |
2374 | flags */ | |
2375 | 0, /* leading underscore */ | |
de17306e | 2376 | ' ', /* ar_pad_char */ |
294eaca4 | 2377 | 15, /* ar_max_namelen */ |
de17306e | 2378 | 4, /* minimum alignment power */ |
23f44e6f ILT |
2379 | bfd_getl64, bfd_getl_signed_64, bfd_putl64, |
2380 | bfd_getl32, bfd_getl_signed_32, bfd_putl32, | |
2381 | bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ | |
2382 | bfd_getl64, bfd_getl_signed_64, bfd_putl64, | |
2383 | bfd_getl32, bfd_getl_signed_32, bfd_putl32, | |
2384 | bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */ | |
294eaca4 | 2385 | |
515c4292 | 2386 | {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ |
75f3ef7a ILT |
2387 | _bfd_ecoff_archive_p, _bfd_dummy_target}, |
2388 | {bfd_false, _bfd_ecoff_mkobject, /* bfd_set_format */ | |
dae31cf5 | 2389 | _bfd_generic_mkarchive, bfd_false}, |
75f3ef7a | 2390 | {bfd_false, _bfd_ecoff_write_object_contents, /* bfd_write_contents */ |
c3fe0c41 | 2391 | _bfd_write_archive_contents, bfd_false}, |
6812b607 | 2392 | |
75f3ef7a ILT |
2393 | BFD_JUMP_TABLE_GENERIC (_bfd_ecoff), |
2394 | BFD_JUMP_TABLE_COPY (_bfd_ecoff), | |
6812b607 | 2395 | BFD_JUMP_TABLE_CORE (_bfd_nocore), |
75f3ef7a ILT |
2396 | BFD_JUMP_TABLE_ARCHIVE (_bfd_ecoff), |
2397 | BFD_JUMP_TABLE_SYMBOLS (_bfd_ecoff), | |
2398 | BFD_JUMP_TABLE_RELOCS (_bfd_ecoff), | |
2399 | BFD_JUMP_TABLE_WRITE (_bfd_ecoff), | |
2400 | BFD_JUMP_TABLE_LINK (_bfd_ecoff), | |
dfc1c006 | 2401 | BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), |
6812b607 | 2402 | |
23f44e6f | 2403 | (PTR) &mips_ecoff_backend_data |
515c4292 | 2404 | }; |
1327fb29 | 2405 | |
2f3508ad | 2406 | const bfd_target ecoff_big_vec = |
294eaca4 SC |
2407 | { |
2408 | "ecoff-bigmips", /* name */ | |
515c4292 | 2409 | bfd_target_ecoff_flavour, |
294eaca4 SC |
2410 | true, /* data byte order is big */ |
2411 | true, /* header byte order is big */ | |
2412 | ||
2413 | (HAS_RELOC | EXEC_P | /* object flags */ | |
2414 | HAS_LINENO | HAS_DEBUG | | |
4991ebb9 | 2415 | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED), |
294eaca4 SC |
2416 | |
2417 | (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* sect flags */ | |
2418 | 0, /* leading underscore */ | |
2419 | ' ', /* ar_pad_char */ | |
de17306e ILT |
2420 | 15, /* ar_max_namelen */ |
2421 | 4, /* minimum alignment power */ | |
23f44e6f ILT |
2422 | bfd_getb64, bfd_getb_signed_64, bfd_putb64, |
2423 | bfd_getb32, bfd_getb_signed_32, bfd_putb32, | |
2424 | bfd_getb16, bfd_getb_signed_16, bfd_putb16, | |
2425 | bfd_getb64, bfd_getb_signed_64, bfd_putb64, | |
2426 | bfd_getb32, bfd_getb_signed_32, bfd_putb32, | |
2427 | bfd_getb16, bfd_getb_signed_16, bfd_putb16, | |
294eaca4 | 2428 | {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ |
75f3ef7a ILT |
2429 | _bfd_ecoff_archive_p, _bfd_dummy_target}, |
2430 | {bfd_false, _bfd_ecoff_mkobject, /* bfd_set_format */ | |
dae31cf5 | 2431 | _bfd_generic_mkarchive, bfd_false}, |
75f3ef7a | 2432 | {bfd_false, _bfd_ecoff_write_object_contents, /* bfd_write_contents */ |
c3fe0c41 | 2433 | _bfd_write_archive_contents, bfd_false}, |
6812b607 | 2434 | |
75f3ef7a ILT |
2435 | BFD_JUMP_TABLE_GENERIC (_bfd_ecoff), |
2436 | BFD_JUMP_TABLE_COPY (_bfd_ecoff), | |
6812b607 | 2437 | BFD_JUMP_TABLE_CORE (_bfd_nocore), |
75f3ef7a ILT |
2438 | BFD_JUMP_TABLE_ARCHIVE (_bfd_ecoff), |
2439 | BFD_JUMP_TABLE_SYMBOLS (_bfd_ecoff), | |
2440 | BFD_JUMP_TABLE_RELOCS (_bfd_ecoff), | |
2441 | BFD_JUMP_TABLE_WRITE (_bfd_ecoff), | |
2442 | BFD_JUMP_TABLE_LINK (_bfd_ecoff), | |
dfc1c006 | 2443 | BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), |
6812b607 | 2444 | |
23f44e6f | 2445 | (PTR) &mips_ecoff_backend_data |
515c4292 | 2446 | }; |