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add dummy frame destructor
[binutils.git] / bfd / elf32-rx.c
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c7927a3c 1/* Renesas RX specific support for 32-bit ELF.
4b95cf5c 2 Copyright (C) 2008-2014 Free Software Foundation, Inc.
c7927a3c
NC		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "sysdep.h"
21#include "bfd.h"
d68cd58c 22#include "bfd_stdint.h"
c7927a3c
NC		 23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rx.h"
26#include "libiberty.h"
7a2f2d82 27#include "elf32-rx.h"
c7927a3c
NC		 28
29#define RX_OPCODE_BIG_ENDIAN 0
30
4c422395
DD		 31/* This is a meta-target that's used only with objcopy, to avoid the
32 endian-swap we would otherwise get. We check for this in
33 rx_elf_object_p(). */
6d00b590
AM		 34const bfd_target rx_elf32_be_ns_vec;
35const bfd_target rx_elf32_be_vec;
4c422395 36
c7927a3c
NC		 37#ifdef DEBUG
38char * rx_get_reloc (long);
9ccb8af9 39void rx_dump_symtab (bfd *, void *, void *);
c7927a3c
NC		 40#endif
41
42#define RXREL(n,sz,bit,shift,complain,pcrel) \
43 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
44 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
45
46/* Note that the relocations around 0x7f are internal to this file;
47 feel free to move them as needed to avoid conflicts with published
48 relocation numbers. */
49
50static reloc_howto_type rx_elf_howto_table [] =
51{
52 RXREL (NONE, 0, 0, 0, dont, FALSE),
53 RXREL (DIR32, 2, 32, 0, signed, FALSE),
54 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
55 RXREL (DIR16, 1, 16, 0, dont, FALSE),
56 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
57 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
58 RXREL (DIR8, 0, 8, 0, dont, FALSE),
59 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
60 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
61 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
62 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
63 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
64 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
65 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
66 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
67 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
68 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
69 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
70 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
71
72 EMPTY_HOWTO (0x13),
73 EMPTY_HOWTO (0x14),
74 EMPTY_HOWTO (0x15),
75 EMPTY_HOWTO (0x16),
76 EMPTY_HOWTO (0x17),
77 EMPTY_HOWTO (0x18),
78 EMPTY_HOWTO (0x19),
79 EMPTY_HOWTO (0x1a),
80 EMPTY_HOWTO (0x1b),
81 EMPTY_HOWTO (0x1c),
82 EMPTY_HOWTO (0x1d),
83 EMPTY_HOWTO (0x1e),
84 EMPTY_HOWTO (0x1f),
85
86 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
87 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
88 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
89 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
90 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
91 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
92 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
93 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
94 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
95 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
96 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
97 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
98 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
99 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
100
101 EMPTY_HOWTO (0x2e),
102 EMPTY_HOWTO (0x2f),
103 EMPTY_HOWTO (0x30),
104 EMPTY_HOWTO (0x31),
105 EMPTY_HOWTO (0x32),
106 EMPTY_HOWTO (0x33),
107 EMPTY_HOWTO (0x34),
108 EMPTY_HOWTO (0x35),
109 EMPTY_HOWTO (0x36),
110 EMPTY_HOWTO (0x37),
111 EMPTY_HOWTO (0x38),
112 EMPTY_HOWTO (0x39),
113 EMPTY_HOWTO (0x3a),
114 EMPTY_HOWTO (0x3b),
115 EMPTY_HOWTO (0x3c),
116 EMPTY_HOWTO (0x3d),
117 EMPTY_HOWTO (0x3e),
118 EMPTY_HOWTO (0x3f),
119 EMPTY_HOWTO (0x40),
120
121 RXREL (ABS32, 2, 32, 0, dont, FALSE),
122 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
123 RXREL (ABS16, 1, 16, 0, dont, FALSE),
124 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
125 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
126 RXREL (ABS8, 0, 8, 0, dont, FALSE),
127 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
128 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
129 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
130 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
131 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
132 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
133 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
134 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
135 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
136 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
137 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
138
139#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
140
141 EMPTY_HOWTO (0x52),
142 EMPTY_HOWTO (0x53),
143 EMPTY_HOWTO (0x54),
144 EMPTY_HOWTO (0x55),
145 EMPTY_HOWTO (0x56),
146 EMPTY_HOWTO (0x57),
147 EMPTY_HOWTO (0x58),
148 EMPTY_HOWTO (0x59),
149 EMPTY_HOWTO (0x5a),
150 EMPTY_HOWTO (0x5b),
151 EMPTY_HOWTO (0x5c),
152 EMPTY_HOWTO (0x5d),
153 EMPTY_HOWTO (0x5e),
154 EMPTY_HOWTO (0x5f),
155 EMPTY_HOWTO (0x60),
156 EMPTY_HOWTO (0x61),
157 EMPTY_HOWTO (0x62),
158 EMPTY_HOWTO (0x63),
159 EMPTY_HOWTO (0x64),
160 EMPTY_HOWTO (0x65),
161 EMPTY_HOWTO (0x66),
162 EMPTY_HOWTO (0x67),
163 EMPTY_HOWTO (0x68),
164 EMPTY_HOWTO (0x69),
165 EMPTY_HOWTO (0x6a),
166 EMPTY_HOWTO (0x6b),
167 EMPTY_HOWTO (0x6c),
168 EMPTY_HOWTO (0x6d),
169 EMPTY_HOWTO (0x6e),
170 EMPTY_HOWTO (0x6f),
171 EMPTY_HOWTO (0x70),
172 EMPTY_HOWTO (0x71),
173 EMPTY_HOWTO (0x72),
174 EMPTY_HOWTO (0x73),
175 EMPTY_HOWTO (0x74),
176 EMPTY_HOWTO (0x75),
177 EMPTY_HOWTO (0x76),
178 EMPTY_HOWTO (0x77),
179
180 /* These are internal. */
181 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
182 /* ---- ---- 4--- 3210. */
183#define R_RX_RH_ABS5p8B 0x78
184 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
185#define R_RX_RH_ABS5p8W 0x79
186 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
187#define R_RX_RH_ABS5p8L 0x7a
188 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
189 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
190 /* ---- -432 1--- 0---. */
191#define R_RX_RH_ABS5p5B 0x7b
192 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
193#define R_RX_RH_ABS5p5W 0x7c
194 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
195#define R_RX_RH_ABS5p5L 0x7d
196 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
197 /* A 4-bit unsigned immediate at bit position 8. */
198#define R_RX_RH_UIMM4p8 0x7e
199 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
200 /* A 4-bit negative unsigned immediate at bit position 8. */
201#define R_RX_RH_UNEG4p8 0x7f
202 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
203 /* End of internal relocs. */
204
205 RXREL (SYM, 2, 32, 0, dont, FALSE),
206 RXREL (OPneg, 2, 32, 0, dont, FALSE),
207 RXREL (OPadd, 2, 32, 0, dont, FALSE),
208 RXREL (OPsub, 2, 32, 0, dont, FALSE),
209 RXREL (OPmul, 2, 32, 0, dont, FALSE),
210 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
211 RXREL (OPshla, 2, 32, 0, dont, FALSE),
212 RXREL (OPshra, 2, 32, 0, dont, FALSE),
213 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
214 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
215 RXREL (OPand, 2, 32, 0, dont, FALSE),
216 RXREL (OPor, 2, 32, 0, dont, FALSE),
217 RXREL (OPxor, 2, 32, 0, dont, FALSE),
218 RXREL (OPnot, 2, 32, 0, dont, FALSE),
219 RXREL (OPmod, 2, 32, 0, dont, FALSE),
220 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
221 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
222};
223\f
224/* Map BFD reloc types to RX ELF reloc types. */
225
226struct rx_reloc_map
227{
228 bfd_reloc_code_real_type bfd_reloc_val;
229 unsigned int rx_reloc_val;
230};
231
232static const struct rx_reloc_map rx_reloc_map [] =
233{
234 { BFD_RELOC_NONE, R_RX_NONE },
235 { BFD_RELOC_8, R_RX_DIR8S },
236 { BFD_RELOC_16, R_RX_DIR16S },
237 { BFD_RELOC_24, R_RX_DIR24S },
238 { BFD_RELOC_32, R_RX_DIR32 },
239 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
240 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
241 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
242 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
243 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
244 { BFD_RELOC_RX_8U, R_RX_DIR8U },
245 { BFD_RELOC_RX_16U, R_RX_DIR16U },
246 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
247 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
248 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
249 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
250 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
251 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
252 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
253 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
254 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
255 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
256 { BFD_RELOC_RX_SYM, R_RX_SYM },
257 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
9689e3a3 258 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
c7927a3c
NC		 259 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
260 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
e8ef21bf 261 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
c7927a3c 262 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
e8ef21bf 263 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
c7927a3c
NC		 264 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
265 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
266 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
267};
268
269#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
270
271static reloc_howto_type *
272rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
273 bfd_reloc_code_real_type code)
274{
275 unsigned int i;
276
277 if (code == BFD_RELOC_RX_32_OP)
278 return rx_elf_howto_table + R_RX_DIR32;
279
280 for (i = ARRAY_SIZE (rx_reloc_map); --i;)
281 if (rx_reloc_map [i].bfd_reloc_val == code)
282 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
283
284 return NULL;
285}
286
287static reloc_howto_type *
288rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
289{
290 unsigned int i;
291
292 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
293 if (rx_elf_howto_table[i].name != NULL
294 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
295 return rx_elf_howto_table + i;
296
297 return NULL;
298}
299
300/* Set the howto pointer for an RX ELF reloc. */
301
302static void
303rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
304 arelent * cache_ptr,
305 Elf_Internal_Rela * dst)
306{
307 unsigned int r_type;
308
309 r_type = ELF32_R_TYPE (dst->r_info);
310 BFD_ASSERT (r_type < (unsigned int) R_RX_max);
311 cache_ptr->howto = rx_elf_howto_table + r_type;
312}
313\f
314static bfd_vma
315get_symbol_value (const char * name,
91d6fa6a 316 bfd_reloc_status_type * status,
c7927a3c
NC		 317 struct bfd_link_info * info,
318 bfd * input_bfd,
319 asection * input_section,
320 int offset)
321{
322 bfd_vma value = 0;
323 struct bfd_link_hash_entry * h;
324
325 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
326
327 if (h == NULL
328 || (h->type != bfd_link_hash_defined
329 && h->type != bfd_link_hash_defweak))
91d6fa6a 330 * status = info->callbacks->undefined_symbol
c7927a3c
NC		 331 (info, name, input_bfd, input_section, offset, TRUE);
332 else
333 value = (h->u.def.value
334 + h->u.def.section->output_section->vma
335 + h->u.def.section->output_offset);
336
337 return value;
338}
7a2f2d82
DD		 339static bfd_vma
340get_symbol_value_maybe (const char * name,
341 struct bfd_link_info * info)
342{
343 bfd_vma value = 0;
344 struct bfd_link_hash_entry * h;
345
346 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
347
348 if (h == NULL
349 || (h->type != bfd_link_hash_defined
350 && h->type != bfd_link_hash_defweak))
351 return 0;
352 else
353 value = (h->u.def.value
354 + h->u.def.section->output_section->vma
355 + h->u.def.section->output_offset);
356
357 return value;
358}
c7927a3c
NC		 359
360static bfd_vma
91d6fa6a 361get_gp (bfd_reloc_status_type * status,
c7927a3c
NC		 362 struct bfd_link_info * info,
363 bfd * abfd,
364 asection * sec,
365 int offset)
366{
367 static bfd_boolean cached = FALSE;
368 static bfd_vma cached_value = 0;
369
370 if (!cached)
371 {
91d6fa6a 372 cached_value = get_symbol_value ("__gp", status, info, abfd, sec, offset);
c7927a3c
NC		 373 cached = TRUE;
374 }
375 return cached_value;
376}
377
378static bfd_vma
91d6fa6a 379get_romstart (bfd_reloc_status_type * status,
c7927a3c
NC		 380 struct bfd_link_info * info,
381 bfd * abfd,
382 asection * sec,
383 int offset)
384{
385 static bfd_boolean cached = FALSE;
386 static bfd_vma cached_value = 0;
387
388 if (!cached)
389 {
91d6fa6a 390 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
c7927a3c
NC		 391 cached = TRUE;
392 }
393 return cached_value;
394}
395
396static bfd_vma
91d6fa6a 397get_ramstart (bfd_reloc_status_type * status,
c7927a3c
NC		 398 struct bfd_link_info * info,
399 bfd * abfd,
400 asection * sec,
401 int offset)
402{
403 static bfd_boolean cached = FALSE;
404 static bfd_vma cached_value = 0;
405
406 if (!cached)
407 {
91d6fa6a 408 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
c7927a3c
NC		 409 cached = TRUE;
410 }
411 return cached_value;
412}
413
414#define NUM_STACK_ENTRIES 16
415static int32_t rx_stack [ NUM_STACK_ENTRIES ];
416static unsigned int rx_stack_top;
417
418#define RX_STACK_PUSH(val) \
419 do \
420 { \
421 if (rx_stack_top < NUM_STACK_ENTRIES) \
422 rx_stack [rx_stack_top ++] = (val); \
423 else \
424 r = bfd_reloc_dangerous; \
425 } \
426 while (0)
427
428#define RX_STACK_POP(dest) \
429 do \
430 { \
431 if (rx_stack_top > 0) \
432 (dest) = rx_stack [-- rx_stack_top]; \
433 else \
434 (dest) = 0, r = bfd_reloc_dangerous; \
435 } \
436 while (0)
437
438/* Relocate an RX ELF section.
439 There is some attempt to make this function usable for many architectures,
440 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
441 if only to serve as a learning tool.
442
443 The RELOCATE_SECTION function is called by the new ELF backend linker
444 to handle the relocations for a section.
445
446 The relocs are always passed as Rela structures; if the section
447 actually uses Rel structures, the r_addend field will always be
448 zero.
449
450 This function is responsible for adjusting the section contents as
451 necessary, and (if using Rela relocs and generating a relocatable
452 output file) adjusting the reloc addend as necessary.
453
454 This function does not have to worry about setting the reloc
455 address or the reloc symbol index.
456
457 LOCAL_SYMS is a pointer to the swapped in local symbols.
458
459 LOCAL_SECTIONS is an array giving the section in the input file
460 corresponding to the st_shndx field of each local symbol.
461
462 The global hash table entry for the global symbols can be found
463 via elf_sym_hashes (input_bfd).
464
465 When generating relocatable output, this function must handle
466 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
467 going to be the section symbol corresponding to the output
468 section, which means that the addend must be adjusted
469 accordingly. */
470
471static bfd_boolean
472rx_elf_relocate_section
473 (bfd * output_bfd,
474 struct bfd_link_info * info,
475 bfd * input_bfd,
476 asection * input_section,
477 bfd_byte * contents,
478 Elf_Internal_Rela * relocs,
479 Elf_Internal_Sym * local_syms,
480 asection ** local_sections)
481{
482 Elf_Internal_Shdr * symtab_hdr;
483 struct elf_link_hash_entry ** sym_hashes;
484 Elf_Internal_Rela * rel;
485 Elf_Internal_Rela * relend;
d4cb0ea0
NC		 486 bfd_boolean pid_mode;
487 bfd_boolean saw_subtract = FALSE;
7a2f2d82
DD		 488 const char * table_default_cache = NULL;
489 bfd_vma table_start_cache = 0;
490 bfd_vma table_end_cache = 0;
d4cb0ea0
NC		 491
492 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID)
493 pid_mode = TRUE;
494 else
495 pid_mode = FALSE;
c7927a3c
NC		 496
497 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
498 sym_hashes = elf_sym_hashes (input_bfd);
499 relend = relocs + input_section->reloc_count;
c7927a3c
NC		 500 for (rel = relocs; rel < relend; rel ++)
501 {
502 reloc_howto_type * howto;
503 unsigned long r_symndx;
504 Elf_Internal_Sym * sym;
505 asection * sec;
506 struct elf_link_hash_entry * h;
507 bfd_vma relocation;
508 bfd_reloc_status_type r;
509 const char * name = NULL;
510 bfd_boolean unresolved_reloc = TRUE;
511 int r_type;
512
513 r_type = ELF32_R_TYPE (rel->r_info);
514 r_symndx = ELF32_R_SYM (rel->r_info);
515
516 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
517 h = NULL;
518 sym = NULL;
519 sec = NULL;
520 relocation = 0;
521
d4cb0ea0
NC		 522 if (rx_stack_top == 0)
523 saw_subtract = FALSE;
524
c7927a3c
NC		 525 if (r_symndx < symtab_hdr->sh_info)
526 {
527 sym = local_syms + r_symndx;
528 sec = local_sections [r_symndx];
529 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
530
531 name = bfd_elf_string_from_elf_section
532 (input_bfd, symtab_hdr->sh_link, sym->st_name);
533 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
534 }
535 else
536 {
62d887d4 537 bfd_boolean warned, ignored;
c7927a3c
NC		 538
539 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
540 r_symndx, symtab_hdr, sym_hashes, h,
541 sec, relocation, unresolved_reloc,
62d887d4 542 warned, ignored);
c7927a3c
NC		 543
544 name = h->root.root.string;
545 }
546
7a2f2d82
DD		 547 if (strncmp (name, "$tableentry$default$", 20) == 0)
548 {
549 bfd_vma entry_vma;
550 int idx;
551 char *buf;
552 bfd_reloc_status_type tstat = 0;
553
554 if (table_default_cache != name)
555 {
556
557 /* All relocs for a given table should be to the same
558 (weak) default symbol) so we can use it to detect a
559 cache miss. We use the offset into the table to find
560 the "real" symbol. Calculate and store the table's
561 offset here. */
562
563 table_default_cache = name;
564
565 /* We have already done error checking in rx_table_find(). */
566
567 buf = (char *) malloc (13 + strlen (name + 20));
568
569 sprintf (buf, "$tablestart$%s", name + 20);
570 tstat = 0;
571 table_start_cache = get_symbol_value (buf,
572 &tstat,
573 info,
574 input_bfd,
575 input_section,
576 rel->r_offset);
577
578 sprintf (buf, "$tableend$%s", name + 20);
579 tstat = 0;
580 table_end_cache = get_symbol_value (buf,
581 &tstat,
582 info,
583 input_bfd,
584 input_section,
585 rel->r_offset);
586
587 free (buf);
588 }
589
590 entry_vma = (input_section->output_section->vma
591 + input_section->output_offset
592 + rel->r_offset);
593
594 if (table_end_cache <= entry_vma || entry_vma < table_start_cache)
595 {
596 _bfd_error_handler (_("%B:%A: table entry %s outside table"),
597 input_bfd, input_section,
598 name);
599 }
600 else if ((int) (entry_vma - table_start_cache) % 4)
601 {
602 _bfd_error_handler (_("%B:%A: table entry %s not word-aligned within table"),
603 input_bfd, input_section,
604 name);
605 }
606 else
607 {
608 idx = (int) (entry_vma - table_start_cache) / 4;
609
610 /* This will look like $tableentry$<N>$<name> */
611 buf = (char *) malloc (12 + 20 + strlen (name + 20));
612 sprintf (buf, "$tableentry$%d$%s", idx, name + 20);
613
614 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, FALSE, FALSE, TRUE);
615
616 if (h)
617 {
618 relocation = (h->root.u.def.value
619 + h->root.u.def.section->output_section->vma
620 + h->root.u.def.section->output_offset);;
621 }
622
623 free (buf);
624 }
625 }
626
dbaa2011 627 if (sec != NULL && discarded_section (sec))
e4067dbb 628 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 629 rel, 1, relend, howto, 0, contents);
c7927a3c
NC		 630
631 if (info->relocatable)
632 {
633 /* This is a relocatable link. We don't have to change
634 anything, unless the reloc is against a section symbol,
635 in which case we have to adjust according to where the
636 section symbol winds up in the output section. */
637 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
638 rel->r_addend += sec->output_offset;
639 continue;
640 }
641
642 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
643 /* If the symbol is undefined and weak
644 then the relocation resolves to zero. */
645 relocation = 0;
646 else
647 {
648 if (howto->pc_relative)
649 {
650 relocation -= (input_section->output_section->vma
651 + input_section->output_offset
652 + rel->r_offset);
653 if (r_type != R_RX_RH_3_PCREL
654 && r_type != R_RX_DIR3U_PCREL)
655 relocation ++;
656 }
657
658 relocation += rel->r_addend;
659 }
660
661 r = bfd_reloc_ok;
662
663#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
664#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
665#define OP(i) (contents[rel->r_offset + (i)])
666#define WARN_REDHAT(type) \
667 _bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \
668 input_bfd, input_section, name)
669
d4cb0ea0
NC		 670 /* Check for unsafe relocs in PID mode. These are any relocs where
671 an absolute address is being computed. There are special cases
672 for relocs against symbols that are known to be referenced in
673 crt0.o before the PID base address register has been initialised. */
674#define UNSAFE_FOR_PID \
675 do \
676 { \
677 if (pid_mode \
678 && sec != NULL \
679 && sec->flags & SEC_READONLY \
680 && !(input_section->flags & SEC_DEBUGGING) \
681 && strcmp (name, "__pid_base") != 0 \
682 && strcmp (name, "__gp") != 0 \
683 && strcmp (name, "__romdatastart") != 0 \
684 && !saw_subtract) \
685 _bfd_error_handler (_("%B(%A): unsafe PID relocation %s at 0x%08lx (against %s in %s)"), \
686 input_bfd, input_section, howto->name, \
687 input_section->output_section->vma + input_section->output_offset + rel->r_offset, \
688 name, sec->name); \
689 } \
690 while (0)
691
c7927a3c
NC		 692 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
693 switch (r_type)
694 {
695 case R_RX_NONE:
696 break;
697
698 case R_RX_RH_RELAX:
699 break;
700
701 case R_RX_RH_3_PCREL:
702 WARN_REDHAT ("RX_RH_3_PCREL");
703 RANGE (3, 10);
704 OP (0) &= 0xf8;
705 OP (0) |= relocation & 0x07;
706 break;
707
708 case R_RX_RH_8_NEG:
709 WARN_REDHAT ("RX_RH_8_NEG");
710 relocation = - relocation;
711 case R_RX_DIR8S_PCREL:
d4cb0ea0 712 UNSAFE_FOR_PID;
c7927a3c
NC		 713 RANGE (-128, 127);
714 OP (0) = relocation;
715 break;
716
717 case R_RX_DIR8S:
d4cb0ea0 718 UNSAFE_FOR_PID;
c7927a3c
NC		 719 RANGE (-128, 255);
720 OP (0) = relocation;
721 break;
722
723 case R_RX_DIR8U:
d4cb0ea0 724 UNSAFE_FOR_PID;
c7927a3c
NC		 725 RANGE (0, 255);
726 OP (0) = relocation;
727 break;
728
729 case R_RX_RH_16_NEG:
730 WARN_REDHAT ("RX_RH_16_NEG");
731 relocation = - relocation;
732 case R_RX_DIR16S_PCREL:
d4cb0ea0 733 UNSAFE_FOR_PID;
c7927a3c
NC		 734 RANGE (-32768, 32767);
735#if RX_OPCODE_BIG_ENDIAN
736#else
737 OP (0) = relocation;
738 OP (1) = relocation >> 8;
739#endif
740 break;
741
742 case R_RX_RH_16_OP:
743 WARN_REDHAT ("RX_RH_16_OP");
d4cb0ea0 744 UNSAFE_FOR_PID;
c7927a3c
NC		 745 RANGE (-32768, 32767);
746#if RX_OPCODE_BIG_ENDIAN
747 OP (1) = relocation;
748 OP (0) = relocation >> 8;
749#else
750 OP (0) = relocation;
751 OP (1) = relocation >> 8;
752#endif
753 break;
754
755 case R_RX_DIR16S:
d4cb0ea0 756 UNSAFE_FOR_PID;
c7927a3c
NC		 757 RANGE (-32768, 65535);
758 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
759 {
760 OP (1) = relocation;
761 OP (0) = relocation >> 8;
762 }
763 else
764 {
765 OP (0) = relocation;
766 OP (1) = relocation >> 8;
767 }
768 break;
769
770 case R_RX_DIR16U:
d4cb0ea0 771 UNSAFE_FOR_PID;
c7927a3c
NC		 772 RANGE (0, 65536);
773#if RX_OPCODE_BIG_ENDIAN
774 OP (1) = relocation;
775 OP (0) = relocation >> 8;
776#else
777 OP (0) = relocation;
778 OP (1) = relocation >> 8;
779#endif
780 break;
781
782 case R_RX_DIR16:
d4cb0ea0 783 UNSAFE_FOR_PID;
c7927a3c
NC		 784 RANGE (-32768, 65536);
785#if RX_OPCODE_BIG_ENDIAN
786 OP (1) = relocation;
787 OP (0) = relocation >> 8;
788#else
789 OP (0) = relocation;
790 OP (1) = relocation >> 8;
791#endif
792 break;
793
794 case R_RX_DIR16_REV:
d4cb0ea0 795 UNSAFE_FOR_PID;
c7927a3c
NC		 796 RANGE (-32768, 65536);
797#if RX_OPCODE_BIG_ENDIAN
798 OP (0) = relocation;
799 OP (1) = relocation >> 8;
800#else
801 OP (1) = relocation;
802 OP (0) = relocation >> 8;
803#endif
804 break;
805
806 case R_RX_DIR3U_PCREL:
807 RANGE (3, 10);
808 OP (0) &= 0xf8;
809 OP (0) |= relocation & 0x07;
810 break;
811
812 case R_RX_RH_24_NEG:
d4cb0ea0 813 UNSAFE_FOR_PID;
c7927a3c
NC		 814 WARN_REDHAT ("RX_RH_24_NEG");
815 relocation = - relocation;
816 case R_RX_DIR24S_PCREL:
817 RANGE (-0x800000, 0x7fffff);
818#if RX_OPCODE_BIG_ENDIAN
819 OP (2) = relocation;
820 OP (1) = relocation >> 8;
821 OP (0) = relocation >> 16;
822#else
823 OP (0) = relocation;
824 OP (1) = relocation >> 8;
825 OP (2) = relocation >> 16;
826#endif
827 break;
828
829 case R_RX_RH_24_OP:
d4cb0ea0 830 UNSAFE_FOR_PID;
c7927a3c
NC		 831 WARN_REDHAT ("RX_RH_24_OP");
832 RANGE (-0x800000, 0x7fffff);
833#if RX_OPCODE_BIG_ENDIAN
834 OP (2) = relocation;
835 OP (1) = relocation >> 8;
836 OP (0) = relocation >> 16;
837#else
838 OP (0) = relocation;
839 OP (1) = relocation >> 8;
840 OP (2) = relocation >> 16;
841#endif
842 break;
843
844 case R_RX_DIR24S:
d4cb0ea0 845 UNSAFE_FOR_PID;
c7927a3c
NC		 846 RANGE (-0x800000, 0x7fffff);
847 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
848 {
849 OP (2) = relocation;
850 OP (1) = relocation >> 8;
851 OP (0) = relocation >> 16;
852 }
853 else
854 {
855 OP (0) = relocation;
856 OP (1) = relocation >> 8;
857 OP (2) = relocation >> 16;
858 }
859 break;
860
861 case R_RX_RH_24_UNS:
d4cb0ea0 862 UNSAFE_FOR_PID;
c7927a3c
NC		 863 WARN_REDHAT ("RX_RH_24_UNS");
864 RANGE (0, 0xffffff);
865#if RX_OPCODE_BIG_ENDIAN
866 OP (2) = relocation;
867 OP (1) = relocation >> 8;
868 OP (0) = relocation >> 16;
869#else
870 OP (0) = relocation;
871 OP (1) = relocation >> 8;
872 OP (2) = relocation >> 16;
873#endif
874 break;
875
876 case R_RX_RH_32_NEG:
d4cb0ea0 877 UNSAFE_FOR_PID;
c7927a3c
NC		 878 WARN_REDHAT ("RX_RH_32_NEG");
879 relocation = - relocation;
880#if RX_OPCODE_BIG_ENDIAN
881 OP (3) = relocation;
882 OP (2) = relocation >> 8;
883 OP (1) = relocation >> 16;
884 OP (0) = relocation >> 24;
885#else
886 OP (0) = relocation;
887 OP (1) = relocation >> 8;
888 OP (2) = relocation >> 16;
889 OP (3) = relocation >> 24;
890#endif
891 break;
892
893 case R_RX_RH_32_OP:
d4cb0ea0 894 UNSAFE_FOR_PID;
c7927a3c
NC		 895 WARN_REDHAT ("RX_RH_32_OP");
896#if RX_OPCODE_BIG_ENDIAN
897 OP (3) = relocation;
898 OP (2) = relocation >> 8;
899 OP (1) = relocation >> 16;
900 OP (0) = relocation >> 24;
901#else
902 OP (0) = relocation;
903 OP (1) = relocation >> 8;
904 OP (2) = relocation >> 16;
905 OP (3) = relocation >> 24;
906#endif
907 break;
908
909 case R_RX_DIR32:
910 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
911 {
912 OP (3) = relocation;
913 OP (2) = relocation >> 8;
914 OP (1) = relocation >> 16;
915 OP (0) = relocation >> 24;
916 }
917 else
918 {
919 OP (0) = relocation;
920 OP (1) = relocation >> 8;
921 OP (2) = relocation >> 16;
922 OP (3) = relocation >> 24;
923 }
924 break;
925
926 case R_RX_DIR32_REV:
927 if (BIGE (output_bfd))
928 {
929 OP (0) = relocation;
930 OP (1) = relocation >> 8;
931 OP (2) = relocation >> 16;
932 OP (3) = relocation >> 24;
933 }
934 else
935 {
936 OP (3) = relocation;
937 OP (2) = relocation >> 8;
938 OP (1) = relocation >> 16;
939 OP (0) = relocation >> 24;
940 }
941 break;
942
943 case R_RX_RH_DIFF:
944 {
945 bfd_vma val;
946 WARN_REDHAT ("RX_RH_DIFF");
947 val = bfd_get_32 (output_bfd, & OP (0));
948 val -= relocation;
949 bfd_put_32 (output_bfd, val, & OP (0));
950 }
951 break;
952
953 case R_RX_RH_GPRELB:
954 WARN_REDHAT ("RX_RH_GPRELB");
955 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
956 RANGE (0, 65535);
957#if RX_OPCODE_BIG_ENDIAN
958 OP (1) = relocation;
959 OP (0) = relocation >> 8;
960#else
961 OP (0) = relocation;
962 OP (1) = relocation >> 8;
963#endif
964 break;
965
966 case R_RX_RH_GPRELW:
967 WARN_REDHAT ("RX_RH_GPRELW");
968 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
969 ALIGN (1);
970 relocation >>= 1;
971 RANGE (0, 65535);
972#if RX_OPCODE_BIG_ENDIAN
973 OP (1) = relocation;
974 OP (0) = relocation >> 8;
975#else
976 OP (0) = relocation;
977 OP (1) = relocation >> 8;
978#endif
979 break;
980
981 case R_RX_RH_GPRELL:
982 WARN_REDHAT ("RX_RH_GPRELL");
983 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
984 ALIGN (3);
985 relocation >>= 2;
986 RANGE (0, 65535);
987#if RX_OPCODE_BIG_ENDIAN
988 OP (1) = relocation;
989 OP (0) = relocation >> 8;
990#else
991 OP (0) = relocation;
992 OP (1) = relocation >> 8;
993#endif
994 break;
995
996 /* Internal relocations just for relaxation: */
997 case R_RX_RH_ABS5p5B:
998 RX_STACK_POP (relocation);
999 RANGE (0, 31);
1000 OP (0) &= 0xf8;
1001 OP (0) |= relocation >> 2;
1002 OP (1) &= 0x77;
1003 OP (1) |= (relocation << 6) & 0x80;
1004 OP (1) |= (relocation << 3) & 0x08;
1005 break;
1006
1007 case R_RX_RH_ABS5p5W:
1008 RX_STACK_POP (relocation);
1009 RANGE (0, 62);
1010 ALIGN (1);
1011 relocation >>= 1;
1012 OP (0) &= 0xf8;
1013 OP (0) |= relocation >> 2;
1014 OP (1) &= 0x77;
1015 OP (1) |= (relocation << 6) & 0x80;
1016 OP (1) |= (relocation << 3) & 0x08;
1017 break;
1018
1019 case R_RX_RH_ABS5p5L:
1020 RX_STACK_POP (relocation);
1021 RANGE (0, 124);
1022 ALIGN (3);
1023 relocation >>= 2;
1024 OP (0) &= 0xf8;
1025 OP (0) |= relocation >> 2;
1026 OP (1) &= 0x77;
1027 OP (1) |= (relocation << 6) & 0x80;
1028 OP (1) |= (relocation << 3) & 0x08;
1029 break;
1030
1031 case R_RX_RH_ABS5p8B:
1032 RX_STACK_POP (relocation);
1033 RANGE (0, 31);
1034 OP (0) &= 0x70;
1035 OP (0) |= (relocation << 3) & 0x80;
1036 OP (0) |= relocation & 0x0f;
1037 break;
1038
1039 case R_RX_RH_ABS5p8W:
1040 RX_STACK_POP (relocation);
1041 RANGE (0, 62);
1042 ALIGN (1);
1043 relocation >>= 1;
1044 OP (0) &= 0x70;
1045 OP (0) |= (relocation << 3) & 0x80;
1046 OP (0) |= relocation & 0x0f;
1047 break;
1048
1049 case R_RX_RH_ABS5p8L:
1050 RX_STACK_POP (relocation);
1051 RANGE (0, 124);
1052 ALIGN (3);
1053 relocation >>= 2;
1054 OP (0) &= 0x70;
1055 OP (0) |= (relocation << 3) & 0x80;
1056 OP (0) |= relocation & 0x0f;
1057 break;
1058
1059 case R_RX_RH_UIMM4p8:
1060 RANGE (0, 15);
1061 OP (0) &= 0x0f;
1062 OP (0) |= relocation << 4;
1063 break;
1064
1065 case R_RX_RH_UNEG4p8:
1066 RANGE (-15, 0);
1067 OP (0) &= 0x0f;
1068 OP (0) |= (-relocation) << 4;
1069 break;
1070
1071 /* Complex reloc handling: */
1072
1073 case R_RX_ABS32:
d4cb0ea0 1074 UNSAFE_FOR_PID;
c7927a3c
NC		 1075 RX_STACK_POP (relocation);
1076#if RX_OPCODE_BIG_ENDIAN
1077 OP (3) = relocation;
1078 OP (2) = relocation >> 8;
1079 OP (1) = relocation >> 16;
1080 OP (0) = relocation >> 24;
1081#else
1082 OP (0) = relocation;
1083 OP (1) = relocation >> 8;
1084 OP (2) = relocation >> 16;
1085 OP (3) = relocation >> 24;
1086#endif
1087 break;
1088
1089 case R_RX_ABS32_REV:
d4cb0ea0 1090 UNSAFE_FOR_PID;
c7927a3c
NC		 1091 RX_STACK_POP (relocation);
1092#if RX_OPCODE_BIG_ENDIAN
1093 OP (0) = relocation;
1094 OP (1) = relocation >> 8;
1095 OP (2) = relocation >> 16;
1096 OP (3) = relocation >> 24;
1097#else
1098 OP (3) = relocation;
1099 OP (2) = relocation >> 8;
1100 OP (1) = relocation >> 16;
1101 OP (0) = relocation >> 24;
1102#endif
1103 break;
1104
1105 case R_RX_ABS24S_PCREL:
1106 case R_RX_ABS24S:
d4cb0ea0 1107 UNSAFE_FOR_PID;
c7927a3c
NC		 1108 RX_STACK_POP (relocation);
1109 RANGE (-0x800000, 0x7fffff);
1110 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1111 {
1112 OP (2) = relocation;
1113 OP (1) = relocation >> 8;
1114 OP (0) = relocation >> 16;
1115 }
1116 else
1117 {
1118 OP (0) = relocation;
1119 OP (1) = relocation >> 8;
1120 OP (2) = relocation >> 16;
1121 }
1122 break;
1123
1124 case R_RX_ABS16:
d4cb0ea0 1125 UNSAFE_FOR_PID;
c7927a3c
NC		 1126 RX_STACK_POP (relocation);
1127 RANGE (-32768, 65535);
1128#if RX_OPCODE_BIG_ENDIAN
1129 OP (1) = relocation;
1130 OP (0) = relocation >> 8;
1131#else
1132 OP (0) = relocation;
1133 OP (1) = relocation >> 8;
1134#endif
1135 break;
1136
1137 case R_RX_ABS16_REV:
d4cb0ea0 1138 UNSAFE_FOR_PID;
c7927a3c
NC		 1139 RX_STACK_POP (relocation);
1140 RANGE (-32768, 65535);
1141#if RX_OPCODE_BIG_ENDIAN
1142 OP (0) = relocation;
1143 OP (1) = relocation >> 8;
1144#else
1145 OP (1) = relocation;
1146 OP (0) = relocation >> 8;
1147#endif
1148 break;
1149
1150 case R_RX_ABS16S_PCREL:
1151 case R_RX_ABS16S:
1152 RX_STACK_POP (relocation);
1153 RANGE (-32768, 32767);
1154 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1155 {
1156 OP (1) = relocation;
1157 OP (0) = relocation >> 8;
1158 }
1159 else
1160 {
1161 OP (0) = relocation;
1162 OP (1) = relocation >> 8;
1163 }
1164 break;
1165
1166 case R_RX_ABS16U:
d4cb0ea0 1167 UNSAFE_FOR_PID;
c7927a3c
NC		 1168 RX_STACK_POP (relocation);
1169 RANGE (0, 65536);
1170#if RX_OPCODE_BIG_ENDIAN
1171 OP (1) = relocation;
1172 OP (0) = relocation >> 8;
1173#else
1174 OP (0) = relocation;
1175 OP (1) = relocation >> 8;
1176#endif
1177 break;
1178
1179 case R_RX_ABS16UL:
d4cb0ea0 1180 UNSAFE_FOR_PID;
c7927a3c
NC		 1181 RX_STACK_POP (relocation);
1182 relocation >>= 2;
1183 RANGE (0, 65536);
1184#if RX_OPCODE_BIG_ENDIAN
1185 OP (1) = relocation;
1186 OP (0) = relocation >> 8;
1187#else
1188 OP (0) = relocation;
1189 OP (1) = relocation >> 8;
1190#endif
1191 break;
1192
1193 case R_RX_ABS16UW:
d4cb0ea0 1194 UNSAFE_FOR_PID;
c7927a3c
NC		 1195 RX_STACK_POP (relocation);
1196 relocation >>= 1;
1197 RANGE (0, 65536);
1198#if RX_OPCODE_BIG_ENDIAN
1199 OP (1) = relocation;
1200 OP (0) = relocation >> 8;
1201#else
1202 OP (0) = relocation;
1203 OP (1) = relocation >> 8;
1204#endif
1205 break;
1206
1207 case R_RX_ABS8:
d4cb0ea0 1208 UNSAFE_FOR_PID;
c7927a3c
NC		 1209 RX_STACK_POP (relocation);
1210 RANGE (-128, 255);
1211 OP (0) = relocation;
1212 break;
1213
1214 case R_RX_ABS8U:
d4cb0ea0 1215 UNSAFE_FOR_PID;
c7927a3c
NC		 1216 RX_STACK_POP (relocation);
1217 RANGE (0, 255);
1218 OP (0) = relocation;
1219 break;
1220
1221 case R_RX_ABS8UL:
d4cb0ea0 1222 UNSAFE_FOR_PID;
c7927a3c
NC		 1223 RX_STACK_POP (relocation);
1224 relocation >>= 2;
1225 RANGE (0, 255);
1226 OP (0) = relocation;
1227 break;
1228
1229 case R_RX_ABS8UW:
d4cb0ea0 1230 UNSAFE_FOR_PID;
c7927a3c
NC		 1231 RX_STACK_POP (relocation);
1232 relocation >>= 1;
1233 RANGE (0, 255);
1234 OP (0) = relocation;
1235 break;
1236
c7927a3c 1237 case R_RX_ABS8S:
d4cb0ea0
NC		 1238 UNSAFE_FOR_PID;
1239 case R_RX_ABS8S_PCREL:
c7927a3c
NC		 1240 RX_STACK_POP (relocation);
1241 RANGE (-128, 127);
1242 OP (0) = relocation;
1243 break;
1244
1245 case R_RX_SYM:
1246 if (r_symndx < symtab_hdr->sh_info)
1247 RX_STACK_PUSH (sec->output_section->vma
1248 + sec->output_offset
d4cb0ea0
NC		 1249 + sym->st_value
1250 + rel->r_addend);
c7927a3c
NC		 1251 else
1252 {
1253 if (h != NULL
1254 && (h->root.type == bfd_link_hash_defined
1255 || h->root.type == bfd_link_hash_defweak))
1256 RX_STACK_PUSH (h->root.u.def.value
1257 + sec->output_section->vma
d4cb0ea0
NC		 1258 + sec->output_offset
1259 + rel->r_addend);
c7927a3c
NC		 1260 else
1261 _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol"));
1262 }
1263 break;
1264
1265 case R_RX_OPneg:
1266 {
1267 int32_t tmp;
1268
ee181c72 1269 saw_subtract = TRUE;
c7927a3c
NC		 1270 RX_STACK_POP (tmp);
1271 tmp = - tmp;
1272 RX_STACK_PUSH (tmp);
1273 }
1274 break;
1275
1276 case R_RX_OPadd:
1277 {
1278 int32_t tmp1, tmp2;
1279
1280 RX_STACK_POP (tmp1);
1281 RX_STACK_POP (tmp2);
1282 tmp1 += tmp2;
1283 RX_STACK_PUSH (tmp1);
1284 }
1285 break;
1286
1287 case R_RX_OPsub:
1288 {
1289 int32_t tmp1, tmp2;
1290
d4cb0ea0 1291 saw_subtract = TRUE;
c7927a3c
NC		 1292 RX_STACK_POP (tmp1);
1293 RX_STACK_POP (tmp2);
1294 tmp2 -= tmp1;
1295 RX_STACK_PUSH (tmp2);
1296 }
1297 break;
1298
1299 case R_RX_OPmul:
1300 {
1301 int32_t tmp1, tmp2;
1302
1303 RX_STACK_POP (tmp1);
1304 RX_STACK_POP (tmp2);
1305 tmp1 *= tmp2;
1306 RX_STACK_PUSH (tmp1);
1307 }
1308 break;
1309
1310 case R_RX_OPdiv:
1311 {
1312 int32_t tmp1, tmp2;
1313
1314 RX_STACK_POP (tmp1);
1315 RX_STACK_POP (tmp2);
1316 tmp1 /= tmp2;
1317 RX_STACK_PUSH (tmp1);
1318 }
1319 break;
1320
1321 case R_RX_OPshla:
1322 {
1323 int32_t tmp1, tmp2;
1324
1325 RX_STACK_POP (tmp1);
1326 RX_STACK_POP (tmp2);
1327 tmp1 <<= tmp2;
1328 RX_STACK_PUSH (tmp1);
1329 }
1330 break;
1331
1332 case R_RX_OPshra:
1333 {
1334 int32_t tmp1, tmp2;
1335
1336 RX_STACK_POP (tmp1);
1337 RX_STACK_POP (tmp2);
1338 tmp1 >>= tmp2;
1339 RX_STACK_PUSH (tmp1);
1340 }
1341 break;
1342
1343 case R_RX_OPsctsize:
1344 RX_STACK_PUSH (input_section->size);
1345 break;
1346
1347 case R_RX_OPscttop:
1348 RX_STACK_PUSH (input_section->output_section->vma);
1349 break;
1350
1351 case R_RX_OPand:
1352 {
1353 int32_t tmp1, tmp2;
1354
1355 RX_STACK_POP (tmp1);
1356 RX_STACK_POP (tmp2);
1357 tmp1 &= tmp2;
1358 RX_STACK_PUSH (tmp1);
1359 }
1360 break;
1361
1362 case R_RX_OPor:
1363 {
1364 int32_t tmp1, tmp2;
1365
1366 RX_STACK_POP (tmp1);
1367 RX_STACK_POP (tmp2);
1368 tmp1 |= tmp2;
1369 RX_STACK_PUSH (tmp1);
1370 }
1371 break;
1372
1373 case R_RX_OPxor:
1374 {
1375 int32_t tmp1, tmp2;
1376
1377 RX_STACK_POP (tmp1);
1378 RX_STACK_POP (tmp2);
1379 tmp1 ^= tmp2;
1380 RX_STACK_PUSH (tmp1);
1381 }
1382 break;
1383
1384 case R_RX_OPnot:
1385 {
1386 int32_t tmp;
1387
1388 RX_STACK_POP (tmp);
1389 tmp = ~ tmp;
1390 RX_STACK_PUSH (tmp);
1391 }
1392 break;
1393
1394 case R_RX_OPmod:
1395 {
1396 int32_t tmp1, tmp2;
1397
1398 RX_STACK_POP (tmp1);
1399 RX_STACK_POP (tmp2);
1400 tmp1 %= tmp2;
1401 RX_STACK_PUSH (tmp1);
1402 }
1403 break;
1404
1405 case R_RX_OPromtop:
1406 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1407 break;
1408
1409 case R_RX_OPramtop:
1410 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1411 break;
1412
1413 default:
1414 r = bfd_reloc_notsupported;
1415 break;
1416 }
1417
1418 if (r != bfd_reloc_ok)
1419 {
1420 const char * msg = NULL;
1421
1422 switch (r)
1423 {
1424 case bfd_reloc_overflow:
1425 /* Catch the case of a missing function declaration
1426 and emit a more helpful error message. */
1427 if (r_type == R_RX_DIR24S_PCREL)
1428 msg = _("%B(%A): error: call to undefined function '%s'");
1429 else
1430 r = info->callbacks->reloc_overflow
1431 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1432 input_bfd, input_section, rel->r_offset);
1433 break;
1434
1435 case bfd_reloc_undefined:
1436 r = info->callbacks->undefined_symbol
1437 (info, name, input_bfd, input_section, rel->r_offset,
1438 TRUE);
1439 break;
1440
1441 case bfd_reloc_other:
1442 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1443 break;
1444
1445 case bfd_reloc_outofrange:
1446 msg = _("%B(%A): internal error: out of range error");
1447 break;
1448
1449 case bfd_reloc_notsupported:
1450 msg = _("%B(%A): internal error: unsupported relocation error");
1451 break;
1452
1453 case bfd_reloc_dangerous:
1454 msg = _("%B(%A): internal error: dangerous relocation");
1455 break;
1456
1457 default:
1458 msg = _("%B(%A): internal error: unknown error");
1459 break;
1460 }
1461
1462 if (msg)
1463 _bfd_error_handler (msg, input_bfd, input_section, name);
1464
1465 if (! r)
1466 return FALSE;
1467 }
1468 }
1469
1470 return TRUE;
1471}
1472\f
1473/* Relaxation Support. */
1474
1475/* Progression of relocations from largest operand size to smallest
1476 operand size. */
1477
1478static int
1479next_smaller_reloc (int r)
1480{
1481 switch (r)
1482 {
1483 case R_RX_DIR32: return R_RX_DIR24S;
1484 case R_RX_DIR24S: return R_RX_DIR16S;
1485 case R_RX_DIR16S: return R_RX_DIR8S;
1486 case R_RX_DIR8S: return R_RX_NONE;
1487
1488 case R_RX_DIR16: return R_RX_DIR8;
1489 case R_RX_DIR8: return R_RX_NONE;
1490
1491 case R_RX_DIR16U: return R_RX_DIR8U;
1492 case R_RX_DIR8U: return R_RX_NONE;
1493
1494 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1495 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1496 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1497
1498 case R_RX_DIR16UL: return R_RX_DIR8UL;
1499 case R_RX_DIR8UL: return R_RX_NONE;
1500 case R_RX_DIR16UW: return R_RX_DIR8UW;
1501 case R_RX_DIR8UW: return R_RX_NONE;
1502
1503 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1504 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1505 case R_RX_RH_16_OP: return R_RX_DIR8;
1506
1507 case R_RX_ABS32: return R_RX_ABS24S;
1508 case R_RX_ABS24S: return R_RX_ABS16S;
1509 case R_RX_ABS16: return R_RX_ABS8;
1510 case R_RX_ABS16U: return R_RX_ABS8U;
1511 case R_RX_ABS16S: return R_RX_ABS8S;
1512 case R_RX_ABS8: return R_RX_NONE;
1513 case R_RX_ABS8U: return R_RX_NONE;
1514 case R_RX_ABS8S: return R_RX_NONE;
1515 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1516 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1517 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1518 case R_RX_ABS16UL: return R_RX_ABS8UL;
1519 case R_RX_ABS16UW: return R_RX_ABS8UW;
1520 case R_RX_ABS8UL: return R_RX_NONE;
1521 case R_RX_ABS8UW: return R_RX_NONE;
1522 }
1523 return r;
1524};
1525
1526/* Delete some bytes from a section while relaxing. */
1527
1528static bfd_boolean
1529elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1530 Elf_Internal_Rela *alignment_rel, int force_snip)
1531{
1532 Elf_Internal_Shdr * symtab_hdr;
1533 unsigned int sec_shndx;
1534 bfd_byte * contents;
1535 Elf_Internal_Rela * irel;
1536 Elf_Internal_Rela * irelend;
c7927a3c
NC		 1537 Elf_Internal_Sym * isym;
1538 Elf_Internal_Sym * isymend;
1539 bfd_vma toaddr;
1540 unsigned int symcount;
1541 struct elf_link_hash_entry ** sym_hashes;
1542 struct elf_link_hash_entry ** end_hashes;
1543
1544 if (!alignment_rel)
1545 force_snip = 1;
1546
1547 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1548
1549 contents = elf_section_data (sec)->this_hdr.contents;
1550
1551 /* The deletion must stop at the next alignment boundary, if
1552 ALIGNMENT_REL is non-NULL. */
c7927a3c
NC		 1553 toaddr = sec->size;
1554 if (alignment_rel)
1555 toaddr = alignment_rel->r_offset;
1556
1557 irel = elf_section_data (sec)->relocs;
1558 irelend = irel + sec->reloc_count;
1559
1560 /* Actually delete the bytes. */
1561 memmove (contents + addr, contents + addr + count,
1562 (size_t) (toaddr - addr - count));
1563
1564 /* If we don't have an alignment marker to worry about, we can just
1565 shrink the section. Otherwise, we have to fill in the newly
1566 created gap with NOP insns (0x03). */
1567 if (force_snip)
1568 sec->size -= count;
1569 else
1570 memset (contents + toaddr - count, 0x03, count);
1571
1572 /* Adjust all the relocs. */
1573 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1574 {
1575 /* Get the new reloc address. */
1576 if (irel->r_offset > addr
1577 && (irel->r_offset < toaddr
1578 || (force_snip && irel->r_offset == toaddr)))
1579 irel->r_offset -= count;
1580
1581 /* If we see an ALIGN marker at the end of the gap, we move it
1582 to the beginning of the gap, since marking these gaps is what
1583 they're for. */
1584 if (irel->r_offset == toaddr
1585 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1586 && irel->r_addend & RX_RELAXA_ALIGN)
1587 irel->r_offset -= count;
1588 }
1589
1590 /* Adjust the local symbols defined in this section. */
1591 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1592 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1593 isymend = isym + symtab_hdr->sh_info;
1594
1595 for (; isym < isymend; isym++)
1596 {
1597 /* If the symbol is in the range of memory we just moved, we
1598 have to adjust its value. */
1599 if (isym->st_shndx == sec_shndx
1600 && isym->st_value > addr
1601 && isym->st_value < toaddr)
1602 isym->st_value -= count;
1603
1604 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1605 *end* is in the moved bytes but it's *start* isn't), then we
1606 must adjust its size. */
1607 if (isym->st_shndx == sec_shndx
1608 && isym->st_value < addr
1609 && isym->st_value + isym->st_size > addr
1610 && isym->st_value + isym->st_size < toaddr)
1611 isym->st_size -= count;
1612 }
1613
1614 /* Now adjust the global symbols defined in this section. */
1615 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1616 - symtab_hdr->sh_info);
1617 sym_hashes = elf_sym_hashes (abfd);
1618 end_hashes = sym_hashes + symcount;
1619
1620 for (; sym_hashes < end_hashes; sym_hashes++)
1621 {
1622 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1623
1624 if ((sym_hash->root.type == bfd_link_hash_defined
1625 || sym_hash->root.type == bfd_link_hash_defweak)
1626 && sym_hash->root.u.def.section == sec)
1627 {
1628 /* As above, adjust the value if needed. */
1629 if (sym_hash->root.u.def.value > addr
1630 && sym_hash->root.u.def.value < toaddr)
1631 sym_hash->root.u.def.value -= count;
1632
1633 /* As above, adjust the size if needed. */
1634 if (sym_hash->root.u.def.value < addr
1635 && sym_hash->root.u.def.value + sym_hash->size > addr
1636 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1637 sym_hash->size -= count;
1638 }
1639 }
1640
1641 return TRUE;
1642}
1643
1644/* Used to sort relocs by address. If relocs have the same address,
1645 we maintain their relative order, except that R_RX_RH_RELAX
1646 alignment relocs must be the first reloc for any given address. */
1647
1648static void
1649reloc_bubblesort (Elf_Internal_Rela * r, int count)
1650{
1651 int i;
1652 bfd_boolean again;
1653 bfd_boolean swappit;
1654
1655 /* This is almost a classic bubblesort. It's the slowest sort, but
1656 we're taking advantage of the fact that the relocations are
1657 mostly in order already (the assembler emits them that way) and
1658 we need relocs with the same address to remain in the same
1659 relative order. */
1660 again = TRUE;
1661 while (again)
1662 {
1663 again = FALSE;
1664 for (i = 0; i < count - 1; i ++)
1665 {
1666 if (r[i].r_offset > r[i + 1].r_offset)
1667 swappit = TRUE;
1668 else if (r[i].r_offset < r[i + 1].r_offset)
1669 swappit = FALSE;
1670 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1671 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1672 swappit = TRUE;
1673 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1674 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1675 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1676 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1677 swappit = TRUE;
1678 else
1679 swappit = FALSE;
1680
1681 if (swappit)
1682 {
1683 Elf_Internal_Rela tmp;
1684
1685 tmp = r[i];
1686 r[i] = r[i + 1];
1687 r[i + 1] = tmp;
1688 /* If we do move a reloc back, re-scan to see if it
1689 needs to be moved even further back. This avoids
1690 most of the O(n^2) behavior for our cases. */
1691 if (i > 0)
1692 i -= 2;
1693 again = TRUE;
1694 }
1695 }
1696 }
1697}
1698
1699
1700#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1701 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1702 lrel, abfd, sec, link_info, scale)
1703
1704static bfd_vma
1705rx_offset_for_reloc (bfd * abfd,
1706 Elf_Internal_Rela * rel,
1707 Elf_Internal_Shdr * symtab_hdr,
c7e2358a 1708 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
c7927a3c
NC		 1709 Elf_Internal_Sym * intsyms,
1710 Elf_Internal_Rela ** lrel,
1711 bfd * input_bfd,
1712 asection * input_section,
1713 struct bfd_link_info * info,
1714 int * scale)
1715{
1716 bfd_vma symval;
1717 bfd_reloc_status_type r;
1718
1719 *scale = 1;
1720
1721 /* REL is the first of 1..N relocations. We compute the symbol
1722 value for each relocation, then combine them if needed. LREL
1723 gets a pointer to the last relocation used. */
1724 while (1)
1725 {
1726 int32_t tmp1, tmp2;
1727
1728 /* Get the value of the symbol referred to by the reloc. */
1729 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1730 {
1731 /* A local symbol. */
1732 Elf_Internal_Sym *isym;
c7927a3c
NC		 1733 asection *ssec;
1734
1735 isym = intsyms + ELF32_R_SYM (rel->r_info);
1736
1737 if (isym->st_shndx == SHN_UNDEF)
1738 ssec = bfd_und_section_ptr;
1739 else if (isym->st_shndx == SHN_ABS)
1740 ssec = bfd_abs_section_ptr;
1741 else if (isym->st_shndx == SHN_COMMON)
1742 ssec = bfd_com_section_ptr;
1743 else
1744 ssec = bfd_section_from_elf_index (abfd,
1745 isym->st_shndx);
1746
c7927a3c
NC		 1747 /* Initial symbol value. */
1748 symval = isym->st_value;
1749
1750 /* GAS may have made this symbol relative to a section, in
1751 which case, we have to add the addend to find the
1752 symbol. */
1753 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1754 symval += rel->r_addend;
1755
1756 if (ssec)
1757 {
1758 if ((ssec->flags & SEC_MERGE)
dbaa2011 1759 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
c7927a3c
NC		 1760 symval = _bfd_merged_section_offset (abfd, & ssec,
1761 elf_section_data (ssec)->sec_info,
1762 symval);
1763 }
1764
1765 /* Now make the offset relative to where the linker is putting it. */
1766 if (ssec)
1767 symval +=
1768 ssec->output_section->vma + ssec->output_offset;
1769
1770 symval += rel->r_addend;
1771 }
1772 else
1773 {
1774 unsigned long indx;
1775 struct elf_link_hash_entry * h;
1776
1777 /* An external symbol. */
1778 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1779 h = elf_sym_hashes (abfd)[indx];
1780 BFD_ASSERT (h != NULL);
1781
1782 if (h->root.type != bfd_link_hash_defined
1783 && h->root.type != bfd_link_hash_defweak)
1784 {
1785 /* This appears to be a reference to an undefined
1786 symbol. Just ignore it--it will be caught by the
1787 regular reloc processing. */
1788 if (lrel)
1789 *lrel = rel;
1790 return 0;
1791 }
1792
1793 symval = (h->root.u.def.value
1794 + h->root.u.def.section->output_section->vma
1795 + h->root.u.def.section->output_offset);
1796
1797 symval += rel->r_addend;
1798 }
1799
1800 switch (ELF32_R_TYPE (rel->r_info))
1801 {
1802 case R_RX_SYM:
1803 RX_STACK_PUSH (symval);
1804 break;
1805
1806 case R_RX_OPneg:
1807 RX_STACK_POP (tmp1);
1808 tmp1 = - tmp1;
1809 RX_STACK_PUSH (tmp1);
1810 break;
1811
1812 case R_RX_OPadd:
1813 RX_STACK_POP (tmp1);
1814 RX_STACK_POP (tmp2);
1815 tmp1 += tmp2;
1816 RX_STACK_PUSH (tmp1);
1817 break;
1818
1819 case R_RX_OPsub:
1820 RX_STACK_POP (tmp1);
1821 RX_STACK_POP (tmp2);
1822 tmp2 -= tmp1;
1823 RX_STACK_PUSH (tmp2);
1824 break;
1825
1826 case R_RX_OPmul:
1827 RX_STACK_POP (tmp1);
1828 RX_STACK_POP (tmp2);
1829 tmp1 *= tmp2;
1830 RX_STACK_PUSH (tmp1);
1831 break;
1832
1833 case R_RX_OPdiv:
1834 RX_STACK_POP (tmp1);
1835 RX_STACK_POP (tmp2);
1836 tmp1 /= tmp2;
1837 RX_STACK_PUSH (tmp1);
1838 break;
1839
1840 case R_RX_OPshla:
1841 RX_STACK_POP (tmp1);
1842 RX_STACK_POP (tmp2);
1843 tmp1 <<= tmp2;
1844 RX_STACK_PUSH (tmp1);
1845 break;
1846
1847 case R_RX_OPshra:
1848 RX_STACK_POP (tmp1);
1849 RX_STACK_POP (tmp2);
1850 tmp1 >>= tmp2;
1851 RX_STACK_PUSH (tmp1);
1852 break;
1853
1854 case R_RX_OPsctsize:
1855 RX_STACK_PUSH (input_section->size);
1856 break;
1857
1858 case R_RX_OPscttop:
1859 RX_STACK_PUSH (input_section->output_section->vma);
1860 break;
1861
1862 case R_RX_OPand:
1863 RX_STACK_POP (tmp1);
1864 RX_STACK_POP (tmp2);
1865 tmp1 &= tmp2;
1866 RX_STACK_PUSH (tmp1);
1867 break;
1868
1869 case R_RX_OPor:
1870 RX_STACK_POP (tmp1);
1871 RX_STACK_POP (tmp2);
1872 tmp1 |= tmp2;
1873 RX_STACK_PUSH (tmp1);
1874 break;
1875
1876 case R_RX_OPxor:
1877 RX_STACK_POP (tmp1);
1878 RX_STACK_POP (tmp2);
1879 tmp1 ^= tmp2;
1880 RX_STACK_PUSH (tmp1);
1881 break;
1882
1883 case R_RX_OPnot:
1884 RX_STACK_POP (tmp1);
1885 tmp1 = ~ tmp1;
1886 RX_STACK_PUSH (tmp1);
1887 break;
1888
1889 case R_RX_OPmod:
1890 RX_STACK_POP (tmp1);
1891 RX_STACK_POP (tmp2);
1892 tmp1 %= tmp2;
1893 RX_STACK_PUSH (tmp1);
1894 break;
1895
1896 case R_RX_OPromtop:
1897 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1898 break;
1899
1900 case R_RX_OPramtop:
1901 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1902 break;
1903
1904 case R_RX_DIR16UL:
1905 case R_RX_DIR8UL:
1906 case R_RX_ABS16UL:
1907 case R_RX_ABS8UL:
1908 if (rx_stack_top)
1909 RX_STACK_POP (symval);
1910 if (lrel)
1911 *lrel = rel;
1912 *scale = 4;
1913 return symval;
1914
1915 case R_RX_DIR16UW:
1916 case R_RX_DIR8UW:
1917 case R_RX_ABS16UW:
1918 case R_RX_ABS8UW:
1919 if (rx_stack_top)
1920 RX_STACK_POP (symval);
1921 if (lrel)
1922 *lrel = rel;
1923 *scale = 2;
1924 return symval;
1925
1926 default:
1927 if (rx_stack_top)
1928 RX_STACK_POP (symval);
1929 if (lrel)
1930 *lrel = rel;
1931 return symval;
1932 }
1933
1934 rel ++;
1935 }
1936}
1937
1938static void
1939move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1940{
1941 bfd_vma old_offset = srel->r_offset;
1942
1943 irel ++;
1944 while (irel <= srel)
1945 {
1946 if (irel->r_offset == old_offset)
1947 irel->r_offset += delta;
1948 irel ++;
1949 }
1950}
1951
1952/* Relax one section. */
1953
1954static bfd_boolean
1955elf32_rx_relax_section (bfd * abfd,
1956 asection * sec,
1957 struct bfd_link_info * link_info,
1958 bfd_boolean * again,
1959 bfd_boolean allow_pcrel3)
1960{
1961 Elf_Internal_Shdr * symtab_hdr;
1962 Elf_Internal_Shdr * shndx_hdr;
1963 Elf_Internal_Rela * internal_relocs;
1964 Elf_Internal_Rela * free_relocs = NULL;
1965 Elf_Internal_Rela * irel;
1966 Elf_Internal_Rela * srel;
1967 Elf_Internal_Rela * irelend;
1968 Elf_Internal_Rela * next_alignment;
1969 Elf_Internal_Rela * prev_alignment;
1970 bfd_byte * contents = NULL;
1971 bfd_byte * free_contents = NULL;
1972 Elf_Internal_Sym * intsyms = NULL;
1973 Elf_Internal_Sym * free_intsyms = NULL;
1974 Elf_External_Sym_Shndx * shndx_buf = NULL;
1975 bfd_vma pc;
1976 bfd_vma sec_start;
c7927a3c
NC		 1977 bfd_vma symval = 0;
1978 int pcrel = 0;
1979 int code = 0;
1980 int section_alignment_glue;
1981 /* how much to scale the relocation by - 1, 2, or 4. */
1982 int scale;
1983
1984 /* Assume nothing changes. */
1985 *again = FALSE;
1986
1987 /* We don't have to do anything for a relocatable link, if
1988 this section does not have relocs, or if this is not a
1989 code section. */
1990 if (link_info->relocatable
1991 || (sec->flags & SEC_RELOC) == 0
1992 || sec->reloc_count == 0
1993 || (sec->flags & SEC_CODE) == 0)
1994 return TRUE;
1995
1996 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1997 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
1998
1999 sec_start = sec->output_section->vma + sec->output_offset;
c7927a3c
NC		 2000
2001 /* Get the section contents. */
2002 if (elf_section_data (sec)->this_hdr.contents != NULL)
2003 contents = elf_section_data (sec)->this_hdr.contents;
2004 /* Go get them off disk. */
2005 else
2006 {
2007 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2008 goto error_return;
2009 elf_section_data (sec)->this_hdr.contents = contents;
2010 }
2011
2012 /* Read this BFD's symbols. */
2013 /* Get cached copy if it exists. */
2014 if (symtab_hdr->contents != NULL)
2015 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2016 else
2017 {
2018 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2019 symtab_hdr->contents = (bfd_byte *) intsyms;
2020 }
2021
2022 if (shndx_hdr->sh_size != 0)
2023 {
2024 bfd_size_type amt;
2025
2026 amt = symtab_hdr->sh_info;
2027 amt *= sizeof (Elf_External_Sym_Shndx);
2028 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2029 if (shndx_buf == NULL)
2030 goto error_return;
2031 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2032 || bfd_bread (shndx_buf, amt, abfd) != amt)
c7927a3c
NC		 2033 goto error_return;
2034 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2035 }
2036
2037 /* Get a copy of the native relocations. */
2038 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2039 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
c7927a3c
NC		 2040 link_info->keep_memory));
2041 if (internal_relocs == NULL)
2042 goto error_return;
2043 if (! link_info->keep_memory)
2044 free_relocs = internal_relocs;
2045
2046 /* The RL_ relocs must be just before the operand relocs they go
2047 with, so we must sort them to guarantee this. We use bubblesort
2048 instead of qsort so we can guarantee that relocs with the same
2049 address remain in the same relative order. */
2050 reloc_bubblesort (internal_relocs, sec->reloc_count);
2051
2052 /* Walk through them looking for relaxing opportunities. */
2053 irelend = internal_relocs + sec->reloc_count;
2054
2055 /* This will either be NULL or a pointer to the next alignment
2056 relocation. */
2057 next_alignment = internal_relocs;
2058 /* This will be the previous alignment, although at first it points
2059 to the first real relocation. */
2060 prev_alignment = internal_relocs;
2061
2062 /* We calculate worst case shrinkage caused by alignment directives.
2063 No fool-proof, but better than either ignoring the problem or
2064 doing heavy duty analysis of all the alignment markers in all
2065 input sections. */
2066 section_alignment_glue = 0;
2067 for (irel = internal_relocs; irel < irelend; irel++)
2068 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
2069 && irel->r_addend & RX_RELAXA_ALIGN)
2070 {
2071 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2072
2073 if (section_alignment_glue < this_glue)
2074 section_alignment_glue = this_glue;
2075 }
2076 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2077 shrinkage. */
2078 section_alignment_glue *= 2;
2079
2080 for (irel = internal_relocs; irel < irelend; irel++)
2081 {
2082 unsigned char *insn;
2083 int nrelocs;
2084
2085 /* The insns we care about are all marked with one of these. */
2086 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
2087 continue;
2088
2089 if (irel->r_addend & RX_RELAXA_ALIGN
2090 || next_alignment == internal_relocs)
2091 {
2092 /* When we delete bytes, we need to maintain all the alignments
2093 indicated. In addition, we need to be careful about relaxing
2094 jumps across alignment boundaries - these displacements
2095 *grow* when we delete bytes. For now, don't shrink
2096 displacements across an alignment boundary, just in case.
2097 Note that this only affects relocations to the same
2098 section. */
2099 prev_alignment = next_alignment;
2100 next_alignment += 2;
2101 while (next_alignment < irelend
2102 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
2103 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
2104 next_alignment ++;
2105 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2106 next_alignment = NULL;
2107 }
2108
2109 /* When we hit alignment markers, see if we've shrunk enough
2110 before them to reduce the gap without violating the alignment
2111 requirements. */
2112 if (irel->r_addend & RX_RELAXA_ALIGN)
2113 {
2114 /* At this point, the next relocation *should* be the ELIGN
2115 end marker. */
2116 Elf_Internal_Rela *erel = irel + 1;
2117 unsigned int alignment, nbytes;
2118
2119 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
2120 continue;
2121 if (!(erel->r_addend & RX_RELAXA_ELIGN))
2122 continue;
2123
2124 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2125
2126 if (erel->r_offset - irel->r_offset < alignment)
2127 continue;
2128
2129 nbytes = erel->r_offset - irel->r_offset;
2130 nbytes /= alignment;
2131 nbytes *= alignment;
2132
2133 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2134 erel->r_offset == sec->size);
2135 *again = TRUE;
2136
2137 continue;
2138 }
2139
2140 if (irel->r_addend & RX_RELAXA_ELIGN)
2141 continue;
2142
2143 insn = contents + irel->r_offset;
2144
2145 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
2146
2147 /* At this point, we have an insn that is a candidate for linker
2148 relaxation. There are NRELOCS relocs following that may be
2149 relaxed, although each reloc may be made of more than one
2150 reloc entry (such as gp-rel symbols). */
2151
2152 /* Get the value of the symbol referred to by the reloc. Just
2153 in case this is the last reloc in the list, use the RL's
2154 addend to choose between this reloc (no addend) or the next
2155 (yes addend, which means at least one following reloc). */
2156
2157 /* srel points to the "current" reloction for this insn -
2158 actually the last reloc for a given operand, which is the one
2159 we need to update. We check the relaxations in the same
2160 order that the relocations happen, so we'll just push it
2161 along as we go. */
2162 srel = irel;
2163
2164 pc = sec->output_section->vma + sec->output_offset
2165 + srel->r_offset;
2166
2167#define GET_RELOC \
2168 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2169 pcrel = symval - pc + srel->r_addend; \
2170 nrelocs --;
2171
2172#define SNIPNR(offset, nbytes) \
2173 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2174#define SNIP(offset, nbytes, newtype) \
2175 SNIPNR (offset, nbytes); \
2176 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2177
2178 /* The order of these bit tests must match the order that the
2179 relocs appear in. Since we sorted those by offset, we can
2180 predict them. */
2181
2182 /* Note that the numbers in, say, DSP6 are the bit offsets of
2183 the code fields that describe the operand. Bits number 0 for
2184 the MSB of insn[0]. */
2185
2186 /* DSP* codes:
2187 0 00 [reg]
2188 1 01 dsp:8[reg]
2189 2 10 dsp:16[reg]
2190 3 11 reg */
2191 if (irel->r_addend & RX_RELAXA_DSP6)
2192 {
2193 GET_RELOC;
2194
2195 code = insn[0] & 3;
2196 if (code == 2 && symval/scale <= 255)
2197 {
2198 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2199 insn[0] &= 0xfc;
2200 insn[0] |= 0x01;
2201 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2202 if (newrel != ELF32_R_TYPE (srel->r_info))
2203 {
2204 SNIP (3, 1, newrel);
2205 *again = TRUE;
2206 }
2207 }
2208
2209 else if (code == 1 && symval == 0)
2210 {
2211 insn[0] &= 0xfc;
2212 SNIP (2, 1, R_RX_NONE);
2213 *again = TRUE;
2214 }
2215
2216 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2217 else if (code == 1 && symval/scale <= 31
2218 /* Decodable bits. */
2219 && (insn[0] & 0xcc) == 0xcc
91d6fa6a 2220 /* Width. */
eb8c5f3f 2221 && (insn[0] & 0x30) != 0x30
91d6fa6a 2222 /* Register MSBs. */
c7927a3c
NC		 2223 && (insn[1] & 0x88) == 0x00)
2224 {
2225 int newrel = 0;
2226
2227 insn[0] = 0x88 | (insn[0] & 0x30);
2228 /* The register fields are in the right place already. */
2229
2230 /* We can't relax this new opcode. */
2231 irel->r_addend = 0;
2232
2233 switch ((insn[0] & 0x30) >> 4)
2234 {
2235 case 0:
2236 newrel = R_RX_RH_ABS5p5B;
2237 break;
2238 case 1:
2239 newrel = R_RX_RH_ABS5p5W;
2240 break;
2241 case 2:
2242 newrel = R_RX_RH_ABS5p5L;
2243 break;
2244 }
2245
2246 move_reloc (irel, srel, -2);
2247 SNIP (2, 1, newrel);
2248 }
2249
2250 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2251 else if (code == 1 && symval/scale <= 31
2252 /* Decodable bits. */
2253 && (insn[0] & 0xf8) == 0x58
2254 /* Register MSBs. */
2255 && (insn[1] & 0x88) == 0x00)
2256 {
2257 int newrel = 0;
2258
2259 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2260 /* The register fields are in the right place already. */
2261
2262 /* We can't relax this new opcode. */
2263 irel->r_addend = 0;
2264
2265 switch ((insn[0] & 0x08) >> 3)
2266 {
2267 case 0:
2268 newrel = R_RX_RH_ABS5p5B;
2269 break;
2270 case 1:
2271 newrel = R_RX_RH_ABS5p5W;
2272 break;
2273 }
2274
2275 move_reloc (irel, srel, -2);
2276 SNIP (2, 1, newrel);
2277 }
2278 }
2279
2280 /* A DSP4 operand always follows a DSP6 operand, even if there's
2281 no relocation for it. We have to read the code out of the
2282 opcode to calculate the offset of the operand. */
2283 if (irel->r_addend & RX_RELAXA_DSP4)
2284 {
2285 int code6, offset = 0;
2286
2287 GET_RELOC;
2288
2289 code6 = insn[0] & 0x03;
2290 switch (code6)
2291 {
2292 case 0: offset = 2; break;
2293 case 1: offset = 3; break;
2294 case 2: offset = 4; break;
2295 case 3: offset = 2; break;
2296 }
2297
2298 code = (insn[0] & 0x0c) >> 2;
2299
2300 if (code == 2 && symval / scale <= 255)
2301 {
2302 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2303
2304 insn[0] &= 0xf3;
2305 insn[0] |= 0x04;
2306 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2307 if (newrel != ELF32_R_TYPE (srel->r_info))
2308 {
2309 SNIP (offset+1, 1, newrel);
2310 *again = TRUE;
2311 }
2312 }
2313
2314 else if (code == 1 && symval == 0)
2315 {
2316 insn[0] &= 0xf3;
2317 SNIP (offset, 1, R_RX_NONE);
2318 *again = TRUE;
2319 }
2320 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2321 else if (code == 1 && symval/scale <= 31
2322 /* Decodable bits. */
2323 && (insn[0] & 0xc3) == 0xc3
2324 /* Width. */
eb8c5f3f 2325 && (insn[0] & 0x30) != 0x30
c7927a3c
NC		 2326 /* Register MSBs. */
2327 && (insn[1] & 0x88) == 0x00)
2328 {
2329 int newrel = 0;
2330
2331 insn[0] = 0x80 | (insn[0] & 0x30);
2332 /* The register fields are in the right place already. */
2333
2334 /* We can't relax this new opcode. */
2335 irel->r_addend = 0;
2336
2337 switch ((insn[0] & 0x30) >> 4)
2338 {
2339 case 0:
2340 newrel = R_RX_RH_ABS5p5B;
2341 break;
2342 case 1:
2343 newrel = R_RX_RH_ABS5p5W;
2344 break;
2345 case 2:
2346 newrel = R_RX_RH_ABS5p5L;
2347 break;
2348 }
2349
2350 move_reloc (irel, srel, -2);
2351 SNIP (2, 1, newrel);
2352 }
2353 }
2354
2355 /* These always occur alone, but the offset depends on whether
2356 it's a MEMEX opcode (0x06) or not. */
2357 if (irel->r_addend & RX_RELAXA_DSP14)
2358 {
2359 int offset;
2360 GET_RELOC;
2361
2362 if (insn[0] == 0x06)
2363 offset = 3;
2364 else
2365 offset = 4;
2366
2367 code = insn[1] & 3;
2368
2369 if (code == 2 && symval / scale <= 255)
2370 {
2371 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2372
2373 insn[1] &= 0xfc;
2374 insn[1] |= 0x01;
2375 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2376 if (newrel != ELF32_R_TYPE (srel->r_info))
2377 {
2378 SNIP (offset, 1, newrel);
2379 *again = TRUE;
2380 }
2381 }
2382 else if (code == 1 && symval == 0)
2383 {
2384 insn[1] &= 0xfc;
2385 SNIP (offset, 1, R_RX_NONE);
2386 *again = TRUE;
2387 }
2388 }
2389
2390 /* IMM* codes:
2391 0 00 imm:32
2392 1 01 simm:8
2393 2 10 simm:16
2394 3 11 simm:24. */
2395
2396 /* These always occur alone. */
2397 if (irel->r_addend & RX_RELAXA_IMM6)
2398 {
2399 long ssymval;
2400
2401 GET_RELOC;
2402
2403 /* These relocations sign-extend, so we must do signed compares. */
2404 ssymval = (long) symval;
2405
2406 code = insn[0] & 0x03;
2407
2408 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2409 {
2410 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2411
2412 insn[0] &= 0xfc;
2413 insn[0] |= 0x03;
2414 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2415 if (newrel != ELF32_R_TYPE (srel->r_info))
2416 {
2417 SNIP (2, 1, newrel);
2418 *again = TRUE;
2419 }
2420 }
2421
2422 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2423 {
2424 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2425
2426 insn[0] &= 0xfc;
2427 insn[0] |= 0x02;
2428 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2429 if (newrel != ELF32_R_TYPE (srel->r_info))
2430 {
2431 SNIP (2, 1, newrel);
2432 *again = TRUE;
2433 }
2434 }
2435
2436 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2437 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2438 /* Decodable bits. */
2439 && (insn[0] & 0xfc) == 0x74
2440 /* Decodable bits. */
2441 && ((insn[1] & 0xf0) == 0x00))
2442 {
2443 int newrel;
2444
2445 insn[0] = 0x75;
2446 insn[1] = 0x50 | (insn[1] & 0x0f);
2447
2448 /* We can't relax this new opcode. */
2449 irel->r_addend = 0;
2450
2451 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2452 newrel = R_RX_ABS8U;
2453 else
2454 newrel = R_RX_DIR8U;
2455
2456 SNIP (2, 1, newrel);
2457 *again = TRUE;
2458 }
2459
2460 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2461 {
2462 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2463
2464 insn[0] &= 0xfc;
2465 insn[0] |= 0x01;
2466 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2467 if (newrel != ELF32_R_TYPE (srel->r_info))
2468 {
2469 SNIP (2, 1, newrel);
2470 *again = TRUE;
2471 }
2472 }
2473
2474 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2475 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2476 /* Decodable bits and immediate type. */
2477 && insn[0] == 0x75
2478 /* Decodable bits. */
2479 && (insn[1] & 0xc0) == 0x00)
2480 {
2481 static const int newop[4] = { 1, 3, 4, 5 };
2482
2483 insn[0] = 0x60 | newop[insn[1] >> 4];
2484 /* The register number doesn't move. */
2485
2486 /* We can't relax this new opcode. */
2487 irel->r_addend = 0;
2488
2489 move_reloc (irel, srel, -1);
2490
2491 SNIP (2, 1, R_RX_RH_UIMM4p8);
2492 *again = TRUE;
2493 }
2494
2495 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2496 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2497 /* Decodable bits and immediate type. */
2498 && insn[0] == 0x71
2499 /* Same register for source and destination. */
2500 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2501 {
2502 int newrel;
2503
2504 /* Note that we can't turn "add $0,Rs" into a NOP
2505 because the flags need to be set right. */
2506
2507 if (ssymval < 0)
2508 {
2509 insn[0] = 0x60; /* Subtract. */
2510 newrel = R_RX_RH_UNEG4p8;
2511 }
2512 else
2513 {
2514 insn[0] = 0x62; /* Add. */
2515 newrel = R_RX_RH_UIMM4p8;
2516 }
2517
2518 /* The register number is in the right place. */
2519
2520 /* We can't relax this new opcode. */
2521 irel->r_addend = 0;
2522
2523 move_reloc (irel, srel, -1);
2524
2525 SNIP (2, 1, newrel);
2526 *again = TRUE;
2527 }
2528 }
2529
2530 /* These are either matched with a DSP6 (2-byte base) or an id24
2531 (3-byte base). */
2532 if (irel->r_addend & RX_RELAXA_IMM12)
2533 {
2534 int dspcode, offset = 0;
2535 long ssymval;
2536
2537 GET_RELOC;
2538
2539 if ((insn[0] & 0xfc) == 0xfc)
2540 dspcode = 1; /* Just something with one byte operand. */
2541 else
2542 dspcode = insn[0] & 3;
2543 switch (dspcode)
2544 {
2545 case 0: offset = 2; break;
2546 case 1: offset = 3; break;
2547 case 2: offset = 4; break;
2548 case 3: offset = 2; break;
2549 }
2550
2551 /* These relocations sign-extend, so we must do signed compares. */
2552 ssymval = (long) symval;
2553
2554 code = (insn[1] >> 2) & 3;
2555 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2556 {
2557 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2558
2559 insn[1] &= 0xf3;
2560 insn[1] |= 0x0c;
2561 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2562 if (newrel != ELF32_R_TYPE (srel->r_info))
2563 {
2564 SNIP (offset, 1, newrel);
2565 *again = TRUE;
2566 }
2567 }
2568
2569 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2570 {
2571 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2572
2573 insn[1] &= 0xf3;
2574 insn[1] |= 0x08;
2575 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2576 if (newrel != ELF32_R_TYPE (srel->r_info))
2577 {
2578 SNIP (offset, 1, newrel);
2579 *again = TRUE;
2580 }
2581 }
2582
2583 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2584 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2585 /* Decodable bits. */
2586 && insn[0] == 0xfb
2587 /* Decodable bits. */
2588 && ((insn[1] & 0x03) == 0x02))
2589 {
2590 int newrel;
2591
2592 insn[0] = 0x75;
2593 insn[1] = 0x40 | (insn[1] >> 4);
2594
2595 /* We can't relax this new opcode. */
2596 irel->r_addend = 0;
2597
2598 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2599 newrel = R_RX_ABS8U;
2600 else
2601 newrel = R_RX_DIR8U;
2602
2603 SNIP (2, 1, newrel);
2604 *again = TRUE;
2605 }
2606
2607 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2608 {
2609 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2610
2611 insn[1] &= 0xf3;
2612 insn[1] |= 0x04;
2613 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2614 if (newrel != ELF32_R_TYPE(srel->r_info))
2615 {
2616 SNIP (offset, 1, newrel);
2617 *again = TRUE;
2618 }
2619 }
2620
2621 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2622 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2623 /* Decodable bits. */
2624 && insn[0] == 0xfb
2625 /* Decodable bits. */
2626 && ((insn[1] & 0x03) == 0x02))
2627 {
2628 insn[0] = 0x66;
2629 insn[1] = insn[1] >> 4;
2630
2631 /* We can't relax this new opcode. */
2632 irel->r_addend = 0;
2633
2634 move_reloc (irel, srel, -1);
2635
2636 SNIP (2, 1, R_RX_RH_UIMM4p8);
2637 *again = TRUE;
2638 }
2639 }
2640
2641 if (irel->r_addend & RX_RELAXA_BRA)
2642 {
2643 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2644 int max_pcrel3 = 4;
2645 int alignment_glue = 0;
2646
2647 GET_RELOC;
2648
2649 /* Branches over alignment chunks are problematic, as
2650 deleting bytes here makes the branch *further* away. We
2651 can be agressive with branches within this alignment
2652 block, but not branches outside it. */
2653 if ((prev_alignment == NULL
2654 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2655 && (next_alignment == NULL
2656 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2657 alignment_glue = section_alignment_glue;
2658
2659 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2660 && srel[1].r_addend & RX_RELAXA_BRA
2661 && srel[1].r_offset < irel->r_offset + pcrel)
2662 max_pcrel3 ++;
2663
2664 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2665
2666 /* The values we compare PCREL with are not what you'd
2667 expect; they're off by a little to compensate for (1)
2668 where the reloc is relative to the insn, and (2) how much
2669 the insn is going to change when we relax it. */
2670
2671 /* These we have to decode. */
2672 switch (insn[0])
2673 {
2674 case 0x04: /* BRA pcdsp:24 */
2675 if (-32768 + alignment_glue <= pcrel
2676 && pcrel <= 32765 - alignment_glue)
2677 {
2678 insn[0] = 0x38;
2679 SNIP (3, 1, newrel);
2680 *again = TRUE;
2681 }
2682 break;
2683
2684 case 0x38: /* BRA pcdsp:16 */
2685 if (-128 + alignment_glue <= pcrel
2686 && pcrel <= 127 - alignment_glue)
2687 {
2688 insn[0] = 0x2e;
2689 SNIP (2, 1, newrel);
2690 *again = TRUE;
2691 }
2692 break;
2693
2694 case 0x2e: /* BRA pcdsp:8 */
2695 /* Note that there's a risk here of shortening things so
2696 much that we no longer fit this reloc; it *should*
2697 only happen when you branch across a branch, and that
2698 branch also devolves into BRA.S. "Real" code should
2699 be OK. */
2700 if (max_pcrel3 + alignment_glue <= pcrel
2701 && pcrel <= 10 - alignment_glue
2702 && allow_pcrel3)
2703 {
2704 insn[0] = 0x08;
2705 SNIP (1, 1, newrel);
2706 move_reloc (irel, srel, -1);
2707 *again = TRUE;
2708 }
2709 break;
2710
2711 case 0x05: /* BSR pcdsp:24 */
2712 if (-32768 + alignment_glue <= pcrel
2713 && pcrel <= 32765 - alignment_glue)
2714 {
2715 insn[0] = 0x39;
2716 SNIP (1, 1, newrel);
2717 *again = TRUE;
2718 }
2719 break;
2720
2721 case 0x3a: /* BEQ.W pcdsp:16 */
2722 case 0x3b: /* BNE.W pcdsp:16 */
2723 if (-128 + alignment_glue <= pcrel
2724 && pcrel <= 127 - alignment_glue)
2725 {
2726 insn[0] = 0x20 | (insn[0] & 1);
2727 SNIP (1, 1, newrel);
2728 *again = TRUE;
2729 }
2730 break;
2731
2732 case 0x20: /* BEQ.B pcdsp:8 */
2733 case 0x21: /* BNE.B pcdsp:8 */
2734 if (max_pcrel3 + alignment_glue <= pcrel
2735 && pcrel - alignment_glue <= 10
2736 && allow_pcrel3)
2737 {
2738 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2739 SNIP (1, 1, newrel);
2740 move_reloc (irel, srel, -1);
2741 *again = TRUE;
2742 }
2743 break;
2744
2745 case 0x16: /* synthetic BNE dsp24 */
2746 case 0x1e: /* synthetic BEQ dsp24 */
2747 if (-32767 + alignment_glue <= pcrel
2748 && pcrel <= 32766 - alignment_glue
2749 && insn[1] == 0x04)
2750 {
2751 if (insn[0] == 0x16)
2752 insn[0] = 0x3b;
2753 else
2754 insn[0] = 0x3a;
2755 /* We snip out the bytes at the end else the reloc
2756 will get moved too, and too much. */
2757 SNIP (3, 2, newrel);
2758 move_reloc (irel, srel, -1);
2759 *again = TRUE;
2760 }
2761 break;
2762 }
2763
2764 /* Special case - synthetic conditional branches, pcrel24.
2765 Note that EQ and NE have been handled above. */
2766 if ((insn[0] & 0xf0) == 0x20
2767 && insn[1] == 0x06
2768 && insn[2] == 0x04
2769 && srel->r_offset != irel->r_offset + 1
2770 && -32767 + alignment_glue <= pcrel
2771 && pcrel <= 32766 - alignment_glue)
2772 {
2773 insn[1] = 0x05;
2774 insn[2] = 0x38;
2775 SNIP (5, 1, newrel);
2776 *again = TRUE;
2777 }
2778
2779 /* Special case - synthetic conditional branches, pcrel16 */
2780 if ((insn[0] & 0xf0) == 0x20
2781 && insn[1] == 0x05
2782 && insn[2] == 0x38
2783 && srel->r_offset != irel->r_offset + 1
2784 && -127 + alignment_glue <= pcrel
2785 && pcrel <= 126 - alignment_glue)
2786 {
2787 int cond = (insn[0] & 0x0f) ^ 0x01;
2788
2789 insn[0] = 0x20 | cond;
2790 /* By moving the reloc first, we avoid having
2791 delete_bytes move it also. */
2792 move_reloc (irel, srel, -2);
2793 SNIP (2, 3, newrel);
2794 *again = TRUE;
2795 }
2796 }
2797
2798 BFD_ASSERT (nrelocs == 0);
2799
2800 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2801 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2802 because it may have one or two relocations. */
2803 if ((insn[0] & 0xfc) == 0xf8
2804 && (insn[1] & 0x80) == 0x00
2805 && (insn[0] & 0x03) != 0x03)
2806 {
2807 int dcode, icode, reg, ioff, dscale, ilen;
2808 bfd_vma disp_val = 0;
2809 long imm_val = 0;
2810 Elf_Internal_Rela * disp_rel = 0;
2811 Elf_Internal_Rela * imm_rel = 0;
2812
2813 /* Reset this. */
2814 srel = irel;
2815
2816 dcode = insn[0] & 0x03;
2817 icode = (insn[1] >> 2) & 0x03;
2818 reg = (insn[1] >> 4) & 0x0f;
2819
2820 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2821
2822 /* Figure out what the dispacement is. */
2823 if (dcode == 1 || dcode == 2)
2824 {
2825 /* There's a displacement. See if there's a reloc for it. */
2826 if (srel[1].r_offset == irel->r_offset + 2)
2827 {
2828 GET_RELOC;
2829 disp_val = symval;
2830 disp_rel = srel;
2831 }
2832 else
2833 {
2834 if (dcode == 1)
2835 disp_val = insn[2];
2836 else
2837 {
2838#if RX_OPCODE_BIG_ENDIAN
2839 disp_val = insn[2] * 256 + insn[3];
2840#else
2841 disp_val = insn[2] + insn[3] * 256;
2842#endif
2843 }
2844 switch (insn[1] & 3)
2845 {
2846 case 1:
2847 disp_val *= 2;
2848 scale = 2;
2849 break;
2850 case 2:
2851 disp_val *= 4;
2852 scale = 4;
2853 break;
2854 }
2855 }
2856 }
2857
2858 dscale = scale;
2859
2860 /* Figure out what the immediate is. */
2861 if (srel[1].r_offset == irel->r_offset + ioff)
2862 {
2863 GET_RELOC;
2864 imm_val = (long) symval;
2865 imm_rel = srel;
2866 }
2867 else
2868 {
2869 unsigned char * ip = insn + ioff;
2870
2871 switch (icode)
2872 {
2873 case 1:
2874 /* For byte writes, we don't sign extend. Makes the math easier later. */
2875 if (scale == 1)
2876 imm_val = ip[0];
2877 else
2878 imm_val = (char) ip[0];
2879 break;
2880 case 2:
2881#if RX_OPCODE_BIG_ENDIAN
2882 imm_val = ((char) ip[0] << 8) | ip[1];
2883#else
2884 imm_val = ((char) ip[1] << 8) | ip[0];
2885#endif
2886 break;
2887 case 3:
2888#if RX_OPCODE_BIG_ENDIAN
2889 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2890#else
2891 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2892#endif
2893 break;
2894 case 0:
2895#if RX_OPCODE_BIG_ENDIAN
2896 imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2897#else
2898 imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2899#endif
2900 break;
2901 }
2902 }
2903
2904 ilen = 2;
2905
2906 switch (dcode)
2907 {
2908 case 1:
2909 ilen += 1;
2910 break;
2911 case 2:
2912 ilen += 2;
2913 break;
2914 }
2915
2916 switch (icode)
2917 {
2918 case 1:
2919 ilen += 1;
2920 break;
2921 case 2:
2922 ilen += 2;
2923 break;
2924 case 3:
2925 ilen += 3;
2926 break;
2927 case 4:
2928 ilen += 4;
2929 break;
2930 }
2931
2932 /* The shortcut happens when the immediate is 0..255,
2933 register r0 to r7, and displacement (scaled) 0..31. */
2934
2935 if (0 <= imm_val && imm_val <= 255
2936 && 0 <= reg && reg <= 7
2937 && disp_val / dscale <= 31)
2938 {
2939 insn[0] = 0x3c | (insn[1] & 0x03);
2940 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2941 insn[2] = imm_val;
2942
2943 if (disp_rel)
2944 {
2945 int newrel = R_RX_NONE;
2946
2947 switch (dscale)
2948 {
2949 case 1:
2950 newrel = R_RX_RH_ABS5p8B;
2951 break;
2952 case 2:
2953 newrel = R_RX_RH_ABS5p8W;
2954 break;
2955 case 4:
2956 newrel = R_RX_RH_ABS5p8L;
2957 break;
2958 }
2959 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2960 move_reloc (irel, disp_rel, -1);
2961 }
2962 if (imm_rel)
2963 {
2964 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
2965 move_reloc (disp_rel ? disp_rel : irel,
2966 imm_rel,
2967 irel->r_offset - imm_rel->r_offset + 2);
2968 }
2969
2970 SNIPNR (3, ilen - 3);
2971 *again = TRUE;
2972
2973 /* We can't relax this new opcode. */
2974 irel->r_addend = 0;
2975 }
2976 }
2977 }
2978
2979 /* We can't reliably relax branches to DIR3U_PCREL unless we know
2980 whatever they're branching over won't shrink any more. If we're
2981 basically done here, do one more pass just for branches - but
2982 don't request a pass after that one! */
2983 if (!*again && !allow_pcrel3)
2984 {
2985 bfd_boolean ignored;
2986
2987 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
2988 }
2989
2990 return TRUE;
2991
2992 error_return:
2993 if (free_relocs != NULL)
2994 free (free_relocs);
2995
2996 if (free_contents != NULL)
2997 free (free_contents);
2998
2999 if (shndx_buf != NULL)
3000 {
3001 shndx_hdr->contents = NULL;
3002 free (shndx_buf);
3003 }
3004
3005 if (free_intsyms != NULL)
3006 free (free_intsyms);
3007
3008 return FALSE;
3009}
3010
3011static bfd_boolean
3012elf32_rx_relax_section_wrapper (bfd * abfd,
3013 asection * sec,
3014 struct bfd_link_info * link_info,
3015 bfd_boolean * again)
3016{
3017 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
3018}
3019\f
3020/* Function to set the ELF flag bits. */
3021
3022static bfd_boolean
3023rx_elf_set_private_flags (bfd * abfd, flagword flags)
3024{
3025 elf_elfheader (abfd)->e_flags = flags;
3026 elf_flags_init (abfd) = TRUE;
3027 return TRUE;
3028}
3029
3030static bfd_boolean no_warn_mismatch = FALSE;
84bff83f 3031static bfd_boolean ignore_lma = TRUE;
c7927a3c 3032
84bff83f 3033void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean);
c7927a3c
NC		 3034
3035void
84bff83f
NC		 3036bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch,
3037 bfd_boolean user_ignore_lma)
c7927a3c
NC		 3038{
3039 no_warn_mismatch = user_no_warn_mismatch;
84bff83f 3040 ignore_lma = user_ignore_lma;
c7927a3c
NC		 3041}
3042
708e2187
NC		 3043/* Converts FLAGS into a descriptive string.
3044 Returns a static pointer. */
3045
3046static const char *
3047describe_flags (flagword flags)
3048{
3049 static char buf [128];
3050
3051 buf[0] = 0;
3052
3053 if (flags & E_FLAG_RX_64BIT_DOUBLES)
3054 strcat (buf, "64-bit doubles");
3055 else
3056 strcat (buf, "32-bit doubles");
3057
3058 if (flags & E_FLAG_RX_DSP)
3059 strcat (buf, ", dsp");
3060 else
3061 strcat (buf, ", no dsp");
3062
3063 if (flags & E_FLAG_RX_PID)
3064 strcat (buf, ", pid");
3065 else
3066 strcat (buf, ", no pid");
3067
3068 if (flags & E_FLAG_RX_ABI)
3069 strcat (buf, ", RX ABI");
3070 else
3071 strcat (buf, ", GCC ABI");
3072
3073 return buf;
3074}
3075
c7927a3c
NC		 3076/* Merge backend specific data from an object file to the output
3077 object file when linking. */
3078
3079static bfd_boolean
3080rx_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
3081{
3082 flagword old_flags;
3083 flagword new_flags;
3084 bfd_boolean error = FALSE;
3085
3086 new_flags = elf_elfheader (ibfd)->e_flags;
3087 old_flags = elf_elfheader (obfd)->e_flags;
3088
3089 if (!elf_flags_init (obfd))
3090 {
3091 /* First call, no flags set. */
3092 elf_flags_init (obfd) = TRUE;
3093 elf_elfheader (obfd)->e_flags = new_flags;
3094 }
3095 else if (old_flags != new_flags)
3096 {
708e2187
NC		 3097 flagword known_flags;
3098
3099 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
3100 | E_FLAG_RX_DSP | E_FLAG_RX_PID;
c7927a3c
NC		 3101
3102 if ((old_flags ^ new_flags) & known_flags)
3103 {
3104 /* Only complain if flag bits we care about do not match.
3105 Other bits may be set, since older binaries did use some
3106 deprecated flags. */
3107 if (no_warn_mismatch)
3108 {
3109 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
3110 }
3111 else
3112 {
708e2187
NC		 3113 _bfd_error_handler ("There is a conflict merging the ELF header flags from %s",
3114 bfd_get_filename (ibfd));
3115 _bfd_error_handler (" the input file's flags: %s",
3116 describe_flags (new_flags));
3117 _bfd_error_handler (" the output file's flags: %s",
3118 describe_flags (old_flags));
c7927a3c
NC		 3119 error = TRUE;
3120 }
3121 }
3122 else
3123 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
3124 }
3125
3126 if (error)
3127 bfd_set_error (bfd_error_bad_value);
3128
3129 return !error;
3130}
3131\f
3132static bfd_boolean
3133rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
3134{
3135 FILE * file = (FILE *) ptr;
3136 flagword flags;
3137
3138 BFD_ASSERT (abfd != NULL && ptr != NULL);
3139
3140 /* Print normal ELF private data. */
3141 _bfd_elf_print_private_bfd_data (abfd, ptr);
3142
3143 flags = elf_elfheader (abfd)->e_flags;
3144 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
3145
6d8a3ede 3146 fprintf (file, "%s", describe_flags (flags));
c7927a3c
NC		 3147 return TRUE;
3148}
3149
3150/* Return the MACH for an e_flags value. */
3151
3152static int
708e2187 3153elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
c7927a3c 3154{
708e2187
NC		 3155#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
3156 Need to sort out how these flag bits are used.
3157 For now we assume that the flags are OK. */
c7927a3c 3158 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
708e2187 3159#endif
c7927a3c
NC		 3160 return bfd_mach_rx;
3161
3162 return 0;
3163}
3164
3165static bfd_boolean
3166rx_elf_object_p (bfd * abfd)
3167{
1ce74905
DD		 3168 int i;
3169 unsigned int u;
3170 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr;
3171 int nphdrs = elf_elfheader (abfd)->e_phnum;
3172 sec_ptr bsec;
fc87b9e8 3173 static int saw_be = FALSE;
1ce74905 3174
4c422395
DD		 3175 /* We never want to automatically choose the non-swapping big-endian
3176 target. The user can only get that explicitly, such as with -I
3177 and objcopy. */
6d00b590 3178 if (abfd->xvec == &rx_elf32_be_ns_vec
4c422395
DD		 3179 && abfd->target_defaulted)
3180 return FALSE;
3181
fc87b9e8
DD		 3182 /* BFD->target_defaulted is not set to TRUE when a target is chosen
3183 as a fallback, so we check for "scanning" to know when to stop
3184 using the non-swapping target. */
6d00b590 3185 if (abfd->xvec == &rx_elf32_be_ns_vec
fc87b9e8
DD		 3186 && saw_be)
3187 return FALSE;
6d00b590 3188 if (abfd->xvec == &rx_elf32_be_vec)
fc87b9e8
DD		 3189 saw_be = TRUE;
3190
c7927a3c
NC		 3191 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
3192 elf32_rx_machine (abfd));
1ce74905
DD		 3193
3194 /* For each PHDR in the object, we must find some section that
3195 corresponds (based on matching file offsets) and use its VMA
3196 information to reconstruct the p_vaddr field we clobbered when we
3197 wrote it out. */
3198 for (i=0; i<nphdrs; i++)
3199 {
3200 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++)
3201 {
3202 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
3203
74b1e045
DD		 3204 if (phdr[i].p_filesz
3205 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset
1ce74905
DD		 3206 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
3207 {
3208 /* Found one! The difference between the two addresses,
3209 plus the difference between the two file offsets, is
3210 enough information to reconstruct the lma. */
3211
3212 /* Example where they aren't:
3213 PHDR[1] = lma fffc0100 offset 00002010 size 00000100
3214 SEC[6] = vma 00000050 offset 00002050 size 00000040
3215
3216 The correct LMA for the section is fffc0140 + (2050-2010).
3217 */
3218
92ff23a1 3219 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
1ce74905
DD		 3220 break;
3221 }
3222 }
3223
3224 /* We must update the bfd sections as well, so we don't stop
3225 with one match. */
3226 bsec = abfd->sections;
3227 while (bsec)
3228 {
74b1e045
DD		 3229 if (phdr[i].p_filesz
3230 && phdr[i].p_vaddr <= bsec->vma
1ce74905
DD		 3231 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
3232 {
3233 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
3234 }
3235 bsec = bsec->next;
3236 }
3237 }
3238
c7927a3c
NC		 3239 return TRUE;
3240}
3241 \f
3242
3243#ifdef DEBUG
3244void
9ccb8af9 3245rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
c7927a3c
NC		 3246{
3247 size_t locsymcount;
3248 Elf_Internal_Sym * isymbuf;
3249 Elf_Internal_Sym * isymend;
3250 Elf_Internal_Sym * isym;
3251 Elf_Internal_Shdr * symtab_hdr;
3252 bfd_boolean free_internal = FALSE, free_external = FALSE;
3253 char * st_info_str;
3254 char * st_info_stb_str;
3255 char * st_other_str;
3256 char * st_shndx_str;
3257
3258 if (! internal_syms)
3259 {
3260 internal_syms = bfd_malloc (1000);
3261 free_internal = 1;
3262 }
3263 if (! external_syms)
3264 {
3265 external_syms = bfd_malloc (1000);
3266 free_external = 1;
3267 }
3268
3269 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3270 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
3271 if (free_internal)
3272 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3273 symtab_hdr->sh_info, 0,
3274 internal_syms, external_syms, NULL);
3275 else
3276 isymbuf = internal_syms;
3277 isymend = isymbuf + locsymcount;
3278
3279 for (isym = isymbuf ; isym < isymend ; isym++)
3280 {
3281 switch (ELF_ST_TYPE (isym->st_info))
3282 {
b707aa49
NC		 3283 case STT_FUNC: st_info_str = "STT_FUNC"; break;
3284 case STT_SECTION: st_info_str = "STT_SECTION"; break;
3285 case STT_FILE: st_info_str = "STT_FILE"; break;
3286 case STT_OBJECT: st_info_str = "STT_OBJECT"; break;
3287 case STT_TLS: st_info_str = "STT_TLS"; break;
c7927a3c
NC		 3288 default: st_info_str = "";
3289 }
3290 switch (ELF_ST_BIND (isym->st_info))
3291 {
b707aa49
NC		 3292 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break;
3293 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break;
c7927a3c
NC		 3294 default: st_info_stb_str = "";
3295 }
3296 switch (ELF_ST_VISIBILITY (isym->st_other))
3297 {
b707aa49
NC		 3298 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break;
3299 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break;
3300 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break;
c7927a3c
NC		 3301 default: st_other_str = "";
3302 }
3303 switch (isym->st_shndx)
3304 {
b707aa49
NC		 3305 case SHN_ABS: st_shndx_str = "SHN_ABS"; break;
3306 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break;
3307 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break;
c7927a3c
NC		 3308 default: st_shndx_str = "";
3309 }
3310
3311 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3312 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3313 isym,
3314 (unsigned long) isym->st_value,
3315 (unsigned long) isym->st_size,
3316 isym->st_name,
3317 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3318 isym->st_name),
3319 isym->st_info, st_info_str, st_info_stb_str,
3320 isym->st_other, st_other_str,
3321 isym->st_shndx, st_shndx_str);
3322 }
3323 if (free_internal)
3324 free (internal_syms);
3325 if (free_external)
3326 free (external_syms);
3327}
3328
3329char *
3330rx_get_reloc (long reloc)
3331{
3332 if (0 <= reloc && reloc < R_RX_max)
3333 return rx_elf_howto_table[reloc].name;
3334 return "";
3335}
3336#endif /* DEBUG */
3337
3338\f
3339/* We must take care to keep the on-disk copy of any code sections
3340 that are fully linked swapped if the target is big endian, to match
3341 the Renesas tools. */
3342
3343/* The rule is: big endian object that are final-link executables,
3344 have code sections stored with 32-bit words swapped relative to
3345 what you'd get by default. */
3346
3347static bfd_boolean
3348rx_get_section_contents (bfd * abfd,
3349 sec_ptr section,
3350 void * location,
3351 file_ptr offset,
3352 bfd_size_type count)
3353{
3354 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3355 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3356 bfd_boolean rv;
3357
3358#ifdef DJDEBUG
3359 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3360 (long) offset, (long) count, section->name,
3361 bfd_big_endian(abfd) ? "be" : "le",
3362 exec, s_code, (long unsigned) section->filepos,
3363 (long unsigned) offset);
3364#endif
3365
3366 if (exec && s_code && bfd_big_endian (abfd))
3367 {
3368 char * cloc = (char *) location;
3369 bfd_size_type cnt, end_cnt;
3370
3371 rv = TRUE;
3372
3373 /* Fetch and swap unaligned bytes at the beginning. */
3374 if (offset % 4)
3375 {
3376 char buf[4];
3377
3378 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3379 (offset & -4), 4);
3380 if (!rv)
3381 return FALSE;
3382
3383 bfd_putb32 (bfd_getl32 (buf), buf);
3384
3385 cnt = 4 - (offset % 4);
3386 if (cnt > count)
3387 cnt = count;
3388
3389 memcpy (location, buf + (offset % 4), cnt);
3390
3391 count -= cnt;
3392 offset += cnt;
3393 cloc += count;
3394 }
3395
3396 end_cnt = count % 4;
3397
3398 /* Fetch and swap the middle bytes. */
3399 if (count >= 4)
3400 {
3401 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3402 count - end_cnt);
3403 if (!rv)
3404 return FALSE;
3405
3406 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3407 bfd_putb32 (bfd_getl32 (cloc), cloc);
3408 }
3409
3410 /* Fetch and swap the end bytes. */
3411 if (end_cnt > 0)
3412 {
3413 char buf[4];
3414
3415 /* Fetch the end bytes. */
3416 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3417 offset + count - end_cnt, 4);
3418 if (!rv)
3419 return FALSE;
3420
3421 bfd_putb32 (bfd_getl32 (buf), buf);
3422 memcpy (cloc, buf, end_cnt);
3423 }
3424 }
3425 else
3426 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3427
3428 return rv;
3429}
3430
3431#ifdef DJDEBUG
3432static bfd_boolean
3433rx2_set_section_contents (bfd * abfd,
3434 sec_ptr section,
3435 const void * location,
3436 file_ptr offset,
3437 bfd_size_type count)
3438{
3439 bfd_size_type i;
3440
3441 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3442 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3443 for (i = 0; i < count; i++)
3444 {
3445 if (i % 16 == 0 && i > 0)
3446 fprintf (stderr, "\n");
3447
3448 if (i % 16 && i % 4 == 0)
3449 fprintf (stderr, " ");
3450
3451 if (i % 16 == 0)
3452 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3453
3454 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3455 }
3456 fprintf (stderr, "\n");
3457
3458 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3459}
3460#define _bfd_elf_set_section_contents rx2_set_section_contents
3461#endif
3462
3463static bfd_boolean
3464rx_set_section_contents (bfd * abfd,
3465 sec_ptr section,
3466 const void * location,
3467 file_ptr offset,
3468 bfd_size_type count)
3469{
3470 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3471 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3472 bfd_boolean rv;
3473 char * swapped_data = NULL;
3474 bfd_size_type i;
3475 bfd_vma caddr = section->vma + offset;
3476 file_ptr faddr = 0;
3477 bfd_size_type scount;
3478
3479#ifdef DJDEBUG
3480 bfd_size_type i;
3481
3482 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3483 (long) offset, (long) count, section->name,
3484 bfd_big_endian (abfd) ? "be" : "le",
3485 exec, s_code);
3486
3487 for (i = 0; i < count; i++)
3488 {
3489 int a = section->vma + offset + i;
3490
3491 if (a % 16 == 0 && a > 0)
3492 fprintf (stderr, "\n");
3493
3494 if (a % 16 && a % 4 == 0)
3495 fprintf (stderr, " ");
3496
3497 if (a % 16 == 0 || i == 0)
3498 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3499
3500 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3501 }
3502
3503 fprintf (stderr, "\n");
3504#endif
3505
3506 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3507 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3508
3509 while (count > 0 && caddr > 0 && caddr % 4)
3510 {
3511 switch (caddr % 4)
3512 {
3513 case 0: faddr = offset + 3; break;
3514 case 1: faddr = offset + 1; break;
3515 case 2: faddr = offset - 1; break;
3516 case 3: faddr = offset - 3; break;
3517 }
3518
3519 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3520 if (! rv)
3521 return rv;
3522
3523 location ++;
3524 offset ++;
3525 count --;
3526 caddr ++;
3527 }
3528
3529 scount = (int)(count / 4) * 4;
3530 if (scount > 0)
3531 {
3532 char * cloc = (char *) location;
3533
3534 swapped_data = (char *) bfd_alloc (abfd, count);
3535
3536 for (i = 0; i < count; i += 4)
3537 {
3538 bfd_vma v = bfd_getl32 (cloc + i);
3539 bfd_putb32 (v, swapped_data + i);
3540 }
3541
3542 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3543
3544 if (!rv)
3545 return rv;
3546 }
3547
3548 count -= scount;
3549 location += scount;
3550 offset += scount;
3551
3552 if (count > 0)
3553 {
3554 caddr = section->vma + offset;
3555 while (count > 0)
3556 {
3557 switch (caddr % 4)
3558 {
3559 case 0: faddr = offset + 3; break;
3560 case 1: faddr = offset + 1; break;
3561 case 2: faddr = offset - 1; break;
3562 case 3: faddr = offset - 3; break;
3563 }
3564 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3565 if (! rv)
3566 return rv;
3567
3568 location ++;
3569 offset ++;
3570 count --;
3571 caddr ++;
3572 }
3573 }
3574
3575 return TRUE;
3576}
3577
3578static bfd_boolean
3579rx_final_link (bfd * abfd, struct bfd_link_info * info)
3580{
3581 asection * o;
3582
3583 for (o = abfd->sections; o != NULL; o = o->next)
3584 {
3585#ifdef DJDEBUG
3586 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3587 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3588#endif
3589 if (o->flags & SEC_CODE
3590 && bfd_big_endian (abfd)
e57278ef 3591 && o->size % 4)
c7927a3c
NC		 3592 {
3593#ifdef DJDEBUG
3594 fprintf (stderr, "adjusting...\n");
3595#endif
3596 o->size += 4 - (o->size % 4);
c7927a3c
NC		 3597 }
3598 }
3599
3600 return bfd_elf_final_link (abfd, info);
3601}
3602
3603static bfd_boolean
3604elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
3605 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3606{
3607 const struct elf_backend_data * bed;
3608 struct elf_obj_tdata * tdata;
3609 Elf_Internal_Phdr * phdr;
3610 unsigned int count;
3611 unsigned int i;
3612
3613 bed = get_elf_backend_data (abfd);
3614 tdata = elf_tdata (abfd);
3615 phdr = tdata->phdr;
12bd6957 3616 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr;
c7927a3c 3617
84bff83f
NC		 3618 if (ignore_lma)
3619 for (i = count; i-- != 0;)
3620 if (phdr[i].p_type == PT_LOAD)
3621 {
3622 /* The Renesas tools expect p_paddr to be zero. However,
3623 there is no other way to store the writable data in ROM for
3624 startup initialization. So, we let the linker *think*
3625 we're using paddr and vaddr the "usual" way, but at the
3626 last minute we move the paddr into the vaddr (which is what
3627 the simulator uses) and zero out paddr. Note that this
3628 does not affect the section headers, just the program
3629 headers. We hope. */
c7927a3c 3630 phdr[i].p_vaddr = phdr[i].p_paddr;
84bff83f 3631#if 0 /* If we zero out p_paddr, then the LMA in the section table
c7927a3c 3632 becomes wrong. */
84bff83f
NC		 3633 phdr[i].p_paddr = 0;
3634#endif
3635 }
c7927a3c
NC		 3636
3637 return TRUE;
3638}
708e2187
NC		 3639
3640/* The default literal sections should always be marked as "code" (i.e.,
3641 SHF_EXECINSTR). This is particularly important for big-endian mode
3642 when we do not want their contents byte reversed. */
3643static const struct bfd_elf_special_section elf32_rx_special_sections[] =
3644{
3645 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3646 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3647 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3648 { NULL, 0, 0, 0, 0 }
3649};
7a2f2d82
DD		 3650\f
3651typedef struct {
3652 bfd *abfd;
3653 struct bfd_link_info *info;
3654 bfd_vma table_start;
3655 int table_size;
3656 bfd_vma *table_handlers;
3657 bfd_vma table_default_handler;
3658 struct bfd_link_hash_entry **table_entries;
3659 struct bfd_link_hash_entry *table_default_entry;
3660 FILE *mapfile;
3661} RX_Table_Info;
3662
3663static bfd_boolean
3664rx_table_find (struct bfd_hash_entry *vent, void *vinfo)
3665{
3666 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3667 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3668 const char *name; /* of the symbol we've found */
3669 asection *sec;
3670 struct bfd *abfd;
3671 int idx;
3672 const char *tname; /* name of the table */
3673 bfd_vma start_addr, end_addr;
3674 char *buf;
3675 struct bfd_link_hash_entry * h;
3676
3677 /* We're looking for globally defined symbols of the form
3678 $tablestart$<NAME>. */
3679 if (ent->type != bfd_link_hash_defined
3680 && ent->type != bfd_link_hash_defweak)
3681 return TRUE;
3682
3683 name = ent->root.string;
3684 sec = ent->u.def.section;
3685 abfd = sec->owner;
3686
3687 if (strncmp (name, "$tablestart$", 12))
3688 return TRUE;
3689
3690 sec->flags |= SEC_KEEP;
3691
3692 tname = name + 12;
3693
3694 start_addr = ent->u.def.value;
3695
3696 /* At this point, we can't build the table but we can (and must)
3697 find all the related symbols and mark their sections as SEC_KEEP
3698 so we don't garbage collect them. */
3699
3700 buf = (char *) malloc (12 + 10 + strlen (tname));
3701
3702 sprintf (buf, "$tableend$%s", tname);
3703 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3704 if (!h || (h->type != bfd_link_hash_defined
3705 && h->type != bfd_link_hash_defweak))
3706 {
3707 _bfd_error_handler (_("%B:%A: table %s missing corresponding %s"),
3708 abfd, sec, name, buf);
3709 return TRUE;
3710 }
3711
3712 if (h->u.def.section != ent->u.def.section)
3713 {
3714 _bfd_error_handler (_("%B:%A: %s and %s must be in the same input section"),
3715 h->u.def.section->owner, h->u.def.section,
3716 name, buf);
3717 return TRUE;
3718 }
3719
3720 end_addr = h->u.def.value;
3721
3722 sprintf (buf, "$tableentry$default$%s", tname);
3723 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3724 if (h && (h->type == bfd_link_hash_defined
3725 || h->type == bfd_link_hash_defweak))
3726 {
3727 h->u.def.section->flags |= SEC_KEEP;
3728 }
3729
3730 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3731 {
3732 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3733 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3734 if (h && (h->type == bfd_link_hash_defined
3735 || h->type == bfd_link_hash_defweak))
3736 {
3737 h->u.def.section->flags |= SEC_KEEP;
3738 }
3739 }
3740
3741 /* Return TRUE to keep scanning, FALSE to end the traversal. */
3742 return TRUE;
3743}
3744
3745/* We need to check for table entry symbols and build the tables, and
3746 we need to do it before the linker does garbage collection. This function is
3747 called once per input object file. */
3748static bfd_boolean
3749rx_check_directives
3750 (bfd * abfd ATTRIBUTE_UNUSED,
3751 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3752{
3753 RX_Table_Info stuff;
3754
3755 stuff.abfd = abfd;
3756 stuff.info = info;
3757 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff);
3758
3759 return TRUE;
3760}
3761
3762\f
3763static bfd_boolean
3764rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo)
3765{
3766 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3767 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3768 int idx;
3769 const char *name;
3770 bfd_vma addr;
3771
3772 /* See if the symbol ENT has an address listed in the table, and
3773 isn't a debug/special symbol. If so, put it in the table. */
3774
3775 if (ent->type != bfd_link_hash_defined
3776 && ent->type != bfd_link_hash_defweak)
3777 return TRUE;
3778
3779 name = ent->root.string;
3780
3781 if (name[0] == '$' || name[0] == '.' || name[0] < ' ')
3782 return TRUE;
3783
3784 addr = (ent->u.def.value
3785 + ent->u.def.section->output_section->vma
3786 + ent->u.def.section->output_offset);
3787
3788 for (idx = 0; idx < info->table_size; idx ++)
3789 if (addr == info->table_handlers[idx])
3790 info->table_entries[idx] = ent;
3791
3792 if (addr == info->table_default_handler)
3793 info->table_default_entry = ent;
3794
3795 return TRUE;
3796}
3797
3798static bfd_boolean
3799rx_table_map (struct bfd_hash_entry *vent, void *vinfo)
3800{
3801 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3802 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3803 const char *name; /* of the symbol we've found */
7a2f2d82
DD		 3804 int idx;
3805 const char *tname; /* name of the table */
3806 bfd_vma start_addr, end_addr;
3807 char *buf;
3808 struct bfd_link_hash_entry * h;
3809 int need_elipses;
3810
3811 /* We're looking for globally defined symbols of the form
3812 $tablestart$<NAME>. */
3813 if (ent->type != bfd_link_hash_defined
3814 && ent->type != bfd_link_hash_defweak)
3815 return TRUE;
3816
3817 name = ent->root.string;
7a2f2d82
DD		 3818
3819 if (strncmp (name, "$tablestart$", 12))
3820 return TRUE;
3821
3822 tname = name + 12;
3823 start_addr = (ent->u.def.value
3824 + ent->u.def.section->output_section->vma
3825 + ent->u.def.section->output_offset);
3826
3827 buf = (char *) malloc (12 + 10 + strlen (tname));
3828
3829 sprintf (buf, "$tableend$%s", tname);
3830 end_addr = get_symbol_value_maybe (buf, info->info);
3831
3832 sprintf (buf, "$tableentry$default$%s", tname);
3833 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3834 if (h)
3835 {
3836 info->table_default_handler = (h->u.def.value
3837 + h->u.def.section->output_section->vma
3838 + h->u.def.section->output_offset);
3839 }
3840 else
3841 /* Zero is a valid handler address! */
3842 info->table_default_handler = (bfd_vma) (-1);
3843 info->table_default_entry = NULL;
3844
3845 info->table_start = start_addr;
3846 info->table_size = (int) (end_addr - start_addr) / 4;
3847 info->table_handlers = (bfd_vma *) malloc (info->table_size * sizeof (bfd_vma));
3848 info->table_entries = (struct bfd_link_hash_entry **) malloc (info->table_size * sizeof (struct bfd_link_hash_entry));
3849
3850 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3851 {
3852 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3853 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3854 if (h && (h->type == bfd_link_hash_defined
3855 || h->type == bfd_link_hash_defweak))
3856 {
3857 info->table_handlers[idx] = (h->u.def.value
3858 + h->u.def.section->output_section->vma
3859 + h->u.def.section->output_offset);
3860 }
3861 else
3862 info->table_handlers[idx] = info->table_default_handler;
3863 info->table_entries[idx] = NULL;
3864 }
3865
3866 free (buf);
3867
3868 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info);
3869
33ac0ca1 3870 fprintf (info->mapfile, "\nRX Vector Table: %s has %d entries at 0x%08" BFD_VMA_FMT "x\n\n",
7a2f2d82
DD		 3871 tname, info->table_size, start_addr);
3872
3873 if (info->table_default_entry)
33ac0ca1 3874 fprintf (info->mapfile, " default handler is: %s at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3875 info->table_default_entry->root.string,
3876 info->table_default_handler);
3877 else if (info->table_default_handler != (bfd_vma)(-1))
33ac0ca1 3878 fprintf (info->mapfile, " default handler is at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3879 info->table_default_handler);
3880 else
3881 fprintf (info->mapfile, " no default handler\n");
3882
3883 need_elipses = 1;
3884 for (idx = 0; idx < info->table_size; idx ++)
3885 {
3886 if (info->table_handlers[idx] == info->table_default_handler)
3887 {
3888 if (need_elipses)
3889 fprintf (info->mapfile, " . . .\n");
3890 need_elipses = 0;
3891 continue;
3892 }
3893 need_elipses = 1;
3894
33ac0ca1 3895 fprintf (info->mapfile, " 0x%08" BFD_VMA_FMT "x [%3d] ", start_addr + 4 * idx, idx);
7a2f2d82
DD		 3896
3897 if (info->table_handlers[idx] == (bfd_vma) (-1))
3898 fprintf (info->mapfile, "(no handler found)\n");
3899
3900 else if (info->table_handlers[idx] == info->table_default_handler)
3901 {
3902 if (info->table_default_entry)
3903 fprintf (info->mapfile, "(default)\n");
3904 else
3905 fprintf (info->mapfile, "(default)\n");
3906 }
3907
3908 else if (info->table_entries[idx])
3909 {
33ac0ca1 3910 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x %s\n", info->table_handlers[idx], info->table_entries[idx]->root.string);
7a2f2d82
DD		 3911 }
3912
3913 else
3914 {
33ac0ca1 3915 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x ???\n", info->table_handlers[idx]);
7a2f2d82
DD		 3916 }
3917 }
3918 if (need_elipses)
3919 fprintf (info->mapfile, " . . .\n");
3920
3921 return TRUE;
3922}
3923
3924void
3925rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile)
3926{
3927 /* We scan the symbol table looking for $tableentry$'s, and for
3928 each, try to deduce which handlers go with which entries. */
3929
3930 RX_Table_Info stuff;
3931
3932 stuff.abfd = obfd;
3933 stuff.info = info;
3934 stuff.mapfile = mapfile;
3935 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff);
3936}
3937
c7927a3c
NC		 3938\f
3939#define ELF_ARCH bfd_arch_rx
3940#define ELF_MACHINE_CODE EM_RX
3941#define ELF_MAXPAGESIZE 0x1000
3942
6d00b590 3943#define TARGET_BIG_SYM rx_elf32_be_vec
c7927a3c
NC		 3944#define TARGET_BIG_NAME "elf32-rx-be"
3945
6d00b590 3946#define TARGET_LITTLE_SYM rx_elf32_le_vec
c7927a3c
NC		 3947#define TARGET_LITTLE_NAME "elf32-rx-le"
3948
3949#define elf_info_to_howto_rel NULL
3950#define elf_info_to_howto rx_info_to_howto_rela
3951#define elf_backend_object_p rx_elf_object_p
3952#define elf_backend_relocate_section rx_elf_relocate_section
3953#define elf_symbol_leading_char ('_')
3954#define elf_backend_can_gc_sections 1
3955#define elf_backend_modify_program_headers elf32_rx_modify_program_headers
3956
3957#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
3958#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
3959#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
3960#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
3961#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
3962#define bfd_elf32_get_section_contents rx_get_section_contents
3963#define bfd_elf32_set_section_contents rx_set_section_contents
3964#define bfd_elf32_bfd_final_link rx_final_link
3965#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
708e2187 3966#define elf_backend_special_sections elf32_rx_special_sections
7a2f2d82 3967#define elf_backend_check_directives rx_check_directives
c7927a3c
NC		 3968
3969#include "elf32-target.h"
4c422395
DD		 3970
3971/* We define a second big-endian target that doesn't have the custom
3972 section get/set hooks, for times when we want to preserve the
3973 pre-swapped .text sections (like objcopy). */
3974
3975#undef TARGET_BIG_SYM
6d00b590 3976#define TARGET_BIG_SYM rx_elf32_be_ns_vec
4c422395
DD		 3977#undef TARGET_BIG_NAME
3978#define TARGET_BIG_NAME "elf32-rx-be-ns"
3979#undef TARGET_LITTLE_SYM
3980
3981#undef bfd_elf32_get_section_contents
3982#undef bfd_elf32_set_section_contents
3983
3984#undef elf32_bed
3985#define elf32_bed elf32_rx_be_ns_bed
3986
3987#include "elf32-target.h"
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