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c28c63d8 JB |
1 | /* Lattice Mico32 simulator support code |
2 | Contributed by Jon Beniston <[email protected]> | |
3 | ||
32d0add0 | 4 | Copyright (C) 2009-2015 Free Software Foundation, Inc. |
c28c63d8 JB |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | /* Main header for the LM32 simulator. */ | |
22 | ||
23 | #ifndef SIM_MAIN_H | |
24 | #define SIM_MAIN_H | |
25 | ||
26 | #define USING_SIM_BASE_H /* FIXME: quick hack */ | |
27 | ||
c28c63d8 JB |
28 | #include "symcat.h" |
29 | #include "sim-basics.h" | |
30 | #include "cgen-types.h" | |
31 | #include "lm32-desc.h" | |
32 | #include "lm32-opc.h" | |
33 | #include "arch.h" | |
34 | ||
c28c63d8 JB |
35 | #define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \ |
36 | do { \ | |
37 | if (cpu) /* null if ctrl-c */ \ | |
38 | sim_pc_set ((cpu), (cia)); \ | |
39 | } while (0) | |
40 | #define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \ | |
41 | do { \ | |
42 | sim_pc_set ((cpu), (cia)); \ | |
43 | } while (0) | |
44 | ||
45 | #include "sim-base.h" | |
46 | #include "cgen-sim.h" | |
47 | #include "lm32-sim.h" | |
48 | #include "opcode/cgen.h" | |
49 | \f | |
50 | /* The _sim_cpu struct. */ | |
51 | ||
52 | struct _sim_cpu | |
53 | { | |
54 | /* sim/common cpu base. */ | |
55 | sim_cpu_base base; | |
56 | ||
57 | /* Static parts of cgen. */ | |
58 | CGEN_CPU cgen_cpu; | |
59 | ||
60 | /* CPU specific parts go here. | |
61 | Note that in files that don't need to access these pieces WANT_CPU_FOO | |
62 | won't be defined and thus these parts won't appear. This is ok in the | |
63 | sense that things work. It is a source of bugs though. | |
64 | One has to of course be careful to not take the size of this | |
65 | struct and no structure members accessed in non-cpu specific files can | |
66 | go after here. Oh for a better language. */ | |
67 | #if defined (WANT_CPU_LM32BF) | |
68 | LM32BF_CPU_DATA cpu_data; | |
69 | #endif | |
70 | ||
71 | }; | |
72 | \f | |
73 | /* The sim_state struct. */ | |
74 | ||
75 | struct sim_state | |
76 | { | |
f95f4ed2 | 77 | sim_cpu *cpu[MAX_NR_PROCESSORS]; |
c28c63d8 JB |
78 | |
79 | CGEN_STATE cgen_state; | |
80 | ||
81 | sim_state_base base; | |
82 | }; | |
83 | \f | |
84 | /* Misc. */ | |
85 | ||
86 | /* Catch address exceptions. */ | |
87 | extern SIM_CORE_SIGNAL_FN lm32_core_signal; | |
88 | #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ | |
89 | lm32_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ | |
90 | (TRANSFER), (ERROR)) | |
91 | ||
92 | #endif /* SIM_MAIN_H */ |