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Commit | Line | Data |
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252b5132 | 1 | /* BFD back-end for ARM COFF files. |
7898deda | 2 | Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
5ff625e9 | 3 | 2000, 2001, 2002, 2003, 2004, 2005 |
252b5132 RH |
4 | Free Software Foundation, Inc. |
5 | Written by Cygnus Support. | |
6 | ||
d21356d8 | 7 | This file is part of BFD, the Binary File Descriptor library. |
252b5132 | 8 | |
d21356d8 NC |
9 | This program is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
252b5132 | 13 | |
d21356d8 NC |
14 | This program is distributed in the hope that it will be useful, |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
252b5132 | 18 | |
d21356d8 NC |
19 | You should have received a copy of the GNU General Public License |
20 | along with this program; if not, write to the Free Software | |
3e110533 | 21 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
252b5132 RH |
22 | |
23 | #include "bfd.h" | |
24 | #include "sysdep.h" | |
25 | #include "libbfd.h" | |
252b5132 | 26 | #include "coff/arm.h" |
252b5132 RH |
27 | #include "coff/internal.h" |
28 | ||
29 | #ifdef COFF_WITH_PE | |
30 | #include "coff/pe.h" | |
31 | #endif | |
32 | ||
33 | #include "libcoff.h" | |
34 | ||
35 | /* Macros for manipulation the bits in the flags field of the coff data | |
36 | structure. */ | |
dc810e39 AM |
37 | #define APCS_26_FLAG(abfd) \ |
38 | (coff_data (abfd)->flags & F_APCS_26) | |
39 | ||
40 | #define APCS_FLOAT_FLAG(abfd) \ | |
41 | (coff_data (abfd)->flags & F_APCS_FLOAT) | |
42 | ||
43 | #define PIC_FLAG(abfd) \ | |
44 | (coff_data (abfd)->flags & F_PIC) | |
45 | ||
46 | #define APCS_SET(abfd) \ | |
47 | (coff_data (abfd)->flags & F_APCS_SET) | |
48 | ||
49 | #define SET_APCS_FLAGS(abfd, flgs) \ | |
50 | do \ | |
51 | { \ | |
52 | coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \ | |
53 | coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \ | |
54 | } \ | |
55 | while (0) | |
56 | ||
57 | #define INTERWORK_FLAG(abfd) \ | |
58 | (coff_data (abfd)->flags & F_INTERWORK) | |
59 | ||
60 | #define INTERWORK_SET(abfd) \ | |
61 | (coff_data (abfd)->flags & F_INTERWORK_SET) | |
62 | ||
63 | #define SET_INTERWORK_FLAG(abfd, flg) \ | |
64 | do \ | |
65 | { \ | |
66 | coff_data (abfd)->flags &= ~F_INTERWORK; \ | |
67 | coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \ | |
68 | } \ | |
69 | while (0) | |
af74ae99 NC |
70 | |
71 | #ifndef NUM_ELEM | |
72 | #define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0])) | |
73 | #endif | |
d70910e8 | 74 | |
252b5132 | 75 | typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype; |
c8e7bf0d | 76 | /* Some typedefs for holding instructions. */ |
252b5132 RH |
77 | typedef unsigned long int insn32; |
78 | typedef unsigned short int insn16; | |
79 | ||
252b5132 RH |
80 | /* The linker script knows the section names for placement. |
81 | The entry_names are used to do simple name mangling on the stubs. | |
82 | Given a function name, and its type, the stub can be found. The | |
917583ad | 83 | name can be changed. The only requirement is the %s be present. */ |
d70910e8 | 84 | |
252b5132 RH |
85 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
86 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" | |
87 | ||
88 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" | |
89 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" | |
90 | ||
d70910e8 | 91 | /* Used by the assembler. */ |
917583ad | 92 | |
252b5132 | 93 | static bfd_reloc_status_type |
c8e7bf0d NC |
94 | coff_arm_reloc (bfd *abfd, |
95 | arelent *reloc_entry, | |
96 | asymbol *symbol ATTRIBUTE_UNUSED, | |
97 | void * data, | |
98 | asection *input_section ATTRIBUTE_UNUSED, | |
99 | bfd *output_bfd, | |
100 | char **error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
101 | { |
102 | symvalue diff; | |
c8e7bf0d NC |
103 | |
104 | if (output_bfd == NULL) | |
252b5132 RH |
105 | return bfd_reloc_continue; |
106 | ||
107 | diff = reloc_entry->addend; | |
108 | ||
dc810e39 AM |
109 | #define DOIT(x) \ |
110 | x = ((x & ~howto->dst_mask) \ | |
111 | | (((x & howto->src_mask) + diff) & howto->dst_mask)) | |
252b5132 RH |
112 | |
113 | if (diff != 0) | |
114 | { | |
115 | reloc_howto_type *howto = reloc_entry->howto; | |
116 | unsigned char *addr = (unsigned char *) data + reloc_entry->address; | |
117 | ||
118 | switch (howto->size) | |
119 | { | |
120 | case 0: | |
121 | { | |
122 | char x = bfd_get_8 (abfd, addr); | |
123 | DOIT (x); | |
124 | bfd_put_8 (abfd, x, addr); | |
125 | } | |
126 | break; | |
127 | ||
128 | case 1: | |
129 | { | |
130 | short x = bfd_get_16 (abfd, addr); | |
131 | DOIT (x); | |
dc810e39 | 132 | bfd_put_16 (abfd, (bfd_vma) x, addr); |
252b5132 RH |
133 | } |
134 | break; | |
135 | ||
136 | case 2: | |
137 | { | |
138 | long x = bfd_get_32 (abfd, addr); | |
139 | DOIT (x); | |
dc810e39 | 140 | bfd_put_32 (abfd, (bfd_vma) x, addr); |
252b5132 RH |
141 | } |
142 | break; | |
143 | ||
144 | default: | |
145 | abort (); | |
146 | } | |
147 | } | |
148 | ||
149 | /* Now let bfd_perform_relocation finish everything up. */ | |
150 | return bfd_reloc_continue; | |
151 | } | |
152 | ||
153 | /* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name() | |
154 | in this file), then TARGET_UNDERSCORE should be defined, otherwise it | |
155 | should not. */ | |
156 | #ifndef TARGET_UNDERSCORE | |
157 | #define TARGET_UNDERSCORE '_' | |
158 | #endif | |
159 | ||
160 | #ifndef PCRELOFFSET | |
b34976b6 | 161 | #define PCRELOFFSET TRUE |
252b5132 RH |
162 | #endif |
163 | ||
164 | /* These most certainly belong somewhere else. Just had to get rid of | |
17505c5c | 165 | the manifest constants in the code. */ |
252b5132 RH |
166 | #define ARM_8 0 |
167 | #define ARM_16 1 | |
168 | #define ARM_32 2 | |
169 | #define ARM_26 3 | |
170 | #define ARM_DISP8 4 | |
171 | #define ARM_DISP16 5 | |
172 | #define ARM_DISP32 6 | |
173 | #define ARM_26D 7 | |
c8e7bf0d | 174 | /* 8 is unused. */ |
252b5132 RH |
175 | #define ARM_NEG16 9 |
176 | #define ARM_NEG32 10 | |
177 | #define ARM_RVA32 11 | |
178 | #define ARM_THUMB9 12 | |
179 | #define ARM_THUMB12 13 | |
180 | #define ARM_THUMB23 14 | |
181 | ||
17505c5c NC |
182 | #ifdef ARM_WINCE |
183 | #undef ARM_32 | |
184 | #undef ARM_RVA32 | |
185 | #undef ARM_26 | |
186 | #undef ARM_THUMB12 | |
187 | #undef ARM_26D | |
188 | ||
d3793eaa | 189 | #define ARM_26D 0 |
17505c5c NC |
190 | #define ARM_32 1 |
191 | #define ARM_RVA32 2 | |
192 | #define ARM_26 3 | |
193 | #define ARM_THUMB12 4 | |
17505c5c NC |
194 | #define ARM_SECTION 14 |
195 | #define ARM_SECREL 15 | |
196 | #endif | |
197 | ||
c8e7bf0d NC |
198 | static bfd_reloc_status_type aoutarm_fix_pcrel_26_done |
199 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
200 | static bfd_reloc_status_type aoutarm_fix_pcrel_26 | |
201 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
c8e7bf0d NC |
202 | static bfd_reloc_status_type coff_thumb_pcrel_12 |
203 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
204 | #ifndef ARM_WINCE | |
afe94956 NC |
205 | static bfd_reloc_status_type coff_thumb_pcrel_9 |
206 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
c8e7bf0d NC |
207 | static bfd_reloc_status_type coff_thumb_pcrel_23 |
208 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
209 | #endif | |
210 | ||
d70910e8 | 211 | static reloc_howto_type aoutarm_std_reloc_howto[] = |
917583ad | 212 | { |
17505c5c | 213 | #ifdef ARM_WINCE |
d3793eaa NC |
214 | HOWTO (ARM_26D, |
215 | 2, | |
216 | 2, | |
217 | 24, | |
44e88952 | 218 | TRUE, |
d3793eaa NC |
219 | 0, |
220 | complain_overflow_dont, | |
221 | aoutarm_fix_pcrel_26_done, | |
222 | "ARM_26D", | |
223 | FALSE, | |
224 | 0x00ffffff, | |
225 | 0x0, | |
44e88952 | 226 | PCRELOFFSET), |
917583ad NC |
227 | HOWTO (ARM_32, |
228 | 0, | |
229 | 2, | |
230 | 32, | |
b34976b6 | 231 | FALSE, |
917583ad NC |
232 | 0, |
233 | complain_overflow_bitfield, | |
234 | coff_arm_reloc, | |
235 | "ARM_32", | |
d3793eaa | 236 | FALSE, |
917583ad NC |
237 | 0xffffffff, |
238 | 0xffffffff, | |
239 | PCRELOFFSET), | |
240 | HOWTO (ARM_RVA32, | |
241 | 0, | |
242 | 2, | |
243 | 32, | |
b34976b6 | 244 | FALSE, |
917583ad NC |
245 | 0, |
246 | complain_overflow_bitfield, | |
247 | coff_arm_reloc, | |
248 | "ARM_RVA32", | |
d3793eaa | 249 | FALSE, |
917583ad NC |
250 | 0xffffffff, |
251 | 0xffffffff, | |
252 | PCRELOFFSET), | |
253 | HOWTO (ARM_26, | |
254 | 2, | |
255 | 2, | |
256 | 24, | |
b34976b6 | 257 | TRUE, |
917583ad NC |
258 | 0, |
259 | complain_overflow_signed, | |
260 | aoutarm_fix_pcrel_26 , | |
261 | "ARM_26", | |
b34976b6 | 262 | FALSE, |
917583ad NC |
263 | 0x00ffffff, |
264 | 0x00ffffff, | |
265 | PCRELOFFSET), | |
266 | HOWTO (ARM_THUMB12, | |
267 | 1, | |
268 | 1, | |
269 | 11, | |
b34976b6 | 270 | TRUE, |
917583ad NC |
271 | 0, |
272 | complain_overflow_signed, | |
273 | coff_thumb_pcrel_12 , | |
274 | "ARM_THUMB12", | |
b34976b6 | 275 | FALSE, |
917583ad NC |
276 | 0x000007ff, |
277 | 0x000007ff, | |
278 | PCRELOFFSET), | |
d3793eaa | 279 | EMPTY_HOWTO (-1), |
917583ad NC |
280 | EMPTY_HOWTO (-1), |
281 | EMPTY_HOWTO (-1), | |
282 | EMPTY_HOWTO (-1), | |
283 | EMPTY_HOWTO (-1), | |
284 | EMPTY_HOWTO (-1), | |
285 | EMPTY_HOWTO (-1), | |
286 | EMPTY_HOWTO (-1), | |
287 | EMPTY_HOWTO (-1), | |
288 | HOWTO (ARM_SECTION, | |
289 | 0, | |
290 | 1, | |
291 | 16, | |
b34976b6 | 292 | FALSE, |
917583ad NC |
293 | 0, |
294 | complain_overflow_bitfield, | |
295 | coff_arm_reloc, | |
d3793eaa NC |
296 | "ARM_SECTION", |
297 | FALSE, | |
917583ad NC |
298 | 0x0000ffff, |
299 | 0x0000ffff, | |
300 | PCRELOFFSET), | |
301 | HOWTO (ARM_SECREL, | |
302 | 0, | |
303 | 2, | |
304 | 32, | |
b34976b6 | 305 | FALSE, |
917583ad NC |
306 | 0, |
307 | complain_overflow_bitfield, | |
308 | coff_arm_reloc, | |
d3793eaa NC |
309 | "ARM_SECREL", |
310 | FALSE, | |
917583ad NC |
311 | 0xffffffff, |
312 | 0xffffffff, | |
313 | PCRELOFFSET), | |
17505c5c | 314 | #else /* not ARM_WINCE */ |
c8e7bf0d NC |
315 | HOWTO (ARM_8, |
316 | 0, | |
317 | 0, | |
318 | 8, | |
319 | FALSE, | |
320 | 0, | |
321 | complain_overflow_bitfield, | |
322 | coff_arm_reloc, | |
323 | "ARM_8", | |
324 | TRUE, | |
325 | 0x000000ff, | |
326 | 0x000000ff, | |
327 | PCRELOFFSET), | |
917583ad NC |
328 | HOWTO (ARM_16, |
329 | 0, | |
330 | 1, | |
331 | 16, | |
b34976b6 | 332 | FALSE, |
917583ad NC |
333 | 0, |
334 | complain_overflow_bitfield, | |
335 | coff_arm_reloc, | |
336 | "ARM_16", | |
b34976b6 | 337 | TRUE, |
917583ad NC |
338 | 0x0000ffff, |
339 | 0x0000ffff, | |
340 | PCRELOFFSET), | |
341 | HOWTO (ARM_32, | |
342 | 0, | |
343 | 2, | |
344 | 32, | |
b34976b6 | 345 | FALSE, |
917583ad NC |
346 | 0, |
347 | complain_overflow_bitfield, | |
348 | coff_arm_reloc, | |
349 | "ARM_32", | |
b34976b6 | 350 | TRUE, |
917583ad NC |
351 | 0xffffffff, |
352 | 0xffffffff, | |
353 | PCRELOFFSET), | |
354 | HOWTO (ARM_26, | |
355 | 2, | |
356 | 2, | |
357 | 24, | |
b34976b6 | 358 | TRUE, |
917583ad NC |
359 | 0, |
360 | complain_overflow_signed, | |
361 | aoutarm_fix_pcrel_26 , | |
362 | "ARM_26", | |
b34976b6 | 363 | FALSE, |
917583ad NC |
364 | 0x00ffffff, |
365 | 0x00ffffff, | |
366 | PCRELOFFSET), | |
367 | HOWTO (ARM_DISP8, | |
368 | 0, | |
369 | 0, | |
370 | 8, | |
b34976b6 | 371 | TRUE, |
917583ad NC |
372 | 0, |
373 | complain_overflow_signed, | |
374 | coff_arm_reloc, | |
375 | "ARM_DISP8", | |
b34976b6 | 376 | TRUE, |
917583ad NC |
377 | 0x000000ff, |
378 | 0x000000ff, | |
b34976b6 | 379 | TRUE), |
917583ad NC |
380 | HOWTO (ARM_DISP16, |
381 | 0, | |
382 | 1, | |
383 | 16, | |
b34976b6 | 384 | TRUE, |
917583ad NC |
385 | 0, |
386 | complain_overflow_signed, | |
387 | coff_arm_reloc, | |
388 | "ARM_DISP16", | |
b34976b6 | 389 | TRUE, |
917583ad NC |
390 | 0x0000ffff, |
391 | 0x0000ffff, | |
b34976b6 | 392 | TRUE), |
917583ad NC |
393 | HOWTO (ARM_DISP32, |
394 | 0, | |
395 | 2, | |
396 | 32, | |
b34976b6 | 397 | TRUE, |
917583ad NC |
398 | 0, |
399 | complain_overflow_signed, | |
400 | coff_arm_reloc, | |
401 | "ARM_DISP32", | |
b34976b6 | 402 | TRUE, |
917583ad NC |
403 | 0xffffffff, |
404 | 0xffffffff, | |
b34976b6 | 405 | TRUE), |
917583ad NC |
406 | HOWTO (ARM_26D, |
407 | 2, | |
408 | 2, | |
409 | 24, | |
b34976b6 | 410 | FALSE, |
917583ad NC |
411 | 0, |
412 | complain_overflow_dont, | |
413 | aoutarm_fix_pcrel_26_done, | |
414 | "ARM_26D", | |
b34976b6 | 415 | TRUE, |
917583ad NC |
416 | 0x00ffffff, |
417 | 0x0, | |
b34976b6 | 418 | FALSE), |
917583ad NC |
419 | /* 8 is unused */ |
420 | EMPTY_HOWTO (-1), | |
421 | HOWTO (ARM_NEG16, | |
422 | 0, | |
423 | -1, | |
424 | 16, | |
b34976b6 | 425 | FALSE, |
917583ad NC |
426 | 0, |
427 | complain_overflow_bitfield, | |
428 | coff_arm_reloc, | |
429 | "ARM_NEG16", | |
b34976b6 | 430 | TRUE, |
917583ad NC |
431 | 0x0000ffff, |
432 | 0x0000ffff, | |
b34976b6 | 433 | FALSE), |
917583ad NC |
434 | HOWTO (ARM_NEG32, |
435 | 0, | |
436 | -2, | |
437 | 32, | |
b34976b6 | 438 | FALSE, |
917583ad NC |
439 | 0, |
440 | complain_overflow_bitfield, | |
441 | coff_arm_reloc, | |
442 | "ARM_NEG32", | |
b34976b6 | 443 | TRUE, |
917583ad NC |
444 | 0xffffffff, |
445 | 0xffffffff, | |
b34976b6 | 446 | FALSE), |
917583ad NC |
447 | HOWTO (ARM_RVA32, |
448 | 0, | |
449 | 2, | |
450 | 32, | |
b34976b6 | 451 | FALSE, |
917583ad NC |
452 | 0, |
453 | complain_overflow_bitfield, | |
454 | coff_arm_reloc, | |
455 | "ARM_RVA32", | |
b34976b6 | 456 | TRUE, |
917583ad NC |
457 | 0xffffffff, |
458 | 0xffffffff, | |
459 | PCRELOFFSET), | |
460 | HOWTO (ARM_THUMB9, | |
461 | 1, | |
462 | 1, | |
463 | 8, | |
b34976b6 | 464 | TRUE, |
917583ad NC |
465 | 0, |
466 | complain_overflow_signed, | |
467 | coff_thumb_pcrel_9 , | |
468 | "ARM_THUMB9", | |
b34976b6 | 469 | FALSE, |
917583ad NC |
470 | 0x000000ff, |
471 | 0x000000ff, | |
472 | PCRELOFFSET), | |
473 | HOWTO (ARM_THUMB12, | |
474 | 1, | |
475 | 1, | |
476 | 11, | |
b34976b6 | 477 | TRUE, |
917583ad NC |
478 | 0, |
479 | complain_overflow_signed, | |
480 | coff_thumb_pcrel_12 , | |
481 | "ARM_THUMB12", | |
b34976b6 | 482 | FALSE, |
917583ad NC |
483 | 0x000007ff, |
484 | 0x000007ff, | |
485 | PCRELOFFSET), | |
486 | HOWTO (ARM_THUMB23, | |
487 | 1, | |
488 | 2, | |
489 | 22, | |
b34976b6 | 490 | TRUE, |
917583ad NC |
491 | 0, |
492 | complain_overflow_signed, | |
493 | coff_thumb_pcrel_23 , | |
494 | "ARM_THUMB23", | |
b34976b6 | 495 | FALSE, |
917583ad NC |
496 | 0x07ff07ff, |
497 | 0x07ff07ff, | |
498 | PCRELOFFSET) | |
17505c5c | 499 | #endif /* not ARM_WINCE */ |
917583ad | 500 | }; |
252b5132 | 501 | |
af74ae99 NC |
502 | #define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto) |
503 | ||
252b5132 | 504 | #ifdef COFF_WITH_PE |
b34976b6 | 505 | /* Return TRUE if this relocation should |
d70910e8 | 506 | appear in the output .reloc section. */ |
252b5132 | 507 | |
b34976b6 | 508 | static bfd_boolean |
c8e7bf0d NC |
509 | in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED, |
510 | reloc_howto_type * howto) | |
252b5132 RH |
511 | { |
512 | return !howto->pc_relative && howto->type != ARM_RVA32; | |
d70910e8 | 513 | } |
252b5132 RH |
514 | #endif |
515 | ||
af74ae99 NC |
516 | #define RTYPE2HOWTO(cache_ptr, dst) \ |
517 | (cache_ptr)->howto = \ | |
518 | (dst)->r_type < NUM_RELOCS \ | |
519 | ? aoutarm_std_reloc_howto + (dst)->r_type \ | |
520 | : NULL | |
252b5132 RH |
521 | |
522 | #define coff_rtype_to_howto coff_arm_rtype_to_howto | |
523 | ||
524 | static reloc_howto_type * | |
c8e7bf0d NC |
525 | coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED, |
526 | asection *sec, | |
527 | struct internal_reloc *rel, | |
528 | struct coff_link_hash_entry *h ATTRIBUTE_UNUSED, | |
529 | struct internal_syment *sym ATTRIBUTE_UNUSED, | |
530 | bfd_vma *addendp) | |
252b5132 | 531 | { |
af74ae99 | 532 | reloc_howto_type * howto; |
252b5132 | 533 | |
af74ae99 NC |
534 | if (rel->r_type >= NUM_RELOCS) |
535 | return NULL; | |
d70910e8 | 536 | |
252b5132 RH |
537 | howto = aoutarm_std_reloc_howto + rel->r_type; |
538 | ||
539 | if (rel->r_type == ARM_RVA32) | |
17505c5c | 540 | *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase; |
252b5132 RH |
541 | |
542 | return howto; | |
252b5132 | 543 | } |
917583ad | 544 | |
d70910e8 | 545 | /* Used by the assembler. */ |
252b5132 RH |
546 | |
547 | static bfd_reloc_status_type | |
c8e7bf0d NC |
548 | aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED, |
549 | arelent *reloc_entry ATTRIBUTE_UNUSED, | |
550 | asymbol *symbol ATTRIBUTE_UNUSED, | |
551 | void * data ATTRIBUTE_UNUSED, | |
552 | asection *input_section ATTRIBUTE_UNUSED, | |
553 | bfd *output_bfd ATTRIBUTE_UNUSED, | |
554 | char **error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
555 | { |
556 | /* This is dead simple at present. */ | |
557 | return bfd_reloc_ok; | |
558 | } | |
559 | ||
d70910e8 | 560 | /* Used by the assembler. */ |
252b5132 RH |
561 | |
562 | static bfd_reloc_status_type | |
c8e7bf0d NC |
563 | aoutarm_fix_pcrel_26 (bfd *abfd, |
564 | arelent *reloc_entry, | |
565 | asymbol *symbol, | |
566 | void * data, | |
567 | asection *input_section, | |
568 | bfd *output_bfd, | |
569 | char **error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
570 | { |
571 | bfd_vma relocation; | |
572 | bfd_size_type addr = reloc_entry->address; | |
573 | long target = bfd_get_32 (abfd, (bfd_byte *) data + addr); | |
574 | bfd_reloc_status_type flag = bfd_reloc_ok; | |
d70910e8 | 575 | |
917583ad | 576 | /* If this is an undefined symbol, return error. */ |
252b5132 RH |
577 | if (symbol->section == &bfd_und_section |
578 | && (symbol->flags & BSF_WEAK) == 0) | |
579 | return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined; | |
580 | ||
581 | /* If the sections are different, and we are doing a partial relocation, | |
582 | just ignore it for now. */ | |
583 | if (symbol->section->name != input_section->name | |
584 | && output_bfd != (bfd *)NULL) | |
585 | return bfd_reloc_continue; | |
586 | ||
587 | relocation = (target & 0x00ffffff) << 2; | |
917583ad | 588 | relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */ |
252b5132 RH |
589 | relocation += symbol->value; |
590 | relocation += symbol->section->output_section->vma; | |
591 | relocation += symbol->section->output_offset; | |
592 | relocation += reloc_entry->addend; | |
593 | relocation -= input_section->output_section->vma; | |
594 | relocation -= input_section->output_offset; | |
595 | relocation -= addr; | |
d70910e8 | 596 | |
252b5132 RH |
597 | if (relocation & 3) |
598 | return bfd_reloc_overflow; | |
599 | ||
917583ad | 600 | /* Check for overflow. */ |
252b5132 RH |
601 | if (relocation & 0x02000000) |
602 | { | |
603 | if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff) | |
604 | flag = bfd_reloc_overflow; | |
605 | } | |
dc810e39 | 606 | else if (relocation & ~(bfd_vma) 0x03ffffff) |
252b5132 RH |
607 | flag = bfd_reloc_overflow; |
608 | ||
609 | target &= ~0x00ffffff; | |
610 | target |= (relocation >> 2) & 0x00ffffff; | |
dc810e39 | 611 | bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr); |
252b5132 RH |
612 | |
613 | /* Now the ARM magic... Change the reloc type so that it is marked as done. | |
614 | Strictly this is only necessary if we are doing a partial relocation. */ | |
615 | reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D]; | |
616 | ||
617 | return flag; | |
618 | } | |
619 | ||
620 | static bfd_reloc_status_type | |
c8e7bf0d NC |
621 | coff_thumb_pcrel_common (bfd *abfd, |
622 | arelent *reloc_entry, | |
623 | asymbol *symbol, | |
624 | void * data, | |
625 | asection *input_section, | |
626 | bfd *output_bfd, | |
627 | char **error_message ATTRIBUTE_UNUSED, | |
628 | thumb_pcrel_branchtype btype) | |
252b5132 RH |
629 | { |
630 | bfd_vma relocation = 0; | |
631 | bfd_size_type addr = reloc_entry->address; | |
632 | long target = bfd_get_32 (abfd, (bfd_byte *) data + addr); | |
633 | bfd_reloc_status_type flag = bfd_reloc_ok; | |
634 | bfd_vma dstmsk; | |
635 | bfd_vma offmsk; | |
636 | bfd_vma signbit; | |
637 | ||
638 | /* NOTE: This routine is currently used by GAS, but not by the link | |
639 | phase. */ | |
252b5132 RH |
640 | switch (btype) |
641 | { | |
642 | case b9: | |
643 | dstmsk = 0x000000ff; | |
644 | offmsk = 0x000001fe; | |
645 | signbit = 0x00000100; | |
646 | break; | |
647 | ||
648 | case b12: | |
649 | dstmsk = 0x000007ff; | |
650 | offmsk = 0x00000ffe; | |
651 | signbit = 0x00000800; | |
652 | break; | |
653 | ||
654 | case b23: | |
655 | dstmsk = 0x07ff07ff; | |
656 | offmsk = 0x007fffff; | |
657 | signbit = 0x00400000; | |
658 | break; | |
659 | ||
660 | default: | |
661 | abort (); | |
662 | } | |
d70910e8 | 663 | |
917583ad | 664 | /* If this is an undefined symbol, return error. */ |
252b5132 RH |
665 | if (symbol->section == &bfd_und_section |
666 | && (symbol->flags & BSF_WEAK) == 0) | |
667 | return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined; | |
668 | ||
669 | /* If the sections are different, and we are doing a partial relocation, | |
670 | just ignore it for now. */ | |
671 | if (symbol->section->name != input_section->name | |
672 | && output_bfd != (bfd *)NULL) | |
673 | return bfd_reloc_continue; | |
674 | ||
675 | switch (btype) | |
676 | { | |
677 | case b9: | |
678 | case b12: | |
679 | relocation = ((target & dstmsk) << 1); | |
680 | break; | |
681 | ||
682 | case b23: | |
683 | if (bfd_big_endian (abfd)) | |
684 | relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4); | |
685 | else | |
686 | relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15); | |
687 | break; | |
688 | ||
689 | default: | |
690 | abort (); | |
691 | } | |
692 | ||
917583ad | 693 | relocation = (relocation ^ signbit) - signbit; /* Sign extend. */ |
252b5132 RH |
694 | relocation += symbol->value; |
695 | relocation += symbol->section->output_section->vma; | |
696 | relocation += symbol->section->output_offset; | |
697 | relocation += reloc_entry->addend; | |
698 | relocation -= input_section->output_section->vma; | |
699 | relocation -= input_section->output_offset; | |
700 | relocation -= addr; | |
701 | ||
702 | if (relocation & 1) | |
703 | return bfd_reloc_overflow; | |
704 | ||
917583ad | 705 | /* Check for overflow. */ |
252b5132 RH |
706 | if (relocation & signbit) |
707 | { | |
708 | if ((relocation & ~offmsk) != ~offmsk) | |
709 | flag = bfd_reloc_overflow; | |
710 | } | |
711 | else if (relocation & ~offmsk) | |
712 | flag = bfd_reloc_overflow; | |
713 | ||
714 | target &= ~dstmsk; | |
715 | switch (btype) | |
716 | { | |
717 | case b9: | |
718 | case b12: | |
719 | target |= (relocation >> 1); | |
720 | break; | |
721 | ||
722 | case b23: | |
723 | if (bfd_big_endian (abfd)) | |
dc810e39 AM |
724 | target |= (((relocation & 0xfff) >> 1) |
725 | | ((relocation << 4) & 0x07ff0000)); | |
252b5132 | 726 | else |
dc810e39 AM |
727 | target |= (((relocation & 0xffe) << 15) |
728 | | ((relocation >> 12) & 0x7ff)); | |
252b5132 RH |
729 | break; |
730 | ||
731 | default: | |
732 | abort (); | |
733 | } | |
734 | ||
dc810e39 | 735 | bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr); |
252b5132 RH |
736 | |
737 | /* Now the ARM magic... Change the reloc type so that it is marked as done. | |
738 | Strictly this is only necessary if we are doing a partial relocation. */ | |
739 | reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D]; | |
d70910e8 | 740 | |
917583ad | 741 | /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */ |
252b5132 RH |
742 | return flag; |
743 | } | |
744 | ||
7831a775 | 745 | #ifndef ARM_WINCE |
252b5132 | 746 | static bfd_reloc_status_type |
c8e7bf0d NC |
747 | coff_thumb_pcrel_23 (bfd *abfd, |
748 | arelent *reloc_entry, | |
749 | asymbol *symbol, | |
750 | void * data, | |
751 | asection *input_section, | |
752 | bfd *output_bfd, | |
753 | char **error_message) | |
252b5132 RH |
754 | { |
755 | return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, | |
dc810e39 AM |
756 | input_section, output_bfd, error_message, |
757 | b23); | |
252b5132 RH |
758 | } |
759 | ||
760 | static bfd_reloc_status_type | |
c8e7bf0d NC |
761 | coff_thumb_pcrel_9 (bfd *abfd, |
762 | arelent *reloc_entry, | |
763 | asymbol *symbol, | |
764 | void * data, | |
765 | asection *input_section, | |
766 | bfd *output_bfd, | |
767 | char **error_message) | |
252b5132 RH |
768 | { |
769 | return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, | |
dc810e39 | 770 | input_section, output_bfd, error_message, |
7831a775 | 771 | b9); |
252b5132 | 772 | } |
7831a775 | 773 | #endif /* not ARM_WINCE */ |
252b5132 RH |
774 | |
775 | static bfd_reloc_status_type | |
c8e7bf0d NC |
776 | coff_thumb_pcrel_12 (bfd *abfd, |
777 | arelent *reloc_entry, | |
778 | asymbol *symbol, | |
779 | void * data, | |
780 | asection *input_section, | |
781 | bfd *output_bfd, | |
782 | char **error_message) | |
252b5132 RH |
783 | { |
784 | return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, | |
dc810e39 | 785 | input_section, output_bfd, error_message, |
7831a775 | 786 | b12); |
252b5132 RH |
787 | } |
788 | ||
dc810e39 | 789 | static const struct reloc_howto_struct * |
c8e7bf0d | 790 | coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code) |
252b5132 | 791 | { |
af74ae99 | 792 | #define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j |
d70910e8 | 793 | |
252b5132 RH |
794 | if (code == BFD_RELOC_CTOR) |
795 | switch (bfd_get_arch_info (abfd)->bits_per_address) | |
796 | { | |
797 | case 32: | |
798 | code = BFD_RELOC_32; | |
799 | break; | |
917583ad | 800 | default: |
c8e7bf0d | 801 | return NULL; |
252b5132 RH |
802 | } |
803 | ||
804 | switch (code) | |
805 | { | |
17505c5c NC |
806 | #ifdef ARM_WINCE |
807 | ASTD (BFD_RELOC_32, ARM_32); | |
808 | ASTD (BFD_RELOC_RVA, ARM_RVA32); | |
809 | ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); | |
810 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); | |
811 | #else | |
252b5132 RH |
812 | ASTD (BFD_RELOC_8, ARM_8); |
813 | ASTD (BFD_RELOC_16, ARM_16); | |
814 | ASTD (BFD_RELOC_32, ARM_32); | |
815 | ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); | |
077b8428 | 816 | ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26); |
252b5132 RH |
817 | ASTD (BFD_RELOC_8_PCREL, ARM_DISP8); |
818 | ASTD (BFD_RELOC_16_PCREL, ARM_DISP16); | |
819 | ASTD (BFD_RELOC_32_PCREL, ARM_DISP32); | |
820 | ASTD (BFD_RELOC_RVA, ARM_RVA32); | |
821 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9); | |
822 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); | |
823 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23); | |
f8f3c6cc | 824 | ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23); |
d70910e8 | 825 | #endif |
c8e7bf0d | 826 | default: return NULL; |
252b5132 RH |
827 | } |
828 | } | |
829 | ||
c8e7bf0d NC |
830 | #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2 |
831 | #define COFF_PAGE_SIZE 0x1000 | |
252b5132 | 832 | |
c8e7bf0d | 833 | /* Turn a howto into a reloc nunmber. */ |
252b5132 | 834 | #define SELECT_RELOC(x,howto) { x.r_type = howto->type; } |
c8e7bf0d NC |
835 | #define BADMAG(x) ARMBADMAG(x) |
836 | #define ARM 1 /* Customize coffcode.h. */ | |
252b5132 | 837 | |
7831a775 | 838 | #ifndef ARM_WINCE |
2106126f | 839 | /* Make sure that the 'r_offset' field is copied properly |
830629ab | 840 | so that identical binaries will compare the same. */ |
2106126f NC |
841 | #define SWAP_IN_RELOC_OFFSET H_GET_32 |
842 | #define SWAP_OUT_RELOC_OFFSET H_PUT_32 | |
7831a775 | 843 | #endif |
2106126f | 844 | |
252b5132 RH |
845 | /* Extend the coff_link_hash_table structure with a few ARM specific fields. |
846 | This allows us to store global data here without actually creating any | |
847 | global variables, which is a no-no in the BFD world. */ | |
848 | struct coff_arm_link_hash_table | |
917583ad NC |
849 | { |
850 | /* The original coff_link_hash_table structure. MUST be first field. */ | |
851 | struct coff_link_hash_table root; | |
d70910e8 | 852 | |
5c4491d3 | 853 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
dc810e39 | 854 | bfd_size_type thumb_glue_size; |
d70910e8 | 855 | |
5c4491d3 | 856 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
dc810e39 | 857 | bfd_size_type arm_glue_size; |
252b5132 | 858 | |
5c4491d3 | 859 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
917583ad | 860 | bfd * bfd_of_glue_owner; |
252b5132 | 861 | |
917583ad NC |
862 | /* Support interworking with old, non-interworking aware ARM code. */ |
863 | int support_old_code; | |
252b5132 RH |
864 | }; |
865 | ||
866 | /* Get the ARM coff linker hash table from a link_info structure. */ | |
867 | #define coff_arm_hash_table(info) \ | |
868 | ((struct coff_arm_link_hash_table *) ((info)->hash)) | |
869 | ||
870 | /* Create an ARM coff linker hash table. */ | |
871 | ||
872 | static struct bfd_link_hash_table * | |
c8e7bf0d | 873 | coff_arm_link_hash_table_create (bfd * abfd) |
252b5132 RH |
874 | { |
875 | struct coff_arm_link_hash_table * ret; | |
dc810e39 | 876 | bfd_size_type amt = sizeof (struct coff_arm_link_hash_table); |
252b5132 | 877 | |
c8e7bf0d NC |
878 | ret = bfd_malloc (amt); |
879 | if (ret == NULL) | |
252b5132 RH |
880 | return NULL; |
881 | ||
882 | if (! _bfd_coff_link_hash_table_init | |
883 | (& ret->root, abfd, _bfd_coff_link_hash_newfunc)) | |
884 | { | |
e2d34d7d | 885 | free (ret); |
c8e7bf0d | 886 | return NULL; |
252b5132 RH |
887 | } |
888 | ||
889 | ret->thumb_glue_size = 0; | |
890 | ret->arm_glue_size = 0; | |
891 | ret->bfd_of_glue_owner = NULL; | |
892 | ||
893 | return & ret->root.root; | |
894 | } | |
895 | ||
271025eb | 896 | static void |
c8e7bf0d NC |
897 | arm_emit_base_file_entry (struct bfd_link_info *info, |
898 | bfd *output_bfd, | |
899 | asection *input_section, | |
900 | bfd_vma reloc_offset) | |
252b5132 RH |
901 | { |
902 | bfd_vma addr = reloc_offset | |
903 | - input_section->vma | |
904 | + input_section->output_offset | |
905 | + input_section->output_section->vma; | |
906 | ||
917583ad NC |
907 | if (coff_data (output_bfd)->pe) |
908 | addr -= pe_data (output_bfd)->pe_opthdr.ImageBase; | |
909 | fwrite (& addr, 1, sizeof (addr), (FILE *) info->base_file); | |
252b5132 RH |
910 | |
911 | } | |
912 | \f | |
7831a775 | 913 | #ifndef ARM_WINCE |
252b5132 RH |
914 | /* The thumb form of a long branch is a bit finicky, because the offset |
915 | encoding is split over two fields, each in it's own instruction. They | |
d70910e8 | 916 | can occur in any order. So given a thumb form of long branch, and an |
252b5132 | 917 | offset, insert the offset into the thumb branch and return finished |
d70910e8 | 918 | instruction. |
252b5132 | 919 | |
d70910e8 | 920 | It takes two thumb instructions to encode the target address. Each has |
5c4491d3 | 921 | 11 bits to invest. The upper 11 bits are stored in one (identified by |
d70910e8 KH |
922 | H-0.. see below), the lower 11 bits are stored in the other (identified |
923 | by H-1). | |
252b5132 | 924 | |
d70910e8 | 925 | Combine together and shifted left by 1 (it's a half word address) and |
252b5132 RH |
926 | there you have it. |
927 | ||
928 | Op: 1111 = F, | |
929 | H-0, upper address-0 = 000 | |
930 | Op: 1111 = F, | |
931 | H-1, lower address-0 = 800 | |
932 | ||
d70910e8 | 933 | They can be ordered either way, but the arm tools I've seen always put |
252b5132 RH |
934 | the lower one first. It probably doesn't matter. [email protected] |
935 | ||
936 | XXX: Actually the order does matter. The second instruction (H-1) | |
937 | moves the computed address into the PC, so it must be the second one | |
938 | in the sequence. The problem, however is that whilst little endian code | |
939 | stores the instructions in HI then LOW order, big endian code does the | |
917583ad | 940 | reverse. [email protected]. */ |
252b5132 RH |
941 | |
942 | #define LOW_HI_ORDER 0xF800F000 | |
943 | #define HI_LOW_ORDER 0xF000F800 | |
944 | ||
945 | static insn32 | |
c8e7bf0d | 946 | insert_thumb_branch (insn32 br_insn, int rel_off) |
252b5132 RH |
947 | { |
948 | unsigned int low_bits; | |
949 | unsigned int high_bits; | |
950 | ||
c8e7bf0d | 951 | BFD_ASSERT ((rel_off & 1) != 1); |
252b5132 | 952 | |
c8e7bf0d NC |
953 | rel_off >>= 1; /* Half word aligned address. */ |
954 | low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */ | |
955 | high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */ | |
252b5132 RH |
956 | |
957 | if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER) | |
958 | br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits; | |
959 | else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER) | |
960 | br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits; | |
961 | else | |
dc810e39 AM |
962 | /* FIXME: the BFD library should never abort except for internal errors |
963 | - it should return an error status. */ | |
917583ad | 964 | abort (); /* Error - not a valid branch instruction form. */ |
252b5132 RH |
965 | |
966 | return br_insn; | |
967 | } | |
7831a775 | 968 | |
252b5132 RH |
969 | \f |
970 | static struct coff_link_hash_entry * | |
c8e7bf0d NC |
971 | find_thumb_glue (struct bfd_link_info *info, |
972 | const char *name, | |
973 | bfd *input_bfd) | |
252b5132 | 974 | { |
dc810e39 AM |
975 | char *tmp_name; |
976 | struct coff_link_hash_entry *myh; | |
977 | bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1; | |
252b5132 | 978 | |
c8e7bf0d | 979 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
980 | |
981 | BFD_ASSERT (tmp_name); | |
982 | ||
983 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
d70910e8 | 984 | |
252b5132 | 985 | myh = coff_link_hash_lookup |
b34976b6 | 986 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
d70910e8 | 987 | |
252b5132 RH |
988 | if (myh == NULL) |
989 | /* xgettext:c-format */ | |
d003868e AM |
990 | _bfd_error_handler (_("%B: unable to find THUMB glue '%s' for `%s'"), |
991 | input_bfd, tmp_name, name); | |
d70910e8 | 992 | |
252b5132 RH |
993 | free (tmp_name); |
994 | ||
995 | return myh; | |
996 | } | |
7831a775 | 997 | #endif /* not ARM_WINCE */ |
252b5132 RH |
998 | |
999 | static struct coff_link_hash_entry * | |
c8e7bf0d NC |
1000 | find_arm_glue (struct bfd_link_info *info, |
1001 | const char *name, | |
1002 | bfd *input_bfd) | |
252b5132 | 1003 | { |
dc810e39 | 1004 | char *tmp_name; |
252b5132 | 1005 | struct coff_link_hash_entry * myh; |
dc810e39 | 1006 | bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1; |
252b5132 | 1007 | |
c8e7bf0d | 1008 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
1009 | |
1010 | BFD_ASSERT (tmp_name); | |
1011 | ||
1012 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
d70910e8 | 1013 | |
252b5132 | 1014 | myh = coff_link_hash_lookup |
b34976b6 | 1015 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
252b5132 RH |
1016 | |
1017 | if (myh == NULL) | |
1018 | /* xgettext:c-format */ | |
d003868e AM |
1019 | _bfd_error_handler (_("%B: unable to find ARM glue '%s' for `%s'"), |
1020 | input_bfd, tmp_name, name); | |
d70910e8 | 1021 | |
252b5132 RH |
1022 | free (tmp_name); |
1023 | ||
1024 | return myh; | |
1025 | } | |
1026 | ||
1027 | /* | |
1028 | ARM->Thumb glue: | |
1029 | ||
1030 | .arm | |
1031 | __func_from_arm: | |
1032 | ldr r12, __func_addr | |
1033 | bx r12 | |
1034 | __func_addr: | |
1035 | .word func @ behave as if you saw a ARM_32 reloc | |
1036 | */ | |
1037 | ||
1038 | #define ARM2THUMB_GLUE_SIZE 12 | |
1039 | static const insn32 a2t1_ldr_insn = 0xe59fc000; | |
1040 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; | |
1041 | static const insn32 a2t3_func_addr_insn = 0x00000001; | |
1042 | ||
252b5132 RH |
1043 | /* |
1044 | Thumb->ARM: Thumb->(non-interworking aware) ARM | |
1045 | ||
1046 | .thumb .thumb | |
1047 | .align 2 .align 2 | |
1048 | __func_from_thumb: __func_from_thumb: | |
1049 | bx pc push {r6, lr} | |
1050 | nop ldr r6, __func_addr | |
1051 | .arm mov lr, pc | |
1052 | __func_change_to_arm: bx r6 | |
1053 | b func .arm | |
1054 | __func_back_to_thumb: | |
1055 | ldmia r13! {r6, lr} | |
1056 | bx lr | |
1057 | __func_addr: | |
d70910e8 | 1058 | .word func |
252b5132 RH |
1059 | */ |
1060 | ||
1061 | #define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8) | |
2dc773a0 | 1062 | #ifndef ARM_WINCE |
252b5132 RH |
1063 | static const insn16 t2a1_bx_pc_insn = 0x4778; |
1064 | static const insn16 t2a2_noop_insn = 0x46c0; | |
1065 | static const insn32 t2a3_b_insn = 0xea000000; | |
1066 | ||
252b5132 RH |
1067 | static const insn16 t2a1_push_insn = 0xb540; |
1068 | static const insn16 t2a2_ldr_insn = 0x4e03; | |
1069 | static const insn16 t2a3_mov_insn = 0x46fe; | |
1070 | static const insn16 t2a4_bx_insn = 0x4730; | |
1071 | static const insn32 t2a5_pop_insn = 0xe8bd4040; | |
1072 | static const insn32 t2a6_bx_insn = 0xe12fff1e; | |
2dc773a0 | 1073 | #endif |
252b5132 RH |
1074 | |
1075 | /* TODO: | |
1076 | We should really create new local (static) symbols in destination | |
1077 | object for each stub we create. We should also create local | |
1078 | (static) symbols within the stubs when switching between ARM and | |
1079 | Thumb code. This will ensure that the debugger and disassembler | |
1080 | can present a better view of stubs. | |
1081 | ||
1082 | We can treat stubs like literal sections, and for the THUMB9 ones | |
1083 | (short addressing range) we should be able to insert the stubs | |
1084 | between sections. i.e. the simplest approach (since relocations | |
1085 | are done on a section basis) is to dump the stubs at the end of | |
1086 | processing a section. That way we can always try and minimise the | |
1087 | offset to and from a stub. However, this does not map well onto | |
1088 | the way that the linker/BFD does its work: mapping all input | |
1089 | sections to output sections via the linker script before doing | |
1090 | all the processing. | |
1091 | ||
1092 | Unfortunately it may be easier to just to disallow short range | |
1093 | Thumb->ARM stubs (i.e. no conditional inter-working branches, | |
1094 | only branch-and-link (BL) calls. This will simplify the processing | |
1095 | since we can then put all of the stubs into their own section. | |
1096 | ||
1097 | TODO: | |
1098 | On a different subject, rather than complaining when a | |
1099 | branch cannot fit in the number of bits available for the | |
1100 | instruction we should generate a trampoline stub (needed to | |
1101 | address the complete 32bit address space). */ | |
1102 | ||
d70910e8 | 1103 | /* The standard COFF backend linker does not cope with the special |
252b5132 RH |
1104 | Thumb BRANCH23 relocation. The alternative would be to split the |
1105 | BRANCH23 into seperate HI23 and LO23 relocations. However, it is a | |
d70910e8 | 1106 | bit simpler simply providing our own relocation driver. */ |
252b5132 RH |
1107 | |
1108 | /* The reloc processing routine for the ARM/Thumb COFF linker. NOTE: | |
1109 | This code is a very slightly modified copy of | |
1110 | _bfd_coff_generic_relocate_section. It would be a much more | |
1111 | maintainable solution to have a MACRO that could be expanded within | |
1112 | _bfd_coff_generic_relocate_section that would only be provided for | |
1113 | ARM/Thumb builds. It is only the code marked THUMBEXTENSION that | |
1114 | is different from the original. */ | |
1115 | ||
b34976b6 | 1116 | static bfd_boolean |
c8e7bf0d NC |
1117 | coff_arm_relocate_section (bfd *output_bfd, |
1118 | struct bfd_link_info *info, | |
1119 | bfd *input_bfd, | |
1120 | asection *input_section, | |
1121 | bfd_byte *contents, | |
1122 | struct internal_reloc *relocs, | |
1123 | struct internal_syment *syms, | |
1124 | asection **sections) | |
252b5132 RH |
1125 | { |
1126 | struct internal_reloc * rel; | |
1127 | struct internal_reloc * relend; | |
2dc773a0 | 1128 | #ifndef ARM_WINCE |
07515404 | 1129 | bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section); |
2dc773a0 | 1130 | #endif |
252b5132 RH |
1131 | |
1132 | rel = relocs; | |
1133 | relend = rel + input_section->reloc_count; | |
1134 | ||
1135 | for (; rel < relend; rel++) | |
1136 | { | |
1137 | int done = 0; | |
1138 | long symndx; | |
1139 | struct coff_link_hash_entry * h; | |
1140 | struct internal_syment * sym; | |
1141 | bfd_vma addend; | |
1142 | bfd_vma val; | |
1143 | reloc_howto_type * howto; | |
1144 | bfd_reloc_status_type rstat; | |
1145 | bfd_vma h_val; | |
1146 | ||
1147 | symndx = rel->r_symndx; | |
1148 | ||
1149 | if (symndx == -1) | |
1150 | { | |
1151 | h = NULL; | |
1152 | sym = NULL; | |
1153 | } | |
1154 | else | |
d70910e8 | 1155 | { |
252b5132 RH |
1156 | h = obj_coff_sym_hashes (input_bfd)[symndx]; |
1157 | sym = syms + symndx; | |
1158 | } | |
1159 | ||
1160 | /* COFF treats common symbols in one of two ways. Either the | |
1161 | size of the symbol is included in the section contents, or it | |
1162 | is not. We assume that the size is not included, and force | |
1163 | the rtype_to_howto function to adjust the addend as needed. */ | |
1164 | ||
1165 | if (sym != NULL && sym->n_scnum != 0) | |
1166 | addend = - sym->n_value; | |
1167 | else | |
1168 | addend = 0; | |
1169 | ||
252b5132 RH |
1170 | howto = coff_rtype_to_howto (input_bfd, input_section, rel, h, |
1171 | sym, &addend); | |
1172 | if (howto == NULL) | |
b34976b6 | 1173 | return FALSE; |
252b5132 RH |
1174 | |
1175 | /* The relocation_section function will skip pcrel_offset relocs | |
1049f94e | 1176 | when doing a relocatable link. However, we want to convert |
d21356d8 | 1177 | ARM_26 to ARM_26D relocs if possible. We return a fake howto in |
252b5132 | 1178 | this case without pcrel_offset set, and adjust the addend to |
44e88952 NC |
1179 | compensate. 'partial_inplace' is also set, since we want 'done' |
1180 | relocations to be reflected in section's data. */ | |
252b5132 RH |
1181 | if (rel->r_type == ARM_26 |
1182 | && h != NULL | |
1049f94e | 1183 | && info->relocatable |
252b5132 RH |
1184 | && (h->root.type == bfd_link_hash_defined |
1185 | || h->root.type == bfd_link_hash_defweak) | |
dc810e39 AM |
1186 | && (h->root.u.def.section->output_section |
1187 | == input_section->output_section)) | |
252b5132 | 1188 | { |
d70910e8 | 1189 | static reloc_howto_type fake_arm26_reloc = |
252b5132 RH |
1190 | HOWTO (ARM_26, |
1191 | 2, | |
1192 | 2, | |
1193 | 24, | |
b34976b6 | 1194 | TRUE, |
252b5132 RH |
1195 | 0, |
1196 | complain_overflow_signed, | |
1197 | aoutarm_fix_pcrel_26 , | |
1198 | "ARM_26", | |
44e88952 | 1199 | TRUE, |
252b5132 | 1200 | 0x00ffffff, |
d70910e8 | 1201 | 0x00ffffff, |
b34976b6 | 1202 | FALSE); |
252b5132 RH |
1203 | |
1204 | addend -= rel->r_vaddr - input_section->vma; | |
44e88952 NC |
1205 | #ifdef ARM_WINCE |
1206 | /* FIXME: I don't know why, but the hack is necessary for correct | |
c8e7bf0d | 1207 | generation of bl's instruction offset. */ |
44e88952 NC |
1208 | addend -= 8; |
1209 | #endif | |
252b5132 RH |
1210 | howto = &fake_arm26_reloc; |
1211 | } | |
1212 | ||
17505c5c NC |
1213 | #ifdef ARM_WINCE |
1214 | /* MS ARM-CE makes the reloc relative to the opcode's pc, not | |
d70910e8 | 1215 | the next opcode's pc, so is off by one. */ |
17505c5c | 1216 | #endif |
d70910e8 | 1217 | |
1049f94e | 1218 | /* If we are doing a relocatable link, then we can just ignore |
252b5132 | 1219 | a PC relative reloc that is pcrel_offset. It will already |
1049f94e | 1220 | have the correct value. If this is not a relocatable link, |
252b5132 RH |
1221 | then we should ignore the symbol value. */ |
1222 | if (howto->pc_relative && howto->pcrel_offset) | |
1223 | { | |
1049f94e | 1224 | if (info->relocatable) |
252b5132 | 1225 | continue; |
87748b32 NC |
1226 | /* FIXME - it is not clear which targets need this next test |
1227 | and which do not. It is known that it is needed for the | |
d8adc60f | 1228 | VxWorks and EPOC-PE targets, but it is also known that it |
5c4491d3 | 1229 | was suppressed for other ARM targets. This ought to be |
d8adc60f NC |
1230 | sorted out one day. */ |
1231 | #ifdef ARM_COFF_BUGFIX | |
87748b32 NC |
1232 | /* We must not ignore the symbol value. If the symbol is |
1233 | within the same section, the relocation should have already | |
1234 | been fixed, but if it is not, we'll be handed a reloc into | |
1235 | the beginning of the symbol's section, so we must not cancel | |
1236 | out the symbol's value, otherwise we'll be adding it in | |
1237 | twice. */ | |
252b5132 RH |
1238 | if (sym != NULL && sym->n_scnum != 0) |
1239 | addend += sym->n_value; | |
ed1de528 | 1240 | #endif |
252b5132 RH |
1241 | } |
1242 | ||
1243 | val = 0; | |
1244 | ||
1245 | if (h == NULL) | |
1246 | { | |
1247 | asection *sec; | |
1248 | ||
1249 | if (symndx == -1) | |
1250 | { | |
1251 | sec = bfd_abs_section_ptr; | |
1252 | val = 0; | |
1253 | } | |
1254 | else | |
1255 | { | |
1256 | sec = sections[symndx]; | |
1257 | val = (sec->output_section->vma | |
1258 | + sec->output_offset | |
1259 | + sym->n_value | |
1260 | - sec->vma); | |
1261 | } | |
1262 | } | |
1263 | else | |
1264 | { | |
252b5132 RH |
1265 | /* We don't output the stubs if we are generating a |
1266 | relocatable output file, since we may as well leave the | |
1267 | stub generation to the final linker pass. If we fail to | |
1268 | verify that the name is defined, we'll try to build stubs | |
d70910e8 | 1269 | for an undefined name... */ |
1049f94e | 1270 | if (! info->relocatable |
252b5132 RH |
1271 | && ( h->root.type == bfd_link_hash_defined |
1272 | || h->root.type == bfd_link_hash_defweak)) | |
1273 | { | |
1274 | asection * h_sec = h->root.u.def.section; | |
1275 | const char * name = h->root.root.string; | |
d70910e8 | 1276 | |
252b5132 RH |
1277 | /* h locates the symbol referenced in the reloc. */ |
1278 | h_val = (h->root.u.def.value | |
1279 | + h_sec->output_section->vma | |
1280 | + h_sec->output_offset); | |
1281 | ||
1282 | if (howto->type == ARM_26) | |
1283 | { | |
1284 | if ( h->class == C_THUMBSTATFUNC | |
1285 | || h->class == C_THUMBEXTFUNC) | |
1286 | { | |
917583ad | 1287 | /* Arm code calling a Thumb function. */ |
252b5132 | 1288 | unsigned long int tmp; |
dc810e39 | 1289 | bfd_vma my_offset; |
252b5132 RH |
1290 | asection * s; |
1291 | long int ret_offset; | |
d70910e8 | 1292 | struct coff_link_hash_entry * myh; |
252b5132 | 1293 | struct coff_arm_link_hash_table * globals; |
d70910e8 | 1294 | |
252b5132 RH |
1295 | myh = find_arm_glue (info, name, input_bfd); |
1296 | if (myh == NULL) | |
b34976b6 | 1297 | return FALSE; |
252b5132 RH |
1298 | |
1299 | globals = coff_arm_hash_table (info); | |
1300 | ||
1301 | BFD_ASSERT (globals != NULL); | |
1302 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1303 | |
252b5132 | 1304 | my_offset = myh->root.u.def.value; |
d70910e8 KH |
1305 | |
1306 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
252b5132 RH |
1307 | ARM2THUMB_GLUE_SECTION_NAME); |
1308 | BFD_ASSERT (s != NULL); | |
1309 | BFD_ASSERT (s->contents != NULL); | |
1310 | BFD_ASSERT (s->output_section != NULL); | |
1311 | ||
1312 | if ((my_offset & 0x01) == 0x01) | |
1313 | { | |
1314 | if (h_sec->owner != NULL | |
1315 | && INTERWORK_SET (h_sec->owner) | |
1316 | && ! INTERWORK_FLAG (h_sec->owner)) | |
d003868e AM |
1317 | _bfd_error_handler |
1318 | /* xgettext:c-format */ | |
1319 | (_("%B(%s): warning: interworking not enabled.\n" | |
1320 | " first occurrence: %B: arm call to thumb"), | |
1321 | h_sec->owner, input_bfd, name); | |
252b5132 RH |
1322 | |
1323 | --my_offset; | |
1324 | myh->root.u.def.value = my_offset; | |
1325 | ||
dc810e39 | 1326 | bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn, |
252b5132 | 1327 | s->contents + my_offset); |
d70910e8 | 1328 | |
dc810e39 | 1329 | bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
252b5132 | 1330 | s->contents + my_offset + 4); |
d70910e8 | 1331 | |
252b5132 RH |
1332 | /* It's a thumb address. Add the low order bit. */ |
1333 | bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn, | |
1334 | s->contents + my_offset + 8); | |
1335 | ||
1336 | if (info->base_file) | |
d70910e8 | 1337 | arm_emit_base_file_entry (info, output_bfd, s, |
dc810e39 | 1338 | my_offset + 8); |
252b5132 RH |
1339 | |
1340 | } | |
1341 | ||
1342 | BFD_ASSERT (my_offset <= globals->arm_glue_size); | |
1343 | ||
1344 | tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr | |
1345 | - input_section->vma); | |
d70910e8 | 1346 | |
252b5132 RH |
1347 | tmp = tmp & 0xFF000000; |
1348 | ||
d70910e8 | 1349 | /* Somehow these are both 4 too far, so subtract 8. */ |
252b5132 RH |
1350 | ret_offset = |
1351 | s->output_offset | |
d70910e8 | 1352 | + my_offset |
252b5132 RH |
1353 | + s->output_section->vma |
1354 | - (input_section->output_offset | |
d70910e8 | 1355 | + input_section->output_section->vma |
252b5132 RH |
1356 | + rel->r_vaddr) |
1357 | - 8; | |
1358 | ||
1359 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); | |
d70910e8 | 1360 | |
dc810e39 AM |
1361 | bfd_put_32 (output_bfd, (bfd_vma) tmp, |
1362 | contents + rel->r_vaddr - input_section->vma); | |
252b5132 RH |
1363 | done = 1; |
1364 | } | |
1365 | } | |
d70910e8 | 1366 | |
17505c5c | 1367 | #ifndef ARM_WINCE |
917583ad | 1368 | /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */ |
252b5132 RH |
1369 | else if (howto->type == ARM_THUMB23) |
1370 | { | |
d70910e8 | 1371 | if ( h->class == C_EXT |
252b5132 RH |
1372 | || h->class == C_STAT |
1373 | || h->class == C_LABEL) | |
1374 | { | |
c8e7bf0d | 1375 | /* Thumb code calling an ARM function. */ |
252b5132 | 1376 | asection * s = 0; |
dc810e39 | 1377 | bfd_vma my_offset; |
252b5132 RH |
1378 | unsigned long int tmp; |
1379 | long int ret_offset; | |
1380 | struct coff_link_hash_entry * myh; | |
1381 | struct coff_arm_link_hash_table * globals; | |
1382 | ||
1383 | myh = find_thumb_glue (info, name, input_bfd); | |
1384 | if (myh == NULL) | |
b34976b6 | 1385 | return FALSE; |
252b5132 RH |
1386 | |
1387 | globals = coff_arm_hash_table (info); | |
d70910e8 | 1388 | |
252b5132 RH |
1389 | BFD_ASSERT (globals != NULL); |
1390 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1391 | |
252b5132 | 1392 | my_offset = myh->root.u.def.value; |
d70910e8 KH |
1393 | |
1394 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
252b5132 | 1395 | THUMB2ARM_GLUE_SECTION_NAME); |
d70910e8 | 1396 | |
252b5132 RH |
1397 | BFD_ASSERT (s != NULL); |
1398 | BFD_ASSERT (s->contents != NULL); | |
1399 | BFD_ASSERT (s->output_section != NULL); | |
d70910e8 | 1400 | |
252b5132 RH |
1401 | if ((my_offset & 0x01) == 0x01) |
1402 | { | |
1403 | if (h_sec->owner != NULL | |
1404 | && INTERWORK_SET (h_sec->owner) | |
1405 | && ! INTERWORK_FLAG (h_sec->owner) | |
1406 | && ! globals->support_old_code) | |
d003868e AM |
1407 | _bfd_error_handler |
1408 | /* xgettext:c-format */ | |
1409 | (_("%B(%s): warning: interworking not enabled.\n" | |
1410 | " first occurrence: %B: thumb call to arm\n" | |
1411 | " consider relinking with --support-old-code enabled"), | |
1412 | h_sec->owner, input_bfd, name); | |
d70910e8 | 1413 | |
252b5132 RH |
1414 | -- my_offset; |
1415 | myh->root.u.def.value = my_offset; | |
1416 | ||
1417 | if (globals->support_old_code) | |
1418 | { | |
dc810e39 | 1419 | bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn, |
252b5132 | 1420 | s->contents + my_offset); |
d70910e8 | 1421 | |
dc810e39 | 1422 | bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn, |
252b5132 RH |
1423 | s->contents + my_offset + 2); |
1424 | ||
dc810e39 | 1425 | bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn, |
252b5132 RH |
1426 | s->contents + my_offset + 4); |
1427 | ||
dc810e39 | 1428 | bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn, |
252b5132 | 1429 | s->contents + my_offset + 6); |
d70910e8 | 1430 | |
dc810e39 | 1431 | bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn, |
252b5132 | 1432 | s->contents + my_offset + 8); |
d70910e8 | 1433 | |
dc810e39 | 1434 | bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn, |
252b5132 | 1435 | s->contents + my_offset + 12); |
d70910e8 | 1436 | |
252b5132 RH |
1437 | /* Store the address of the function in the last word of the stub. */ |
1438 | bfd_put_32 (output_bfd, h_val, | |
1439 | s->contents + my_offset + 16); | |
fa0e42e4 CM |
1440 | |
1441 | if (info->base_file) | |
dc810e39 AM |
1442 | arm_emit_base_file_entry (info, output_bfd, s, |
1443 | my_offset + 16); | |
252b5132 RH |
1444 | } |
1445 | else | |
1446 | { | |
dc810e39 | 1447 | bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
252b5132 | 1448 | s->contents + my_offset); |
d70910e8 | 1449 | |
dc810e39 | 1450 | bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn, |
252b5132 | 1451 | s->contents + my_offset + 2); |
d70910e8 | 1452 | |
252b5132 | 1453 | ret_offset = |
c8e7bf0d NC |
1454 | /* Address of destination of the stub. */ |
1455 | ((bfd_signed_vma) h_val) | |
252b5132 | 1456 | - ((bfd_signed_vma) |
c8e7bf0d NC |
1457 | /* Offset from the start of the current section to the start of the stubs. */ |
1458 | (s->output_offset | |
1459 | /* Offset of the start of this stub from the start of the stubs. */ | |
1460 | + my_offset | |
1461 | /* Address of the start of the current section. */ | |
1462 | + s->output_section->vma) | |
1463 | /* The branch instruction is 4 bytes into the stub. */ | |
1464 | + 4 | |
1465 | /* ARM branches work from the pc of the instruction + 8. */ | |
1466 | + 8); | |
d70910e8 | 1467 | |
252b5132 | 1468 | bfd_put_32 (output_bfd, |
dc810e39 | 1469 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), |
252b5132 RH |
1470 | s->contents + my_offset + 4); |
1471 | ||
252b5132 RH |
1472 | } |
1473 | } | |
1474 | ||
1475 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); | |
1476 | ||
1477 | /* Now go back and fix up the original BL insn to point | |
1478 | to here. */ | |
1479 | ret_offset = | |
1480 | s->output_offset | |
1481 | + my_offset | |
1482 | - (input_section->output_offset | |
1483 | + rel->r_vaddr) | |
1484 | -4; | |
d70910e8 | 1485 | |
252b5132 RH |
1486 | tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr |
1487 | - input_section->vma); | |
1488 | ||
1489 | bfd_put_32 (output_bfd, | |
dc810e39 AM |
1490 | (bfd_vma) insert_thumb_branch (tmp, |
1491 | ret_offset), | |
1492 | contents + rel->r_vaddr - input_section->vma); | |
d70910e8 | 1493 | |
252b5132 RH |
1494 | done = 1; |
1495 | } | |
1496 | } | |
17505c5c | 1497 | #endif |
252b5132 | 1498 | } |
d70910e8 | 1499 | |
252b5132 RH |
1500 | /* If the relocation type and destination symbol does not |
1501 | fall into one of the above categories, then we can just | |
d70910e8 | 1502 | perform a direct link. */ |
252b5132 RH |
1503 | |
1504 | if (done) | |
1505 | rstat = bfd_reloc_ok; | |
d70910e8 | 1506 | else |
252b5132 RH |
1507 | if ( h->root.type == bfd_link_hash_defined |
1508 | || h->root.type == bfd_link_hash_defweak) | |
1509 | { | |
1510 | asection *sec; | |
1511 | ||
1512 | sec = h->root.u.def.section; | |
1513 | val = (h->root.u.def.value | |
1514 | + sec->output_section->vma | |
1515 | + sec->output_offset); | |
1516 | } | |
1517 | ||
1049f94e | 1518 | else if (! info->relocatable) |
252b5132 RH |
1519 | { |
1520 | if (! ((*info->callbacks->undefined_symbol) | |
1521 | (info, h->root.root.string, input_bfd, input_section, | |
b34976b6 AM |
1522 | rel->r_vaddr - input_section->vma, TRUE))) |
1523 | return FALSE; | |
252b5132 RH |
1524 | } |
1525 | } | |
1526 | ||
1527 | if (info->base_file) | |
1528 | { | |
d70910e8 | 1529 | /* Emit a reloc if the backend thinks it needs it. */ |
252b5132 | 1530 | if (sym && pe_data(output_bfd)->in_reloc_p(output_bfd, howto)) |
dc810e39 AM |
1531 | arm_emit_base_file_entry (info, output_bfd, input_section, |
1532 | rel->r_vaddr); | |
252b5132 | 1533 | } |
d70910e8 | 1534 | |
252b5132 RH |
1535 | if (done) |
1536 | rstat = bfd_reloc_ok; | |
17505c5c | 1537 | #ifndef ARM_WINCE |
c8e7bf0d | 1538 | /* Only perform this fix during the final link, not a relocatable link. */ |
1049f94e | 1539 | else if (! info->relocatable |
252b5132 RH |
1540 | && howto->type == ARM_THUMB23) |
1541 | { | |
1542 | /* This is pretty much a copy of what the default | |
1543 | _bfd_final_link_relocate and _bfd_relocate_contents | |
1544 | routines do to perform a relocation, with special | |
1545 | processing for the split addressing of the Thumb BL | |
1546 | instruction. Again, it would probably be simpler adding a | |
1547 | ThumbBRANCH23 specific macro expansion into the default | |
1548 | code. */ | |
d70910e8 | 1549 | |
252b5132 | 1550 | bfd_vma address = rel->r_vaddr - input_section->vma; |
d70910e8 | 1551 | |
07515404 | 1552 | if (address > high_address) |
252b5132 RH |
1553 | rstat = bfd_reloc_outofrange; |
1554 | else | |
1555 | { | |
b34976b6 AM |
1556 | bfd_vma relocation = val + addend; |
1557 | int size = bfd_get_reloc_size (howto); | |
1558 | bfd_boolean overflow = FALSE; | |
1559 | bfd_byte *location = contents + address; | |
1560 | bfd_vma x = bfd_get_32 (input_bfd, location); | |
1561 | bfd_vma src_mask = 0x007FFFFE; | |
1562 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; | |
1563 | bfd_signed_vma reloc_signed_min = ~reloc_signed_max; | |
1564 | bfd_vma check; | |
1565 | bfd_signed_vma signed_check; | |
1566 | bfd_vma add; | |
1567 | bfd_signed_vma signed_add; | |
252b5132 RH |
1568 | |
1569 | BFD_ASSERT (size == 4); | |
d70910e8 | 1570 | |
4f3c3dbb | 1571 | /* howto->pc_relative should be TRUE for type 14 BRANCH23. */ |
252b5132 RH |
1572 | relocation -= (input_section->output_section->vma |
1573 | + input_section->output_offset); | |
d70910e8 | 1574 | |
4f3c3dbb | 1575 | /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */ |
252b5132 | 1576 | relocation -= address; |
d70910e8 KH |
1577 | |
1578 | /* No need to negate the relocation with BRANCH23. */ | |
252b5132 RH |
1579 | /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */ |
1580 | /* howto->rightshift == 1 */ | |
d70910e8 | 1581 | |
4f3c3dbb | 1582 | /* Drop unwanted bits from the value we are relocating to. */ |
252b5132 | 1583 | check = relocation >> howto->rightshift; |
d70910e8 | 1584 | |
252b5132 RH |
1585 | /* If this is a signed value, the rightshift just dropped |
1586 | leading 1 bits (assuming twos complement). */ | |
1587 | if ((bfd_signed_vma) relocation >= 0) | |
1588 | signed_check = check; | |
1589 | else | |
1590 | signed_check = (check | |
1591 | | ((bfd_vma) - 1 | |
1592 | & ~((bfd_vma) - 1 >> howto->rightshift))); | |
d70910e8 | 1593 | |
252b5132 RH |
1594 | /* Get the value from the object file. */ |
1595 | if (bfd_big_endian (input_bfd)) | |
4f3c3dbb | 1596 | add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1); |
252b5132 | 1597 | else |
4f3c3dbb | 1598 | add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15)); |
252b5132 RH |
1599 | |
1600 | /* Get the value from the object file with an appropriate sign. | |
1601 | The expression involving howto->src_mask isolates the upper | |
1602 | bit of src_mask. If that bit is set in the value we are | |
1603 | adding, it is negative, and we subtract out that number times | |
1604 | two. If src_mask includes the highest possible bit, then we | |
1605 | can not get the upper bit, but that does not matter since | |
1606 | signed_add needs no adjustment to become negative in that | |
1607 | case. */ | |
252b5132 | 1608 | signed_add = add; |
d70910e8 | 1609 | |
252b5132 RH |
1610 | if ((add & (((~ src_mask) >> 1) & src_mask)) != 0) |
1611 | signed_add -= (((~ src_mask) >> 1) & src_mask) << 1; | |
d70910e8 | 1612 | |
4f3c3dbb | 1613 | /* howto->bitpos == 0 */ |
252b5132 RH |
1614 | /* Add the value from the object file, shifted so that it is a |
1615 | straight number. */ | |
252b5132 | 1616 | signed_check += signed_add; |
4f3c3dbb | 1617 | relocation += signed_add; |
252b5132 RH |
1618 | |
1619 | BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed); | |
1620 | ||
1621 | /* Assumes two's complement. */ | |
1622 | if ( signed_check > reloc_signed_max | |
1623 | || signed_check < reloc_signed_min) | |
b34976b6 | 1624 | overflow = TRUE; |
d70910e8 | 1625 | |
c62e1cc3 NC |
1626 | /* Put the relocation into the correct bits. |
1627 | For a BLX instruction, make sure that the relocation is rounded up | |
1628 | to a word boundary. This follows the semantics of the instruction | |
1629 | which specifies that bit 1 of the target address will come from bit | |
1630 | 1 of the base address. */ | |
252b5132 | 1631 | if (bfd_big_endian (input_bfd)) |
c62e1cc3 NC |
1632 | { |
1633 | if ((x & 0x1800) == 0x0800 && (relocation & 0x02)) | |
1634 | relocation += 2; | |
1635 | relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000)); | |
1636 | } | |
252b5132 | 1637 | else |
c62e1cc3 NC |
1638 | { |
1639 | if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02)) | |
1640 | relocation += 2; | |
1641 | relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff)); | |
1642 | } | |
d70910e8 | 1643 | |
4f3c3dbb | 1644 | /* Add the relocation to the correct bits of X. */ |
252b5132 RH |
1645 | x = ((x & ~howto->dst_mask) | relocation); |
1646 | ||
4f3c3dbb | 1647 | /* Put the relocated value back in the object file. */ |
252b5132 RH |
1648 | bfd_put_32 (input_bfd, x, location); |
1649 | ||
1650 | rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok; | |
1651 | } | |
1652 | } | |
17505c5c | 1653 | #endif |
252b5132 | 1654 | else |
1e7fef1d NC |
1655 | if (info->relocatable && ! howto->partial_inplace) |
1656 | rstat = bfd_reloc_ok; | |
1657 | else | |
1658 | rstat = _bfd_final_link_relocate (howto, input_bfd, input_section, | |
1659 | contents, | |
1660 | rel->r_vaddr - input_section->vma, | |
1661 | val, addend); | |
c8e7bf0d | 1662 | /* Only perform this fix during the final link, not a relocatable link. */ |
1049f94e | 1663 | if (! info->relocatable |
b44267fd | 1664 | && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32)) |
252b5132 RH |
1665 | { |
1666 | /* Determine if we need to set the bottom bit of a relocated address | |
1667 | because the address is the address of a Thumb code symbol. */ | |
b34976b6 | 1668 | int patchit = FALSE; |
d70910e8 | 1669 | |
252b5132 RH |
1670 | if (h != NULL |
1671 | && ( h->class == C_THUMBSTATFUNC | |
1672 | || h->class == C_THUMBEXTFUNC)) | |
1673 | { | |
b34976b6 | 1674 | patchit = TRUE; |
252b5132 RH |
1675 | } |
1676 | else if (sym != NULL | |
1677 | && sym->n_scnum > N_UNDEF) | |
1678 | { | |
1679 | /* No hash entry - use the symbol instead. */ | |
252b5132 RH |
1680 | if ( sym->n_sclass == C_THUMBSTATFUNC |
1681 | || sym->n_sclass == C_THUMBEXTFUNC) | |
b34976b6 | 1682 | patchit = TRUE; |
252b5132 RH |
1683 | } |
1684 | ||
1685 | if (patchit) | |
1686 | { | |
1687 | bfd_byte * location = contents + rel->r_vaddr - input_section->vma; | |
1688 | bfd_vma x = bfd_get_32 (input_bfd, location); | |
1689 | ||
1690 | bfd_put_32 (input_bfd, x | 1, location); | |
1691 | } | |
1692 | } | |
d70910e8 | 1693 | |
252b5132 RH |
1694 | switch (rstat) |
1695 | { | |
1696 | default: | |
1697 | abort (); | |
1698 | case bfd_reloc_ok: | |
1699 | break; | |
1700 | case bfd_reloc_outofrange: | |
1701 | (*_bfd_error_handler) | |
d003868e AM |
1702 | (_("%B: bad reloc address 0x%lx in section `%A'"), |
1703 | input_bfd, input_section, (unsigned long) rel->r_vaddr); | |
b34976b6 | 1704 | return FALSE; |
252b5132 RH |
1705 | case bfd_reloc_overflow: |
1706 | { | |
1707 | const char *name; | |
1708 | char buf[SYMNMLEN + 1]; | |
1709 | ||
1710 | if (symndx == -1) | |
1711 | name = "*ABS*"; | |
1712 | else if (h != NULL) | |
dfeffb9f | 1713 | name = NULL; |
252b5132 RH |
1714 | else |
1715 | { | |
1716 | name = _bfd_coff_internal_syment_name (input_bfd, sym, buf); | |
1717 | if (name == NULL) | |
b34976b6 | 1718 | return FALSE; |
252b5132 RH |
1719 | } |
1720 | ||
1721 | if (! ((*info->callbacks->reloc_overflow) | |
dfeffb9f L |
1722 | (info, (h ? &h->root : NULL), name, howto->name, |
1723 | (bfd_vma) 0, input_bfd, input_section, | |
1724 | rel->r_vaddr - input_section->vma))) | |
b34976b6 | 1725 | return FALSE; |
252b5132 RH |
1726 | } |
1727 | } | |
1728 | } | |
1729 | ||
b34976b6 | 1730 | return TRUE; |
252b5132 RH |
1731 | } |
1732 | ||
e049a0de ILT |
1733 | #ifndef COFF_IMAGE_WITH_PE |
1734 | ||
b34976b6 | 1735 | bfd_boolean |
c8e7bf0d | 1736 | bfd_arm_allocate_interworking_sections (struct bfd_link_info * info) |
252b5132 RH |
1737 | { |
1738 | asection * s; | |
1739 | bfd_byte * foo; | |
1740 | struct coff_arm_link_hash_table * globals; | |
252b5132 RH |
1741 | |
1742 | globals = coff_arm_hash_table (info); | |
d70910e8 | 1743 | |
252b5132 RH |
1744 | BFD_ASSERT (globals != NULL); |
1745 | ||
1746 | if (globals->arm_glue_size != 0) | |
1747 | { | |
1748 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1749 | |
252b5132 RH |
1750 | s = bfd_get_section_by_name |
1751 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); | |
1752 | ||
1753 | BFD_ASSERT (s != NULL); | |
d70910e8 | 1754 | |
c8e7bf0d | 1755 | foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size); |
d70910e8 | 1756 | |
eea6121a | 1757 | s->size = globals->arm_glue_size; |
252b5132 RH |
1758 | s->contents = foo; |
1759 | } | |
1760 | ||
1761 | if (globals->thumb_glue_size != 0) | |
1762 | { | |
1763 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1764 | |
252b5132 RH |
1765 | s = bfd_get_section_by_name |
1766 | (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME); | |
1767 | ||
1768 | BFD_ASSERT (s != NULL); | |
d70910e8 | 1769 | |
c8e7bf0d | 1770 | foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size); |
d70910e8 | 1771 | |
eea6121a | 1772 | s->size = globals->thumb_glue_size; |
252b5132 RH |
1773 | s->contents = foo; |
1774 | } | |
1775 | ||
b34976b6 | 1776 | return TRUE; |
252b5132 RH |
1777 | } |
1778 | ||
1779 | static void | |
c8e7bf0d NC |
1780 | record_arm_to_thumb_glue (struct bfd_link_info * info, |
1781 | struct coff_link_hash_entry * h) | |
252b5132 RH |
1782 | { |
1783 | const char * name = h->root.root.string; | |
1784 | register asection * s; | |
1785 | char * tmp_name; | |
1786 | struct coff_link_hash_entry * myh; | |
14a793b2 | 1787 | struct bfd_link_hash_entry * bh; |
252b5132 | 1788 | struct coff_arm_link_hash_table * globals; |
dc810e39 AM |
1789 | bfd_vma val; |
1790 | bfd_size_type amt; | |
252b5132 RH |
1791 | |
1792 | globals = coff_arm_hash_table (info); | |
1793 | ||
1794 | BFD_ASSERT (globals != NULL); | |
1795 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
1796 | ||
1797 | s = bfd_get_section_by_name | |
1798 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); | |
1799 | ||
1800 | BFD_ASSERT (s != NULL); | |
1801 | ||
dc810e39 | 1802 | amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1; |
c8e7bf0d | 1803 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
1804 | |
1805 | BFD_ASSERT (tmp_name); | |
1806 | ||
1807 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
d70910e8 | 1808 | |
252b5132 | 1809 | myh = coff_link_hash_lookup |
b34976b6 | 1810 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
d70910e8 | 1811 | |
252b5132 RH |
1812 | if (myh != NULL) |
1813 | { | |
1814 | free (tmp_name); | |
c8e7bf0d NC |
1815 | /* We've already seen this guy. */ |
1816 | return; | |
252b5132 RH |
1817 | } |
1818 | ||
1819 | /* The only trick here is using globals->arm_glue_size as the value. Even | |
1820 | though the section isn't allocated yet, this is where we will be putting | |
1821 | it. */ | |
14a793b2 | 1822 | bh = NULL; |
dc810e39 | 1823 | val = globals->arm_glue_size + 1; |
252b5132 | 1824 | bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, |
b34976b6 | 1825 | BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh); |
d70910e8 | 1826 | |
252b5132 | 1827 | free (tmp_name); |
d70910e8 | 1828 | |
252b5132 RH |
1829 | globals->arm_glue_size += ARM2THUMB_GLUE_SIZE; |
1830 | ||
1831 | return; | |
1832 | } | |
1833 | ||
7831a775 | 1834 | #ifndef ARM_WINCE |
252b5132 | 1835 | static void |
c8e7bf0d NC |
1836 | record_thumb_to_arm_glue (struct bfd_link_info * info, |
1837 | struct coff_link_hash_entry * h) | |
252b5132 RH |
1838 | { |
1839 | const char * name = h->root.root.string; | |
c8e7bf0d | 1840 | asection * s; |
252b5132 RH |
1841 | char * tmp_name; |
1842 | struct coff_link_hash_entry * myh; | |
14a793b2 | 1843 | struct bfd_link_hash_entry * bh; |
252b5132 | 1844 | struct coff_arm_link_hash_table * globals; |
dc810e39 AM |
1845 | bfd_vma val; |
1846 | bfd_size_type amt; | |
252b5132 | 1847 | |
252b5132 | 1848 | globals = coff_arm_hash_table (info); |
d70910e8 | 1849 | |
252b5132 RH |
1850 | BFD_ASSERT (globals != NULL); |
1851 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
1852 | ||
1853 | s = bfd_get_section_by_name | |
1854 | (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME); | |
1855 | ||
1856 | BFD_ASSERT (s != NULL); | |
1857 | ||
dc810e39 | 1858 | amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1; |
c8e7bf0d | 1859 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
1860 | |
1861 | BFD_ASSERT (tmp_name); | |
1862 | ||
1863 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
1864 | ||
1865 | myh = coff_link_hash_lookup | |
b34976b6 | 1866 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
d70910e8 | 1867 | |
252b5132 RH |
1868 | if (myh != NULL) |
1869 | { | |
1870 | free (tmp_name); | |
c8e7bf0d NC |
1871 | /* We've already seen this guy. */ |
1872 | return; | |
252b5132 RH |
1873 | } |
1874 | ||
14a793b2 | 1875 | bh = NULL; |
dc810e39 | 1876 | val = globals->thumb_glue_size + 1; |
252b5132 | 1877 | bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, |
b34976b6 | 1878 | BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh); |
d70910e8 | 1879 | |
252b5132 | 1880 | /* If we mark it 'thumb', the disassembler will do a better job. */ |
14a793b2 | 1881 | myh = (struct coff_link_hash_entry *) bh; |
252b5132 RH |
1882 | myh->class = C_THUMBEXTFUNC; |
1883 | ||
1884 | free (tmp_name); | |
1885 | ||
1886 | /* Allocate another symbol to mark where we switch to arm mode. */ | |
d70910e8 | 1887 | |
252b5132 RH |
1888 | #define CHANGE_TO_ARM "__%s_change_to_arm" |
1889 | #define BACK_FROM_ARM "__%s_back_from_arm" | |
d70910e8 | 1890 | |
dc810e39 | 1891 | amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1; |
c8e7bf0d | 1892 | tmp_name = bfd_malloc (amt); |
d70910e8 | 1893 | |
252b5132 | 1894 | BFD_ASSERT (tmp_name); |
d70910e8 | 1895 | |
252b5132 RH |
1896 | sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name); |
1897 | ||
14a793b2 | 1898 | bh = NULL; |
dc810e39 | 1899 | val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4); |
252b5132 | 1900 | bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, |
b34976b6 | 1901 | BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh); |
252b5132 | 1902 | |
d70910e8 KH |
1903 | free (tmp_name); |
1904 | ||
252b5132 RH |
1905 | globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE; |
1906 | ||
1907 | return; | |
1908 | } | |
7831a775 | 1909 | #endif /* not ARM_WINCE */ |
252b5132 RH |
1910 | |
1911 | /* Select a BFD to be used to hold the sections used by the glue code. | |
1912 | This function is called from the linker scripts in ld/emultempl/ | |
1913 | {armcoff/pe}.em */ | |
e049a0de | 1914 | |
b34976b6 | 1915 | bfd_boolean |
c8e7bf0d NC |
1916 | bfd_arm_get_bfd_for_interworking (bfd * abfd, |
1917 | struct bfd_link_info * info) | |
252b5132 RH |
1918 | { |
1919 | struct coff_arm_link_hash_table * globals; | |
1920 | flagword flags; | |
1921 | asection * sec; | |
d70910e8 | 1922 | |
252b5132 RH |
1923 | /* If we are only performing a partial link do not bother |
1924 | getting a bfd to hold the glue. */ | |
1049f94e | 1925 | if (info->relocatable) |
b34976b6 | 1926 | return TRUE; |
d70910e8 | 1927 | |
252b5132 | 1928 | globals = coff_arm_hash_table (info); |
d70910e8 | 1929 | |
252b5132 RH |
1930 | BFD_ASSERT (globals != NULL); |
1931 | ||
1932 | if (globals->bfd_of_glue_owner != NULL) | |
b34976b6 | 1933 | return TRUE; |
d70910e8 | 1934 | |
252b5132 | 1935 | sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME); |
d70910e8 KH |
1936 | |
1937 | if (sec == NULL) | |
252b5132 | 1938 | { |
ba3d4249 | 1939 | flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY; |
d70910e8 | 1940 | |
252b5132 | 1941 | sec = bfd_make_section (abfd, ARM2THUMB_GLUE_SECTION_NAME); |
d70910e8 | 1942 | |
252b5132 RH |
1943 | if (sec == NULL |
1944 | || ! bfd_set_section_flags (abfd, sec, flags) | |
1945 | || ! bfd_set_section_alignment (abfd, sec, 2)) | |
b34976b6 | 1946 | return FALSE; |
252b5132 RH |
1947 | } |
1948 | ||
1949 | sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME); | |
1950 | ||
d70910e8 | 1951 | if (sec == NULL) |
252b5132 | 1952 | { |
ba3d4249 | 1953 | flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY; |
d70910e8 | 1954 | |
252b5132 | 1955 | sec = bfd_make_section (abfd, THUMB2ARM_GLUE_SECTION_NAME); |
d70910e8 | 1956 | |
252b5132 RH |
1957 | if (sec == NULL |
1958 | || ! bfd_set_section_flags (abfd, sec, flags) | |
1959 | || ! bfd_set_section_alignment (abfd, sec, 2)) | |
b34976b6 | 1960 | return FALSE; |
252b5132 | 1961 | } |
d70910e8 | 1962 | |
252b5132 RH |
1963 | /* Save the bfd for later use. */ |
1964 | globals->bfd_of_glue_owner = abfd; | |
d70910e8 | 1965 | |
b34976b6 | 1966 | return TRUE; |
252b5132 RH |
1967 | } |
1968 | ||
b34976b6 | 1969 | bfd_boolean |
c8e7bf0d NC |
1970 | bfd_arm_process_before_allocation (bfd * abfd, |
1971 | struct bfd_link_info * info, | |
1972 | int support_old_code) | |
252b5132 RH |
1973 | { |
1974 | asection * sec; | |
1975 | struct coff_arm_link_hash_table * globals; | |
1976 | ||
1977 | /* If we are only performing a partial link do not bother | |
1978 | to construct any glue. */ | |
1049f94e | 1979 | if (info->relocatable) |
b34976b6 | 1980 | return TRUE; |
d70910e8 | 1981 | |
252b5132 RH |
1982 | /* Here we have a bfd that is to be included on the link. We have a hook |
1983 | to do reloc rummaging, before section sizes are nailed down. */ | |
252b5132 RH |
1984 | _bfd_coff_get_external_symbols (abfd); |
1985 | ||
1986 | globals = coff_arm_hash_table (info); | |
d70910e8 | 1987 | |
252b5132 RH |
1988 | BFD_ASSERT (globals != NULL); |
1989 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
1990 | ||
1991 | globals->support_old_code = support_old_code; | |
d70910e8 | 1992 | |
252b5132 RH |
1993 | /* Rummage around all the relocs and map the glue vectors. */ |
1994 | sec = abfd->sections; | |
1995 | ||
1996 | if (sec == NULL) | |
b34976b6 | 1997 | return TRUE; |
252b5132 RH |
1998 | |
1999 | for (; sec != NULL; sec = sec->next) | |
2000 | { | |
2001 | struct internal_reloc * i; | |
2002 | struct internal_reloc * rel; | |
2003 | ||
d70910e8 | 2004 | if (sec->reloc_count == 0) |
252b5132 RH |
2005 | continue; |
2006 | ||
2007 | /* Load the relocs. */ | |
d70910e8 | 2008 | /* FIXME: there may be a storage leak here. */ |
252b5132 | 2009 | i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0); |
d70910e8 | 2010 | |
252b5132 RH |
2011 | BFD_ASSERT (i != 0); |
2012 | ||
d70910e8 | 2013 | for (rel = i; rel < i + sec->reloc_count; ++rel) |
252b5132 RH |
2014 | { |
2015 | unsigned short r_type = rel->r_type; | |
86033394 | 2016 | long symndx; |
252b5132 RH |
2017 | struct coff_link_hash_entry * h; |
2018 | ||
2019 | symndx = rel->r_symndx; | |
2020 | ||
d70910e8 | 2021 | /* If the relocation is not against a symbol it cannot concern us. */ |
252b5132 RH |
2022 | if (symndx == -1) |
2023 | continue; | |
2024 | ||
17505c5c | 2025 | /* If the index is outside of the range of our table, something has gone wrong. */ |
af74ae99 NC |
2026 | if (symndx >= obj_conv_table_size (abfd)) |
2027 | { | |
d003868e AM |
2028 | _bfd_error_handler (_("%B: illegal symbol index in reloc: %d"), |
2029 | abfd, symndx); | |
af74ae99 NC |
2030 | continue; |
2031 | } | |
d70910e8 | 2032 | |
252b5132 RH |
2033 | h = obj_coff_sym_hashes (abfd)[symndx]; |
2034 | ||
2035 | /* If the relocation is against a static symbol it must be within | |
2036 | the current section and so cannot be a cross ARM/Thumb relocation. */ | |
2037 | if (h == NULL) | |
2038 | continue; | |
2039 | ||
2040 | switch (r_type) | |
2041 | { | |
2042 | case ARM_26: | |
2043 | /* This one is a call from arm code. We need to look up | |
2044 | the target of the call. If it is a thumb target, we | |
2045 | insert glue. */ | |
d70910e8 | 2046 | |
252b5132 RH |
2047 | if (h->class == C_THUMBEXTFUNC) |
2048 | record_arm_to_thumb_glue (info, h); | |
2049 | break; | |
d70910e8 | 2050 | |
17505c5c | 2051 | #ifndef ARM_WINCE |
252b5132 RH |
2052 | case ARM_THUMB23: |
2053 | /* This one is a call from thumb code. We used to look | |
2054 | for ARM_THUMB9 and ARM_THUMB12 as well. We need to look | |
2055 | up the target of the call. If it is an arm target, we | |
2056 | insert glue. If the symbol does not exist it will be | |
2057 | given a class of C_EXT and so we will generate a stub | |
2058 | for it. This is not really a problem, since the link | |
2059 | is doomed anyway. */ | |
2060 | ||
2061 | switch (h->class) | |
2062 | { | |
2063 | case C_EXT: | |
2064 | case C_STAT: | |
2065 | case C_LABEL: | |
2066 | record_thumb_to_arm_glue (info, h); | |
2067 | break; | |
2068 | default: | |
2069 | ; | |
2070 | } | |
2071 | break; | |
17505c5c | 2072 | #endif |
d70910e8 | 2073 | |
252b5132 RH |
2074 | default: |
2075 | break; | |
2076 | } | |
2077 | } | |
2078 | } | |
2079 | ||
b34976b6 | 2080 | return TRUE; |
252b5132 RH |
2081 | } |
2082 | ||
e049a0de ILT |
2083 | #endif /* ! defined (COFF_IMAGE_WITH_PE) */ |
2084 | ||
252b5132 RH |
2085 | #define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup |
2086 | #define coff_relocate_section coff_arm_relocate_section | |
2087 | #define coff_bfd_is_local_label_name coff_arm_is_local_label_name | |
2088 | #define coff_adjust_symndx coff_arm_adjust_symndx | |
2089 | #define coff_link_output_has_begun coff_arm_link_output_has_begun | |
2090 | #define coff_final_link_postscript coff_arm_final_link_postscript | |
2091 | #define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data | |
2092 | #define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data | |
2093 | #define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags | |
2094 | #define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data | |
2095 | #define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create | |
2096 | ||
d21356d8 NC |
2097 | /* When doing a relocatable link, we want to convert ARM_26 relocs |
2098 | into ARM_26D relocs. */ | |
252b5132 | 2099 | |
b34976b6 | 2100 | static bfd_boolean |
c8e7bf0d NC |
2101 | coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED, |
2102 | struct bfd_link_info *info ATTRIBUTE_UNUSED, | |
2103 | bfd *ibfd, | |
2104 | asection *sec, | |
2105 | struct internal_reloc *irel, | |
2106 | bfd_boolean *adjustedp) | |
252b5132 | 2107 | { |
d21356d8 | 2108 | if (irel->r_type == ARM_26) |
252b5132 RH |
2109 | { |
2110 | struct coff_link_hash_entry *h; | |
2111 | ||
2112 | h = obj_coff_sym_hashes (ibfd)[irel->r_symndx]; | |
2113 | if (h != NULL | |
2114 | && (h->root.type == bfd_link_hash_defined | |
2115 | || h->root.type == bfd_link_hash_defweak) | |
2116 | && h->root.u.def.section->output_section == sec->output_section) | |
d21356d8 | 2117 | irel->r_type = ARM_26D; |
252b5132 | 2118 | } |
b34976b6 AM |
2119 | *adjustedp = FALSE; |
2120 | return TRUE; | |
252b5132 RH |
2121 | } |
2122 | ||
2123 | /* Called when merging the private data areas of two BFDs. | |
2124 | This is important as it allows us to detect if we are | |
2125 | attempting to merge binaries compiled for different ARM | |
5c4491d3 | 2126 | targets, eg different CPUs or different APCS's. */ |
252b5132 | 2127 | |
b34976b6 | 2128 | static bfd_boolean |
c8e7bf0d | 2129 | coff_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd) |
252b5132 RH |
2130 | { |
2131 | BFD_ASSERT (ibfd != NULL && obfd != NULL); | |
2132 | ||
2133 | if (ibfd == obfd) | |
b34976b6 | 2134 | return TRUE; |
252b5132 RH |
2135 | |
2136 | /* If the two formats are different we cannot merge anything. | |
2137 | This is not an error, since it is permissable to change the | |
2138 | input and output formats. */ | |
2139 | if ( ibfd->xvec->flavour != bfd_target_coff_flavour | |
2140 | || obfd->xvec->flavour != bfd_target_coff_flavour) | |
b34976b6 | 2141 | return TRUE; |
252b5132 | 2142 | |
5a6c6817 NC |
2143 | /* Determine what should happen if the input ARM architecture |
2144 | does not match the output ARM architecture. */ | |
2145 | if (! bfd_arm_merge_machines (ibfd, obfd)) | |
2146 | return FALSE; | |
2147 | ||
2148 | /* Verify that the APCS is the same for the two BFDs. */ | |
252b5132 RH |
2149 | if (APCS_SET (ibfd)) |
2150 | { | |
2151 | if (APCS_SET (obfd)) | |
2152 | { | |
2153 | /* If the src and dest have different APCS flag bits set, fail. */ | |
2154 | if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd)) | |
2155 | { | |
2156 | _bfd_error_handler | |
2157 | /* xgettext: c-format */ | |
d003868e AM |
2158 | (_("ERROR: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"), |
2159 | ibfd, obfd, | |
2160 | APCS_26_FLAG (ibfd) ? 26 : 32, | |
2161 | APCS_26_FLAG (obfd) ? 26 : 32 | |
252b5132 RH |
2162 | ); |
2163 | ||
2164 | bfd_set_error (bfd_error_wrong_format); | |
b34976b6 | 2165 | return FALSE; |
252b5132 | 2166 | } |
d70910e8 | 2167 | |
252b5132 RH |
2168 | if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd)) |
2169 | { | |
2170 | const char *msg; | |
2171 | ||
2172 | if (APCS_FLOAT_FLAG (ibfd)) | |
2173 | /* xgettext: c-format */ | |
d003868e | 2174 | msg = _("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers"); |
252b5132 RH |
2175 | else |
2176 | /* xgettext: c-format */ | |
d003868e | 2177 | msg = _("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers"); |
d70910e8 | 2178 | |
d003868e | 2179 | _bfd_error_handler (msg, ibfd, obfd); |
252b5132 RH |
2180 | |
2181 | bfd_set_error (bfd_error_wrong_format); | |
b34976b6 | 2182 | return FALSE; |
252b5132 | 2183 | } |
d70910e8 | 2184 | |
252b5132 RH |
2185 | if (PIC_FLAG (obfd) != PIC_FLAG (ibfd)) |
2186 | { | |
2187 | const char * msg; | |
2188 | ||
2189 | if (PIC_FLAG (ibfd)) | |
2190 | /* xgettext: c-format */ | |
d003868e | 2191 | msg = _("ERROR: %B is compiled as position independent code, whereas target %B is absolute position"); |
252b5132 RH |
2192 | else |
2193 | /* xgettext: c-format */ | |
d003868e AM |
2194 | msg = _("ERROR: %B is compiled as absolute position code, whereas target %B is position independent"); |
2195 | _bfd_error_handler (msg, ibfd, obfd); | |
252b5132 RH |
2196 | |
2197 | bfd_set_error (bfd_error_wrong_format); | |
b34976b6 | 2198 | return FALSE; |
252b5132 RH |
2199 | } |
2200 | } | |
2201 | else | |
2202 | { | |
2203 | SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd)); | |
d70910e8 | 2204 | |
252b5132 RH |
2205 | /* Set up the arch and fields as well as these are probably wrong. */ |
2206 | bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
2207 | } | |
2208 | } | |
2209 | ||
2210 | /* Check the interworking support. */ | |
2211 | if (INTERWORK_SET (ibfd)) | |
2212 | { | |
2213 | if (INTERWORK_SET (obfd)) | |
2214 | { | |
2215 | /* If the src and dest differ in their interworking issue a warning. */ | |
2216 | if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd)) | |
2217 | { | |
2218 | const char * msg; | |
2219 | ||
2220 | if (INTERWORK_FLAG (ibfd)) | |
2221 | /* xgettext: c-format */ | |
d003868e | 2222 | msg = _("Warning: %B supports interworking, whereas %B does not"); |
252b5132 RH |
2223 | else |
2224 | /* xgettext: c-format */ | |
d003868e | 2225 | msg = _("Warning: %B does not support interworking, whereas %B does"); |
d70910e8 | 2226 | |
d003868e | 2227 | _bfd_error_handler (msg, ibfd, obfd); |
252b5132 RH |
2228 | } |
2229 | } | |
2230 | else | |
2231 | { | |
2232 | SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd)); | |
2233 | } | |
2234 | } | |
2235 | ||
b34976b6 | 2236 | return TRUE; |
252b5132 RH |
2237 | } |
2238 | ||
252b5132 RH |
2239 | /* Display the flags field. */ |
2240 | ||
b34976b6 | 2241 | static bfd_boolean |
c8e7bf0d | 2242 | coff_arm_print_private_bfd_data (bfd * abfd, void * ptr) |
252b5132 RH |
2243 | { |
2244 | FILE * file = (FILE *) ptr; | |
d70910e8 | 2245 | |
252b5132 | 2246 | BFD_ASSERT (abfd != NULL && ptr != NULL); |
d70910e8 | 2247 | |
252b5132 RH |
2248 | /* xgettext:c-format */ |
2249 | fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags); | |
d70910e8 | 2250 | |
252b5132 RH |
2251 | if (APCS_SET (abfd)) |
2252 | { | |
5c4491d3 | 2253 | /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */ |
252b5132 RH |
2254 | fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32); |
2255 | ||
2256 | if (APCS_FLOAT_FLAG (abfd)) | |
2257 | fprintf (file, _(" [floats passed in float registers]")); | |
2258 | else | |
2259 | fprintf (file, _(" [floats passed in integer registers]")); | |
2260 | ||
2261 | if (PIC_FLAG (abfd)) | |
2262 | fprintf (file, _(" [position independent]")); | |
2263 | else | |
2264 | fprintf (file, _(" [absolute position]")); | |
2265 | } | |
d70910e8 | 2266 | |
252b5132 RH |
2267 | if (! INTERWORK_SET (abfd)) |
2268 | fprintf (file, _(" [interworking flag not initialised]")); | |
2269 | else if (INTERWORK_FLAG (abfd)) | |
2270 | fprintf (file, _(" [interworking supported]")); | |
2271 | else | |
2272 | fprintf (file, _(" [interworking not supported]")); | |
d70910e8 | 2273 | |
252b5132 | 2274 | fputc ('\n', file); |
d70910e8 | 2275 | |
b34976b6 | 2276 | return TRUE; |
252b5132 RH |
2277 | } |
2278 | ||
252b5132 RH |
2279 | /* Copies the given flags into the coff_tdata.flags field. |
2280 | Typically these flags come from the f_flags[] field of | |
2281 | the COFF filehdr structure, which contains important, | |
2282 | target specific information. | |
2283 | Note: Although this function is static, it is explicitly | |
2284 | called from both coffcode.h and peicode.h. */ | |
2285 | ||
b34976b6 | 2286 | static bfd_boolean |
c8e7bf0d | 2287 | _bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags) |
252b5132 RH |
2288 | { |
2289 | flagword flag; | |
2290 | ||
2291 | BFD_ASSERT (abfd != NULL); | |
2292 | ||
2293 | flag = (flags & F_APCS26) ? F_APCS_26 : 0; | |
d70910e8 | 2294 | |
252b5132 RH |
2295 | /* Make sure that the APCS field has not been initialised to the opposite |
2296 | value. */ | |
2297 | if (APCS_SET (abfd) | |
2298 | && ( (APCS_26_FLAG (abfd) != flag) | |
2299 | || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT)) | |
948221a8 | 2300 | || (PIC_FLAG (abfd) != (flags & F_PIC)) |
252b5132 | 2301 | )) |
b34976b6 | 2302 | return FALSE; |
252b5132 RH |
2303 | |
2304 | flag |= (flags & (F_APCS_FLOAT | F_PIC)); | |
d70910e8 | 2305 | |
252b5132 RH |
2306 | SET_APCS_FLAGS (abfd, flag); |
2307 | ||
2308 | flag = (flags & F_INTERWORK); | |
d70910e8 | 2309 | |
252b5132 RH |
2310 | /* If the BFD has already had its interworking flag set, but it |
2311 | is different from the value that we have been asked to set, | |
2312 | then assume that that merged code will not support interworking | |
2313 | and set the flag accordingly. */ | |
2314 | if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag)) | |
2315 | { | |
2316 | if (flag) | |
2317 | /* xgettext: c-format */ | |
d003868e AM |
2318 | _bfd_error_handler (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"), |
2319 | abfd); | |
252b5132 RH |
2320 | else |
2321 | /* xgettext: c-format */ | |
d003868e AM |
2322 | _bfd_error_handler (_("Warning: Clearing the interworking flag of %B due to outside request"), |
2323 | abfd); | |
252b5132 RH |
2324 | flag = 0; |
2325 | } | |
2326 | ||
2327 | SET_INTERWORK_FLAG (abfd, flag); | |
2328 | ||
b34976b6 | 2329 | return TRUE; |
252b5132 RH |
2330 | } |
2331 | ||
252b5132 RH |
2332 | /* Copy the important parts of the target specific data |
2333 | from one instance of a BFD to another. */ | |
2334 | ||
b34976b6 | 2335 | static bfd_boolean |
c8e7bf0d | 2336 | coff_arm_copy_private_bfd_data (bfd * src, bfd * dest) |
252b5132 RH |
2337 | { |
2338 | BFD_ASSERT (src != NULL && dest != NULL); | |
d70910e8 | 2339 | |
252b5132 | 2340 | if (src == dest) |
b34976b6 | 2341 | return TRUE; |
252b5132 RH |
2342 | |
2343 | /* If the destination is not in the same format as the source, do not do | |
2344 | the copy. */ | |
2345 | if (src->xvec != dest->xvec) | |
b34976b6 | 2346 | return TRUE; |
252b5132 | 2347 | |
c8e7bf0d | 2348 | /* Copy the flags field. */ |
252b5132 RH |
2349 | if (APCS_SET (src)) |
2350 | { | |
2351 | if (APCS_SET (dest)) | |
2352 | { | |
2353 | /* If the src and dest have different APCS flag bits set, fail. */ | |
2354 | if (APCS_26_FLAG (dest) != APCS_26_FLAG (src)) | |
b34976b6 | 2355 | return FALSE; |
d70910e8 | 2356 | |
252b5132 | 2357 | if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src)) |
b34976b6 | 2358 | return FALSE; |
d70910e8 | 2359 | |
252b5132 | 2360 | if (PIC_FLAG (dest) != PIC_FLAG (src)) |
b34976b6 | 2361 | return FALSE; |
252b5132 RH |
2362 | } |
2363 | else | |
2364 | SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src) | |
2365 | | PIC_FLAG (src)); | |
2366 | } | |
2367 | ||
2368 | if (INTERWORK_SET (src)) | |
2369 | { | |
2370 | if (INTERWORK_SET (dest)) | |
2371 | { | |
2372 | /* If the src and dest have different interworking flags then turn | |
2373 | off the interworking bit. */ | |
2374 | if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src)) | |
2375 | { | |
2376 | if (INTERWORK_FLAG (dest)) | |
2377 | { | |
2378 | /* xgettext:c-format */ | |
ae1a89b7 | 2379 | _bfd_error_handler (("\ |
d003868e AM |
2380 | Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"), |
2381 | dest, src); | |
252b5132 | 2382 | } |
d70910e8 | 2383 | |
252b5132 RH |
2384 | SET_INTERWORK_FLAG (dest, 0); |
2385 | } | |
2386 | } | |
2387 | else | |
2388 | { | |
2389 | SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src)); | |
2390 | } | |
2391 | } | |
2392 | ||
b34976b6 | 2393 | return TRUE; |
252b5132 RH |
2394 | } |
2395 | ||
2396 | /* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX | |
c31c1f70 NC |
2397 | *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */ |
2398 | #define LOCAL_LABEL_PREFIX "" | |
252b5132 RH |
2399 | #ifndef USER_LABEL_PREFIX |
2400 | #define USER_LABEL_PREFIX "_" | |
2401 | #endif | |
2402 | ||
f8111282 NC |
2403 | /* Like _bfd_coff_is_local_label_name, but |
2404 | a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be | |
2405 | non-local. | |
2406 | b) Allow other prefixes than ".", e.g. an empty prefix would cause all | |
2407 | labels of the form Lxxx to be stripped. */ | |
c8e7bf0d | 2408 | |
b34976b6 | 2409 | static bfd_boolean |
c8e7bf0d NC |
2410 | coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED, |
2411 | const char * name) | |
252b5132 | 2412 | { |
252b5132 RH |
2413 | #ifdef USER_LABEL_PREFIX |
2414 | if (USER_LABEL_PREFIX[0] != 0) | |
2415 | { | |
5ff625e9 AM |
2416 | size_t len = strlen (USER_LABEL_PREFIX); |
2417 | ||
2418 | if (strncmp (name, USER_LABEL_PREFIX, len) == 0) | |
b34976b6 | 2419 | return FALSE; |
252b5132 RH |
2420 | } |
2421 | #endif | |
f8111282 NC |
2422 | |
2423 | #ifdef LOCAL_LABEL_PREFIX | |
2424 | /* If there is a prefix for local labels then look for this. | |
d70910e8 KH |
2425 | If the prefix exists, but it is empty, then ignore the test. */ |
2426 | ||
f8111282 | 2427 | if (LOCAL_LABEL_PREFIX[0] != 0) |
252b5132 | 2428 | { |
dc810e39 | 2429 | size_t len = strlen (LOCAL_LABEL_PREFIX); |
d70910e8 | 2430 | |
f8111282 | 2431 | if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0) |
b34976b6 | 2432 | return FALSE; |
d70910e8 | 2433 | |
f8111282 NC |
2434 | /* Perform the checks below for the rest of the name. */ |
2435 | name += len; | |
252b5132 | 2436 | } |
f8111282 | 2437 | #endif |
d70910e8 | 2438 | |
f8111282 | 2439 | return name[0] == 'L'; |
252b5132 RH |
2440 | } |
2441 | ||
2442 | /* This piece of machinery exists only to guarantee that the bfd that holds | |
d70910e8 | 2443 | the glue section is written last. |
252b5132 RH |
2444 | |
2445 | This does depend on bfd_make_section attaching a new section to the | |
c8e7bf0d | 2446 | end of the section list for the bfd. */ |
252b5132 | 2447 | |
b34976b6 | 2448 | static bfd_boolean |
c8e7bf0d | 2449 | coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info) |
252b5132 RH |
2450 | { |
2451 | return (sub->output_has_begun | |
2452 | || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner); | |
2453 | } | |
2454 | ||
b34976b6 | 2455 | static bfd_boolean |
c8e7bf0d NC |
2456 | coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED, |
2457 | struct coff_final_link_info * pfinfo) | |
252b5132 RH |
2458 | { |
2459 | struct coff_arm_link_hash_table * globals; | |
2460 | ||
2461 | globals = coff_arm_hash_table (pfinfo->info); | |
d70910e8 | 2462 | |
252b5132 | 2463 | BFD_ASSERT (globals != NULL); |
d70910e8 | 2464 | |
252b5132 RH |
2465 | if (globals->bfd_of_glue_owner != NULL) |
2466 | { | |
2467 | if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner)) | |
b34976b6 | 2468 | return FALSE; |
d70910e8 | 2469 | |
b34976b6 | 2470 | globals->bfd_of_glue_owner->output_has_begun = TRUE; |
252b5132 | 2471 | } |
d70910e8 | 2472 | |
5a6c6817 | 2473 | return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
252b5132 RH |
2474 | } |
2475 | ||
252b5132 RH |
2476 | #include "coffcode.h" |
2477 | ||
c3c89269 NC |
2478 | #ifndef TARGET_LITTLE_SYM |
2479 | #define TARGET_LITTLE_SYM armcoff_little_vec | |
252b5132 | 2480 | #endif |
c3c89269 NC |
2481 | #ifndef TARGET_LITTLE_NAME |
2482 | #define TARGET_LITTLE_NAME "coff-arm-little" | |
252b5132 | 2483 | #endif |
c3c89269 NC |
2484 | #ifndef TARGET_BIG_SYM |
2485 | #define TARGET_BIG_SYM armcoff_big_vec | |
252b5132 | 2486 | #endif |
c3c89269 NC |
2487 | #ifndef TARGET_BIG_NAME |
2488 | #define TARGET_BIG_NAME "coff-arm-big" | |
252b5132 | 2489 | #endif |
252b5132 | 2490 | |
c3c89269 NC |
2491 | #ifndef TARGET_UNDERSCORE |
2492 | #define TARGET_UNDERSCORE 0 | |
252b5132 | 2493 | #endif |
c3c89269 | 2494 | |
f78c5281 | 2495 | #ifndef EXTRA_S_FLAGS |
c3c89269 | 2496 | #ifdef COFF_WITH_PE |
20650579 | 2497 | #define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES) |
252b5132 | 2498 | #else |
20650579 | 2499 | #define EXTRA_S_FLAGS SEC_CODE |
252b5132 | 2500 | #endif |
f78c5281 | 2501 | #endif |
252b5132 | 2502 | |
c3c89269 NC |
2503 | /* Forward declaration for use initialising alternative_target field. */ |
2504 | extern const bfd_target TARGET_BIG_SYM ; | |
252b5132 | 2505 | |
c3c89269 | 2506 | /* Target vectors. */ |
3fa78519 SS |
2507 | CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE) |
2508 | CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE) |