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99c513f6 1/* Renesas RL78 specific support for 32-bit ELF.
4046d87a 2 Copyright (C) 2011-2013 Free Software Foundation, Inc.
99c513f6
DD		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "sysdep.h"
21#include "bfd.h"
22#include "bfd_stdint.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rl78.h"
26#include "libiberty.h"
27
28#define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30#define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
33
34/* Note that the relocations around 0x7f are internal to this file;
35 feel free to move them as needed to avoid conflicts with published
36 relocation numbers. */
37
38static reloc_howto_type rl78_elf_howto_table [] =
39{
40 RL78REL (NONE, 0, 0, 0, dont, FALSE),
41 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
42 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
43 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
44 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
45 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
46 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
47 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
48 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
49 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
50 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
51 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
52 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
53 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
54 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
55 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
56 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
57 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
58 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
59
60 EMPTY_HOWTO (0x13),
61 EMPTY_HOWTO (0x14),
62 EMPTY_HOWTO (0x15),
63 EMPTY_HOWTO (0x16),
64 EMPTY_HOWTO (0x17),
65 EMPTY_HOWTO (0x18),
66 EMPTY_HOWTO (0x19),
67 EMPTY_HOWTO (0x1a),
68 EMPTY_HOWTO (0x1b),
69 EMPTY_HOWTO (0x1c),
70 EMPTY_HOWTO (0x1d),
71 EMPTY_HOWTO (0x1e),
72 EMPTY_HOWTO (0x1f),
73
74 EMPTY_HOWTO (0x20),
75 EMPTY_HOWTO (0x21),
76 EMPTY_HOWTO (0x22),
77 EMPTY_HOWTO (0x23),
78 EMPTY_HOWTO (0x24),
79 EMPTY_HOWTO (0x25),
80 EMPTY_HOWTO (0x26),
81 EMPTY_HOWTO (0x27),
82 EMPTY_HOWTO (0x28),
83 EMPTY_HOWTO (0x29),
84 EMPTY_HOWTO (0x2a),
85 EMPTY_HOWTO (0x2b),
86 EMPTY_HOWTO (0x2c),
9cea966c 87 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
99c513f6
DD		 88
89 EMPTY_HOWTO (0x2e),
90 EMPTY_HOWTO (0x2f),
91 EMPTY_HOWTO (0x30),
92 EMPTY_HOWTO (0x31),
93 EMPTY_HOWTO (0x32),
94 EMPTY_HOWTO (0x33),
95 EMPTY_HOWTO (0x34),
96 EMPTY_HOWTO (0x35),
97 EMPTY_HOWTO (0x36),
98 EMPTY_HOWTO (0x37),
99 EMPTY_HOWTO (0x38),
100 EMPTY_HOWTO (0x39),
101 EMPTY_HOWTO (0x3a),
102 EMPTY_HOWTO (0x3b),
103 EMPTY_HOWTO (0x3c),
104 EMPTY_HOWTO (0x3d),
105 EMPTY_HOWTO (0x3e),
106 EMPTY_HOWTO (0x3f),
107 EMPTY_HOWTO (0x40),
108
109 RL78REL (ABS32, 2, 32, 0, dont, FALSE),
110 RL78REL (ABS24S, 2, 24, 0, signed, FALSE),
111 RL78REL (ABS16, 1, 16, 0, dont, FALSE),
112 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE),
113 RL78REL (ABS16S, 1, 16, 0, signed, FALSE),
114 RL78REL (ABS8, 0, 8, 0, dont, FALSE),
115 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE),
116 RL78REL (ABS8S, 0, 8, 0, signed, FALSE),
117 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
118 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
119 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
120 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
121 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
122 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
123 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
124 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE),
125 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE),
126
127#define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
128
129 EMPTY_HOWTO (0x52),
130 EMPTY_HOWTO (0x53),
131 EMPTY_HOWTO (0x54),
132 EMPTY_HOWTO (0x55),
133 EMPTY_HOWTO (0x56),
134 EMPTY_HOWTO (0x57),
135 EMPTY_HOWTO (0x58),
136 EMPTY_HOWTO (0x59),
137 EMPTY_HOWTO (0x5a),
138 EMPTY_HOWTO (0x5b),
139 EMPTY_HOWTO (0x5c),
140 EMPTY_HOWTO (0x5d),
141 EMPTY_HOWTO (0x5e),
142 EMPTY_HOWTO (0x5f),
143 EMPTY_HOWTO (0x60),
144 EMPTY_HOWTO (0x61),
145 EMPTY_HOWTO (0x62),
146 EMPTY_HOWTO (0x63),
147 EMPTY_HOWTO (0x64),
148 EMPTY_HOWTO (0x65),
149 EMPTY_HOWTO (0x66),
150 EMPTY_HOWTO (0x67),
151 EMPTY_HOWTO (0x68),
152 EMPTY_HOWTO (0x69),
153 EMPTY_HOWTO (0x6a),
154 EMPTY_HOWTO (0x6b),
155 EMPTY_HOWTO (0x6c),
156 EMPTY_HOWTO (0x6d),
157 EMPTY_HOWTO (0x6e),
158 EMPTY_HOWTO (0x6f),
159 EMPTY_HOWTO (0x70),
160 EMPTY_HOWTO (0x71),
161 EMPTY_HOWTO (0x72),
162 EMPTY_HOWTO (0x73),
163 EMPTY_HOWTO (0x74),
164 EMPTY_HOWTO (0x75),
165 EMPTY_HOWTO (0x76),
166 EMPTY_HOWTO (0x77),
167
168 EMPTY_HOWTO (0x78),
169 EMPTY_HOWTO (0x79),
170 EMPTY_HOWTO (0x7a),
171 EMPTY_HOWTO (0x7b),
172 EMPTY_HOWTO (0x7c),
173 EMPTY_HOWTO (0x7d),
174 EMPTY_HOWTO (0x7e),
175 EMPTY_HOWTO (0x7f),
176
177 RL78REL (SYM, 2, 32, 0, dont, FALSE),
178 RL78REL (OPneg, 2, 32, 0, dont, FALSE),
179 RL78REL (OPadd, 2, 32, 0, dont, FALSE),
180 RL78REL (OPsub, 2, 32, 0, dont, FALSE),
181 RL78REL (OPmul, 2, 32, 0, dont, FALSE),
182 RL78REL (OPdiv, 2, 32, 0, dont, FALSE),
183 RL78REL (OPshla, 2, 32, 0, dont, FALSE),
184 RL78REL (OPshra, 2, 32, 0, dont, FALSE),
185 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE),
186 EMPTY_HOWTO (0x89),
187 EMPTY_HOWTO (0x8a),
188 EMPTY_HOWTO (0x8b),
189 EMPTY_HOWTO (0x8c),
190 RL78REL (OPscttop, 2, 32, 0, dont, FALSE),
191 EMPTY_HOWTO (0x8e),
192 EMPTY_HOWTO (0x8f),
193 RL78REL (OPand, 2, 32, 0, dont, FALSE),
194 RL78REL (OPor, 2, 32, 0, dont, FALSE),
195 RL78REL (OPxor, 2, 32, 0, dont, FALSE),
196 RL78REL (OPnot, 2, 32, 0, dont, FALSE),
197 RL78REL (OPmod, 2, 32, 0, dont, FALSE),
198 RL78REL (OPromtop, 2, 32, 0, dont, FALSE),
199 RL78REL (OPramtop, 2, 32, 0, dont, FALSE)
200};
201\f
202/* Map BFD reloc types to RL78 ELF reloc types. */
203
204struct rl78_reloc_map
205{
206 bfd_reloc_code_real_type bfd_reloc_val;
207 unsigned int rl78_reloc_val;
208};
209
210static const struct rl78_reloc_map rl78_reloc_map [] =
211{
212 { BFD_RELOC_NONE, R_RL78_NONE },
213 { BFD_RELOC_8, R_RL78_DIR8S },
214 { BFD_RELOC_16, R_RL78_DIR16S },
215 { BFD_RELOC_24, R_RL78_DIR24S },
216 { BFD_RELOC_32, R_RL78_DIR32 },
217 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
218 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
219 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
220 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
221 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
222 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
223 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
224 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
225 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
226 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
227 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
228 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
229 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
230 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
231 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
232 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
233 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
234 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
235 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
9cea966c
DD		 236 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
237 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
99c513f6
DD		 238};
239
240static reloc_howto_type *
241rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
242 bfd_reloc_code_real_type code)
243{
244 unsigned int i;
245
246 if (code == BFD_RELOC_RL78_32_OP)
247 return rl78_elf_howto_table + R_RL78_DIR32;
248
249 for (i = ARRAY_SIZE (rl78_reloc_map); --i;)
250 if (rl78_reloc_map [i].bfd_reloc_val == code)
251 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
252
253 return NULL;
254}
255
256static reloc_howto_type *
257rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
258{
259 unsigned int i;
260
261 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
262 if (rl78_elf_howto_table[i].name != NULL
263 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
264 return rl78_elf_howto_table + i;
265
266 return NULL;
267}
268
269/* Set the howto pointer for an RL78 ELF reloc. */
270
271static void
272rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
273 arelent * cache_ptr,
274 Elf_Internal_Rela * dst)
275{
276 unsigned int r_type;
277
278 r_type = ELF32_R_TYPE (dst->r_info);
279 BFD_ASSERT (r_type < (unsigned int) R_RL78_max);
280 cache_ptr->howto = rl78_elf_howto_table + r_type;
281}
282\f
283static bfd_vma
284get_symbol_value (const char * name,
285 bfd_reloc_status_type * status,
286 struct bfd_link_info * info,
287 bfd * input_bfd,
288 asection * input_section,
289 int offset)
290{
291 bfd_vma value = 0;
292 struct bfd_link_hash_entry * h;
293
294 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
295
296 if (h == NULL
297 || (h->type != bfd_link_hash_defined
298 && h->type != bfd_link_hash_defweak))
299 * status = info->callbacks->undefined_symbol
300 (info, name, input_bfd, input_section, offset, TRUE);
301 else
302 value = (h->u.def.value
303 + h->u.def.section->output_section->vma
304 + h->u.def.section->output_offset);
305
306 return value;
307}
308
309static bfd_vma
310get_romstart (bfd_reloc_status_type * status,
311 struct bfd_link_info * info,
312 bfd * abfd,
313 asection * sec,
314 int offset)
315{
316 static bfd_boolean cached = FALSE;
317 static bfd_vma cached_value = 0;
318
319 if (!cached)
320 {
321 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
322 cached = TRUE;
323 }
324 return cached_value;
325}
326
327static bfd_vma
328get_ramstart (bfd_reloc_status_type * status,
329 struct bfd_link_info * info,
330 bfd * abfd,
331 asection * sec,
332 int offset)
333{
334 static bfd_boolean cached = FALSE;
335 static bfd_vma cached_value = 0;
336
337 if (!cached)
338 {
339 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
340 cached = TRUE;
341 }
342 return cached_value;
343}
344
345#define NUM_STACK_ENTRIES 16
346static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
347static unsigned int rl78_stack_top;
348
349#define RL78_STACK_PUSH(val) \
350 do \
351 { \
352 if (rl78_stack_top < NUM_STACK_ENTRIES) \
353 rl78_stack [rl78_stack_top ++] = (val); \
354 else \
355 r = bfd_reloc_dangerous; \
356 } \
357 while (0)
358
359#define RL78_STACK_POP(dest) \
360 do \
361 { \
362 if (rl78_stack_top > 0) \
363 (dest) = rl78_stack [-- rl78_stack_top]; \
364 else \
365 (dest) = 0, r = bfd_reloc_dangerous; \
366 } \
367 while (0)
368
369/* Relocate an RL78 ELF section.
370 There is some attempt to make this function usable for many architectures,
371 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
372 if only to serve as a learning tool.
373
374 The RELOCATE_SECTION function is called by the new ELF backend linker
375 to handle the relocations for a section.
376
377 The relocs are always passed as Rela structures; if the section
378 actually uses Rel structures, the r_addend field will always be
379 zero.
380
381 This function is responsible for adjusting the section contents as
382 necessary, and (if using Rela relocs and generating a relocatable
383 output file) adjusting the reloc addend as necessary.
384
385 This function does not have to worry about setting the reloc
386 address or the reloc symbol index.
387
388 LOCAL_SYMS is a pointer to the swapped in local symbols.
389
390 LOCAL_SECTIONS is an array giving the section in the input file
391 corresponding to the st_shndx field of each local symbol.
392
393 The global hash table entry for the global symbols can be found
394 via elf_sym_hashes (input_bfd).
395
396 When generating relocatable output, this function must handle
397 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
398 going to be the section symbol corresponding to the output
399 section, which means that the addend must be adjusted
400 accordingly. */
401
402static bfd_boolean
403rl78_elf_relocate_section
404 (bfd * output_bfd,
405 struct bfd_link_info * info,
406 bfd * input_bfd,
407 asection * input_section,
408 bfd_byte * contents,
409 Elf_Internal_Rela * relocs,
410 Elf_Internal_Sym * local_syms,
411 asection ** local_sections)
412{
413 Elf_Internal_Shdr * symtab_hdr;
414 struct elf_link_hash_entry ** sym_hashes;
415 Elf_Internal_Rela * rel;
416 Elf_Internal_Rela * relend;
417 bfd *dynobj;
418 asection *splt;
419
420 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
421 sym_hashes = elf_sym_hashes (input_bfd);
422 relend = relocs + input_section->reloc_count;
423
424 dynobj = elf_hash_table (info)->dynobj;
425 splt = NULL;
426 if (dynobj != NULL)
3d4d4302 427 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 428
429 for (rel = relocs; rel < relend; rel ++)
430 {
431 reloc_howto_type * howto;
432 unsigned long r_symndx;
433 Elf_Internal_Sym * sym;
434 asection * sec;
435 struct elf_link_hash_entry * h;
436 bfd_vma relocation;
437 bfd_reloc_status_type r;
438 const char * name = NULL;
439 bfd_boolean unresolved_reloc = TRUE;
440 int r_type;
441
442 r_type = ELF32_R_TYPE (rel->r_info);
443 r_symndx = ELF32_R_SYM (rel->r_info);
444
445 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
446 h = NULL;
447 sym = NULL;
448 sec = NULL;
449 relocation = 0;
450
451 if (r_symndx < symtab_hdr->sh_info)
452 {
453 sym = local_syms + r_symndx;
454 sec = local_sections [r_symndx];
455 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
456
457 name = bfd_elf_string_from_elf_section
458 (input_bfd, symtab_hdr->sh_link, sym->st_name);
459 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
460 }
461 else
462 {
62d887d4
L		 463 bfd_boolean warned ATTRIBUTE_UNUSED;
464 bfd_boolean ignored ATTRIBUTE_UNUSED;
99c513f6
DD		 465
466 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
467 r_symndx, symtab_hdr, sym_hashes, h,
468 sec, relocation, unresolved_reloc,
62d887d4 469 warned, ignored);
99c513f6
DD		 470
471 name = h->root.root.string;
472 }
473
dbaa2011 474 if (sec != NULL && discarded_section (sec))
99c513f6 475 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 476 rel, 1, relend, howto, 0, contents);
99c513f6
DD		 477
478 if (info->relocatable)
479 {
480 /* This is a relocatable link. We don't have to change
481 anything, unless the reloc is against a section symbol,
482 in which case we have to adjust according to where the
483 section symbol winds up in the output section. */
484 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
485 rel->r_addend += sec->output_offset;
486 continue;
487 }
488
489 switch (ELF32_R_TYPE (rel->r_info))
490 {
491 case R_RL78_DIR16S:
492 {
493 bfd_vma *plt_offset;
494
495 if (h != NULL)
496 plt_offset = &h->plt.offset;
497 else
498 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
499
9cea966c 500 if (! valid_16bit_address (relocation))
99c513f6 501 {
99c513f6
DD		 502 /* If this is the first time we've processed this symbol,
503 fill in the plt entry with the correct symbol address. */
504 if ((*plt_offset & 1) == 0)
505 {
506 unsigned int x;
507
508 x = 0x000000ec; /* br !!abs24 */
509 x |= (relocation << 8) & 0xffffff00;
510 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
511 *plt_offset |= 1;
512 }
513
514 relocation = (splt->output_section->vma
515 + splt->output_offset
516 + (*plt_offset & -2));
517 if (name)
518 {
519 char *newname = bfd_malloc (strlen(name)+5);
520 strcpy (newname, name);
521 strcat(newname, ".plt");
522 _bfd_generic_link_add_one_symbol (info,
523 input_bfd,
524 newname,
525 BSF_FUNCTION | BSF_WEAK,
526 splt,
527 (*plt_offset & -2),
528 0,
529 1,
530 0,
531 0);
532 }
533 }
534 }
535 break;
536 }
537
538 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
539 /* If the symbol is undefined and weak
540 then the relocation resolves to zero. */
541 relocation = 0;
542 else
543 {
544 if (howto->pc_relative)
545 {
546 relocation -= (input_section->output_section->vma
547 + input_section->output_offset
548 + rel->r_offset);
549 relocation -= bfd_get_reloc_size (howto);
550 }
551
552 relocation += rel->r_addend;
553 }
554
555 r = bfd_reloc_ok;
556
557#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
558#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
559#define OP(i) (contents[rel->r_offset + (i)])
560
561 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
562 switch (r_type)
563 {
564 case R_RL78_NONE:
565 break;
566
9cea966c
DD		 567 case R_RL78_RH_RELAX:
568 break;
569
99c513f6
DD		 570 case R_RL78_DIR8S_PCREL:
571 RANGE (-128, 127);
572 OP (0) = relocation;
573 break;
574
575 case R_RL78_DIR8S:
576 RANGE (-128, 255);
577 OP (0) = relocation;
578 break;
579
580 case R_RL78_DIR8U:
581 RANGE (0, 255);
582 OP (0) = relocation;
583 break;
584
585 case R_RL78_DIR16S_PCREL:
586 RANGE (-32768, 32767);
587 OP (0) = relocation;
588 OP (1) = relocation >> 8;
589 break;
590
591 case R_RL78_DIR16S:
592 if ((relocation & 0xf0000) == 0xf0000)
593 relocation &= 0xffff;
594 RANGE (-32768, 65535);
595 OP (0) = relocation;
596 OP (1) = relocation >> 8;
597 break;
598
599 case R_RL78_DIR16U:
600 RANGE (0, 65536);
601 OP (0) = relocation;
602 OP (1) = relocation >> 8;
603 break;
604
605 case R_RL78_DIR16:
606 RANGE (-32768, 65536);
607 OP (0) = relocation;
608 OP (1) = relocation >> 8;
609 break;
610
611 case R_RL78_DIR16_REV:
612 RANGE (-32768, 65536);
613 OP (1) = relocation;
614 OP (0) = relocation >> 8;
615 break;
616
617 case R_RL78_DIR3U_PCREL:
618 RANGE (3, 10);
619 OP (0) &= 0xf8;
620 OP (0) |= relocation & 0x07;
621 break;
622
623 case R_RL78_DIR24S_PCREL:
624 RANGE (-0x800000, 0x7fffff);
625 OP (0) = relocation;
626 OP (1) = relocation >> 8;
627 OP (2) = relocation >> 16;
628 break;
629
630 case R_RL78_DIR24S:
631 RANGE (-0x800000, 0x7fffff);
632 OP (0) = relocation;
633 OP (1) = relocation >> 8;
634 OP (2) = relocation >> 16;
635 break;
636
637 case R_RL78_DIR32:
638 OP (0) = relocation;
639 OP (1) = relocation >> 8;
640 OP (2) = relocation >> 16;
641 OP (3) = relocation >> 24;
642 break;
643
644 case R_RL78_DIR32_REV:
645 OP (3) = relocation;
646 OP (2) = relocation >> 8;
647 OP (1) = relocation >> 16;
648 OP (0) = relocation >> 24;
649 break;
650
9cea966c 651 case R_RL78_RH_SFR:
9cea966c
DD		 652 RANGE (0xfff00, 0xfffff);
653 OP (0) = relocation & 0xff;
654 break;
655
656 case R_RL78_RH_SADDR:
9cea966c
DD		 657 RANGE (0xffe20, 0xfff1f);
658 OP (0) = relocation & 0xff;
9cea966c
DD		 659 break;
660
99c513f6
DD		 661 /* Complex reloc handling: */
662
663 case R_RL78_ABS32:
664 RL78_STACK_POP (relocation);
665 OP (0) = relocation;
666 OP (1) = relocation >> 8;
667 OP (2) = relocation >> 16;
668 OP (3) = relocation >> 24;
669 break;
670
671 case R_RL78_ABS32_REV:
672 RL78_STACK_POP (relocation);
673 OP (3) = relocation;
674 OP (2) = relocation >> 8;
675 OP (1) = relocation >> 16;
676 OP (0) = relocation >> 24;
677 break;
678
679 case R_RL78_ABS24S_PCREL:
680 case R_RL78_ABS24S:
681 RL78_STACK_POP (relocation);
682 RANGE (-0x800000, 0x7fffff);
683 OP (0) = relocation;
684 OP (1) = relocation >> 8;
685 OP (2) = relocation >> 16;
686 break;
687
688 case R_RL78_ABS16:
689 RL78_STACK_POP (relocation);
690 RANGE (-32768, 65535);
691 OP (0) = relocation;
692 OP (1) = relocation >> 8;
693 break;
694
695 case R_RL78_ABS16_REV:
696 RL78_STACK_POP (relocation);
697 RANGE (-32768, 65535);
698 OP (1) = relocation;
699 OP (0) = relocation >> 8;
700 break;
701
702 case R_RL78_ABS16S_PCREL:
703 case R_RL78_ABS16S:
704 RL78_STACK_POP (relocation);
705 RANGE (-32768, 32767);
706 OP (0) = relocation;
707 OP (1) = relocation >> 8;
708 break;
709
710 case R_RL78_ABS16U:
711 RL78_STACK_POP (relocation);
712 RANGE (0, 65536);
713 OP (0) = relocation;
714 OP (1) = relocation >> 8;
715 break;
716
717 case R_RL78_ABS16UL:
718 RL78_STACK_POP (relocation);
719 relocation >>= 2;
720 RANGE (0, 65536);
721 OP (0) = relocation;
722 OP (1) = relocation >> 8;
723 break;
724
725 case R_RL78_ABS16UW:
726 RL78_STACK_POP (relocation);
727 relocation >>= 1;
728 RANGE (0, 65536);
729 OP (0) = relocation;
730 OP (1) = relocation >> 8;
731 break;
732
733 case R_RL78_ABS8:
734 RL78_STACK_POP (relocation);
735 RANGE (-128, 255);
736 OP (0) = relocation;
737 break;
738
739 case R_RL78_ABS8U:
740 RL78_STACK_POP (relocation);
741 RANGE (0, 255);
742 OP (0) = relocation;
743 break;
744
745 case R_RL78_ABS8UL:
746 RL78_STACK_POP (relocation);
747 relocation >>= 2;
748 RANGE (0, 255);
749 OP (0) = relocation;
750 break;
751
752 case R_RL78_ABS8UW:
753 RL78_STACK_POP (relocation);
754 relocation >>= 1;
755 RANGE (0, 255);
756 OP (0) = relocation;
757 break;
758
759 case R_RL78_ABS8S_PCREL:
760 case R_RL78_ABS8S:
761 RL78_STACK_POP (relocation);
762 RANGE (-128, 127);
763 OP (0) = relocation;
764 break;
765
766 case R_RL78_SYM:
767 if (r_symndx < symtab_hdr->sh_info)
768 RL78_STACK_PUSH (sec->output_section->vma
769 + sec->output_offset
770 + sym->st_value
771 + rel->r_addend);
772 else
773 {
774 if (h != NULL
775 && (h->root.type == bfd_link_hash_defined
776 || h->root.type == bfd_link_hash_defweak))
777 RL78_STACK_PUSH (h->root.u.def.value
778 + sec->output_section->vma
779 + sec->output_offset
780 + rel->r_addend);
4107ae22
DD		 781 else if (h->root.type == bfd_link_hash_undefweak)
782 RL78_STACK_PUSH (0);
99c513f6
DD		 783 else
784 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
785 }
786 break;
787
788 case R_RL78_OPneg:
789 {
790 int32_t tmp;
791
792 RL78_STACK_POP (tmp);
793 tmp = - tmp;
794 RL78_STACK_PUSH (tmp);
795 }
796 break;
797
798 case R_RL78_OPadd:
799 {
800 int32_t tmp1, tmp2;
801
802 RL78_STACK_POP (tmp2);
803 RL78_STACK_POP (tmp1);
804 tmp1 += tmp2;
805 RL78_STACK_PUSH (tmp1);
806 }
807 break;
808
809 case R_RL78_OPsub:
810 {
811 int32_t tmp1, tmp2;
812
34064ff3
DD		 813 /* For the expression "A - B", the assembler pushes A,
814 then B, then OPSUB. So the first op we pop is B, not
815 A. */
816 RL78_STACK_POP (tmp2); /* B */
817 RL78_STACK_POP (tmp1); /* A */
818 tmp1 -= tmp2; /* A - B */
819 RL78_STACK_PUSH (tmp1);
99c513f6
DD		 820 }
821 break;
822
823 case R_RL78_OPmul:
824 {
825 int32_t tmp1, tmp2;
826
827 RL78_STACK_POP (tmp2);
828 RL78_STACK_POP (tmp1);
829 tmp1 *= tmp2;
830 RL78_STACK_PUSH (tmp1);
831 }
832 break;
833
834 case R_RL78_OPdiv:
835 {
836 int32_t tmp1, tmp2;
837
838 RL78_STACK_POP (tmp2);
839 RL78_STACK_POP (tmp1);
840 tmp1 /= tmp2;
841 RL78_STACK_PUSH (tmp1);
842 }
843 break;
844
845 case R_RL78_OPshla:
846 {
847 int32_t tmp1, tmp2;
848
849 RL78_STACK_POP (tmp2);
850 RL78_STACK_POP (tmp1);
851 tmp1 <<= tmp2;
852 RL78_STACK_PUSH (tmp1);
853 }
854 break;
855
856 case R_RL78_OPshra:
857 {
858 int32_t tmp1, tmp2;
859
860 RL78_STACK_POP (tmp2);
861 RL78_STACK_POP (tmp1);
862 tmp1 >>= tmp2;
863 RL78_STACK_PUSH (tmp1);
864 }
865 break;
866
867 case R_RL78_OPsctsize:
868 RL78_STACK_PUSH (input_section->size);
869 break;
870
871 case R_RL78_OPscttop:
872 RL78_STACK_PUSH (input_section->output_section->vma);
873 break;
874
875 case R_RL78_OPand:
876 {
877 int32_t tmp1, tmp2;
878
879 RL78_STACK_POP (tmp2);
880 RL78_STACK_POP (tmp1);
881 tmp1 &= tmp2;
882 RL78_STACK_PUSH (tmp1);
883 }
884 break;
885
886 case R_RL78_OPor:
887 {
888 int32_t tmp1, tmp2;
889
890 RL78_STACK_POP (tmp2);
891 RL78_STACK_POP (tmp1);
892 tmp1 |= tmp2;
893 RL78_STACK_PUSH (tmp1);
894 }
895 break;
896
897 case R_RL78_OPxor:
898 {
899 int32_t tmp1, tmp2;
900
901 RL78_STACK_POP (tmp2);
902 RL78_STACK_POP (tmp1);
903 tmp1 ^= tmp2;
904 RL78_STACK_PUSH (tmp1);
905 }
906 break;
907
908 case R_RL78_OPnot:
909 {
910 int32_t tmp;
911
912 RL78_STACK_POP (tmp);
913 tmp = ~ tmp;
914 RL78_STACK_PUSH (tmp);
915 }
916 break;
917
918 case R_RL78_OPmod:
919 {
920 int32_t tmp1, tmp2;
921
922 RL78_STACK_POP (tmp2);
923 RL78_STACK_POP (tmp1);
924 tmp1 %= tmp2;
925 RL78_STACK_PUSH (tmp1);
926 }
927 break;
928
929 case R_RL78_OPromtop:
930 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
931 break;
932
933 case R_RL78_OPramtop:
934 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
935 break;
936
937 default:
938 r = bfd_reloc_notsupported;
939 break;
940 }
941
942 if (r != bfd_reloc_ok)
943 {
944 const char * msg = NULL;
945
946 switch (r)
947 {
948 case bfd_reloc_overflow:
949 /* Catch the case of a missing function declaration
950 and emit a more helpful error message. */
951 if (r_type == R_RL78_DIR24S_PCREL)
952 msg = _("%B(%A): error: call to undefined function '%s'");
953 else
954 r = info->callbacks->reloc_overflow
955 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
956 input_bfd, input_section, rel->r_offset);
957 break;
958
959 case bfd_reloc_undefined:
960 r = info->callbacks->undefined_symbol
961 (info, name, input_bfd, input_section, rel->r_offset,
962 TRUE);
963 break;
964
965 case bfd_reloc_other:
966 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
967 break;
968
969 case bfd_reloc_outofrange:
970 msg = _("%B(%A): internal error: out of range error");
971 break;
972
973 case bfd_reloc_notsupported:
974 msg = _("%B(%A): internal error: unsupported relocation error");
975 break;
976
977 case bfd_reloc_dangerous:
978 msg = _("%B(%A): internal error: dangerous relocation");
979 break;
980
981 default:
982 msg = _("%B(%A): internal error: unknown error");
983 break;
984 }
985
986 if (msg)
987 _bfd_error_handler (msg, input_bfd, input_section, name);
988
989 if (! r)
990 return FALSE;
991 }
992 }
993
994 return TRUE;
995}
996\f
997/* Function to set the ELF flag bits. */
998
999static bfd_boolean
1000rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1001{
1002 elf_elfheader (abfd)->e_flags = flags;
1003 elf_flags_init (abfd) = TRUE;
1004 return TRUE;
1005}
1006
1007static bfd_boolean no_warn_mismatch = FALSE;
1008
1009void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1010
1011void
1012bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1013{
1014 no_warn_mismatch = user_no_warn_mismatch;
1015}
1016
1017/* Merge backend specific data from an object file to the output
1018 object file when linking. */
1019
1020static bfd_boolean
1021rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1022{
99c513f6 1023 flagword new_flags;
4046d87a 1024 flagword old_flags;
99c513f6
DD		 1025 bfd_boolean error = FALSE;
1026
1027 new_flags = elf_elfheader (ibfd)->e_flags;
4046d87a 1028 old_flags = elf_elfheader (obfd)->e_flags;
99c513f6
DD		 1029
1030 if (!elf_flags_init (obfd))
1031 {
1032 /* First call, no flags set. */
1033 elf_flags_init (obfd) = TRUE;
1034 elf_elfheader (obfd)->e_flags = new_flags;
1035 }
4046d87a
NC		 1036 else if (old_flags != new_flags)
1037 {
1038 flagword changed_flags = old_flags ^ new_flags;
1039
1040 if (changed_flags & E_FLAG_RL78_G10)
1041 {
1042 (*_bfd_error_handler)
1043 (_("RL78/G10 ABI conflict: cannot link G10 and non-G10 objects together"));
1044
1045 if (old_flags & E_FLAG_RL78_G10)
1046 (*_bfd_error_handler) (_("- %s is G10, %s is not"),
1047 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1048 else
1049 (*_bfd_error_handler) (_("- %s is G10, %s is not"),
1050 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1051 }
1052 }
99c513f6
DD		 1053
1054 return !error;
1055}
1056\f
1057static bfd_boolean
1058rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1059{
1060 FILE * file = (FILE *) ptr;
1061 flagword flags;
1062
1063 BFD_ASSERT (abfd != NULL && ptr != NULL);
1064
1065 /* Print normal ELF private data. */
1066 _bfd_elf_print_private_bfd_data (abfd, ptr);
1067
1068 flags = elf_elfheader (abfd)->e_flags;
1069 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1070
4046d87a
NC		 1071 if (flags & E_FLAG_RL78_G10)
1072 fprintf (file, _(" [G10]"));
1073
99c513f6
DD		 1074 fputc ('\n', file);
1075 return TRUE;
1076}
1077
1078/* Return the MACH for an e_flags value. */
1079
1080static int
1081elf32_rl78_machine (bfd * abfd)
1082{
1083 if ((elf_elfheader (abfd)->e_flags & EF_RL78_CPU_MASK) == EF_RL78_CPU_RL78)
1084 return bfd_mach_rl78;
1085
1086 return 0;
1087}
1088
1089static bfd_boolean
1090rl78_elf_object_p (bfd * abfd)
1091{
1092 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1093 elf32_rl78_machine (abfd));
1094 return TRUE;
1095}
99c513f6
DD		 1096\f
1097/* support PLT for 16-bit references to 24-bit functions. */
1098
1099/* We support 16-bit pointers to code above 64k by generating a thunk
1100 below 64k containing a JMP instruction to the final address. */
68ffbac6 1101
99c513f6
DD		 1102static bfd_boolean
1103rl78_elf_check_relocs
1104 (bfd * abfd,
1105 struct bfd_link_info * info,
1106 asection * sec,
1107 const Elf_Internal_Rela * relocs)
1108{
1109 Elf_Internal_Shdr * symtab_hdr;
1110 struct elf_link_hash_entry ** sym_hashes;
1111 const Elf_Internal_Rela * rel;
1112 const Elf_Internal_Rela * rel_end;
1113 bfd_vma *local_plt_offsets;
1114 asection *splt;
1115 bfd *dynobj;
1116
1117 if (info->relocatable)
1118 return TRUE;
68ffbac6 1119
99c513f6
DD		 1120 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1121 sym_hashes = elf_sym_hashes (abfd);
1122 local_plt_offsets = elf_local_got_offsets (abfd);
1123 splt = NULL;
1124 dynobj = elf_hash_table(info)->dynobj;
1125
1126 rel_end = relocs + sec->reloc_count;
1127 for (rel = relocs; rel < rel_end; rel++)
1128 {
1129 struct elf_link_hash_entry *h;
1130 unsigned long r_symndx;
1131 bfd_vma *offset;
68ffbac6 1132
99c513f6
DD		 1133 r_symndx = ELF32_R_SYM (rel->r_info);
1134 if (r_symndx < symtab_hdr->sh_info)
1135 h = NULL;
1136 else
1137 {
1138 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1139 while (h->root.type == bfd_link_hash_indirect
1140 || h->root.type == bfd_link_hash_warning)
1141 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 1142
1143 /* PR15323, ref flags aren't set for references in the same
1144 object. */
1145 h->root.non_ir_ref = 1;
99c513f6 1146 }
68ffbac6 1147
99c513f6
DD		 1148 switch (ELF32_R_TYPE (rel->r_info))
1149 {
1150 /* This relocation describes a 16-bit pointer to a function.
1151 We may need to allocate a thunk in low memory; reserve memory
1152 for it now. */
1153 case R_RL78_DIR16S:
1154 if (dynobj == NULL)
1155 elf_hash_table (info)->dynobj = dynobj = abfd;
1156 if (splt == NULL)
1157 {
3d4d4302 1158 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1159 if (splt == NULL)
1160 {
1161 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1162 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1163 | SEC_READONLY | SEC_CODE);
3d4d4302
AM		 1164 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1165 flags);
99c513f6
DD		 1166 if (splt == NULL
1167 || ! bfd_set_section_alignment (dynobj, splt, 1))
1168 return FALSE;
1169 }
1170 }
1171
1172 if (h != NULL)
1173 offset = &h->plt.offset;
1174 else
1175 {
1176 if (local_plt_offsets == NULL)
1177 {
1178 size_t size;
1179 unsigned int i;
1180
1181 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1182 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1183 if (local_plt_offsets == NULL)
1184 return FALSE;
1185 elf_local_got_offsets (abfd) = local_plt_offsets;
1186
1187 for (i = 0; i < symtab_hdr->sh_info; i++)
1188 local_plt_offsets[i] = (bfd_vma) -1;
1189 }
1190 offset = &local_plt_offsets[r_symndx];
1191 }
1192
1193 if (*offset == (bfd_vma) -1)
1194 {
1195 *offset = splt->size;
1196 splt->size += 4;
1197 }
1198 break;
1199 }
1200 }
68ffbac6 1201
99c513f6
DD		 1202 return TRUE;
1203}
1204
1205/* This must exist if dynobj is ever set. */
1206
1207static bfd_boolean
1208rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1209 struct bfd_link_info *info)
1210{
1211 bfd *dynobj;
1212 asection *splt;
1213
47fc0f1f
NC		 1214 if (!elf_hash_table (info)->dynamic_sections_created)
1215 return TRUE;
1216
9cea966c
DD		 1217 /* As an extra sanity check, verify that all plt entries have been
1218 filled in. However, relaxing might have changed the relocs so
1219 that some plt entries don't get filled in, so we have to skip
1220 this check if we're relaxing. Unfortunately, check_relocs is
1221 called before relaxation. */
99c513f6 1222
47fc0f1f
NC		 1223 if (info->relax_trip > 0)
1224 return TRUE;
1225
1226 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1227 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
99c513f6 1228 {
47fc0f1f
NC		 1229 bfd_byte *contents = splt->contents;
1230 unsigned int i, size = splt->size;
1231
1232 for (i = 0; i < size; i += 4)
99c513f6 1233 {
47fc0f1f
NC		 1234 unsigned int x = bfd_get_32 (dynobj, contents + i);
1235 BFD_ASSERT (x != 0);
99c513f6
DD		 1236 }
1237 }
1238
1239 return TRUE;
1240}
1241
1242static bfd_boolean
1243rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1244 struct bfd_link_info *info)
1245{
1246 bfd *dynobj;
1247 asection *splt;
1248
1249 if (info->relocatable)
1250 return TRUE;
1251
1252 dynobj = elf_hash_table (info)->dynobj;
1253 if (dynobj == NULL)
1254 return TRUE;
1255
3d4d4302 1256 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1257 BFD_ASSERT (splt != NULL);
1258
1259 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1260 if (splt->contents == NULL)
1261 return FALSE;
1262
1263 return TRUE;
1264}
1265
1266\f
1267
1268/* Handle relaxing. */
1269
1270/* A subroutine of rl78_elf_relax_section. If the global symbol H
1271 is within the low 64k, remove any entry for it in the plt. */
1272
1273struct relax_plt_data
1274{
1275 asection *splt;
1276 bfd_boolean *again;
1277};
1278
1279static bfd_boolean
2c3fc389 1280rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1281{
1282 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1283
1284 if (h->plt.offset != (bfd_vma) -1)
1285 {
1286 bfd_vma address;
1287
1288 if (h->root.type == bfd_link_hash_undefined
1289 || h->root.type == bfd_link_hash_undefweak)
1290 address = 0;
1291 else
1292 address = (h->root.u.def.section->output_section->vma
1293 + h->root.u.def.section->output_offset
1294 + h->root.u.def.value);
1295
1296 if (valid_16bit_address (address))
1297 {
1298 h->plt.offset = -1;
1299 data->splt->size -= 4;
1300 *data->again = TRUE;
1301 }
1302 }
1303
1304 return TRUE;
1305}
1306
1307/* A subroutine of rl78_elf_relax_section. If the global symbol H
1308 previously had a plt entry, give it a new entry offset. */
1309
1310static bfd_boolean
2c3fc389 1311rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1312{
1313 bfd_vma *entry = (bfd_vma *) xdata;
1314
1315 if (h->plt.offset != (bfd_vma) -1)
1316 {
1317 h->plt.offset = *entry;
1318 *entry += 4;
1319 }
1320
1321 return TRUE;
1322}
1323
1324static bfd_boolean
1325rl78_elf_relax_plt_section (bfd *dynobj,
1326 asection *splt,
1327 struct bfd_link_info *info,
1328 bfd_boolean *again)
1329{
1330 struct relax_plt_data relax_plt_data;
1331 bfd *ibfd;
1332
1333 /* Assume nothing changes. */
1334 *again = FALSE;
1335
1336 if (info->relocatable)
1337 return TRUE;
1338
1339 /* We only relax the .plt section at the moment. */
1340 if (dynobj != elf_hash_table (info)->dynobj
1341 || strcmp (splt->name, ".plt") != 0)
1342 return TRUE;
1343
1344 /* Quick check for an empty plt. */
1345 if (splt->size == 0)
1346 return TRUE;
1347
1348 /* Map across all global symbols; see which ones happen to
1349 fall in the low 64k. */
1350 relax_plt_data.splt = splt;
1351 relax_plt_data.again = again;
1352 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1353 &relax_plt_data);
1354
1355 /* Likewise for local symbols, though that's somewhat less convenient
1356 as we have to walk the list of input bfds and swap in symbol data. */
1357 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1358 {
1359 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1360 Elf_Internal_Shdr *symtab_hdr;
1361 Elf_Internal_Sym *isymbuf = NULL;
1362 unsigned int idx;
1363
1364 if (! local_plt_offsets)
1365 continue;
1366
1367 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1368 if (symtab_hdr->sh_info != 0)
1369 {
1370 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1371 if (isymbuf == NULL)
1372 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1373 symtab_hdr->sh_info, 0,
1374 NULL, NULL, NULL);
1375 if (isymbuf == NULL)
1376 return FALSE;
1377 }
1378
1379 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1380 {
1381 Elf_Internal_Sym *isym;
1382 asection *tsec;
1383 bfd_vma address;
1384
1385 if (local_plt_offsets[idx] == (bfd_vma) -1)
1386 continue;
1387
1388 isym = &isymbuf[idx];
1389 if (isym->st_shndx == SHN_UNDEF)
1390 continue;
1391 else if (isym->st_shndx == SHN_ABS)
1392 tsec = bfd_abs_section_ptr;
1393 else if (isym->st_shndx == SHN_COMMON)
1394 tsec = bfd_com_section_ptr;
1395 else
1396 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1397
1398 address = (tsec->output_section->vma
1399 + tsec->output_offset
1400 + isym->st_value);
1401 if (valid_16bit_address (address))
1402 {
1403 local_plt_offsets[idx] = -1;
1404 splt->size -= 4;
1405 *again = TRUE;
1406 }
1407 }
1408
1409 if (isymbuf != NULL
1410 && symtab_hdr->contents != (unsigned char *) isymbuf)
1411 {
1412 if (! info->keep_memory)
1413 free (isymbuf);
1414 else
1415 {
1416 /* Cache the symbols for elf_link_input_bfd. */
1417 symtab_hdr->contents = (unsigned char *) isymbuf;
1418 }
1419 }
1420 }
1421
1422 /* If we changed anything, walk the symbols again to reallocate
1423 .plt entry addresses. */
1424 if (*again && splt->size > 0)
1425 {
1426 bfd_vma entry = 0;
1427
1428 elf_link_hash_traverse (elf_hash_table (info),
1429 rl78_relax_plt_realloc, &entry);
1430
1431 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1432 {
1433 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1434 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1435 unsigned int idx;
1436
1437 if (! local_plt_offsets)
1438 continue;
1439
1440 for (idx = 0; idx < nlocals; ++idx)
1441 if (local_plt_offsets[idx] != (bfd_vma) -1)
1442 {
1443 local_plt_offsets[idx] = entry;
1444 entry += 4;
1445 }
1446 }
1447 }
1448
1449 return TRUE;
1450}
1451
9cea966c
DD		 1452/* Delete some bytes from a section while relaxing. */
1453
1454static bfd_boolean
1455elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1456 Elf_Internal_Rela *alignment_rel, int force_snip)
1457{
1458 Elf_Internal_Shdr * symtab_hdr;
1459 unsigned int sec_shndx;
1460 bfd_byte * contents;
1461 Elf_Internal_Rela * irel;
1462 Elf_Internal_Rela * irelend;
1463 Elf_Internal_Sym * isym;
1464 Elf_Internal_Sym * isymend;
1465 bfd_vma toaddr;
1466 unsigned int symcount;
1467 struct elf_link_hash_entry ** sym_hashes;
1468 struct elf_link_hash_entry ** end_hashes;
1469
1470 if (!alignment_rel)
1471 force_snip = 1;
1472
1473 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1474
1475 contents = elf_section_data (sec)->this_hdr.contents;
1476
1477 /* The deletion must stop at the next alignment boundary, if
1478 ALIGNMENT_REL is non-NULL. */
1479 toaddr = sec->size;
1480 if (alignment_rel)
1481 toaddr = alignment_rel->r_offset;
1482
1483 irel = elf_section_data (sec)->relocs;
2bc56d66
DD		 1484 if (irel == NULL)
1485 {
1486 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
1487 irel = elf_section_data (sec)->relocs;
1488 }
1489
9cea966c
DD		 1490 irelend = irel + sec->reloc_count;
1491
1492 /* Actually delete the bytes. */
1493 memmove (contents + addr, contents + addr + count,
1494 (size_t) (toaddr - addr - count));
1495
1496 /* If we don't have an alignment marker to worry about, we can just
1497 shrink the section. Otherwise, we have to fill in the newly
1498 created gap with NOP insns (0x03). */
1499 if (force_snip)
1500 sec->size -= count;
1501 else
1502 memset (contents + toaddr - count, 0x03, count);
1503
1504 /* Adjust all the relocs. */
2bc56d66 1505 for (; irel && irel < irelend; irel++)
9cea966c
DD		 1506 {
1507 /* Get the new reloc address. */
1508 if (irel->r_offset > addr
1509 && (irel->r_offset < toaddr
1510 || (force_snip && irel->r_offset == toaddr)))
1511 irel->r_offset -= count;
1512
1513 /* If we see an ALIGN marker at the end of the gap, we move it
1514 to the beginning of the gap, since marking these gaps is what
1515 they're for. */
1516 if (irel->r_offset == toaddr
1517 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1518 && irel->r_addend & RL78_RELAXA_ALIGN)
1519 irel->r_offset -= count;
1520 }
1521
1522 /* Adjust the local symbols defined in this section. */
1523 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1524 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1525 isymend = isym + symtab_hdr->sh_info;
1526
1527 for (; isym < isymend; isym++)
1528 {
1529 /* If the symbol is in the range of memory we just moved, we
1530 have to adjust its value. */
1531 if (isym->st_shndx == sec_shndx
1532 && isym->st_value > addr
1533 && isym->st_value < toaddr)
1534 isym->st_value -= count;
1535
1536 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1537 *end* is in the moved bytes but it's *start* isn't), then we
1538 must adjust its size. */
1539 if (isym->st_shndx == sec_shndx
1540 && isym->st_value < addr
1541 && isym->st_value + isym->st_size > addr
1542 && isym->st_value + isym->st_size < toaddr)
1543 isym->st_size -= count;
1544 }
1545
1546 /* Now adjust the global symbols defined in this section. */
1547 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1548 - symtab_hdr->sh_info);
1549 sym_hashes = elf_sym_hashes (abfd);
1550 end_hashes = sym_hashes + symcount;
1551
1552 for (; sym_hashes < end_hashes; sym_hashes++)
1553 {
1554 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1555
1556 if ((sym_hash->root.type == bfd_link_hash_defined
1557 || sym_hash->root.type == bfd_link_hash_defweak)
1558 && sym_hash->root.u.def.section == sec)
1559 {
1560 /* As above, adjust the value if needed. */
1561 if (sym_hash->root.u.def.value > addr
1562 && sym_hash->root.u.def.value < toaddr)
1563 sym_hash->root.u.def.value -= count;
1564
1565 /* As above, adjust the size if needed. */
1566 if (sym_hash->root.u.def.value < addr
1567 && sym_hash->root.u.def.value + sym_hash->size > addr
1568 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1569 sym_hash->size -= count;
1570 }
1571 }
1572
1573 return TRUE;
1574}
1575
1576/* Used to sort relocs by address. If relocs have the same address,
1577 we maintain their relative order, except that R_RL78_RH_RELAX
1578 alignment relocs must be the first reloc for any given address. */
1579
1580static void
1581reloc_bubblesort (Elf_Internal_Rela * r, int count)
1582{
1583 int i;
1584 bfd_boolean again;
1585 bfd_boolean swappit;
1586
1587 /* This is almost a classic bubblesort. It's the slowest sort, but
1588 we're taking advantage of the fact that the relocations are
1589 mostly in order already (the assembler emits them that way) and
1590 we need relocs with the same address to remain in the same
1591 relative order. */
1592 again = TRUE;
1593 while (again)
1594 {
1595 again = FALSE;
1596 for (i = 0; i < count - 1; i ++)
1597 {
1598 if (r[i].r_offset > r[i + 1].r_offset)
1599 swappit = TRUE;
1600 else if (r[i].r_offset < r[i + 1].r_offset)
1601 swappit = FALSE;
1602 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1603 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1604 swappit = TRUE;
1605 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1606 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1607 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1608 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1609 swappit = TRUE;
1610 else
1611 swappit = FALSE;
1612
1613 if (swappit)
1614 {
1615 Elf_Internal_Rela tmp;
1616
1617 tmp = r[i];
1618 r[i] = r[i + 1];
1619 r[i + 1] = tmp;
1620 /* If we do move a reloc back, re-scan to see if it
1621 needs to be moved even further back. This avoids
1622 most of the O(n^2) behavior for our cases. */
1623 if (i > 0)
1624 i -= 2;
1625 again = TRUE;
1626 }
1627 }
1628 }
1629}
1630
1631
1632#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1633 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1634 lrel, abfd, sec, link_info, scale)
1635
1636static bfd_vma
1637rl78_offset_for_reloc (bfd * abfd,
1638 Elf_Internal_Rela * rel,
1639 Elf_Internal_Shdr * symtab_hdr,
1640 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1641 Elf_Internal_Sym * intsyms,
1642 Elf_Internal_Rela ** lrel,
1643 bfd * input_bfd,
1644 asection * input_section,
1645 struct bfd_link_info * info,
1646 int * scale)
1647{
1648 bfd_vma symval;
1649 bfd_reloc_status_type r;
1650
1651 *scale = 1;
1652
1653 /* REL is the first of 1..N relocations. We compute the symbol
1654 value for each relocation, then combine them if needed. LREL
1655 gets a pointer to the last relocation used. */
1656 while (1)
1657 {
1658 int32_t tmp1, tmp2;
1659
1660 /* Get the value of the symbol referred to by the reloc. */
1661 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1662 {
1663 /* A local symbol. */
1664 Elf_Internal_Sym *isym;
1665 asection *ssec;
1666
1667 isym = intsyms + ELF32_R_SYM (rel->r_info);
1668
1669 if (isym->st_shndx == SHN_UNDEF)
1670 ssec = bfd_und_section_ptr;
1671 else if (isym->st_shndx == SHN_ABS)
1672 ssec = bfd_abs_section_ptr;
1673 else if (isym->st_shndx == SHN_COMMON)
1674 ssec = bfd_com_section_ptr;
1675 else
1676 ssec = bfd_section_from_elf_index (abfd,
1677 isym->st_shndx);
1678
1679 /* Initial symbol value. */
1680 symval = isym->st_value;
1681
1682 /* GAS may have made this symbol relative to a section, in
1683 which case, we have to add the addend to find the
1684 symbol. */
1685 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1686 symval += rel->r_addend;
1687
1688 if (ssec)
1689 {
1690 if ((ssec->flags & SEC_MERGE)
dbaa2011 1691 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
9cea966c
DD		 1692 symval = _bfd_merged_section_offset (abfd, & ssec,
1693 elf_section_data (ssec)->sec_info,
1694 symval);
1695 }
1696
1697 /* Now make the offset relative to where the linker is putting it. */
1698 if (ssec)
1699 symval +=
1700 ssec->output_section->vma + ssec->output_offset;
1701
1702 symval += rel->r_addend;
1703 }
1704 else
1705 {
1706 unsigned long indx;
1707 struct elf_link_hash_entry * h;
1708
1709 /* An external symbol. */
1710 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1711 h = elf_sym_hashes (abfd)[indx];
1712 BFD_ASSERT (h != NULL);
1713
1714 if (h->root.type != bfd_link_hash_defined
1715 && h->root.type != bfd_link_hash_defweak)
1716 {
1717 /* This appears to be a reference to an undefined
1718 symbol. Just ignore it--it will be caught by the
1719 regular reloc processing. */
1720 if (lrel)
1721 *lrel = rel;
1722 return 0;
1723 }
1724
1725 symval = (h->root.u.def.value
1726 + h->root.u.def.section->output_section->vma
1727 + h->root.u.def.section->output_offset);
1728
1729 symval += rel->r_addend;
1730 }
1731
1732 switch (ELF32_R_TYPE (rel->r_info))
1733 {
1734 case R_RL78_SYM:
1735 RL78_STACK_PUSH (symval);
1736 break;
1737
1738 case R_RL78_OPneg:
1739 RL78_STACK_POP (tmp1);
1740 tmp1 = - tmp1;
1741 RL78_STACK_PUSH (tmp1);
1742 break;
1743
1744 case R_RL78_OPadd:
1745 RL78_STACK_POP (tmp1);
1746 RL78_STACK_POP (tmp2);
1747 tmp1 += tmp2;
1748 RL78_STACK_PUSH (tmp1);
1749 break;
1750
1751 case R_RL78_OPsub:
1752 RL78_STACK_POP (tmp1);
1753 RL78_STACK_POP (tmp2);
1754 tmp2 -= tmp1;
1755 RL78_STACK_PUSH (tmp2);
1756 break;
1757
1758 case R_RL78_OPmul:
1759 RL78_STACK_POP (tmp1);
1760 RL78_STACK_POP (tmp2);
1761 tmp1 *= tmp2;
1762 RL78_STACK_PUSH (tmp1);
1763 break;
1764
1765 case R_RL78_OPdiv:
1766 RL78_STACK_POP (tmp1);
1767 RL78_STACK_POP (tmp2);
1768 tmp1 /= tmp2;
1769 RL78_STACK_PUSH (tmp1);
1770 break;
1771
1772 case R_RL78_OPshla:
1773 RL78_STACK_POP (tmp1);
1774 RL78_STACK_POP (tmp2);
1775 tmp1 <<= tmp2;
1776 RL78_STACK_PUSH (tmp1);
1777 break;
1778
1779 case R_RL78_OPshra:
1780 RL78_STACK_POP (tmp1);
1781 RL78_STACK_POP (tmp2);
1782 tmp1 >>= tmp2;
1783 RL78_STACK_PUSH (tmp1);
1784 break;
1785
1786 case R_RL78_OPsctsize:
1787 RL78_STACK_PUSH (input_section->size);
1788 break;
1789
1790 case R_RL78_OPscttop:
1791 RL78_STACK_PUSH (input_section->output_section->vma);
1792 break;
1793
1794 case R_RL78_OPand:
1795 RL78_STACK_POP (tmp1);
1796 RL78_STACK_POP (tmp2);
1797 tmp1 &= tmp2;
1798 RL78_STACK_PUSH (tmp1);
1799 break;
1800
1801 case R_RL78_OPor:
1802 RL78_STACK_POP (tmp1);
1803 RL78_STACK_POP (tmp2);
1804 tmp1 |= tmp2;
1805 RL78_STACK_PUSH (tmp1);
1806 break;
1807
1808 case R_RL78_OPxor:
1809 RL78_STACK_POP (tmp1);
1810 RL78_STACK_POP (tmp2);
1811 tmp1 ^= tmp2;
1812 RL78_STACK_PUSH (tmp1);
1813 break;
1814
1815 case R_RL78_OPnot:
1816 RL78_STACK_POP (tmp1);
1817 tmp1 = ~ tmp1;
1818 RL78_STACK_PUSH (tmp1);
1819 break;
1820
1821 case R_RL78_OPmod:
1822 RL78_STACK_POP (tmp1);
1823 RL78_STACK_POP (tmp2);
1824 tmp1 %= tmp2;
1825 RL78_STACK_PUSH (tmp1);
1826 break;
1827
1828 case R_RL78_OPromtop:
1829 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1830 break;
1831
1832 case R_RL78_OPramtop:
1833 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1834 break;
1835
1836 case R_RL78_DIR16UL:
1837 case R_RL78_DIR8UL:
1838 case R_RL78_ABS16UL:
1839 case R_RL78_ABS8UL:
1840 if (rl78_stack_top)
1841 RL78_STACK_POP (symval);
1842 if (lrel)
1843 *lrel = rel;
1844 *scale = 4;
1845 return symval;
1846
1847 case R_RL78_DIR16UW:
1848 case R_RL78_DIR8UW:
1849 case R_RL78_ABS16UW:
1850 case R_RL78_ABS8UW:
1851 if (rl78_stack_top)
1852 RL78_STACK_POP (symval);
1853 if (lrel)
1854 *lrel = rel;
1855 *scale = 2;
1856 return symval;
1857
1858 default:
1859 if (rl78_stack_top)
1860 RL78_STACK_POP (symval);
1861 if (lrel)
1862 *lrel = rel;
1863 return symval;
1864 }
1865
1866 rel ++;
1867 }
1868}
1869
1870struct {
1871 int prefix; /* or -1 for "no prefix" */
1872 int insn; /* or -1 for "end of list" */
1873 int insn_for_saddr; /* or -1 for "no alternative" */
1874 int insn_for_sfr; /* or -1 for "no alternative" */
1875} relax_addr16[] = {
1876 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1877 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1878 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1879 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1880
1881 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1882 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1883 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1884 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1885 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1886 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1887 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1888 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1889
1890 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
1891 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
1892 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
1893 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
1894 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
1895
1896 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
1897 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
1898 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
1899 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
1900
1901 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
1902 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
1903 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
1904
1905 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
1906 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
1907 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
1908 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
1909 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
1910 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
1911
1912 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
1913
1914 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
1915 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
1916 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
1917 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
1918 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
1919 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
1920 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
1921 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
1922
1923 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
1924 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
1925 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
1926 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
1927 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
1928 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
1929 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
1930 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
68ffbac6 1931
9cea966c
DD		 1932 { -1, -1, -1, -1 }
1933};
1934
1935/* Relax one section. */
1936
99c513f6
DD		 1937static bfd_boolean
1938rl78_elf_relax_section
1939 (bfd * abfd,
1940 asection * sec,
1941 struct bfd_link_info * link_info,
1942 bfd_boolean * again)
1943{
9cea966c
DD		 1944 Elf_Internal_Shdr * symtab_hdr;
1945 Elf_Internal_Shdr * shndx_hdr;
1946 Elf_Internal_Rela * internal_relocs;
1947 Elf_Internal_Rela * free_relocs = NULL;
1948 Elf_Internal_Rela * irel;
1949 Elf_Internal_Rela * srel;
1950 Elf_Internal_Rela * irelend;
1951 Elf_Internal_Rela * next_alignment;
9cea966c
DD		 1952 bfd_byte * contents = NULL;
1953 bfd_byte * free_contents = NULL;
1954 Elf_Internal_Sym * intsyms = NULL;
1955 Elf_Internal_Sym * free_intsyms = NULL;
1956 Elf_External_Sym_Shndx * shndx_buf = NULL;
1957 bfd_vma pc;
9cea966c
DD		 1958 bfd_vma symval ATTRIBUTE_UNUSED = 0;
1959 int pcrel ATTRIBUTE_UNUSED = 0;
1960 int code ATTRIBUTE_UNUSED = 0;
1961 int section_alignment_glue;
1962 int scale;
1963
99c513f6
DD		 1964 if (abfd == elf_hash_table (link_info)->dynobj
1965 && strcmp (sec->name, ".plt") == 0)
1966 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
1967
1968 /* Assume nothing changes. */
1969 *again = FALSE;
9cea966c
DD		 1970
1971 /* We don't have to do anything for a relocatable link, if
1972 this section does not have relocs, or if this is not a
1973 code section. */
1974 if (link_info->relocatable
1975 || (sec->flags & SEC_RELOC) == 0
1976 || sec->reloc_count == 0
1977 || (sec->flags & SEC_CODE) == 0)
1978 return TRUE;
1979
1980 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1981 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
1982
9cea966c
DD		 1983 /* Get the section contents. */
1984 if (elf_section_data (sec)->this_hdr.contents != NULL)
1985 contents = elf_section_data (sec)->this_hdr.contents;
1986 /* Go get them off disk. */
1987 else
1988 {
1989 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
1990 goto error_return;
1991 elf_section_data (sec)->this_hdr.contents = contents;
1992 }
1993
1994 /* Read this BFD's symbols. */
1995 /* Get cached copy if it exists. */
1996 if (symtab_hdr->contents != NULL)
1997 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
1998 else
1999 {
2000 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2001 symtab_hdr->contents = (bfd_byte *) intsyms;
2002 }
2003
2004 if (shndx_hdr->sh_size != 0)
2005 {
2006 bfd_size_type amt;
2007
2008 amt = symtab_hdr->sh_info;
2009 amt *= sizeof (Elf_External_Sym_Shndx);
2010 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2011 if (shndx_buf == NULL)
2012 goto error_return;
2013 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2014 || bfd_bread (shndx_buf, amt, abfd) != amt)
9cea966c
DD		 2015 goto error_return;
2016 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2017 }
2018
2019 /* Get a copy of the native relocations. */
2020 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2021 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
9cea966c
DD		 2022 link_info->keep_memory));
2023 if (internal_relocs == NULL)
2024 goto error_return;
2025 if (! link_info->keep_memory)
2026 free_relocs = internal_relocs;
2027
2028 /* The RL_ relocs must be just before the operand relocs they go
2029 with, so we must sort them to guarantee this. We use bubblesort
2030 instead of qsort so we can guarantee that relocs with the same
2031 address remain in the same relative order. */
2032 reloc_bubblesort (internal_relocs, sec->reloc_count);
2033
2034 /* Walk through them looking for relaxing opportunities. */
2035 irelend = internal_relocs + sec->reloc_count;
2036
2037
2038 /* This will either be NULL or a pointer to the next alignment
2039 relocation. */
2040 next_alignment = internal_relocs;
9cea966c
DD		 2041
2042 /* We calculate worst case shrinkage caused by alignment directives.
2043 No fool-proof, but better than either ignoring the problem or
2044 doing heavy duty analysis of all the alignment markers in all
2045 input sections. */
2046 section_alignment_glue = 0;
2047 for (irel = internal_relocs; irel < irelend; irel++)
2048 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2049 && irel->r_addend & RL78_RELAXA_ALIGN)
2050 {
2051 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2052
2053 if (section_alignment_glue < this_glue)
2054 section_alignment_glue = this_glue;
2055 }
2056 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2057 shrinkage. */
2058 section_alignment_glue *= 2;
2059
2060 for (irel = internal_relocs; irel < irelend; irel++)
2061 {
2062 unsigned char *insn;
2063 int nrelocs;
2064
2065 /* The insns we care about are all marked with one of these. */
2066 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2067 continue;
2068
2069 if (irel->r_addend & RL78_RELAXA_ALIGN
2070 || next_alignment == internal_relocs)
2071 {
2072 /* When we delete bytes, we need to maintain all the alignments
2073 indicated. In addition, we need to be careful about relaxing
2074 jumps across alignment boundaries - these displacements
2075 *grow* when we delete bytes. For now, don't shrink
2076 displacements across an alignment boundary, just in case.
2077 Note that this only affects relocations to the same
2078 section. */
9cea966c
DD		 2079 next_alignment += 2;
2080 while (next_alignment < irelend
2081 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2082 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2083 next_alignment ++;
2084 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2085 next_alignment = NULL;
2086 }
2087
2088 /* When we hit alignment markers, see if we've shrunk enough
2089 before them to reduce the gap without violating the alignment
2090 requirements. */
2091 if (irel->r_addend & RL78_RELAXA_ALIGN)
2092 {
2093 /* At this point, the next relocation *should* be the ELIGN
2094 end marker. */
2095 Elf_Internal_Rela *erel = irel + 1;
2096 unsigned int alignment, nbytes;
2097
2098 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2099 continue;
2100 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2101 continue;
2102
2103 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2104
2105 if (erel->r_offset - irel->r_offset < alignment)
2106 continue;
2107
2108 nbytes = erel->r_offset - irel->r_offset;
2109 nbytes /= alignment;
2110 nbytes *= alignment;
2111
2112 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2113 erel->r_offset == sec->size);
2114 *again = TRUE;
2115
2116 continue;
2117 }
2118
2119 if (irel->r_addend & RL78_RELAXA_ELIGN)
2120 continue;
2121
2122 insn = contents + irel->r_offset;
2123
2124 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2125
2126 /* At this point, we have an insn that is a candidate for linker
2127 relaxation. There are NRELOCS relocs following that may be
2128 relaxed, although each reloc may be made of more than one
2129 reloc entry (such as gp-rel symbols). */
2130
2131 /* Get the value of the symbol referred to by the reloc. Just
2132 in case this is the last reloc in the list, use the RL's
2133 addend to choose between this reloc (no addend) or the next
2134 (yes addend, which means at least one following reloc). */
2135
2136 /* srel points to the "current" reloction for this insn -
2137 actually the last reloc for a given operand, which is the one
2138 we need to update. We check the relaxations in the same
2139 order that the relocations happen, so we'll just push it
2140 along as we go. */
2141 srel = irel;
2142
2143 pc = sec->output_section->vma + sec->output_offset
2144 + srel->r_offset;
2145
2146#define GET_RELOC \
1122dc88 2147 BFD_ASSERT (nrelocs > 0); \
9cea966c
DD		 2148 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2149 pcrel = symval - pc + srel->r_addend; \
2150 nrelocs --;
2151
2152#define SNIPNR(offset, nbytes) \
2153 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2154#define SNIP(offset, nbytes, newtype) \
2155 SNIPNR (offset, nbytes); \
2156 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2157
2158 /* The order of these bit tests must match the order that the
2159 relocs appear in. Since we sorted those by offset, we can
2160 predict them. */
2161
2162 /*----------------------------------------------------------------------*/
2163 /* EF ad BR $rel8 pcrel
2164 ED al ah BR !abs16 abs
2165 EE al ah BR $!rel16 pcrel
2166 EC al ah as BR !!abs20 abs
2167
2168 FD al ah CALL !abs16 abs
2169 FE al ah CALL $!rel16 pcrel
2170 FC al ah as CALL !!abs20 abs
2171
2172 DC ad BC $rel8
2173 DE ad BNC $rel8
2174 DD ad BZ $rel8
2175 DF ad BNZ $rel8
2176 61 C3 ad BH $rel8
2177 61 D3 ad BNH $rel8
2178 61 C8 EF ad SKC ; BR $rel8
2179 61 D8 EF ad SKNC ; BR $rel8
2180 61 E8 EF ad SKZ ; BR $rel8
2181 61 F8 EF ad SKNZ ; BR $rel8
2182 61 E3 EF ad SKH ; BR $rel8
2183 61 F3 EF ad SKNH ; BR $rel8
2184 */
2185
2186 if (irel->r_addend & RL78_RELAXA_BRA)
2187 {
1122dc88
DD		 2188 /* SKIP opcodes that skip non-branches will have a relax tag
2189 but no corresponding symbol to relax against; we just
2190 skip those. */
2191 if (irel->r_addend & RL78_RELAXA_RNUM)
2192 {
2193 GET_RELOC;
2194 }
9cea966c
DD		 2195
2196 switch (insn[0])
2197 {
2198 case 0xec: /* BR !!abs20 */
2199
2200 if (pcrel < 127
2201 && pcrel > -127)
2202 {
2203 insn[0] = 0xef;
2204 insn[1] = pcrel;
2205 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2206 *again = TRUE;
2207 }
2208 else if (symval < 65536)
2209 {
2210 insn[0] = 0xed;
2211 insn[1] = symval & 0xff;
2212 insn[2] = symval >> 8;
2213 SNIP (2, 1, R_RL78_DIR16S);
2214 *again = TRUE;
2215 }
2216 else if (pcrel < 32767
2217 && pcrel > -32767)
2218 {
2219 insn[0] = 0xee;
2220 insn[1] = pcrel & 0xff;
2221 insn[2] = pcrel >> 8;
2222 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2223 *again = TRUE;
2224 }
2225 break;
2226
2227 case 0xee: /* BR $!pcrel16 */
2228 case 0xed: /* BR $!abs16 */
2229 if (pcrel < 127
2230 && pcrel > -127)
2231 {
2232 insn[0] = 0xef;
2233 insn[1] = pcrel;
2234 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2235 *again = TRUE;
2236 }
2237 break;
2238
2239 case 0xfc: /* CALL !!abs20 */
2240 if (symval < 65536)
2241 {
2242 insn[0] = 0xfd;
2243 insn[1] = symval & 0xff;
2244 insn[2] = symval >> 8;
2245 SNIP (2, 1, R_RL78_DIR16S);
2246 *again = TRUE;
2247 }
2248 else if (pcrel < 32767
2249 && pcrel > -32767)
2250 {
2251 insn[0] = 0xfe;
2252 insn[1] = pcrel & 0xff;
2253 insn[2] = pcrel >> 8;
2254 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2255 *again = TRUE;
2256 }
2257 break;
2258
2259 case 0x61: /* PREFIX */
2260 /* For SKIP/BR, we change the BR opcode and delete the
2261 SKIP. That way, we don't have to find and change the
2262 relocation for the BR. */
1122dc88
DD		 2263 /* Note that, for the case where we're skipping some
2264 other insn, we have no "other" reloc but that's safe
2265 here anyway. */
9cea966c
DD		 2266 switch (insn[1])
2267 {
2268 case 0xc8: /* SKC */
2269 if (insn[2] == 0xef)
2270 {
2271 insn[2] = 0xde; /* BNC */
2272 SNIPNR (0, 2);
2273 }
2274 break;
2275
2276 case 0xd8: /* SKNC */
2277 if (insn[2] == 0xef)
2278 {
2279 insn[2] = 0xdc; /* BC */
2280 SNIPNR (0, 2);
2281 }
2282 break;
2283
2284 case 0xe8: /* SKZ */
2285 if (insn[2] == 0xef)
2286 {
2287 insn[2] = 0xdf; /* BNZ */
2288 SNIPNR (0, 2);
2289 }
2290 break;
2291
2292 case 0xf8: /* SKNZ */
2293 if (insn[2] == 0xef)
2294 {
2295 insn[2] = 0xdd; /* BZ */
2296 SNIPNR (0, 2);
2297 }
2298 break;
2299
2300 case 0xe3: /* SKH */
2301 if (insn[2] == 0xef)
2302 {
2303 insn[2] = 0xd3; /* BNH */
2304 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2305 }
2306 break;
2307
2308 case 0xf3: /* SKNH */
2309 if (insn[2] == 0xef)
2310 {
2311 insn[2] = 0xc3; /* BH */
2312 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2313 }
2314 break;
2315 }
2316 break;
2317 }
68ffbac6 2318
9cea966c
DD		 2319 }
2320
2321 if (irel->r_addend & RL78_RELAXA_ADDR16)
2322 {
2323 /*----------------------------------------------------------------------*/
2324 /* Some insns have both a 16-bit address operand and an 8-bit
2325 variant if the address is within a special range:
2326
2327 Address 16-bit operand SADDR range SFR range
2328 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2329 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2330
2331 The RELAX_ADDR16[] array has the insn encodings for the
2332 16-bit operand version, as well as the SFR and SADDR
2333 variants. We only need to replace the encodings and
2334 adjust the operand.
2335
2336 Note: we intentionally do not attempt to decode and skip
2337 any ES: prefix, as adding ES: means the addr16 (likely)
2338 no longer points to saddr/sfr space.
2339 */
2340
2341 int is_sfr;
2342 int is_saddr;
2343 int idx;
2344 int poff;
2345
2346 GET_RELOC;
2347
9cea966c
DD		 2348 if (0xffe20 <= symval && symval <= 0xfffff)
2349 {
2350
2351 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2352 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2353
2354 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2355 {
2356 if (relax_addr16[idx].prefix != -1
2357 && insn[0] == relax_addr16[idx].prefix
2358 && insn[1] == relax_addr16[idx].insn)
2359 {
2360 poff = 1;
2361 }
2362 else if (relax_addr16[idx].prefix == -1
2363 && insn[0] == relax_addr16[idx].insn)
2364 {
2365 poff = 0;
2366 }
2367 else
2368 continue;
2369
2370 /* We have a matched insn, and poff is 0 or 1 depending
2371 on the base pattern size. */
2372
2373 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2374 {
2375 insn[poff] = relax_addr16[idx].insn_for_sfr;
2376 SNIP (poff+2, 1, R_RL78_RH_SFR);
9cea966c
DD		 2377 }
2378
2379 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2380 {
2381 insn[poff] = relax_addr16[idx].insn_for_saddr;
2382 SNIP (poff+2, 1, R_RL78_RH_SADDR);
9cea966c 2383 }
68ffbac6 2384
9cea966c
DD		 2385 }
2386 }
2387 }
2388
2389 /*----------------------------------------------------------------------*/
2390
2391 }
2392
2393 return TRUE;
2394
2395 error_return:
2396 if (free_relocs != NULL)
2397 free (free_relocs);
2398
2399 if (free_contents != NULL)
2400 free (free_contents);
2401
2402 if (shndx_buf != NULL)
2403 {
2404 shndx_hdr->contents = NULL;
2405 free (shndx_buf);
2406 }
2407
2408 if (free_intsyms != NULL)
2409 free (free_intsyms);
2410
99c513f6
DD		 2411 return TRUE;
2412}
2413
2414\f
2415
2416#define ELF_ARCH bfd_arch_rl78
2417#define ELF_MACHINE_CODE EM_RL78
2418#define ELF_MAXPAGESIZE 0x1000
2419
2420#define TARGET_LITTLE_SYM bfd_elf32_rl78_vec
2421#define TARGET_LITTLE_NAME "elf32-rl78"
2422
2423#define elf_info_to_howto_rel NULL
2424#define elf_info_to_howto rl78_info_to_howto_rela
2425#define elf_backend_object_p rl78_elf_object_p
2426#define elf_backend_relocate_section rl78_elf_relocate_section
2427#define elf_symbol_leading_char ('_')
2428#define elf_backend_can_gc_sections 1
2429
2430#define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2431#define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2432#define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2433#define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2434#define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2435
2436#define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2437#define elf_backend_check_relocs rl78_elf_check_relocs
2438#define elf_backend_always_size_sections \
2439 rl78_elf_always_size_sections
2440#define elf_backend_finish_dynamic_sections \
2441 rl78_elf_finish_dynamic_sections
2442
2443#include "elf32-target.h"
Empty description
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