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c906108c SS |
1 | /* Target-dependent code for GDB, the GNU debugger. |
2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997 | |
3 | Free Software Foundation, Inc. | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "defs.h" | |
22 | #include "frame.h" | |
23 | #include "inferior.h" | |
24 | #include "symtab.h" | |
25 | #include "target.h" | |
26 | #include "gdbcore.h" | |
27 | #include "gdbcmd.h" | |
28 | #include "symfile.h" | |
29 | #include "objfiles.h" | |
30 | #include "xcoffsolib.h" | |
31 | ||
32 | extern int errno; | |
33 | ||
34 | /* Breakpoint shadows for the single step instructions will be kept here. */ | |
35 | ||
36 | static struct sstep_breaks { | |
37 | /* Address, or 0 if this is not in use. */ | |
38 | CORE_ADDR address; | |
39 | /* Shadow contents. */ | |
40 | char data[4]; | |
41 | } stepBreaks[2]; | |
42 | ||
43 | /* Hook for determining the TOC address when calling functions in the | |
44 | inferior under AIX. The initialization code in rs6000-nat.c sets | |
45 | this hook to point to find_toc_address. */ | |
46 | ||
47 | CORE_ADDR (*find_toc_address_hook) PARAMS ((CORE_ADDR)) = NULL; | |
48 | ||
49 | /* Static function prototypes */ | |
50 | ||
51 | static CORE_ADDR branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, | |
52 | CORE_ADDR safety)); | |
53 | ||
54 | static void frame_get_saved_regs PARAMS ((struct frame_info *fi, | |
55 | struct rs6000_framedata *fdatap)); | |
56 | ||
57 | static void pop_dummy_frame PARAMS ((void)); | |
58 | ||
59 | static CORE_ADDR frame_initial_stack_address PARAMS ((struct frame_info *)); | |
60 | ||
61 | /* Fill in fi->saved_regs */ | |
62 | ||
63 | struct frame_extra_info | |
64 | { | |
65 | /* Functions calling alloca() change the value of the stack | |
66 | pointer. We need to use initial stack pointer (which is saved in | |
67 | r31 by gcc) in such cases. If a compiler emits traceback table, | |
68 | then we should use the alloca register specified in traceback | |
69 | table. FIXME. */ | |
70 | CORE_ADDR initial_sp; /* initial stack pointer. */ | |
71 | }; | |
72 | ||
73 | void | |
74 | rs6000_init_extra_frame_info (fromleaf, fi) | |
75 | int fromleaf; | |
76 | struct frame_info *fi; | |
77 | { | |
78 | fi->extra_info = (struct frame_extra_info*) | |
79 | frame_obstack_alloc (sizeof (struct frame_extra_info)); | |
80 | fi->extra_info->initial_sp = 0; | |
81 | if (fi->next != (CORE_ADDR) 0 | |
82 | && fi->pc < TEXT_SEGMENT_BASE) | |
83 | /* We're in get_prev_frame_info */ | |
84 | /* and this is a special signal frame. */ | |
85 | /* (fi->pc will be some low address in the kernel, */ | |
86 | /* to which the signal handler returns). */ | |
87 | fi->signal_handler_caller = 1; | |
88 | } | |
89 | ||
90 | ||
91 | void | |
92 | rs6000_frame_init_saved_regs (fi) | |
93 | struct frame_info *fi; | |
94 | { | |
95 | frame_get_saved_regs (fi, NULL); | |
96 | } | |
97 | ||
98 | CORE_ADDR | |
99 | rs6000_frame_args_address (fi) | |
100 | struct frame_info *fi; | |
101 | { | |
102 | if (fi->extra_info->initial_sp != 0) | |
103 | return fi->extra_info->initial_sp; | |
104 | else | |
105 | return frame_initial_stack_address (fi); | |
106 | } | |
107 | ||
108 | ||
109 | /* Calculate the destination of a branch/jump. Return -1 if not a branch. */ | |
110 | ||
111 | static CORE_ADDR | |
112 | branch_dest (opcode, instr, pc, safety) | |
113 | int opcode; | |
114 | int instr; | |
115 | CORE_ADDR pc; | |
116 | CORE_ADDR safety; | |
117 | { | |
118 | CORE_ADDR dest; | |
119 | int immediate; | |
120 | int absolute; | |
121 | int ext_op; | |
122 | ||
123 | absolute = (int) ((instr >> 1) & 1); | |
124 | ||
125 | switch (opcode) { | |
126 | case 18 : | |
127 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ | |
128 | if (absolute) | |
129 | dest = immediate; | |
130 | else | |
131 | dest = pc + immediate; | |
132 | break; | |
133 | ||
134 | case 16 : | |
135 | immediate = ((instr & ~3) << 16) >> 16; /* br conditional */ | |
136 | if (absolute) | |
137 | dest = immediate; | |
138 | else | |
139 | dest = pc + immediate; | |
140 | break; | |
141 | ||
142 | case 19 : | |
143 | ext_op = (instr>>1) & 0x3ff; | |
144 | ||
145 | if (ext_op == 16) /* br conditional register */ | |
146 | { | |
147 | dest = read_register (LR_REGNUM) & ~3; | |
148 | ||
149 | /* If we are about to return from a signal handler, dest is | |
150 | something like 0x3c90. The current frame is a signal handler | |
151 | caller frame, upon completion of the sigreturn system call | |
152 | execution will return to the saved PC in the frame. */ | |
153 | if (dest < TEXT_SEGMENT_BASE) | |
154 | { | |
155 | struct frame_info *fi; | |
156 | ||
157 | fi = get_current_frame (); | |
158 | if (fi != NULL) | |
159 | dest = read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, | |
160 | 4); | |
161 | } | |
162 | } | |
163 | ||
164 | else if (ext_op == 528) /* br cond to count reg */ | |
165 | { | |
166 | dest = read_register (CTR_REGNUM) & ~3; | |
167 | ||
168 | /* If we are about to execute a system call, dest is something | |
169 | like 0x22fc or 0x3b00. Upon completion the system call | |
170 | will return to the address in the link register. */ | |
171 | if (dest < TEXT_SEGMENT_BASE) | |
172 | dest = read_register (LR_REGNUM) & ~3; | |
173 | } | |
174 | else return -1; | |
175 | break; | |
176 | ||
177 | default: return -1; | |
178 | } | |
179 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; | |
180 | } | |
181 | ||
182 | ||
183 | /* Sequence of bytes for breakpoint instruction. */ | |
184 | ||
185 | #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 } | |
186 | #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d } | |
187 | ||
188 | unsigned char * | |
189 | rs6000_breakpoint_from_pc (bp_addr, bp_size) | |
190 | CORE_ADDR *bp_addr; | |
191 | int *bp_size; | |
192 | { | |
193 | static unsigned char big_breakpoint[] = BIG_BREAKPOINT; | |
194 | static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT; | |
195 | *bp_size = 4; | |
196 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
197 | return big_breakpoint; | |
198 | else | |
199 | return little_breakpoint; | |
200 | } | |
201 | ||
202 | ||
203 | /* AIX does not support PT_STEP. Simulate it. */ | |
204 | ||
205 | void | |
206 | rs6000_software_single_step (signal, insert_breakpoints_p) | |
207 | unsigned int signal; | |
208 | int insert_breakpoints_p; | |
209 | { | |
210 | #define INSNLEN(OPCODE) 4 | |
211 | ||
212 | static char le_breakp[] = LITTLE_BREAKPOINT; | |
213 | static char be_breakp[] = BIG_BREAKPOINT; | |
214 | char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp; | |
215 | int ii, insn; | |
216 | CORE_ADDR loc; | |
217 | CORE_ADDR breaks[2]; | |
218 | int opcode; | |
219 | ||
220 | if (insert_breakpoints_p) { | |
221 | ||
222 | loc = read_pc (); | |
223 | ||
224 | insn = read_memory_integer (loc, 4); | |
225 | ||
226 | breaks[0] = loc + INSNLEN(insn); | |
227 | opcode = insn >> 26; | |
228 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
229 | ||
230 | /* Don't put two breakpoints on the same address. */ | |
231 | if (breaks[1] == breaks[0]) | |
232 | breaks[1] = -1; | |
233 | ||
234 | stepBreaks[1].address = 0; | |
235 | ||
236 | for (ii=0; ii < 2; ++ii) { | |
237 | ||
238 | /* ignore invalid breakpoint. */ | |
239 | if ( breaks[ii] == -1) | |
240 | continue; | |
241 | ||
242 | read_memory (breaks[ii], stepBreaks[ii].data, 4); | |
243 | ||
244 | write_memory (breaks[ii], breakp, 4); | |
245 | stepBreaks[ii].address = breaks[ii]; | |
246 | } | |
247 | ||
248 | } else { | |
249 | ||
250 | /* remove step breakpoints. */ | |
251 | for (ii=0; ii < 2; ++ii) | |
252 | if (stepBreaks[ii].address != 0) | |
253 | write_memory | |
254 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); | |
255 | ||
256 | } | |
257 | errno = 0; /* FIXME, don't ignore errors! */ | |
258 | /* What errors? {read,write}_memory call error(). */ | |
259 | } | |
260 | ||
261 | ||
262 | /* return pc value after skipping a function prologue and also return | |
263 | information about a function frame. | |
264 | ||
265 | in struct rs6000_framedata fdata: | |
266 | - frameless is TRUE, if function does not have a frame. | |
267 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
268 | - offset is the initial size of this stack frame --- the amount by | |
269 | which we decrement the sp to allocate the frame. | |
270 | - saved_gpr is the number of the first saved gpr. | |
271 | - saved_fpr is the number of the first saved fpr. | |
272 | - alloca_reg is the number of the register used for alloca() handling. | |
273 | Otherwise -1. | |
274 | - gpr_offset is the offset of the first saved gpr from the previous frame. | |
275 | - fpr_offset is the offset of the first saved fpr from the previous frame. | |
276 | - lr_offset is the offset of the saved lr | |
277 | - cr_offset is the offset of the saved cr | |
278 | */ | |
279 | ||
280 | #define SIGNED_SHORT(x) \ | |
281 | ((sizeof (short) == 2) \ | |
282 | ? ((int)(short)(x)) \ | |
283 | : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000))) | |
284 | ||
285 | #define GET_SRC_REG(x) (((x) >> 21) & 0x1f) | |
286 | ||
287 | CORE_ADDR | |
288 | skip_prologue (pc, fdata) | |
289 | CORE_ADDR pc; | |
290 | struct rs6000_framedata *fdata; | |
291 | { | |
292 | CORE_ADDR orig_pc = pc; | |
293 | char buf[4]; | |
294 | unsigned long op; | |
295 | long offset = 0; | |
296 | int lr_reg = 0; | |
297 | int cr_reg = 0; | |
298 | int reg; | |
299 | int framep = 0; | |
300 | int minimal_toc_loaded = 0; | |
301 | static struct rs6000_framedata zero_frame; | |
302 | ||
303 | *fdata = zero_frame; | |
304 | fdata->saved_gpr = -1; | |
305 | fdata->saved_fpr = -1; | |
306 | fdata->alloca_reg = -1; | |
307 | fdata->frameless = 1; | |
308 | fdata->nosavedpc = 1; | |
309 | ||
310 | if (target_read_memory (pc, buf, 4)) | |
311 | return pc; /* Can't access it -- assume no prologue. */ | |
312 | ||
313 | /* Assume that subsequent fetches can fail with low probability. */ | |
314 | pc -= 4; | |
315 | for (;;) | |
316 | { | |
317 | pc += 4; | |
318 | op = read_memory_integer (pc, 4); | |
319 | ||
320 | if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */ | |
321 | lr_reg = (op & 0x03e00000) | 0x90010000; | |
322 | continue; | |
323 | ||
324 | } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */ | |
325 | cr_reg = (op & 0x03e00000) | 0x90010000; | |
326 | continue; | |
327 | ||
328 | } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ | |
329 | reg = GET_SRC_REG (op); | |
330 | if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) { | |
331 | fdata->saved_fpr = reg; | |
332 | fdata->fpr_offset = SIGNED_SHORT (op) + offset; | |
333 | } | |
334 | continue; | |
335 | ||
336 | } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */ | |
337 | ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), | |
338 | rx >= r13 */ | |
339 | (op & 0x03e00000) >= 0x01a00000)) { | |
340 | ||
341 | reg = GET_SRC_REG (op); | |
342 | if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) { | |
343 | fdata->saved_gpr = reg; | |
344 | fdata->gpr_offset = SIGNED_SHORT (op) + offset; | |
345 | } | |
346 | continue; | |
347 | ||
348 | } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used | |
349 | for >= 32k frames */ | |
350 | fdata->offset = (op & 0x0000ffff) << 16; | |
351 | fdata->frameless = 0; | |
352 | continue; | |
353 | ||
354 | } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd ha | |
355 | lf of >= 32k frames */ | |
356 | fdata->offset |= (op & 0x0000ffff); | |
357 | fdata->frameless = 0; | |
358 | continue; | |
359 | ||
360 | } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1) | |
361 | where Rx == lr */ | |
362 | fdata->lr_offset = SIGNED_SHORT (op) + offset; | |
363 | fdata->nosavedpc = 0; | |
364 | lr_reg = 0; | |
365 | continue; | |
366 | ||
367 | } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1) | |
368 | where Rx == cr */ | |
369 | fdata->cr_offset = SIGNED_SHORT (op) + offset; | |
370 | cr_reg = 0; | |
371 | continue; | |
372 | ||
373 | } else if (op == 0x48000005) { /* bl .+4 used in | |
374 | -mrelocatable */ | |
375 | continue; | |
376 | ||
377 | } else if (op == 0x48000004) { /* b .+4 (xlc) */ | |
378 | break; | |
379 | ||
380 | } else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used | |
381 | in V.4 -mrelocatable */ | |
382 | op == 0x7fc0f214) && /* add r30,r0,r30, used | |
383 | in V.4 -mrelocatable */ | |
384 | lr_reg == 0x901e0000) { | |
385 | continue; | |
386 | ||
387 | } else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used | |
388 | in V.4 -mminimal-toc */ | |
389 | (op & 0xffff0000) == 0x3bde0000) { /* addi 30,30,foo@l */ | |
390 | continue; | |
391 | ||
392 | } else if ((op & 0xfc000000) == 0x48000000) { /* bl foo, | |
393 | to save fprs??? */ | |
394 | ||
395 | fdata->frameless = 0; | |
396 | /* Don't skip over the subroutine call if it is not within the first | |
397 | three instructions of the prologue. */ | |
398 | if ((pc - orig_pc) > 8) | |
399 | break; | |
400 | ||
401 | op = read_memory_integer (pc+4, 4); | |
402 | ||
403 | /* At this point, make sure this is not a trampoline function | |
404 | (a function that simply calls another functions, and nothing else). | |
405 | If the next is not a nop, this branch was part of the function | |
406 | prologue. */ | |
407 | ||
408 | if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */ | |
409 | break; /* don't skip over | |
410 | this branch */ | |
411 | continue; | |
412 | ||
413 | /* update stack pointer */ | |
414 | } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */ | |
415 | fdata->frameless = 0; | |
416 | fdata->offset = SIGNED_SHORT (op); | |
417 | offset = fdata->offset; | |
418 | continue; | |
419 | ||
420 | } else if (op == 0x7c21016e) { /* stwux 1,1,0 */ | |
421 | fdata->frameless = 0; | |
422 | offset = fdata->offset; | |
423 | continue; | |
424 | ||
425 | /* Load up minimal toc pointer */ | |
426 | } else if ((op >> 22) == 0x20f | |
427 | && ! minimal_toc_loaded) { /* l r31,... or l r30,... */ | |
428 | minimal_toc_loaded = 1; | |
429 | continue; | |
430 | ||
431 | /* store parameters in stack */ | |
432 | } else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ | |
433 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
434 | (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */ | |
435 | continue; | |
436 | ||
437 | /* store parameters in stack via frame pointer */ | |
438 | } else if (framep && | |
439 | ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */ | |
440 | (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */ | |
441 | (op & 0xfc1f0000) == 0xfc1f0000)) { /* frsp, fp?,NUM(r1) */ | |
442 | continue; | |
443 | ||
444 | /* Set up frame pointer */ | |
445 | } else if (op == 0x603f0000 /* oril r31, r1, 0x0 */ | |
446 | || op == 0x7c3f0b78) { /* mr r31, r1 */ | |
447 | fdata->frameless = 0; | |
448 | framep = 1; | |
449 | fdata->alloca_reg = 31; | |
450 | continue; | |
451 | ||
452 | /* Another way to set up the frame pointer. */ | |
453 | } else if ((op & 0xfc1fffff) == 0x38010000) { /* addi rX, r1, 0x0 */ | |
454 | fdata->frameless = 0; | |
455 | framep = 1; | |
456 | fdata->alloca_reg = (op & ~0x38010000) >> 21; | |
457 | continue; | |
458 | ||
459 | } else { | |
460 | break; | |
461 | } | |
462 | } | |
463 | ||
464 | #if 0 | |
465 | /* I have problems with skipping over __main() that I need to address | |
466 | * sometime. Previously, I used to use misc_function_vector which | |
467 | * didn't work as well as I wanted to be. -MGO */ | |
468 | ||
469 | /* If the first thing after skipping a prolog is a branch to a function, | |
470 | this might be a call to an initializer in main(), introduced by gcc2. | |
471 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
472 | work before calling a function right after a prologue, thus we can | |
473 | single out such gcc2 behaviour. */ | |
474 | ||
475 | ||
476 | if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */ | |
477 | op = read_memory_integer (pc+4, 4); | |
478 | ||
479 | if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */ | |
480 | ||
481 | /* check and see if we are in main. If so, skip over this initializer | |
482 | function as well. */ | |
483 | ||
484 | tmp = find_pc_misc_function (pc); | |
485 | if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main")) | |
486 | return pc + 8; | |
487 | } | |
488 | } | |
489 | #endif /* 0 */ | |
490 | ||
491 | fdata->offset = - fdata->offset; | |
492 | return pc; | |
493 | } | |
494 | ||
495 | ||
496 | /************************************************************************* | |
497 | Support for creating pushind a dummy frame into the stack, and popping | |
498 | frames, etc. | |
499 | *************************************************************************/ | |
500 | ||
501 | /* The total size of dummy frame is 436, which is; | |
502 | ||
503 | 32 gpr's - 128 bytes | |
504 | 32 fpr's - 256 " | |
505 | 7 the rest - 28 " | |
506 | and 24 extra bytes for the callee's link area. The last 24 bytes | |
507 | for the link area might not be necessary, since it will be taken | |
508 | care of by push_arguments(). */ | |
509 | ||
510 | #define DUMMY_FRAME_SIZE 436 | |
511 | ||
512 | #define DUMMY_FRAME_ADDR_SIZE 10 | |
513 | ||
514 | /* Make sure you initialize these in somewhere, in case gdb gives up what it | |
515 | was debugging and starts debugging something else. FIXMEibm */ | |
516 | ||
517 | static int dummy_frame_count = 0; | |
518 | static int dummy_frame_size = 0; | |
519 | static CORE_ADDR *dummy_frame_addr = 0; | |
520 | ||
521 | extern int stop_stack_dummy; | |
522 | ||
523 | /* push a dummy frame into stack, save all register. Currently we are saving | |
524 | only gpr's and fpr's, which is not good enough! FIXMEmgo */ | |
525 | ||
526 | void | |
527 | push_dummy_frame () | |
528 | { | |
529 | /* stack pointer. */ | |
530 | CORE_ADDR sp; | |
531 | /* Same thing, target byte order. */ | |
532 | char sp_targ[4]; | |
533 | ||
534 | /* link register. */ | |
535 | CORE_ADDR pc; | |
536 | /* Same thing, target byte order. */ | |
537 | char pc_targ[4]; | |
538 | ||
539 | /* Needed to figure out where to save the dummy link area. | |
540 | FIXME: There should be an easier way to do this, no? tiemann 9/9/95. */ | |
541 | struct rs6000_framedata fdata; | |
542 | ||
543 | int ii; | |
544 | ||
545 | target_fetch_registers (-1); | |
546 | ||
547 | if (dummy_frame_count >= dummy_frame_size) { | |
548 | dummy_frame_size += DUMMY_FRAME_ADDR_SIZE; | |
549 | if (dummy_frame_addr) | |
550 | dummy_frame_addr = (CORE_ADDR*) xrealloc | |
551 | (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size)); | |
552 | else | |
553 | dummy_frame_addr = (CORE_ADDR*) | |
554 | xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size)); | |
555 | } | |
556 | ||
557 | sp = read_register(SP_REGNUM); | |
558 | pc = read_register(PC_REGNUM); | |
559 | store_address (pc_targ, 4, pc); | |
560 | ||
561 | skip_prologue (get_pc_function_start (pc), &fdata); | |
562 | ||
563 | dummy_frame_addr [dummy_frame_count++] = sp; | |
564 | ||
565 | /* Be careful! If the stack pointer is not decremented first, then kernel | |
566 | thinks he is free to use the space underneath it. And kernel actually | |
567 | uses that area for IPC purposes when executing ptrace(2) calls. So | |
568 | before writing register values into the new frame, decrement and update | |
569 | %sp first in order to secure your frame. */ | |
570 | ||
571 | /* FIXME: We don't check if the stack really has this much space. | |
572 | This is a problem on the ppc simulator (which only grants one page | |
573 | (4096 bytes) by default. */ | |
574 | ||
575 | write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE); | |
576 | ||
577 | /* gdb relies on the state of current_frame. We'd better update it, | |
578 | otherwise things like do_registers_info() wouldn't work properly! */ | |
579 | ||
580 | flush_cached_frames (); | |
581 | ||
582 | /* save program counter in link register's space. */ | |
583 | write_memory (sp + (fdata.lr_offset ? fdata.lr_offset : DEFAULT_LR_SAVE), | |
584 | pc_targ, 4); | |
585 | ||
586 | /* save all floating point and general purpose registers here. */ | |
587 | ||
588 | /* fpr's, f0..f31 */ | |
589 | for (ii = 0; ii < 32; ++ii) | |
590 | write_memory (sp-8-(ii*8), ®isters[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8); | |
591 | ||
592 | /* gpr's r0..r31 */ | |
593 | for (ii=1; ii <=32; ++ii) | |
594 | write_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
595 | ||
596 | /* so far, 32*2 + 32 words = 384 bytes have been written. | |
597 | 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */ | |
598 | ||
599 | for (ii=1; ii <= (LAST_UISA_SP_REGNUM-FIRST_UISA_SP_REGNUM+1); ++ii) { | |
600 | write_memory (sp-384-(ii*4), | |
601 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
602 | } | |
603 | ||
604 | /* Save sp or so called back chain right here. */ | |
605 | store_address (sp_targ, 4, sp); | |
606 | write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4); | |
607 | sp -= DUMMY_FRAME_SIZE; | |
608 | ||
609 | /* And finally, this is the back chain. */ | |
610 | write_memory (sp+8, pc_targ, 4); | |
611 | } | |
612 | ||
613 | ||
614 | /* Pop a dummy frame. | |
615 | ||
616 | In rs6000 when we push a dummy frame, we save all of the registers. This | |
617 | is usually done before user calls a function explicitly. | |
618 | ||
619 | After a dummy frame is pushed, some instructions are copied into stack, | |
620 | and stack pointer is decremented even more. Since we don't have a frame | |
621 | pointer to get back to the parent frame of the dummy, we start having | |
622 | trouble poping it. Therefore, we keep a dummy frame stack, keeping | |
623 | addresses of dummy frames as such. When poping happens and when we | |
624 | detect that was a dummy frame, we pop it back to its parent by using | |
625 | dummy frame stack (`dummy_frame_addr' array). | |
626 | ||
627 | FIXME: This whole concept is broken. You should be able to detect | |
628 | a dummy stack frame *on the user's stack itself*. When you do, | |
629 | then you know the format of that stack frame -- including its | |
630 | saved SP register! There should *not* be a separate stack in the | |
631 | GDB process that keeps track of these dummy frames! -- [email protected] Aug92 | |
632 | */ | |
633 | ||
634 | static void | |
635 | pop_dummy_frame () | |
636 | { | |
637 | CORE_ADDR sp, pc; | |
638 | int ii; | |
639 | sp = dummy_frame_addr [--dummy_frame_count]; | |
640 | ||
641 | /* restore all fpr's. */ | |
642 | for (ii = 1; ii <= 32; ++ii) | |
643 | read_memory (sp-(ii*8), ®isters[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8); | |
644 | ||
645 | /* restore all gpr's */ | |
646 | for (ii=1; ii <= 32; ++ii) { | |
647 | read_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
648 | } | |
649 | ||
650 | /* restore the rest of the registers. */ | |
651 | for (ii=1; ii <=(LAST_UISA_SP_REGNUM-FIRST_UISA_SP_REGNUM+1); ++ii) | |
652 | read_memory (sp-384-(ii*4), | |
653 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
654 | ||
655 | read_memory (sp-(DUMMY_FRAME_SIZE-8), | |
656 | ®isters [REGISTER_BYTE(PC_REGNUM)], 4); | |
657 | ||
658 | /* when a dummy frame was being pushed, we had to decrement %sp first, in | |
659 | order to secure astack space. Thus, saved %sp (or %r1) value, is not the | |
660 | one we should restore. Change it with the one we need. */ | |
661 | ||
662 | memcpy (®isters [REGISTER_BYTE(FP_REGNUM)], (char *) &sp, sizeof (int)); | |
663 | ||
664 | /* Now we can restore all registers. */ | |
665 | ||
666 | target_store_registers (-1); | |
667 | pc = read_pc (); | |
668 | flush_cached_frames (); | |
669 | } | |
670 | ||
671 | ||
672 | /* pop the innermost frame, go back to the caller. */ | |
673 | ||
674 | void | |
675 | pop_frame () | |
676 | { | |
677 | CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */ | |
678 | struct rs6000_framedata fdata; | |
679 | struct frame_info *frame = get_current_frame (); | |
680 | int addr, ii; | |
681 | ||
682 | pc = read_pc (); | |
683 | sp = FRAME_FP (frame); | |
684 | ||
685 | if (stop_stack_dummy) | |
686 | { | |
687 | #ifdef USE_GENERIC_DUMMY_FRAMES | |
688 | generic_pop_dummy_frame (); | |
689 | flush_cached_frames (); | |
690 | return; | |
691 | #else | |
692 | if (dummy_frame_count) | |
693 | pop_dummy_frame (); | |
694 | return; | |
695 | #endif | |
696 | } | |
697 | ||
698 | /* Make sure that all registers are valid. */ | |
699 | read_register_bytes (0, NULL, REGISTER_BYTES); | |
700 | ||
701 | /* figure out previous %pc value. If the function is frameless, it is | |
702 | still in the link register, otherwise walk the frames and retrieve the | |
703 | saved %pc value in the previous frame. */ | |
704 | ||
705 | addr = get_pc_function_start (frame->pc); | |
706 | (void) skip_prologue (addr, &fdata); | |
707 | ||
708 | if (fdata.frameless) | |
709 | prev_sp = sp; | |
710 | else | |
711 | prev_sp = read_memory_integer (sp, 4); | |
712 | if (fdata.lr_offset == 0) | |
713 | lr = read_register (LR_REGNUM); | |
714 | else | |
715 | lr = read_memory_integer (prev_sp + fdata.lr_offset, 4); | |
716 | ||
717 | /* reset %pc value. */ | |
718 | write_register (PC_REGNUM, lr); | |
719 | ||
720 | /* reset register values if any was saved earlier. */ | |
721 | ||
722 | if (fdata.saved_gpr != -1) | |
723 | { | |
724 | addr = prev_sp + fdata.gpr_offset; | |
725 | for (ii = fdata.saved_gpr; ii <= 31; ++ii) { | |
726 | read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4); | |
727 | addr += 4; | |
728 | } | |
729 | } | |
730 | ||
731 | if (fdata.saved_fpr != -1) | |
732 | { | |
733 | addr = prev_sp + fdata.fpr_offset; | |
734 | for (ii = fdata.saved_fpr; ii <= 31; ++ii) { | |
735 | read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8); | |
736 | addr += 8; | |
737 | } | |
738 | } | |
739 | ||
740 | write_register (SP_REGNUM, prev_sp); | |
741 | target_store_registers (-1); | |
742 | flush_cached_frames (); | |
743 | } | |
744 | ||
745 | /* fixup the call sequence of a dummy function, with the real function address. | |
746 | its argumets will be passed by gdb. */ | |
747 | ||
748 | void | |
749 | rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p) | |
750 | char *dummyname; | |
751 | CORE_ADDR pc; | |
752 | CORE_ADDR fun; | |
753 | int nargs; | |
754 | value_ptr *args; | |
755 | struct type *type; | |
756 | int gcc_p; | |
757 | { | |
758 | #define TOC_ADDR_OFFSET 20 | |
759 | #define TARGET_ADDR_OFFSET 28 | |
760 | ||
761 | int ii; | |
762 | CORE_ADDR target_addr; | |
763 | ||
764 | if (find_toc_address_hook != NULL) | |
765 | { | |
766 | CORE_ADDR tocvalue; | |
767 | ||
768 | tocvalue = (*find_toc_address_hook) (fun); | |
769 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET); | |
770 | ii = (ii & 0xffff0000) | (tocvalue >> 16); | |
771 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii; | |
772 | ||
773 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4); | |
774 | ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff); | |
775 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii; | |
776 | } | |
777 | ||
778 | target_addr = fun; | |
779 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET); | |
780 | ii = (ii & 0xffff0000) | (target_addr >> 16); | |
781 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii; | |
782 | ||
783 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4); | |
784 | ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff); | |
785 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii; | |
786 | } | |
787 | ||
788 | /* Pass the arguments in either registers, or in the stack. In RS6000, | |
789 | the first eight words of the argument list (that might be less than | |
790 | eight parameters if some parameters occupy more than one word) are | |
791 | passed in r3..r11 registers. float and double parameters are | |
792 | passed in fpr's, in addition to that. Rest of the parameters if any | |
793 | are passed in user stack. There might be cases in which half of the | |
794 | parameter is copied into registers, the other half is pushed into | |
795 | stack. | |
796 | ||
797 | If the function is returning a structure, then the return address is passed | |
798 | in r3, then the first 7 words of the parameters can be passed in registers, | |
799 | starting from r4. */ | |
800 | ||
801 | CORE_ADDR | |
802 | push_arguments (nargs, args, sp, struct_return, struct_addr) | |
803 | int nargs; | |
804 | value_ptr *args; | |
805 | CORE_ADDR sp; | |
806 | int struct_return; | |
807 | CORE_ADDR struct_addr; | |
808 | { | |
809 | int ii; | |
810 | int len = 0; | |
811 | int argno; /* current argument number */ | |
812 | int argbytes; /* current argument byte */ | |
813 | char tmp_buffer [50]; | |
814 | int f_argno = 0; /* current floating point argno */ | |
815 | ||
816 | value_ptr arg = 0; | |
817 | struct type *type; | |
818 | ||
819 | CORE_ADDR saved_sp; | |
820 | ||
821 | #ifndef USE_GENERIC_DUMMY_FRAMES | |
822 | if ( dummy_frame_count <= 0) | |
823 | printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n"); | |
824 | #endif /* GENERIC_DUMMY_FRAMES */ | |
825 | ||
826 | /* The first eight words of ther arguments are passed in registers. Copy | |
827 | them appropriately. | |
828 | ||
829 | If the function is returning a `struct', then the first word (which | |
830 | will be passed in r3) is used for struct return address. In that | |
831 | case we should advance one word and start from r4 register to copy | |
832 | parameters. */ | |
833 | ||
834 | ii = struct_return ? 1 : 0; | |
835 | ||
836 | /* | |
837 | effectively indirect call... gcc does... | |
838 | ||
839 | return_val example( float, int); | |
840 | ||
841 | eabi: | |
842 | float in fp0, int in r3 | |
843 | offset of stack on overflow 8/16 | |
844 | for varargs, must go by type. | |
845 | power open: | |
846 | float in r3&r4, int in r5 | |
847 | offset of stack on overflow different | |
848 | both: | |
849 | return in r3 or f0. If no float, must study how gcc emulates floats; | |
850 | pay attention to arg promotion. | |
851 | User may have to cast\args to handle promotion correctly | |
852 | since gdb won't know if prototype supplied or not. | |
853 | */ | |
854 | ||
855 | for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) { | |
856 | ||
857 | arg = args[argno]; | |
858 | type = check_typedef (VALUE_TYPE (arg)); | |
859 | len = TYPE_LENGTH (type); | |
860 | ||
861 | if (TYPE_CODE (type) == TYPE_CODE_FLT) { | |
862 | ||
863 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
864 | There are 13 fpr's reserved for passing parameters. At this point | |
865 | there is no way we would run out of them. */ | |
866 | ||
867 | if (len > 8) | |
868 | printf_unfiltered ( | |
869 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
870 | ||
871 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], | |
872 | VALUE_CONTENTS (arg), | |
873 | len); | |
874 | ++f_argno; | |
875 | } | |
876 | ||
877 | if (len > 4) { | |
878 | ||
879 | /* Argument takes more than one register. */ | |
880 | while (argbytes < len) { | |
881 | memset (®isters[REGISTER_BYTE(ii+3)], 0, sizeof(int)); | |
882 | memcpy (®isters[REGISTER_BYTE(ii+3)], | |
883 | ((char*)VALUE_CONTENTS (arg))+argbytes, | |
884 | (len - argbytes) > 4 ? 4 : len - argbytes); | |
885 | ++ii, argbytes += 4; | |
886 | ||
887 | if (ii >= 8) | |
888 | goto ran_out_of_registers_for_arguments; | |
889 | } | |
890 | argbytes = 0; | |
891 | --ii; | |
892 | } | |
893 | else { /* Argument can fit in one register. No problem. */ | |
894 | memset (®isters[REGISTER_BYTE(ii+3)], 0, sizeof(int)); | |
895 | memcpy (®isters[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len); | |
896 | } | |
897 | ++argno; | |
898 | } | |
899 | ||
900 | ran_out_of_registers_for_arguments: | |
901 | ||
902 | #ifdef USE_GENERIC_DUMMY_FRAMES | |
903 | saved_sp = read_sp (); | |
904 | #else | |
905 | /* location for 8 parameters are always reserved. */ | |
906 | sp -= 4 * 8; | |
907 | ||
908 | /* another six words for back chain, TOC register, link register, etc. */ | |
909 | sp -= 24; | |
910 | #endif /* GENERIC_DUMMY_FRAMES */ | |
911 | /* if there are more arguments, allocate space for them in | |
912 | the stack, then push them starting from the ninth one. */ | |
913 | ||
914 | if ((argno < nargs) || argbytes) { | |
915 | int space = 0, jj; | |
916 | ||
917 | if (argbytes) { | |
918 | space += ((len - argbytes + 3) & -4); | |
919 | jj = argno + 1; | |
920 | } | |
921 | else | |
922 | jj = argno; | |
923 | ||
924 | for (; jj < nargs; ++jj) { | |
925 | value_ptr val = args[jj]; | |
926 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; | |
927 | } | |
928 | ||
929 | /* add location required for the rest of the parameters */ | |
930 | space = (space + 7) & -8; | |
931 | sp -= space; | |
932 | ||
933 | /* This is another instance we need to be concerned about securing our | |
934 | stack space. If we write anything underneath %sp (r1), we might conflict | |
935 | with the kernel who thinks he is free to use this area. So, update %sp | |
936 | first before doing anything else. */ | |
937 | ||
938 | write_register (SP_REGNUM, sp); | |
939 | ||
940 | /* if the last argument copied into the registers didn't fit there | |
941 | completely, push the rest of it into stack. */ | |
942 | ||
943 | if (argbytes) { | |
944 | write_memory (sp+24+(ii*4), | |
945 | ((char*)VALUE_CONTENTS (arg))+argbytes, | |
946 | len - argbytes); | |
947 | ++argno; | |
948 | ii += ((len - argbytes + 3) & -4) / 4; | |
949 | } | |
950 | ||
951 | /* push the rest of the arguments into stack. */ | |
952 | for (; argno < nargs; ++argno) { | |
953 | ||
954 | arg = args[argno]; | |
955 | type = check_typedef (VALUE_TYPE (arg)); | |
956 | len = TYPE_LENGTH (type); | |
957 | ||
958 | ||
959 | /* float types should be passed in fpr's, as well as in the stack. */ | |
960 | if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) { | |
961 | ||
962 | if (len > 8) | |
963 | printf_unfiltered ( | |
964 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
965 | ||
966 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], | |
967 | VALUE_CONTENTS (arg), | |
968 | len); | |
969 | ++f_argno; | |
970 | } | |
971 | ||
972 | write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len); | |
973 | ii += ((len + 3) & -4) / 4; | |
974 | } | |
975 | } | |
976 | else | |
977 | /* Secure stack areas first, before doing anything else. */ | |
978 | write_register (SP_REGNUM, sp); | |
979 | ||
980 | #ifndef USE_GENERIC_DUMMY_FRAMES | |
981 | /* we want to copy 24 bytes of target's frame to dummy's frame, | |
982 | then set back chain to point to new frame. */ | |
983 | ||
984 | saved_sp = dummy_frame_addr [dummy_frame_count - 1]; | |
985 | read_memory (saved_sp, tmp_buffer, 24); | |
986 | write_memory (sp, tmp_buffer, 24); | |
987 | #endif /* GENERIC_DUMMY_FRAMES */ | |
988 | ||
989 | /* set back chain properly */ | |
990 | store_address (tmp_buffer, 4, saved_sp); | |
991 | write_memory (sp, tmp_buffer, 4); | |
992 | ||
993 | target_store_registers (-1); | |
994 | return sp; | |
995 | } | |
996 | #ifdef ELF_OBJECT_FORMAT | |
997 | ||
998 | /* Function: ppc_push_return_address (pc, sp) | |
999 | Set up the return address for the inferior function call. */ | |
1000 | ||
1001 | CORE_ADDR | |
1002 | ppc_push_return_address (pc, sp) | |
1003 | CORE_ADDR pc; | |
1004 | CORE_ADDR sp; | |
1005 | { | |
1006 | write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ()); | |
1007 | return sp; | |
1008 | } | |
1009 | ||
1010 | #endif | |
1011 | ||
1012 | /* a given return value in `regbuf' with a type `valtype', extract and copy its | |
1013 | value into `valbuf' */ | |
1014 | ||
1015 | void | |
1016 | extract_return_value (valtype, regbuf, valbuf) | |
1017 | struct type *valtype; | |
1018 | char regbuf[REGISTER_BYTES]; | |
1019 | char *valbuf; | |
1020 | { | |
1021 | int offset = 0; | |
1022 | ||
1023 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) { | |
1024 | ||
1025 | double dd; float ff; | |
1026 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
1027 | We need to truncate the return value into float size (4 byte) if | |
1028 | necessary. */ | |
1029 | ||
1030 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ | |
1031 | memcpy (valbuf, | |
1032 | ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], | |
1033 | TYPE_LENGTH (valtype)); | |
1034 | else { /* float */ | |
1035 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); | |
1036 | ff = (float)dd; | |
1037 | memcpy (valbuf, &ff, sizeof(float)); | |
1038 | } | |
1039 | } | |
1040 | else { | |
1041 | /* return value is copied starting from r3. */ | |
1042 | if (TARGET_BYTE_ORDER == BIG_ENDIAN | |
1043 | && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3)) | |
1044 | offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype); | |
1045 | ||
1046 | memcpy (valbuf, | |
1047 | regbuf + REGISTER_BYTE (3) + offset, | |
1048 | TYPE_LENGTH (valtype)); | |
1049 | } | |
1050 | } | |
1051 | ||
1052 | ||
1053 | /* keep structure return address in this variable. | |
1054 | FIXME: This is a horrid kludge which should not be allowed to continue | |
1055 | living. This only allows a single nested call to a structure-returning | |
1056 | function. Come on, guys! -- [email protected], Aug 92 */ | |
1057 | ||
1058 | CORE_ADDR rs6000_struct_return_address; | |
1059 | ||
1060 | ||
1061 | /* Indirect function calls use a piece of trampoline code to do context | |
1062 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
1063 | its first instruction (as when we have single-stepped to here). | |
1064 | Also skip shared library trampoline code (which is different from | |
1065 | indirect function call trampolines). | |
1066 | Result is desired PC to step until, or NULL if we are not in | |
1067 | trampoline code. */ | |
1068 | ||
1069 | CORE_ADDR | |
1070 | skip_trampoline_code (pc) | |
1071 | CORE_ADDR pc; | |
1072 | { | |
1073 | register unsigned int ii, op; | |
1074 | CORE_ADDR solib_target_pc; | |
1075 | ||
1076 | static unsigned trampoline_code[] = { | |
1077 | 0x800b0000, /* l r0,0x0(r11) */ | |
1078 | 0x90410014, /* st r2,0x14(r1) */ | |
1079 | 0x7c0903a6, /* mtctr r0 */ | |
1080 | 0x804b0004, /* l r2,0x4(r11) */ | |
1081 | 0x816b0008, /* l r11,0x8(r11) */ | |
1082 | 0x4e800420, /* bctr */ | |
1083 | 0x4e800020, /* br */ | |
1084 | 0 | |
1085 | }; | |
1086 | ||
1087 | /* If pc is in a shared library trampoline, return its target. */ | |
1088 | solib_target_pc = find_solib_trampoline_target (pc); | |
1089 | if (solib_target_pc) | |
1090 | return solib_target_pc; | |
1091 | ||
1092 | for (ii=0; trampoline_code[ii]; ++ii) { | |
1093 | op = read_memory_integer (pc + (ii*4), 4); | |
1094 | if (op != trampoline_code [ii]) | |
1095 | return 0; | |
1096 | } | |
1097 | ii = read_register (11); /* r11 holds destination addr */ | |
1098 | pc = read_memory_integer (ii, 4); /* (r11) value */ | |
1099 | return pc; | |
1100 | } | |
1101 | ||
1102 | /* Determines whether the function FI has a frame on the stack or not. */ | |
1103 | ||
1104 | int | |
1105 | frameless_function_invocation (fi) | |
1106 | struct frame_info *fi; | |
1107 | { | |
1108 | CORE_ADDR func_start; | |
1109 | struct rs6000_framedata fdata; | |
1110 | ||
1111 | /* Don't even think about framelessness except on the innermost frame | |
1112 | or if the function was interrupted by a signal. */ | |
1113 | if (fi->next != NULL && !fi->next->signal_handler_caller) | |
1114 | return 0; | |
1115 | ||
1116 | func_start = get_pc_function_start (fi->pc); | |
1117 | ||
1118 | /* If we failed to find the start of the function, it is a mistake | |
1119 | to inspect the instructions. */ | |
1120 | ||
1121 | if (!func_start) | |
1122 | { | |
1123 | /* A frame with a zero PC is usually created by dereferencing a NULL | |
1124 | function pointer, normally causing an immediate core dump of the | |
1125 | inferior. Mark function as frameless, as the inferior has no chance | |
1126 | of setting up a stack frame. */ | |
1127 | if (fi->pc == 0) | |
1128 | return 1; | |
1129 | else | |
1130 | return 0; | |
1131 | } | |
1132 | ||
1133 | (void) skip_prologue (func_start, &fdata); | |
1134 | return fdata.frameless; | |
1135 | } | |
1136 | ||
1137 | /* Return the PC saved in a frame */ | |
1138 | ||
1139 | unsigned long | |
1140 | frame_saved_pc (fi) | |
1141 | struct frame_info *fi; | |
1142 | { | |
1143 | CORE_ADDR func_start; | |
1144 | struct rs6000_framedata fdata; | |
1145 | ||
1146 | if (fi->signal_handler_caller) | |
1147 | return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4); | |
1148 | ||
1149 | #ifdef USE_GENERIC_DUMMY_FRAMES | |
1150 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
1151 | return generic_read_register_dummy(fi->pc, fi->frame, PC_REGNUM); | |
1152 | #endif /* GENERIC_DUMMY_FRAMES */ | |
1153 | ||
1154 | func_start = get_pc_function_start (fi->pc); | |
1155 | ||
1156 | /* If we failed to find the start of the function, it is a mistake | |
1157 | to inspect the instructions. */ | |
1158 | if (!func_start) | |
1159 | return 0; | |
1160 | ||
1161 | (void) skip_prologue (func_start, &fdata); | |
1162 | ||
1163 | if (fdata.lr_offset == 0 && fi->next != NULL) | |
1164 | { | |
1165 | if (fi->next->signal_handler_caller) | |
1166 | return read_memory_integer (fi->next->frame + SIG_FRAME_LR_OFFSET, 4); | |
1167 | else | |
1168 | return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE, | |
1169 | 4); | |
1170 | } | |
1171 | ||
1172 | if (fdata.lr_offset == 0) | |
1173 | return read_register (LR_REGNUM); | |
1174 | ||
1175 | return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4); | |
1176 | } | |
1177 | ||
1178 | /* If saved registers of frame FI are not known yet, read and cache them. | |
1179 | &FDATAP contains rs6000_framedata; TDATAP can be NULL, | |
1180 | in which case the framedata are read. */ | |
1181 | ||
1182 | static void | |
1183 | frame_get_saved_regs (fi, fdatap) | |
1184 | struct frame_info *fi; | |
1185 | struct rs6000_framedata *fdatap; | |
1186 | { | |
1187 | int ii; | |
1188 | CORE_ADDR frame_addr; | |
1189 | struct rs6000_framedata work_fdata; | |
1190 | ||
1191 | if (fi->saved_regs) | |
1192 | return; | |
1193 | ||
1194 | if (fdatap == NULL) | |
1195 | { | |
1196 | fdatap = &work_fdata; | |
1197 | (void) skip_prologue (get_pc_function_start (fi->pc), fdatap); | |
1198 | } | |
1199 | ||
1200 | frame_saved_regs_zalloc (fi); | |
1201 | ||
1202 | /* If there were any saved registers, figure out parent's stack | |
1203 | pointer. */ | |
1204 | /* The following is true only if the frame doesn't have a call to | |
1205 | alloca(), FIXME. */ | |
1206 | ||
1207 | if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0 | |
1208 | && fdatap->lr_offset == 0 && fdatap->cr_offset == 0) | |
1209 | frame_addr = 0; | |
1210 | else if (fi->prev && fi->prev->frame) | |
1211 | frame_addr = fi->prev->frame; | |
1212 | else | |
1213 | frame_addr = read_memory_integer (fi->frame, 4); | |
1214 | ||
1215 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. | |
1216 | All fpr's from saved_fpr to fp31 are saved. */ | |
1217 | ||
1218 | if (fdatap->saved_fpr >= 0) | |
1219 | { | |
1220 | int i; | |
1221 | int fpr_offset = frame_addr + fdatap->fpr_offset; | |
1222 | for (i = fdatap->saved_fpr; i < 32; i++) | |
1223 | { | |
1224 | fi->saved_regs [FP0_REGNUM + i] = fpr_offset; | |
1225 | fpr_offset += 8; | |
1226 | } | |
1227 | } | |
1228 | ||
1229 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
1230 | All gpr's from saved_gpr to gpr31 are saved. */ | |
1231 | ||
1232 | if (fdatap->saved_gpr >= 0) | |
1233 | { | |
1234 | int i; | |
1235 | int gpr_offset = frame_addr + fdatap->gpr_offset; | |
1236 | for (i = fdatap->saved_gpr; i < 32; i++) | |
1237 | { | |
1238 | fi->saved_regs [i] = gpr_offset; | |
1239 | gpr_offset += 4; | |
1240 | } | |
1241 | } | |
1242 | ||
1243 | /* If != 0, fdatap->cr_offset is the offset from the frame that holds | |
1244 | the CR. */ | |
1245 | if (fdatap->cr_offset != 0) | |
1246 | fi->saved_regs [CR_REGNUM] = frame_addr + fdatap->cr_offset; | |
1247 | ||
1248 | /* If != 0, fdatap->lr_offset is the offset from the frame that holds | |
1249 | the LR. */ | |
1250 | if (fdatap->lr_offset != 0) | |
1251 | fi->saved_regs [LR_REGNUM] = frame_addr + fdatap->lr_offset; | |
1252 | } | |
1253 | ||
1254 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1255 | was first allocated. For functions calling alloca(), it might be saved in | |
1256 | an alloca register. */ | |
1257 | ||
1258 | static CORE_ADDR | |
1259 | frame_initial_stack_address (fi) | |
1260 | struct frame_info *fi; | |
1261 | { | |
1262 | CORE_ADDR tmpaddr; | |
1263 | struct rs6000_framedata fdata; | |
1264 | struct frame_info *callee_fi; | |
1265 | ||
1266 | /* if the initial stack pointer (frame address) of this frame is known, | |
1267 | just return it. */ | |
1268 | ||
1269 | if (fi->extra_info->initial_sp) | |
1270 | return fi->extra_info->initial_sp; | |
1271 | ||
1272 | /* find out if this function is using an alloca register.. */ | |
1273 | ||
1274 | (void) skip_prologue (get_pc_function_start (fi->pc), &fdata); | |
1275 | ||
1276 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1277 | ||
1278 | if (!fi->saved_regs) | |
1279 | frame_get_saved_regs (fi, &fdata); | |
1280 | ||
1281 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1282 | this frame, and it is good enough. */ | |
1283 | ||
1284 | if (fdata.alloca_reg < 0) | |
1285 | { | |
1286 | fi->extra_info->initial_sp = fi->frame; | |
1287 | return fi->extra_info->initial_sp; | |
1288 | } | |
1289 | ||
1290 | /* This function has an alloca register. If this is the top-most frame | |
1291 | (with the lowest address), the value in alloca register is good. */ | |
1292 | ||
1293 | if (!fi->next) | |
1294 | return fi->extra_info->initial_sp = read_register (fdata.alloca_reg); | |
1295 | ||
1296 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1297 | registers, but there are exceptions (such as when the callee | |
1298 | has no parameters). Find the address in which caller's alloca | |
1299 | register is saved. */ | |
1300 | ||
1301 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) { | |
1302 | ||
1303 | if (!callee_fi->saved_regs) | |
1304 | frame_get_saved_regs (callee_fi, NULL); | |
1305 | ||
1306 | /* this is the address in which alloca register is saved. */ | |
1307 | ||
1308 | tmpaddr = callee_fi->saved_regs [fdata.alloca_reg]; | |
1309 | if (tmpaddr) { | |
1310 | fi->extra_info->initial_sp = read_memory_integer (tmpaddr, 4); | |
1311 | return fi->extra_info->initial_sp; | |
1312 | } | |
1313 | ||
1314 | /* Go look into deeper levels of the frame chain to see if any one of | |
1315 | the callees has saved alloca register. */ | |
1316 | } | |
1317 | ||
1318 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1319 | then the value in the register is still good. */ | |
1320 | ||
1321 | fi->extra_info->initial_sp = read_register (fdata.alloca_reg); | |
1322 | return fi->extra_info->initial_sp; | |
1323 | } | |
1324 | ||
1325 | CORE_ADDR | |
1326 | rs6000_frame_chain (thisframe) | |
1327 | struct frame_info *thisframe; | |
1328 | { | |
1329 | CORE_ADDR fp; | |
1330 | ||
1331 | #ifdef USE_GENERIC_DUMMY_FRAMES | |
1332 | if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame)) | |
1333 | return thisframe->frame; /* dummy frame same as caller's frame */ | |
1334 | #endif /* GENERIC_DUMMY_FRAMES */ | |
1335 | ||
1336 | if (inside_entry_file (thisframe->pc) || | |
1337 | thisframe->pc == entry_point_address ()) | |
1338 | return 0; | |
1339 | ||
1340 | if (thisframe->signal_handler_caller) | |
1341 | fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4); | |
1342 | else if (thisframe->next != NULL | |
1343 | && thisframe->next->signal_handler_caller | |
1344 | && frameless_function_invocation (thisframe)) | |
1345 | /* A frameless function interrupted by a signal did not change the | |
1346 | frame pointer. */ | |
1347 | fp = FRAME_FP (thisframe); | |
1348 | else | |
1349 | fp = read_memory_integer ((thisframe)->frame, 4); | |
1350 | ||
1351 | #ifdef USE_GENERIC_DUMMY_FRAMES | |
1352 | { | |
1353 | CORE_ADDR fpp, lr; | |
1354 | ||
1355 | lr = read_register (LR_REGNUM); | |
1356 | if (lr == entry_point_address ()) | |
1357 | if (fp != 0 && (fpp = read_memory_integer (fp, 4)) != 0) | |
1358 | if (PC_IN_CALL_DUMMY (lr, fpp, fpp)) | |
1359 | return fpp; | |
1360 | } | |
1361 | #endif /* GENERIC_DUMMY_FRAMES */ | |
1362 | return fp; | |
1363 | } | |
1364 | \f | |
1365 | /* Return nonzero if ADDR (a function pointer) is in the data space and | |
1366 | is therefore a special function pointer. */ | |
1367 | ||
1368 | int | |
1369 | is_magic_function_pointer (addr) | |
1370 | CORE_ADDR addr; | |
1371 | { | |
1372 | struct obj_section *s; | |
1373 | ||
1374 | s = find_pc_section (addr); | |
1375 | if (s && s->the_bfd_section->flags & SEC_CODE) | |
1376 | return 0; | |
1377 | else | |
1378 | return 1; | |
1379 | } | |
1380 | ||
1381 | #ifdef GDB_TARGET_POWERPC | |
1382 | int | |
1383 | gdb_print_insn_powerpc (memaddr, info) | |
1384 | bfd_vma memaddr; | |
1385 | disassemble_info *info; | |
1386 | { | |
1387 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
1388 | return print_insn_big_powerpc (memaddr, info); | |
1389 | else | |
1390 | return print_insn_little_powerpc (memaddr, info); | |
1391 | } | |
1392 | #endif | |
1393 | ||
1394 | /* Function: get_saved_register | |
1395 | Just call the generic_get_saved_register function. */ | |
1396 | ||
1397 | #ifdef USE_GENERIC_DUMMY_FRAMES | |
1398 | void | |
1399 | get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval) | |
1400 | char *raw_buffer; | |
1401 | int *optimized; | |
1402 | CORE_ADDR *addrp; | |
1403 | struct frame_info *frame; | |
1404 | int regnum; | |
1405 | enum lval_type *lval; | |
1406 | { | |
1407 | generic_get_saved_register (raw_buffer, optimized, addrp, | |
1408 | frame, regnum, lval); | |
1409 | } | |
1410 | #endif | |
1411 | ||
1412 | ||
1413 | \f | |
1414 | /* Handling the various PowerPC/RS6000 variants. */ | |
1415 | ||
1416 | ||
1417 | /* The arrays here called register_names_MUMBLE hold names that | |
1418 | the rs6000_register_name function returns. | |
1419 | ||
1420 | For each family of PPC variants, I've tried to isolate out the | |
1421 | common registers and put them up front, so that as long as you get | |
1422 | the general family right, GDB will correctly identify the registers | |
1423 | common to that family. The common register sets are: | |
1424 | ||
1425 | For the 60x family: hid0 hid1 iabr dabr pir | |
1426 | ||
1427 | For the 505 and 860 family: eie eid nri | |
1428 | ||
1429 | For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi | |
1430 | tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1 | |
1431 | pbu1 pbl2 pbu2 | |
1432 | ||
1433 | Most of these register groups aren't anything formal. I arrived at | |
1434 | them by looking at the registers that occurred in more than one | |
1435 | processor. */ | |
1436 | ||
1437 | /* UISA register names common across all architectures, including POWER. */ | |
1438 | ||
1439 | #define COMMON_UISA_REG_NAMES \ | |
1440 | /* 0 */ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ | |
1441 | /* 8 */ "r8", "r9", "r10","r11","r12","r13","r14","r15", \ | |
1442 | /* 16 */ "r16","r17","r18","r19","r20","r21","r22","r23", \ | |
1443 | /* 24 */ "r24","r25","r26","r27","r28","r29","r30","r31", \ | |
1444 | /* 32 */ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ | |
1445 | /* 40 */ "f8", "f9", "f10","f11","f12","f13","f14","f15", \ | |
1446 | /* 48 */ "f16","f17","f18","f19","f20","f21","f22","f23", \ | |
1447 | /* 56 */ "f24","f25","f26","f27","f28","f29","f30","f31", \ | |
1448 | /* 64 */ "pc", "ps" | |
1449 | ||
1450 | /* UISA-level SPR names for PowerPC. */ | |
1451 | #define PPC_UISA_SPR_NAMES \ | |
1452 | /* 66 */ "cr", "lr", "ctr", "xer", "" | |
1453 | ||
1454 | /* Segment register names, for PowerPC. */ | |
1455 | #define PPC_SEGMENT_REG_NAMES \ | |
1456 | /* 71 */ "sr0", "sr1", "sr2", "sr3", "sr4", "sr5", "sr6", "sr7", \ | |
1457 | /* 79 */ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15" | |
1458 | ||
1459 | /* OEA SPR names for 32-bit PowerPC implementations. | |
1460 | The blank space is for "asr", which is only present on 64-bit | |
1461 | implementations. */ | |
1462 | #define PPC_32_OEA_SPR_NAMES \ | |
1463 | /* 87 */ "pvr", \ | |
1464 | /* 88 */ "ibat0u", "ibat0l", "ibat1u", "ibat1l", \ | |
1465 | /* 92 */ "ibat2u", "ibat2l", "ibat3u", "ibat3l", \ | |
1466 | /* 96 */ "dbat0u", "dbat0l", "dbat1u", "dbat1l", \ | |
1467 | /* 100 */ "dbat2u", "dbat2l", "dbat3u", "dbat3l", \ | |
1468 | /* 104 */ "sdr1", "", "dar", "dsisr", "sprg0", "sprg1", "sprg2", "sprg3",\ | |
1469 | /* 112 */ "srr0", "srr1", "tbl", "tbu", "dec", "dabr", "ear" | |
1470 | ||
1471 | /* For the RS6000, we only cover user-level SPR's. */ | |
1472 | char *register_names_rs6000[] = | |
1473 | { | |
1474 | COMMON_UISA_REG_NAMES, | |
1475 | /* 66 */ "cnd", "lr", "cnt", "xer", "mq" | |
1476 | }; | |
1477 | ||
1478 | /* a UISA-only view of the PowerPC. */ | |
1479 | char *register_names_uisa[] = | |
1480 | { | |
1481 | COMMON_UISA_REG_NAMES, | |
1482 | PPC_UISA_SPR_NAMES | |
1483 | }; | |
1484 | ||
1485 | char *register_names_403[] = | |
1486 | { | |
1487 | COMMON_UISA_REG_NAMES, | |
1488 | PPC_UISA_SPR_NAMES, | |
1489 | PPC_SEGMENT_REG_NAMES, | |
1490 | PPC_32_OEA_SPR_NAMES, | |
1491 | /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit", | |
1492 | /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2", | |
1493 | /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2" | |
1494 | }; | |
1495 | ||
1496 | char *register_names_403GC[] = | |
1497 | { | |
1498 | COMMON_UISA_REG_NAMES, | |
1499 | PPC_UISA_SPR_NAMES, | |
1500 | PPC_SEGMENT_REG_NAMES, | |
1501 | PPC_32_OEA_SPR_NAMES, | |
1502 | /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit", | |
1503 | /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2", | |
1504 | /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2", | |
1505 | /* 143 */ "zpr", "pid", "sgr", "dcwr", "tbhu", "tblu" | |
1506 | }; | |
1507 | ||
1508 | char *register_names_505[] = | |
1509 | { | |
1510 | COMMON_UISA_REG_NAMES, | |
1511 | PPC_UISA_SPR_NAMES, | |
1512 | PPC_SEGMENT_REG_NAMES, | |
1513 | PPC_32_OEA_SPR_NAMES, | |
1514 | /* 119 */ "eie", "eid", "nri" | |
1515 | }; | |
1516 | ||
1517 | char *register_names_860[] = | |
1518 | { | |
1519 | COMMON_UISA_REG_NAMES, | |
1520 | PPC_UISA_SPR_NAMES, | |
1521 | PPC_SEGMENT_REG_NAMES, | |
1522 | PPC_32_OEA_SPR_NAMES, | |
1523 | /* 119 */ "eie", "eid", "nri", "cmpa", "cmpb", "cmpc", "cmpd", "icr", | |
1524 | /* 127 */ "der", "counta", "countb", "cmpe", "cmpf", "cmpg", "cmph", | |
1525 | /* 134 */ "lctrl1", "lctrl2", "ictrl", "bar", "ic_cst", "ic_adr", "ic_dat", | |
1526 | /* 141 */ "dc_cst", "dc_adr", "dc_dat", "dpdr", "dpir", "immr", "mi_ctr", | |
1527 | /* 148 */ "mi_ap", "mi_epn", "mi_twc", "mi_rpn", "md_ctr", "m_casid", | |
1528 | /* 154 */ "md_ap", "md_epn", "md_twb", "md_twc", "md_rpn", "m_tw", | |
1529 | /* 160 */ "mi_dbcam", "mi_dbram0", "mi_dbram1", "md_dbcam", "md_dbram0", | |
1530 | /* 165 */ "md_dbram1" | |
1531 | }; | |
1532 | ||
1533 | /* Note that the 601 has different register numbers for reading and | |
1534 | writing RTCU and RTCL. However, how one reads and writes a | |
1535 | register is the stub's problem. */ | |
1536 | char *register_names_601[] = | |
1537 | { | |
1538 | COMMON_UISA_REG_NAMES, | |
1539 | PPC_UISA_SPR_NAMES, | |
1540 | PPC_SEGMENT_REG_NAMES, | |
1541 | PPC_32_OEA_SPR_NAMES, | |
1542 | /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mq", "rtcu", | |
1543 | /* 126 */ "rtcl" | |
1544 | }; | |
1545 | ||
1546 | char *register_names_602[] = | |
1547 | { | |
1548 | COMMON_UISA_REG_NAMES, | |
1549 | PPC_UISA_SPR_NAMES, | |
1550 | PPC_SEGMENT_REG_NAMES, | |
1551 | PPC_32_OEA_SPR_NAMES, | |
1552 | /* 119 */ "hid0", "hid1", "iabr", "", "", "tcr", "ibr", "esassr", "sebr", | |
1553 | /* 128 */ "ser", "sp", "lt" | |
1554 | }; | |
1555 | ||
1556 | char *register_names_603[] = | |
1557 | { | |
1558 | COMMON_UISA_REG_NAMES, | |
1559 | PPC_UISA_SPR_NAMES, | |
1560 | PPC_SEGMENT_REG_NAMES, | |
1561 | PPC_32_OEA_SPR_NAMES, | |
1562 | /* 119 */ "hid0", "hid1", "iabr", "", "", "dmiss", "dcmp", "hash1", | |
1563 | /* 127 */ "hash2", "imiss", "icmp", "rpa" | |
1564 | }; | |
1565 | ||
1566 | char *register_names_604[] = | |
1567 | { | |
1568 | COMMON_UISA_REG_NAMES, | |
1569 | PPC_UISA_SPR_NAMES, | |
1570 | PPC_SEGMENT_REG_NAMES, | |
1571 | PPC_32_OEA_SPR_NAMES, | |
1572 | /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mmcr0", "pmc1", "pmc2", | |
1573 | /* 127 */ "sia", "sda" | |
1574 | }; | |
1575 | ||
1576 | char *register_names_750[] = | |
1577 | { | |
1578 | COMMON_UISA_REG_NAMES, | |
1579 | PPC_UISA_SPR_NAMES, | |
1580 | PPC_SEGMENT_REG_NAMES, | |
1581 | PPC_32_OEA_SPR_NAMES, | |
1582 | /* 119 */ "hid0", "hid1", "iabr", "dabr", "", "ummcr0", "upmc1", "upmc2", | |
1583 | /* 127 */ "usia", "ummcr1", "upmc3", "upmc4", "mmcr0", "pmc1", "pmc2", | |
1584 | /* 134 */ "sia", "mmcr1", "pmc3", "pmc4", "l2cr", "ictc", "thrm1", "thrm2", | |
1585 | /* 142 */ "thrm3" | |
1586 | }; | |
1587 | ||
1588 | ||
1589 | /* Information about a particular processor variant. */ | |
1590 | struct variant | |
1591 | { | |
1592 | /* Name of this variant. */ | |
1593 | char *name; | |
1594 | ||
1595 | /* English description of the variant. */ | |
1596 | char *description; | |
1597 | ||
1598 | /* Table of register names; registers[R] is the name of the register | |
1599 | number R. */ | |
1600 | int num_registers; | |
1601 | char **registers; | |
1602 | }; | |
1603 | ||
1604 | #define num_registers(list) (sizeof (list) / sizeof((list)[0])) | |
1605 | ||
1606 | ||
1607 | /* Information in this table comes from the following web sites: | |
1608 | IBM: http://www.chips.ibm.com:80/products/embedded/ | |
1609 | Motorola: http://www.mot.com/SPS/PowerPC/ | |
1610 | ||
1611 | I'm sure I've got some of the variant descriptions not quite right. | |
1612 | Please report any inaccuracies you find to GDB's maintainer. | |
1613 | ||
1614 | If you add entries to this table, please be sure to allow the new | |
1615 | value as an argument to the --with-cpu flag, in configure.in. */ | |
1616 | ||
1617 | static struct variant | |
1618 | variants[] = | |
1619 | { | |
1620 | { "ppc-uisa", "PowerPC UISA - a PPC processor as viewed by user-level code", | |
1621 | num_registers (register_names_uisa), register_names_uisa }, | |
1622 | { "rs6000", "IBM RS6000 (\"POWER\") architecture, user-level view", | |
1623 | num_registers (register_names_rs6000), register_names_rs6000 }, | |
1624 | { "403", "IBM PowerPC 403", | |
1625 | num_registers (register_names_403), register_names_403 }, | |
1626 | { "403GC", "IBM PowerPC 403GC", | |
1627 | num_registers (register_names_403GC), register_names_403GC }, | |
1628 | { "505", "Motorola PowerPC 505", | |
1629 | num_registers (register_names_505), register_names_505 }, | |
1630 | { "860", "Motorola PowerPC 860 or 850", | |
1631 | num_registers (register_names_860), register_names_860 }, | |
1632 | { "601", "Motorola PowerPC 601", | |
1633 | num_registers (register_names_601), register_names_601 }, | |
1634 | { "602", "Motorola PowerPC 602", | |
1635 | num_registers (register_names_602), register_names_602 }, | |
1636 | { "603", "Motorola/IBM PowerPC 603 or 603e", | |
1637 | num_registers (register_names_603), register_names_603 }, | |
1638 | { "604", "Motorola PowerPC 604 or 604e", | |
1639 | num_registers (register_names_604), register_names_604 }, | |
1640 | { "750", "Motorola/IBM PowerPC 750 or 750", | |
1641 | num_registers (register_names_750), register_names_750 }, | |
1642 | { 0, 0, 0, 0 } | |
1643 | }; | |
1644 | ||
1645 | ||
1646 | static struct variant *current_variant; | |
1647 | ||
1648 | char * | |
1649 | rs6000_register_name (int i) | |
1650 | { | |
1651 | if (i < 0 || i >= NUM_REGS) | |
1652 | error ("GDB bug: rs6000-tdep.c (rs6000_register_name): strange register number"); | |
1653 | ||
1654 | return ((i < current_variant->num_registers) | |
1655 | ? current_variant->registers[i] | |
1656 | : ""); | |
1657 | } | |
1658 | ||
1659 | ||
1660 | static void | |
1661 | install_variant (struct variant *v) | |
1662 | { | |
1663 | current_variant = v; | |
1664 | } | |
1665 | ||
1666 | ||
1667 | /* Look up the variant named NAME in the `variants' table. Return a | |
1668 | pointer to the struct variant, or null if we couldn't find it. */ | |
1669 | static struct variant * | |
1670 | find_variant_by_name (char *name) | |
1671 | { | |
1672 | int i; | |
1673 | ||
1674 | for (i = 0; variants[i].name; i++) | |
1675 | if (! strcmp (name, variants[i].name)) | |
1676 | return &variants[i]; | |
1677 | ||
1678 | return 0; | |
1679 | } | |
1680 | ||
1681 | ||
1682 | /* Install the PPC/RS6000 variant named NAME in the `variants' table. | |
1683 | Return zero if we installed it successfully, or a non-zero value if | |
1684 | we couldn't do it. | |
1685 | ||
1686 | This might be useful to code outside this file, which doesn't want | |
1687 | to depend on the exact indices of the entries in the `variants' | |
1688 | table. Just make it non-static if you want that. */ | |
1689 | static int | |
1690 | install_variant_by_name (char *name) | |
1691 | { | |
1692 | struct variant *v = find_variant_by_name (name); | |
1693 | ||
1694 | if (v) | |
1695 | { | |
1696 | install_variant (v); | |
1697 | return 0; | |
1698 | } | |
1699 | else | |
1700 | return 1; | |
1701 | } | |
1702 | ||
1703 | ||
1704 | static void | |
1705 | list_variants () | |
1706 | { | |
1707 | int i; | |
1708 | ||
1709 | printf_filtered ("GDB knows about the following PowerPC and RS6000 variants:\n"); | |
1710 | ||
1711 | for (i = 0; variants[i].name; i++) | |
1712 | printf_filtered (" %-8s %s\n", | |
1713 | variants[i].name, variants[i].description); | |
1714 | } | |
1715 | ||
1716 | ||
1717 | static void | |
1718 | show_current_variant () | |
1719 | { | |
1720 | printf_filtered ("PowerPC / RS6000 processor variant is set to `%s'.\n", | |
1721 | current_variant->name); | |
1722 | } | |
1723 | ||
1724 | ||
1725 | static void | |
1726 | set_processor (char *arg, int from_tty) | |
1727 | { | |
1728 | int i; | |
1729 | ||
1730 | if (! arg || arg[0] == '\0') | |
1731 | { | |
1732 | list_variants (); | |
1733 | return; | |
1734 | } | |
1735 | ||
1736 | if (install_variant_by_name (arg)) | |
1737 | { | |
1738 | error_begin (); | |
1739 | fprintf_filtered (gdb_stderr, | |
1740 | "`%s' is not a recognized PowerPC / RS6000 variant name.\n\n", arg); | |
1741 | list_variants (); | |
1742 | return_to_top_level (RETURN_ERROR); | |
1743 | } | |
1744 | ||
1745 | show_current_variant (); | |
1746 | } | |
1747 | ||
1748 | static void | |
1749 | show_processor (char *arg, int from_tty) | |
1750 | { | |
1751 | show_current_variant (); | |
1752 | } | |
1753 | ||
1754 | ||
1755 | \f | |
1756 | /* Initialization code. */ | |
1757 | ||
1758 | void | |
1759 | _initialize_rs6000_tdep () | |
1760 | { | |
1761 | /* FIXME, this should not be decided via ifdef. */ | |
1762 | #ifdef GDB_TARGET_POWERPC | |
1763 | tm_print_insn = gdb_print_insn_powerpc; | |
1764 | #else | |
1765 | tm_print_insn = print_insn_rs6000; | |
1766 | #endif | |
1767 | ||
1768 | /* I don't think we should use the set/show command arrangement | |
1769 | here, because the way that's implemented makes it hard to do the | |
1770 | error checking we want in a reasonable way. So we just add them | |
1771 | as two separate commands. */ | |
1772 | add_cmd ("processor", class_support, set_processor, | |
1773 | "`set processor NAME' sets the PowerPC/RS6000 variant to NAME.\n\ | |
1774 | If you set this, GDB will know about the special-purpose registers that are\n\ | |
1775 | available on the given variant.\n\ | |
1776 | Type `set processor' alone for a list of recognized variant names.", | |
1777 | &setlist); | |
1778 | add_cmd ("processor", class_support, show_processor, | |
1779 | "Show the variant of the PowerPC or RS6000 processor in use.\n\ | |
1780 | Use `set processor' to change this.", | |
1781 | &showlist); | |
1782 | ||
1783 | /* Set the current PPC processor variant. */ | |
1784 | { | |
1785 | int status = 1; | |
1786 | ||
1787 | #ifdef TARGET_CPU_DEFAULT | |
1788 | status = install_variant_by_name (TARGET_CPU_DEFAULT); | |
1789 | #endif | |
1790 | ||
1791 | if (status) | |
1792 | { | |
1793 | #ifdef GDB_TARGET_POWERPC | |
1794 | install_variant_by_name ("ppc-uisa"); | |
1795 | #else | |
1796 | install_variant_by_name ("rs6000"); | |
1797 | #endif | |
1798 | } | |
1799 | } | |
1800 | } |