[binutils.git] / sim / mips / Makefile.in

#    Makefile template for Configure for the MIPS simulator.
#    Written by Cygnus Support.

SHELL = @SHELL@

## COMMON_PRE_CONFIG_FRAG

srcdir=@srcdir@
srcroot=$(srcdir)/../../

# Object files created by various simulator generators.


SIM_IGEN_OBJ = \
	support.o \
	itable.o \
	semantics.o \
	idecode.o \
	icache.o \
	@mips_igen_engine@ \
	irun.o \


SIM_M16_OBJ = \
	m16_support.o \
	m16_semantics.o \
	m16_idecode.o \
	m16_icache.o \
	\
	m32_support.o \
	m32_semantics.o \
	m32_idecode.o \
	m32_icache.o \
	\
	itable.o \
	m16run.o \

SIM_MULTI_OBJ = itable.o @sim_multi_obj@

MIPS_EXTRA_OBJS = @mips_extra_objs@
MIPS_EXTRA_LIBS = @mips_extra_libs@

SIM_OBJS = \
	$(SIM_@sim_gen@_OBJ) \
	$(SIM_NEW_COMMON_OBJS) \
	$(MIPS_EXTRA_OBJS) \
	cp1.o \
	interp.o \
	mdmx.o \
	sim-main.o \
	sim-hload.o \
	sim-engine.o \
	sim-stop.o \
	sim-resume.o \
	sim-reason.o \


# List of flags to always pass to $(CC).
SIM_SUBTARGET=@SIM_SUBTARGET@
SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET)

SIM_EXTRA_CLEAN = clean-extra
SIM_EXTRA_DISTCLEAN = distclean-extra

SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)

SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)

# List of main object files for `run'.
SIM_RUN_OBJS = nrun.o


## COMMON_POST_CONFIG_FRAG

interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h
cp1.o: $(srcdir)/cp1.c config.h sim-main.h

mdmx.o: $(srcdir)/mdmx.c $(srcdir)/sim-main.h

multi-run.o: multi-include.h tmp-mach-multi

../igen/igen:
	cd ../igen && $(MAKE)

IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
IGEN_INSN=$(srcdir)/mips.igen
IGEN_DC=$(srcdir)/mips.dc
M16_DC=$(srcdir)/m16.dc
IGEN_INCLUDE=\
	$(srcdir)/m16.igen \
	$(srcdir)/mdmx.igen \
	$(srcdir)/mips3d.igen \
	$(srcdir)/sb1.igen \
	$(srcdir)/tx.igen \
	$(srcdir)/vr.igen \

# NB:	Since these can be built by a number of generators, care
#	must be taken to ensure that they are only dependant on
#	one of those generators.
BUILT_SRC_FROM_GEN = \
	itable.h \
	itable.c \

SIM_IGEN_ALL = tmp-igen
SIM_M16_ALL = tmp-m16
SIM_MULTI_ALL = tmp-multi

$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)


BUILT_SRC_FROM_IGEN = \
	icache.h \
	icache.c \
	idecode.h \
	idecode.c \
	semantics.h \
	semantics.c \
	model.h \
	model.c \
	support.h \
	support.c \
	engine.h \
	engine.c \
	irun.c \

$(BUILT_SRC_FROM_IGEN): tmp-igen

tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
	cd ../igen && $(MAKE)
	../igen/igen \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		@sim_igen_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-B 32 \
		-H 31 \
		-i $(IGEN_INSN) \
		-o $(IGEN_DC) \
		-x \
		-n icache.h    -hc tmp-icache.h \
		-n icache.c    -c  tmp-icache.c \
		-n semantics.h -hs tmp-semantics.h \
		-n semantics.c -s  tmp-semantics.c \
		-n idecode.h   -hd tmp-idecode.h \
		-n idecode.c   -d  tmp-idecode.c \
		-n model.h     -hm tmp-model.h \
		-n model.c     -m  tmp-model.c \
		-n support.h   -hf tmp-support.h \
		-n support.c   -f  tmp-support.c \
		-n itable.h    -ht tmp-itable.h \
		-n itable.c    -t  tmp-itable.c \
		-n engine.h    -he tmp-engine.h \
		-n engine.c    -e  tmp-engine.c \
		-n irun.c      -r  tmp-irun.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
	touch tmp-igen

semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS)
engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS)
support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)


BUILT_SRC_FROM_M16 = \
	m16_icache.h \
	m16_icache.c \
	m16_idecode.h \
	m16_idecode.c \
	m16_semantics.h \
	m16_semantics.c \
	m16_model.h \
	m16_model.c \
	m16_support.h \
	m16_support.c \
	\
	m32_icache.h \
	m32_icache.c \
	m32_idecode.h \
	m32_idecode.c \
	m32_semantics.h \
	m32_semantics.c \
	m32_model.h \
	m32_model.c \
	m32_support.h \
	m32_support.c \

$(BUILT_SRC_FROM_M16): tmp-m16

tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
	cd ../igen && $(MAKE)
	../igen/igen \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		@sim_m16_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-B 16 \
		-H 15 \
		-i $(IGEN_INSN) \
		-o $(M16_DC) \
		-P m16_ \
		-x \
		-n m16_icache.h    -hc tmp-icache.h \
		-n m16_icache.c    -c  tmp-icache.c \
		-n m16_semantics.h -hs tmp-semantics.h \
		-n m16_semantics.c -s  tmp-semantics.c \
		-n m16_idecode.h   -hd tmp-idecode.h \
		-n m16_idecode.c   -d  tmp-idecode.c \
		-n m16_model.h     -hm tmp-model.h \
		-n m16_model.c     -m  tmp-model.c \
		-n m16_support.h   -hf tmp-support.h \
		-n m16_support.c   -f  tmp-support.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m16_model.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m16_model.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m16_support.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m16_support.c
	../igen/igen \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		@sim_igen_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-B 32 \
		-H 31 \
		-i $(IGEN_INSN) \
		-o $(IGEN_DC) \
		-P m32_ \
		-x \
		-n m32_icache.h    -hc tmp-icache.h \
		-n m32_icache.c    -c  tmp-icache.c \
		-n m32_semantics.h -hs tmp-semantics.h \
		-n m32_semantics.c -s  tmp-semantics.c \
		-n m32_idecode.h   -hd tmp-idecode.h \
		-n m32_idecode.c   -d  tmp-idecode.c \
		-n m32_model.h     -hm tmp-model.h \
		-n m32_model.c     -m  tmp-model.c \
		-n m32_support.h   -hf tmp-support.h \
		-n m32_support.c   -f  tmp-support.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m32_model.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m32_model.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m32_support.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m32_support.c
	../igen/igen \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		-Wnowidth \
		@sim_igen_flags@ @sim_m16_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-i $(IGEN_INSN) \
		-n itable.h    -ht tmp-itable.h \
		-n itable.c    -t  tmp-itable.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
	touch tmp-m16


BUILT_SRC_FROM_MULTI = @sim_multi_src@
SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@

$(BUILT_SRC_FROM_MULTI): tmp-multi
tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi targ-vals.h
tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
	for t in $(SIM_MULTI_IGEN_CONFIGS); do \
	  p=`echo $${t} | sed -e 's/:.*//'` ; \
	  m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
	  f=`echo $${t} | sed -e 's/.*://'` ; \
	  case $${p} in \
	    m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
	    *) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
	  esac; \
	  ../igen/igen \
		$(IGEN_TRACE) \
		$${e} \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		-N 0 \
		-M $${m} \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-i $(IGEN_INSN) \
		-P $${p}_ \
		-x \
		-n $${p}_icache.h    -hc tmp-icache.h \
		-n $${p}_icache.c    -c  tmp-icache.c \
		-n $${p}_semantics.h -hs tmp-semantics.h \
		-n $${p}_semantics.c -s  tmp-semantics.c \
		-n $${p}_idecode.h   -hd tmp-idecode.h \
		-n $${p}_idecode.c   -d  tmp-idecode.c \
		-n $${p}_model.h     -hm tmp-model.h \
		-n $${p}_model.c     -m  tmp-model.c \
		-n $${p}_support.h   -hf tmp-support.h \
		-n $${p}_support.c   -f  tmp-support.c \
		-n $${p}_engine.h    -he tmp-engine.h \
		-n $${p}_engine.c    -e  tmp-engine.c \
		; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h $${p}_icache.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c $${p}_icache.c ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h $${p}_idecode.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c $${p}_idecode.c ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h $${p}_semantics.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c $${p}_semantics.c ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-model.h $${p}_model.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-model.c $${p}_model.c ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-support.h $${p}_support.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-support.c $${p}_support.c ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-engine.h $${p}_engine.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c $${p}_engine.c ; \
	done
	touch tmp-mach-multi
tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
	../igen/igen \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		-Wnowidth \
		-N 0 \
		@sim_multi_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-i $(IGEN_INSN) \
		-n itable.h    -ht tmp-itable.h \
		-n itable.c    -t  tmp-itable.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
	touch tmp-itable-multi
tmp-run-multi: $(srcdir)/m16run.c
	for t in $(SIM_MULTI_IGEN_CONFIGS); do \
	  case $${t} in \
	    m16*) \
	      m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
	      sed <  $(srcdir)/m16run.c > tmp-run \
		    -e "s/^sim_/m16$${m}_/" \
		    -e "s/m16_/m16$${m}_/" \
		    -e "s/m32_/m32$${m}_/" ; \
	      $(SHELL) $(srcdir)/../../move-if-change tmp-run m16$${m}_run.c ; \
	  esac \
	done
	touch tmp-run-multi

clean-extra:
	rm -f $(BUILT_SRC_FROM_GEN)
	rm -f $(BUILT_SRC_FROM_IGEN)
	rm -f $(BUILT_SRC_FROM_M16)
	rm -f $(BUILT_SRC_FROM_MULTI)
	rm -f tmp-*
	rm -f m16*.o m32*.o itable*.o

distclean-extra:
	rm -f multi-include.h multi-run.c
Commit	Line	Data
c906108c SS	1	# Makefile template for Configure for the MIPS simulator.
	2	# Written by Cygnus Support.
	3
ae451ac6 ILT	4	SHELL = @SHELL@
ae451ac6 ILT	5
c906108c SS	6	## COMMON_PRE_CONFIG_FRAG
	7
	8	srcdir=@srcdir@
	9	srcroot=$(srcdir)/../../
	10
	11	# Object files created by various simulator generators.
	12
	13
	14	SIM_IGEN_OBJ = \
	15	support.o \
	16	itable.o \
	17	semantics.o \
	18	idecode.o \
	19	icache.o \
	20	@mips_igen_engine@ \
	21	irun.o \
	22
	23
	24	SIM_M16_OBJ = \
	25	m16_support.o \
	26	m16_semantics.o \
	27	m16_idecode.o \
	28	m16_icache.o \
	29	\
	30	m32_support.o \
	31	m32_semantics.o \
	32	m32_idecode.o \
	33	m32_icache.o \
	34	\
	35	itable.o \
	36	m16run.o \
	37
4c54fc26	38	SIM_MULTI_OBJ = itable.o @sim_multi_obj@
c906108c SS	39
	40	MIPS_EXTRA_OBJS = @mips_extra_objs@
	41	MIPS_EXTRA_LIBS = @mips_extra_libs@
	42
	43	SIM_OBJS = \
	44	$(SIM_@sim_gen@_OBJ) \
	45	$(SIM_NEW_COMMON_OBJS) \
	46	$(MIPS_EXTRA_OBJS) \
487f79b7	47	cp1.o \
c906108c	48	interp.o \
f4f1b9f1	49	mdmx.o \
c906108c SS	50	sim-main.o \
	51	sim-hload.o \
	52	sim-engine.o \
	53	sim-stop.o \
	54	sim-resume.o \
	55	sim-reason.o \
	56
	57
	58	# List of flags to always pass to $(CC).
	59	SIM_SUBTARGET=@SIM_SUBTARGET@
	60	SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET)
	61
	62	SIM_EXTRA_CLEAN = clean-extra
4c54fc26	63	SIM_EXTRA_DISTCLEAN = distclean-extra
c906108c SS	64
	65	SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
	66
	67	SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
	68
	69	# List of main object files for `run'.
	70	SIM_RUN_OBJS = nrun.o
	71
	72
	73
	74	## COMMON_POST_CONFIG_FRAG
	75
	76	interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h
487f79b7	77	cp1.o: $(srcdir)/cp1.c config.h sim-main.h
c906108c	78
f4f1b9f1	79	mdmx.o: $(srcdir)/mdmx.c $(srcdir)/sim-main.h
c906108c	80
4c54fc26 CD	81	multi-run.o: multi-include.h tmp-mach-multi
4c54fc26 CD	82
c906108c SS	83	../igen/igen:
	84	cd ../igen && $(MAKE)
	85
	86	IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
	87	IGEN_INSN=$(srcdir)/mips.igen
	88	IGEN_DC=$(srcdir)/mips.dc
	89	M16_DC=$(srcdir)/m16.dc
	90	IGEN_INCLUDE=\
	91	$(srcdir)/m16.igen \
909daa82	92	$(srcdir)/mdmx.igen \
e7e81181	93	$(srcdir)/mips3d.igen \
7cbea089	94	$(srcdir)/sb1.igen \
c906108c SS	95	$(srcdir)/tx.igen \
	96	$(srcdir)/vr.igen \
	97
	98	# NB: Since these can be built by a number of generators, care
	99	# must be taken to ensure that they are only dependant on
	100	# one of those generators.
	101	BUILT_SRC_FROM_GEN = \
	102	itable.h \
	103	itable.c \
	104
	105	SIM_IGEN_ALL = tmp-igen
	106	SIM_M16_ALL = tmp-m16
4c54fc26	107	SIM_MULTI_ALL = tmp-multi
c906108c SS	108
	109	$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
	110
	111
	112
	113	BUILT_SRC_FROM_IGEN = \
	114	icache.h \
	115	icache.c \
	116	idecode.h \
	117	idecode.c \
	118	semantics.h \
	119	semantics.c \
	120	model.h \
	121	model.c \
	122	support.h \
	123	support.c \
	124	engine.h \
	125	engine.c \
	126	irun.c \
	127
	128	$(BUILT_SRC_FROM_IGEN): tmp-igen
	129
	130	tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
	131	cd ../igen && $(MAKE)
	132	../igen/igen \
	133	$(IGEN_TRACE) \
	134	-I $(srcdir) \
	135	-Werror \
	136	-Wnodiscard \
	137	@sim_igen_flags@ \
	138	-G gen-direct-access \
	139	-G gen-zero-r0 \
	140	-B 32 \
	141	-H 31 \
	142	-i $(IGEN_INSN) \
	143	-o $(IGEN_DC) \
	144	-x \
	145	-n icache.h -hc tmp-icache.h \
	146	-n icache.c -c tmp-icache.c \
	147	-n semantics.h -hs tmp-semantics.h \
	148	-n semantics.c -s tmp-semantics.c \
	149	-n idecode.h -hd tmp-idecode.h \
	150	-n idecode.c -d tmp-idecode.c \
	151	-n model.h -hm tmp-model.h \
	152	-n model.c -m tmp-model.c \
	153	-n support.h -hf tmp-support.h \
	154	-n support.c -f tmp-support.c \
	155	-n itable.h -ht tmp-itable.h \
	156	-n itable.c -t tmp-itable.c \
	157	-n engine.h -he tmp-engine.h \
	158	-n engine.c -e tmp-engine.c \
	159	-n irun.c -r tmp-irun.c
ae451ac6 ILT	160	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
	161	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
	162	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
	163	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
	164	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
	165	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
	166	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
	167	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
	168	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
	169	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
	170	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
	171	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
	172	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
	173	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
	174	$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
c906108c SS	175	touch tmp-igen
	176
	177	semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS)
	178	engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS)
	179	support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
	180	idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
	181	itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)
	182
	183
	184
	185
	186	BUILT_SRC_FROM_M16 = \
	187	m16_icache.h \
	188	m16_icache.c \
	189	m16_idecode.h \
	190	m16_idecode.c \
	191	m16_semantics.h \
	192	m16_semantics.c \
	193	m16_model.h \
	194	m16_model.c \
	195	m16_support.h \
	196	m16_support.c \
	197	\
	198	m32_icache.h \
	199	m32_icache.c \
	200	m32_idecode.h \
	201	m32_idecode.c \
	202	m32_semantics.h \
	203	m32_semantics.c \
	204	m32_model.h \
	205	m32_model.c \
	206	m32_support.h \
	207	m32_support.c \
	208
	209	$(BUILT_SRC_FROM_M16): tmp-m16
	210
	211	tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
	212	cd ../igen && $(MAKE)
	213	../igen/igen \
	214	$(IGEN_TRACE) \
	215	-I $(srcdir) \
	216	-Werror \
	217	-Wnodiscard \
	218	@sim_m16_flags@ \
	219	-G gen-direct-access \
	220	-G gen-zero-r0 \
	221	-B 16 \
	222	-H 15 \
	223	-i $(IGEN_INSN) \
	224	-o $(M16_DC) \
	225	-P m16_ \
	226	-x \
	227	-n m16_icache.h -hc tmp-icache.h \
	228	-n m16_icache.c -c tmp-icache.c \
	229	-n m16_semantics.h -hs tmp-semantics.h \
	230	-n m16_semantics.c -s tmp-semantics.c \
	231	-n m16_idecode.h -hd tmp-idecode.h \
	232	-n m16_idecode.c -d tmp-idecode.c \
	233	-n m16_model.h -hm tmp-model.h \
	234	-n m16_model.c -m tmp-model.c \
	235	-n m16_support.h -hf tmp-support.h \
	236	-n m16_support.c -f tmp-support.c \
	237	#
ae451ac6 ILT	238	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
	239	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
	240	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
	241	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
	242	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
	243	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
	244	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m16_model.h
	245	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m16_model.c
	246	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m16_support.h
	247	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m16_support.c
c906108c SS	248	../igen/igen \
	249	$(IGEN_TRACE) \
	250	-I $(srcdir) \
	251	-Werror \
	252	-Wnodiscard \
	253	@sim_igen_flags@ \
	254	-G gen-direct-access \
	255	-G gen-zero-r0 \
	256	-B 32 \
	257	-H 31 \
	258	-i $(IGEN_INSN) \
	259	-o $(IGEN_DC) \
	260	-P m32_ \
	261	-x \
	262	-n m32_icache.h -hc tmp-icache.h \
	263	-n m32_icache.c -c tmp-icache.c \
	264	-n m32_semantics.h -hs tmp-semantics.h \
	265	-n m32_semantics.c -s tmp-semantics.c \
	266	-n m32_idecode.h -hd tmp-idecode.h \
	267	-n m32_idecode.c -d tmp-idecode.c \
	268	-n m32_model.h -hm tmp-model.h \
	269	-n m32_model.c -m tmp-model.c \
	270	-n m32_support.h -hf tmp-support.h \
	271	-n m32_support.c -f tmp-support.c \
	272	#
ae451ac6 ILT	273	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
	274	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
	275	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
	276	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
	277	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
	278	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
	279	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m32_model.h
	280	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m32_model.c
	281	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m32_support.h
	282	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m32_support.c
c906108c SS	283	../igen/igen \
	284	$(IGEN_TRACE) \
	285	-I $(srcdir) \
	286	-Werror \
	287	-Wnodiscard \
	288	-Wnowidth \
	289	@sim_igen_flags@ @sim_m16_flags@ \
	290	-G gen-direct-access \
	291	-G gen-zero-r0 \
	292	-i $(IGEN_INSN) \
	293	-n itable.h -ht tmp-itable.h \
	294	-n itable.c -t tmp-itable.c \
	295	#
ae451ac6 ILT	296	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
ae451ac6 ILT	297	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
c906108c SS	298	touch tmp-m16
	299
	300
4c54fc26 CD	301	BUILT_SRC_FROM_MULTI = @sim_multi_src@
	302	SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@
	303
	304	$(BUILT_SRC_FROM_MULTI): tmp-multi
	305	tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi targ-vals.h
	306	tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
	307	for t in $(SIM_MULTI_IGEN_CONFIGS); do \
	308	p=`echo $${t} \| sed -e 's/:.*//'` ; \
	309	m=`echo $${t} \| sed -e 's/.:\(.\):.*/\1/'` ; \
	310	f=`echo $${t} \| sed -e 's/.*://'` ; \
	311	case $${p} in \
	312	m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
	313	*) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
	314	esac; \
	315	../igen/igen \
	316	$(IGEN_TRACE) \
	317	$${e} \
	318	-I $(srcdir) \
	319	-Werror \
	320	-Wnodiscard \
	321	-N 0 \
	322	-M $${m} \
	323	-G gen-direct-access \
	324	-G gen-zero-r0 \
	325	-i $(IGEN_INSN) \
	326	-P $${p}_ \
	327	-x \
	328	-n $${p}_icache.h -hc tmp-icache.h \
	329	-n $${p}_icache.c -c tmp-icache.c \
	330	-n $${p}_semantics.h -hs tmp-semantics.h \
	331	-n $${p}_semantics.c -s tmp-semantics.c \
	332	-n $${p}_idecode.h -hd tmp-idecode.h \
	333	-n $${p}_idecode.c -d tmp-idecode.c \
	334	-n $${p}_model.h -hm tmp-model.h \
	335	-n $${p}_model.c -m tmp-model.c \
	336	-n $${p}_support.h -hf tmp-support.h \
	337	-n $${p}_support.c -f tmp-support.c \
	338	-n $${p}_engine.h -he tmp-engine.h \
	339	-n $${p}_engine.c -e tmp-engine.c \
	340	; \
ae451ac6 ILT	341	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h $${p}_icache.h ; \
	342	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c $${p}_icache.c ; \
	343	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h $${p}_idecode.h ; \
	344	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c $${p}_idecode.c ; \
	345	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h $${p}_semantics.h ; \
	346	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c $${p}_semantics.c ; \
	347	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h $${p}_model.h ; \
	348	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c $${p}_model.c ; \
	349	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h $${p}_support.h ; \
	350	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c $${p}_support.c ; \
	351	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h $${p}_engine.h ; \
	352	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c $${p}_engine.c ; \
4c54fc26 CD	353	done
	354	touch tmp-mach-multi
	355	tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
	356	../igen/igen \
	357	$(IGEN_TRACE) \
	358	-I $(srcdir) \
	359	-Werror \
	360	-Wnodiscard \
	361	-Wnowidth \
	362	-N 0 \
	363	@sim_multi_flags@ \
	364	-G gen-direct-access \
	365	-G gen-zero-r0 \
	366	-i $(IGEN_INSN) \
	367	-n itable.h -ht tmp-itable.h \
	368	-n itable.c -t tmp-itable.c \
	369	#
ae451ac6 ILT	370	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
ae451ac6 ILT	371	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
4c54fc26 CD	372	touch tmp-itable-multi
	373	tmp-run-multi: $(srcdir)/m16run.c
	374	for t in $(SIM_MULTI_IGEN_CONFIGS); do \
	375	case $${t} in \
80551777	376	m16*) \
4c54fc26 CD	377	m=`echo $${t} \| sed -e 's/^m16//' -e 's/:.*//'`; \
	378	sed < $(srcdir)/m16run.c > tmp-run \
	379	-e "s/^sim_/m16$${m}_/" \
	380	-e "s/m16_/m16$${m}_/" \
	381	-e "s/m32_/m32$${m}_/" ; \
ae451ac6	382	$(SHELL) $(srcdir)/../../move-if-change tmp-run m16$${m}_run.c ; \
4c54fc26 CD	383	esac \
	384	done
	385	touch tmp-run-multi
	386
c906108c SS	387	clean-extra:
	388	rm -f $(BUILT_SRC_FROM_GEN)
	389	rm -f $(BUILT_SRC_FROM_IGEN)
	390	rm -f $(BUILT_SRC_FROM_M16)
4c54fc26	391	rm -f $(BUILT_SRC_FROM_MULTI)
c906108c	392	rm -f tmp-*
071da002	393	rm -f m16.o m32.o itable*.o
c906108c	394
4c54fc26 CD	395	distclean-extra:
4c54fc26 CD	396	rm -f multi-include.h multi-run.c