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252b5132 | 1 | /* V850-specific support for 32-bit ELF |
250d07de | 2 | Copyright (C) 1996-2021 Free Software Foundation, Inc. |
252b5132 | 3 | |
86aba9db | 4 | This file is part of BFD, the Binary File Descriptor library. |
252b5132 | 5 | |
86aba9db NC |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
cd123cb7 | 8 | the Free Software Foundation; either version 3 of the License, or |
86aba9db | 9 | (at your option) any later version. |
252b5132 | 10 | |
86aba9db NC |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
252b5132 | 15 | |
86aba9db NC |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
47b0e7ad NC |
18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
19 | MA 02110-1301, USA. */ | |
252b5132 | 20 | |
cd123cb7 | 21 | |
252b5132 | 22 | /* XXX FIXME: This code is littered with 32bit int, 16bit short, 8bit char |
86aba9db | 23 | dependencies. As is the gas & simulator code for the v850. */ |
252b5132 | 24 | |
252b5132 | 25 | #include "sysdep.h" |
3db64b00 | 26 | #include "bfd.h" |
252b5132 RH |
27 | #include "bfdlink.h" |
28 | #include "libbfd.h" | |
29 | #include "elf-bfd.h" | |
30 | #include "elf/v850.h" | |
e12dd2ea | 31 | #include "libiberty.h" |
d48d68b6 | 32 | #include "elf32-v850.h" |
252b5132 | 33 | |
1cd986c5 NC |
34 | /* Sign-extend a 17-bit number. */ |
35 | #define SEXT17(x) ((((x) & 0x1ffff) ^ 0x10000) - 0x10000) | |
36 | ||
37 | /* Sign-extend a 22-bit number. */ | |
38 | #define SEXT22(x) ((((x) & 0x3fffff) ^ 0x200000) - 0x200000) | |
435b1e90 | 39 | |
e460dd0d AM |
40 | static reloc_howto_type v850_elf_howto_table[]; |
41 | ||
252b5132 RH |
42 | /* Look through the relocs for a section during the first phase, and |
43 | allocate space in the global offset table or procedure linkage | |
44 | table. */ | |
45 | ||
0a1b45a2 | 46 | static bool |
47b0e7ad NC |
47 | v850_elf_check_relocs (bfd *abfd, |
48 | struct bfd_link_info *info, | |
49 | asection *sec, | |
50 | const Elf_Internal_Rela *relocs) | |
252b5132 | 51 | { |
0a1b45a2 | 52 | bool ret = true; |
252b5132 RH |
53 | Elf_Internal_Shdr *symtab_hdr; |
54 | struct elf_link_hash_entry **sym_hashes; | |
55 | const Elf_Internal_Rela *rel; | |
56 | const Elf_Internal_Rela *rel_end; | |
de863c74 | 57 | unsigned int r_type; |
252b5132 | 58 | int other = 0; |
47b0e7ad | 59 | const char *common = NULL; |
252b5132 | 60 | |
0e1862bb | 61 | if (bfd_link_relocatable (info)) |
0a1b45a2 | 62 | return true; |
252b5132 RH |
63 | |
64 | #ifdef DEBUG | |
871b3ab2 | 65 | _bfd_error_handler ("v850_elf_check_relocs called for section %pA in %pB", |
d003868e | 66 | sec, abfd); |
252b5132 RH |
67 | #endif |
68 | ||
252b5132 RH |
69 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
70 | sym_hashes = elf_sym_hashes (abfd); | |
252b5132 RH |
71 | |
72 | rel_end = relocs + sec->reloc_count; | |
73 | for (rel = relocs; rel < rel_end; rel++) | |
74 | { | |
75 | unsigned long r_symndx; | |
76 | struct elf_link_hash_entry *h; | |
77 | ||
78 | r_symndx = ELF32_R_SYM (rel->r_info); | |
79 | if (r_symndx < symtab_hdr->sh_info) | |
80 | h = NULL; | |
81 | else | |
973a3492 L |
82 | { |
83 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
84 | while (h->root.type == bfd_link_hash_indirect | |
85 | || h->root.type == bfd_link_hash_warning) | |
86 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
87 | } | |
252b5132 | 88 | |
de863c74 | 89 | r_type = ELF32_R_TYPE (rel->r_info); |
252b5132 RH |
90 | switch (r_type) |
91 | { | |
92 | default: | |
252b5132 RH |
93 | break; |
94 | ||
07d6d2b8 AM |
95 | /* This relocation describes the C++ object vtable hierarchy. |
96 | Reconstruct it for later use during GC. */ | |
97 | case R_V850_GNU_VTINHERIT: | |
98 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) | |
0a1b45a2 | 99 | return false; |
07d6d2b8 AM |
100 | break; |
101 | ||
102 | /* This relocation describes which C++ vtable entries | |
e12dd2ea | 103 | are actually used. Record for later use during GC. */ |
07d6d2b8 | 104 | case R_V850_GNU_VTENTRY: |
a0ea3a14 | 105 | if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend)) |
0a1b45a2 | 106 | return false; |
07d6d2b8 | 107 | break; |
252b5132 RH |
108 | |
109 | case R_V850_SDA_16_16_SPLIT_OFFSET: | |
110 | case R_V850_SDA_16_16_OFFSET: | |
111 | case R_V850_SDA_15_16_OFFSET: | |
de863c74 NC |
112 | case R_V810_GPWLO_1: |
113 | case R_V850_HWLO: | |
114 | case R_V850_HWLO_1: | |
252b5132 RH |
115 | other = V850_OTHER_SDA; |
116 | common = ".scommon"; | |
117 | goto small_data_common; | |
435b1e90 | 118 | |
252b5132 RH |
119 | case R_V850_ZDA_16_16_SPLIT_OFFSET: |
120 | case R_V850_ZDA_16_16_OFFSET: | |
121 | case R_V850_ZDA_15_16_OFFSET: | |
122 | other = V850_OTHER_ZDA; | |
123 | common = ".zcommon"; | |
124 | goto small_data_common; | |
435b1e90 | 125 | |
252b5132 | 126 | case R_V850_TDA_4_4_OFFSET: |
1cd986c5 NC |
127 | case R_V850_TDA_4_5_OFFSET: |
128 | case R_V850_TDA_7_7_OFFSET: | |
252b5132 RH |
129 | case R_V850_TDA_6_8_OFFSET: |
130 | case R_V850_TDA_7_8_OFFSET: | |
252b5132 RH |
131 | case R_V850_TDA_16_16_OFFSET: |
132 | other = V850_OTHER_TDA; | |
133 | common = ".tcommon"; | |
134 | /* fall through */ | |
135 | ||
136 | #define V850_OTHER_MASK (V850_OTHER_TDA | V850_OTHER_SDA | V850_OTHER_ZDA) | |
137 | ||
138 | small_data_common: | |
139 | if (h) | |
140 | { | |
e12dd2ea NC |
141 | /* Flag which type of relocation was used. */ |
142 | h->other |= other; | |
252b5132 RH |
143 | if ((h->other & V850_OTHER_MASK) != (other & V850_OTHER_MASK) |
144 | && (h->other & V850_OTHER_ERROR) == 0) | |
145 | { | |
146 | const char * msg; | |
7fbd5f4e | 147 | char *buff; |
252b5132 RH |
148 | |
149 | switch (h->other & V850_OTHER_MASK) | |
150 | { | |
151 | default: | |
38f14ab8 | 152 | msg = _("variable `%s' cannot occupy in multiple small data regions"); |
252b5132 RH |
153 | break; |
154 | case V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA: | |
38f14ab8 | 155 | msg = _("variable `%s' can only be in one of the small, zero, and tiny data regions"); |
252b5132 RH |
156 | break; |
157 | case V850_OTHER_SDA | V850_OTHER_ZDA: | |
38f14ab8 | 158 | msg = _("variable `%s' cannot be in both small and zero data regions simultaneously"); |
252b5132 RH |
159 | break; |
160 | case V850_OTHER_SDA | V850_OTHER_TDA: | |
38f14ab8 | 161 | msg = _("variable `%s' cannot be in both small and tiny data regions simultaneously"); |
252b5132 RH |
162 | break; |
163 | case V850_OTHER_ZDA | V850_OTHER_TDA: | |
38f14ab8 | 164 | msg = _("variable `%s' cannot be in both zero and tiny data regions simultaneously"); |
252b5132 RH |
165 | break; |
166 | } | |
167 | ||
7fbd5f4e AM |
168 | if (asprintf (&buff, msg, h->root.root.string) < 0) |
169 | buff = NULL; | |
170 | else | |
171 | msg = buff; | |
172 | info->callbacks->warning (info, msg, h->root.root.string, | |
dc810e39 AM |
173 | abfd, h->root.u.def.section, |
174 | (bfd_vma) 0); | |
7fbd5f4e | 175 | free (buff); |
252b5132 RH |
176 | |
177 | bfd_set_error (bfd_error_bad_value); | |
178 | h->other |= V850_OTHER_ERROR; | |
0a1b45a2 | 179 | ret = false; |
252b5132 RH |
180 | } |
181 | } | |
182 | ||
183 | if (h && h->root.type == bfd_link_hash_common | |
184 | && h->root.u.c.p | |
fd361982 | 185 | && !strcmp (bfd_section_name (h->root.u.c.p->section), "COMMON")) |
252b5132 | 186 | { |
e12dd2ea NC |
187 | asection * section; |
188 | ||
189 | section = h->root.u.c.p->section = bfd_make_section_old_way (abfd, common); | |
10885e24 | 190 | section->flags |= SEC_IS_COMMON | SEC_SMALL_DATA; |
252b5132 RH |
191 | } |
192 | ||
193 | #ifdef DEBUG | |
194 | fprintf (stderr, "v850_elf_check_relocs, found %s relocation for %s%s\n", | |
195 | v850_elf_howto_table[ (int)r_type ].name, | |
196 | (h && h->root.root.string) ? h->root.root.string : "<unknown>", | |
197 | (h->root.type == bfd_link_hash_common) ? ", symbol is common" : ""); | |
198 | #endif | |
199 | break; | |
200 | } | |
201 | } | |
202 | ||
203 | return ret; | |
204 | } | |
205 | ||
e12dd2ea NC |
206 | /* In the old version, when an entry was checked out from the table, |
207 | it was deleted. This produced an error if the entry was needed | |
208 | more than once, as the second attempted retry failed. | |
209 | ||
210 | In the current version, the entry is not deleted, instead we set | |
b34976b6 | 211 | the field 'found' to TRUE. If a second lookup matches the same |
e12dd2ea NC |
212 | entry, then we know that the hi16s reloc has already been updated |
213 | and does not need to be updated a second time. | |
214 | ||
215 | TODO - TOFIX: If it is possible that we need to restore 2 different | |
216 | addresses from the same table entry, where the first generates an | |
217 | overflow, whilst the second do not, then this code will fail. */ | |
252b5132 RH |
218 | |
219 | typedef struct hi16s_location | |
220 | { | |
0a1b45a2 AM |
221 | bfd_vma addend; |
222 | bfd_byte *address; | |
223 | unsigned long counter; | |
224 | bool found; | |
225 | struct hi16s_location *next; | |
252b5132 RH |
226 | } |
227 | hi16s_location; | |
228 | ||
47b0e7ad NC |
229 | static hi16s_location * previous_hi16s; |
230 | static hi16s_location * free_hi16s; | |
231 | static unsigned long hi16s_counter; | |
252b5132 RH |
232 | |
233 | static void | |
47b0e7ad | 234 | remember_hi16s_reloc (bfd *abfd, bfd_vma addend, bfd_byte *address) |
252b5132 RH |
235 | { |
236 | hi16s_location * entry = NULL; | |
986f0783 | 237 | size_t amt = sizeof (* free_hi16s); |
435b1e90 | 238 | |
252b5132 RH |
239 | /* Find a free structure. */ |
240 | if (free_hi16s == NULL) | |
47b0e7ad | 241 | free_hi16s = bfd_zalloc (abfd, amt); |
252b5132 RH |
242 | |
243 | entry = free_hi16s; | |
244 | free_hi16s = free_hi16s->next; | |
435b1e90 | 245 | |
252b5132 RH |
246 | entry->addend = addend; |
247 | entry->address = address; | |
248 | entry->counter = hi16s_counter ++; | |
0a1b45a2 | 249 | entry->found = false; |
252b5132 RH |
250 | entry->next = previous_hi16s; |
251 | previous_hi16s = entry; | |
435b1e90 | 252 | |
252b5132 RH |
253 | /* Cope with wrap around of our counter. */ |
254 | if (hi16s_counter == 0) | |
255 | { | |
47b0e7ad | 256 | /* XXX: Assume that all counter entries differ only in their low 16 bits. */ |
252b5132 RH |
257 | for (entry = previous_hi16s; entry != NULL; entry = entry->next) |
258 | entry->counter &= 0xffff; | |
259 | ||
260 | hi16s_counter = 0x10000; | |
261 | } | |
252b5132 RH |
262 | } |
263 | ||
264 | static bfd_byte * | |
0a1b45a2 | 265 | find_remembered_hi16s_reloc (bfd_vma addend, bool *already_found) |
252b5132 | 266 | { |
b34976b6 AM |
267 | hi16s_location *match = NULL; |
268 | hi16s_location *entry; | |
b34976b6 | 269 | bfd_byte *addr; |
435b1e90 | 270 | |
252b5132 RH |
271 | /* Search the table. Record the most recent entry that matches. */ |
272 | for (entry = previous_hi16s; entry; entry = entry->next) | |
273 | { | |
274 | if (entry->addend == addend | |
275 | && (match == NULL || match->counter < entry->counter)) | |
276 | { | |
252b5132 RH |
277 | match = entry; |
278 | } | |
252b5132 RH |
279 | } |
280 | ||
281 | if (match == NULL) | |
282 | return NULL; | |
283 | ||
284 | /* Extract the address. */ | |
285 | addr = match->address; | |
286 | ||
4cc11e76 | 287 | /* Remember if this entry has already been used before. */ |
252b5132 RH |
288 | if (already_found) |
289 | * already_found = match->found; | |
290 | ||
291 | /* Note that this entry has now been used. */ | |
0a1b45a2 | 292 | match->found = true; |
435b1e90 | 293 | |
252b5132 | 294 | return addr; |
435b1e90 | 295 | } |
252b5132 | 296 | |
1e50d24d RS |
297 | /* Calculate the final operand value for a R_V850_LO16 or |
298 | R_V850_LO16_SPLIT_OFFSET. *INSN is the current operand value and | |
299 | ADDEND is the sum of the relocation symbol and offset. Store the | |
300 | operand value in *INSN and return true on success. | |
301 | ||
302 | The assembler has already done some of this: If the value stored in | |
303 | the instruction has its 15th bit set, (counting from zero) then the | |
304 | assembler will have added 1 to the value stored in the associated | |
305 | HI16S reloc. So for example, these relocations: | |
306 | ||
307 | movhi hi( fred ), r0, r1 | |
308 | movea lo( fred ), r1, r1 | |
309 | ||
310 | will store 0 in the value fields for the MOVHI and MOVEA instructions | |
311 | and addend will be the address of fred, but for these instructions: | |
312 | ||
1cd986c5 NC |
313 | movhi hi( fred + 0x123456 ), r0, r1 |
314 | movea lo( fred + 0x123456 ), r1, r1 | |
1e50d24d RS |
315 | |
316 | the value stored in the MOVHI instruction will be 0x12 and the value | |
317 | stored in the MOVEA instruction will be 0x3456. If however the | |
318 | instructions were: | |
319 | ||
1cd986c5 NC |
320 | movhi hi( fred + 0x10ffff ), r0, r1 |
321 | movea lo( fred + 0x10ffff ), r1, r1 | |
1e50d24d RS |
322 | |
323 | then the value stored in the MOVHI instruction would be 0x11 (not | |
324 | 0x10) and the value stored in the MOVEA instruction would be 0xffff. | |
325 | Thus (assuming for the moment that the addend is 0), at run time the | |
326 | MOVHI instruction loads 0x110000 into r1, then the MOVEA instruction | |
327 | adds 0xffffffff (sign extension!) producing 0x10ffff. Similarly if | |
328 | the instructions were: | |
329 | ||
1cd986c5 NC |
330 | movhi hi( fred - 1 ), r0, r1 |
331 | movea lo( fred - 1 ), r1, r1 | |
1e50d24d RS |
332 | |
333 | then 0 is stored in the MOVHI instruction and -1 is stored in the | |
334 | MOVEA instruction. | |
335 | ||
336 | Overflow can occur if the addition of the value stored in the | |
337 | instruction plus the addend sets the 15th bit when before it was clear. | |
338 | This is because the 15th bit will be sign extended into the high part, | |
339 | thus reducing its value by one, but since the 15th bit was originally | |
340 | clear, the assembler will not have added 1 to the previous HI16S reloc | |
341 | to compensate for this effect. For example: | |
342 | ||
1cd986c5 NC |
343 | movhi hi( fred + 0x123456 ), r0, r1 |
344 | movea lo( fred + 0x123456 ), r1, r1 | |
1e50d24d RS |
345 | |
346 | The value stored in HI16S reloc is 0x12, the value stored in the LO16 | |
347 | reloc is 0x3456. If we assume that the address of fred is 0x00007000 | |
348 | then the relocations become: | |
349 | ||
350 | HI16S: 0x0012 + (0x00007000 >> 16) = 0x12 | |
351 | LO16: 0x3456 + (0x00007000 & 0xffff) = 0xa456 | |
352 | ||
353 | but when the instructions are executed, the MOVEA instruction's value | |
354 | is signed extended, so the sum becomes: | |
355 | ||
356 | 0x00120000 | |
357 | + 0xffffa456 | |
358 | ------------ | |
359 | 0x0011a456 but 'fred + 0x123456' = 0x0012a456 | |
360 | ||
361 | Note that if the 15th bit was set in the value stored in the LO16 | |
362 | reloc, then we do not have to do anything: | |
363 | ||
1cd986c5 NC |
364 | movhi hi( fred + 0x10ffff ), r0, r1 |
365 | movea lo( fred + 0x10ffff ), r1, r1 | |
1e50d24d RS |
366 | |
367 | HI16S: 0x0011 + (0x00007000 >> 16) = 0x11 | |
368 | LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff | |
369 | ||
370 | 0x00110000 | |
371 | + 0x00006fff | |
372 | ------------ | |
373 | 0x00116fff = fred + 0x10ffff = 0x7000 + 0x10ffff | |
374 | ||
375 | Overflow can also occur if the computation carries into the 16th bit | |
376 | and it also results in the 15th bit having the same value as the 15th | |
377 | bit of the original value. What happens is that the HI16S reloc | |
378 | will have already examined the 15th bit of the original value and | |
379 | added 1 to the high part if the bit is set. This compensates for the | |
380 | sign extension of 15th bit of the result of the computation. But now | |
381 | there is a carry into the 16th bit, and this has not been allowed for. | |
382 | ||
383 | So, for example if fred is at address 0xf000: | |
384 | ||
1cd986c5 NC |
385 | movhi hi( fred + 0xffff ), r0, r1 [bit 15 of the offset is set] |
386 | movea lo( fred + 0xffff ), r1, r1 | |
1e50d24d RS |
387 | |
388 | HI16S: 0x0001 + (0x0000f000 >> 16) = 0x0001 | |
389 | LO16: 0xffff + (0x0000f000 & 0xffff) = 0xefff (carry into bit 16 is lost) | |
390 | ||
391 | 0x00010000 | |
392 | + 0xffffefff | |
393 | ------------ | |
394 | 0x0000efff but 'fred + 0xffff' = 0x0001efff | |
395 | ||
396 | Similarly, if the 15th bit remains clear, but overflow occurs into | |
397 | the 16th bit then (assuming the address of fred is 0xf000): | |
398 | ||
1cd986c5 NC |
399 | movhi hi( fred + 0x7000 ), r0, r1 [bit 15 of the offset is clear] |
400 | movea lo( fred + 0x7000 ), r1, r1 | |
1e50d24d RS |
401 | |
402 | HI16S: 0x0000 + (0x0000f000 >> 16) = 0x0000 | |
403 | LO16: 0x7000 + (0x0000f000 & 0xffff) = 0x6fff (carry into bit 16 is lost) | |
404 | ||
405 | 0x00000000 | |
406 | + 0x00006fff | |
407 | ------------ | |
408 | 0x00006fff but 'fred + 0x7000' = 0x00016fff | |
409 | ||
410 | Note - there is no need to change anything if a carry occurs, and the | |
411 | 15th bit changes its value from being set to being clear, as the HI16S | |
412 | reloc will have already added in 1 to the high part for us: | |
413 | ||
1cd986c5 NC |
414 | movhi hi( fred + 0xffff ), r0, r1 [bit 15 of the offset is set] |
415 | movea lo( fred + 0xffff ), r1, r1 | |
1e50d24d RS |
416 | |
417 | HI16S: 0x0001 + (0x00007000 >> 16) | |
418 | LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff (carry into bit 16 is lost) | |
419 | ||
420 | 0x00010000 | |
421 | + 0x00006fff (bit 15 not set, so the top half is zero) | |
422 | ------------ | |
423 | 0x00016fff which is right (assuming that fred is at 0x7000) | |
424 | ||
425 | but if the 15th bit goes from being clear to being set, then we must | |
426 | once again handle overflow: | |
427 | ||
1cd986c5 NC |
428 | movhi hi( fred + 0x7000 ), r0, r1 [bit 15 of the offset is clear] |
429 | movea lo( fred + 0x7000 ), r1, r1 | |
1e50d24d RS |
430 | |
431 | HI16S: 0x0000 + (0x0000ffff >> 16) | |
432 | LO16: 0x7000 + (0x0000ffff & 0xffff) = 0x6fff (carry into bit 16) | |
433 | ||
434 | 0x00000000 | |
435 | + 0x00006fff (bit 15 not set, so the top half is zero) | |
436 | ------------ | |
437 | 0x00006fff which is wrong (assuming that fred is at 0xffff). */ | |
438 | ||
0a1b45a2 | 439 | static bool |
1e50d24d RS |
440 | v850_elf_perform_lo16_relocation (bfd *abfd, unsigned long *insn, |
441 | unsigned long addend) | |
442 | { | |
443 | #define BIT15_SET(x) ((x) & 0x8000) | |
444 | #define OVERFLOWS(a,i) ((((a) & 0xffff) + (i)) > 0xffff) | |
47b0e7ad | 445 | |
1e50d24d RS |
446 | if ((BIT15_SET (*insn + addend) && ! BIT15_SET (addend)) |
447 | || (OVERFLOWS (addend, *insn) | |
448 | && ((! BIT15_SET (*insn)) || (BIT15_SET (addend))))) | |
449 | { | |
0a1b45a2 | 450 | bool already_updated; |
1e50d24d RS |
451 | bfd_byte *hi16s_address = find_remembered_hi16s_reloc |
452 | (addend, & already_updated); | |
453 | ||
454 | /* Amend the matching HI16_S relocation. */ | |
455 | if (hi16s_address != NULL) | |
456 | { | |
457 | if (! already_updated) | |
458 | { | |
459 | unsigned long hi_insn = bfd_get_16 (abfd, hi16s_address); | |
460 | hi_insn += 1; | |
461 | bfd_put_16 (abfd, hi_insn, hi16s_address); | |
462 | } | |
463 | } | |
464 | else | |
465 | { | |
38f14ab8 | 466 | _bfd_error_handler (_("failed to find previous HI16 reloc")); |
0a1b45a2 | 467 | return false; |
1e50d24d RS |
468 | } |
469 | } | |
470 | #undef OVERFLOWS | |
471 | #undef BIT15_SET | |
472 | ||
473 | /* Do not complain if value has top bit set, as this has been | |
474 | anticipated. */ | |
475 | *insn = (*insn + addend) & 0xffff; | |
0a1b45a2 | 476 | return true; |
1e50d24d RS |
477 | } |
478 | ||
252b5132 | 479 | /* FIXME: The code here probably ought to be removed and the code in reloc.c |
4cc11e76 | 480 | allowed to do its stuff instead. At least for most of the relocs, anyway. */ |
e12dd2ea | 481 | |
252b5132 | 482 | static bfd_reloc_status_type |
47b0e7ad NC |
483 | v850_elf_perform_relocation (bfd *abfd, |
484 | unsigned int r_type, | |
485 | bfd_vma addend, | |
486 | bfd_byte *address) | |
252b5132 RH |
487 | { |
488 | unsigned long insn; | |
1e50d24d | 489 | unsigned long result; |
252b5132 | 490 | bfd_signed_vma saddend = (bfd_signed_vma) addend; |
435b1e90 | 491 | |
252b5132 RH |
492 | switch (r_type) |
493 | { | |
494 | default: | |
de863c74 | 495 | #ifdef DEBUG |
0aa13fee AM |
496 | _bfd_error_handler ("%pB: unsupported relocation type %#x", |
497 | abfd, r_type); | |
de863c74 | 498 | #endif |
252b5132 | 499 | return bfd_reloc_notsupported; |
435b1e90 | 500 | |
e30ddb24 NC |
501 | case R_V850_REL32: |
502 | case R_V850_ABS32: | |
de863c74 NC |
503 | case R_V810_WORD: |
504 | case R_V850_PC32: | |
252b5132 RH |
505 | bfd_put_32 (abfd, addend, address); |
506 | return bfd_reloc_ok; | |
435b1e90 | 507 | |
de863c74 | 508 | case R_V850_WLO23: |
1cd986c5 NC |
509 | case R_V850_23: |
510 | insn = bfd_get_32 (abfd, address); | |
511 | insn &= ~((0x7f << 4) | (0x7fff80 << (16-7))); | |
512 | insn |= ((addend & 0x7f) << 4) | ((addend & 0x7fff80) << (16-7)); | |
513 | bfd_put_32 (abfd, (bfd_vma) insn, address); | |
514 | return bfd_reloc_ok; | |
515 | ||
de863c74 | 516 | case R_V850_PCR22: |
252b5132 RH |
517 | case R_V850_22_PCREL: |
518 | if (saddend > 0x1fffff || saddend < -0x200000) | |
519 | return bfd_reloc_overflow; | |
435b1e90 | 520 | |
252b5132 RH |
521 | if ((addend % 2) != 0) |
522 | return bfd_reloc_dangerous; | |
435b1e90 | 523 | |
252b5132 RH |
524 | insn = bfd_get_32 (abfd, address); |
525 | insn &= ~0xfffe003f; | |
526 | insn |= (((addend & 0xfffe) << 16) | ((addend & 0x3f0000) >> 16)); | |
dc810e39 | 527 | bfd_put_32 (abfd, (bfd_vma) insn, address); |
252b5132 | 528 | return bfd_reloc_ok; |
435b1e90 | 529 | |
de863c74 | 530 | case R_V850_PC17: |
1cd986c5 NC |
531 | case R_V850_17_PCREL: |
532 | if (saddend > 0xffff || saddend < -0x10000) | |
533 | return bfd_reloc_overflow; | |
534 | ||
535 | if ((addend % 2) != 0) | |
536 | return bfd_reloc_dangerous; | |
537 | ||
538 | insn = bfd_get_32 (abfd, address); | |
539 | insn &= ~ 0xfffe0010; | |
540 | insn |= ((addend & 0xfffe) << 16) | ((addend & 0x10000) >> (16-4)); | |
541 | break; | |
542 | ||
de863c74 | 543 | case R_V850_PC16U: |
1cd986c5 NC |
544 | case R_V850_16_PCREL: |
545 | if ((saddend < -0xffff) || (saddend > 0)) | |
546 | return bfd_reloc_overflow; | |
547 | ||
548 | if ((addend % 2) != 0) | |
549 | return bfd_reloc_dangerous; | |
550 | ||
551 | insn = bfd_get_16 (abfd, address); | |
552 | insn &= ~0xfffe; | |
553 | insn |= (-addend & 0xfffe); | |
554 | break; | |
555 | ||
de863c74 | 556 | case R_V850_PC9: |
252b5132 RH |
557 | case R_V850_9_PCREL: |
558 | if (saddend > 0xff || saddend < -0x100) | |
559 | return bfd_reloc_overflow; | |
435b1e90 | 560 | |
252b5132 RH |
561 | if ((addend % 2) != 0) |
562 | return bfd_reloc_dangerous; | |
435b1e90 | 563 | |
252b5132 RH |
564 | insn = bfd_get_16 (abfd, address); |
565 | insn &= ~ 0xf870; | |
566 | insn |= ((addend & 0x1f0) << 7) | ((addend & 0x0e) << 3); | |
567 | break; | |
435b1e90 | 568 | |
de863c74 | 569 | case R_V810_WHI: |
252b5132 RH |
570 | case R_V850_HI16: |
571 | addend += (bfd_get_16 (abfd, address) << 16); | |
572 | addend = (addend >> 16); | |
573 | insn = addend; | |
574 | break; | |
435b1e90 | 575 | |
de863c74 | 576 | case R_V810_WHI1: |
252b5132 RH |
577 | case R_V850_HI16_S: |
578 | /* Remember where this relocation took place. */ | |
579 | remember_hi16s_reloc (abfd, addend, address); | |
580 | ||
581 | addend += (bfd_get_16 (abfd, address) << 16); | |
582 | addend = (addend >> 16) + ((addend & 0x8000) != 0); | |
435b1e90 KH |
583 | |
584 | /* This relocation cannot overflow. */ | |
4d421096 | 585 | if (addend > 0xffff) |
252b5132 | 586 | addend = 0; |
435b1e90 | 587 | |
252b5132 RH |
588 | insn = addend; |
589 | break; | |
435b1e90 | 590 | |
de863c74 | 591 | case R_V810_WLO: |
252b5132 | 592 | case R_V850_LO16: |
1e50d24d RS |
593 | insn = bfd_get_16 (abfd, address); |
594 | if (! v850_elf_perform_lo16_relocation (abfd, &insn, addend)) | |
595 | return bfd_reloc_overflow; | |
596 | break; | |
252b5132 | 597 | |
de863c74 | 598 | case R_V810_BYTE: |
252b5132 RH |
599 | case R_V850_8: |
600 | addend += (char) bfd_get_8 (abfd, address); | |
601 | ||
602 | saddend = (bfd_signed_vma) addend; | |
435b1e90 | 603 | |
252b5132 RH |
604 | if (saddend > 0x7f || saddend < -0x80) |
605 | return bfd_reloc_overflow; | |
606 | ||
607 | bfd_put_8 (abfd, addend, address); | |
608 | return bfd_reloc_ok; | |
609 | ||
610 | case R_V850_CALLT_16_16_OFFSET: | |
611 | addend += bfd_get_16 (abfd, address); | |
435b1e90 | 612 | |
252b5132 | 613 | saddend = (bfd_signed_vma) addend; |
435b1e90 | 614 | |
252b5132 RH |
615 | if (saddend > 0xffff || saddend < 0) |
616 | return bfd_reloc_overflow; | |
617 | ||
618 | insn = addend; | |
619 | break; | |
435b1e90 | 620 | |
1cd986c5 NC |
621 | case R_V850_CALLT_15_16_OFFSET: |
622 | insn = bfd_get_16 (abfd, address); | |
623 | ||
5bb3703f | 624 | addend += insn & 0xfffe; |
1cd986c5 NC |
625 | |
626 | saddend = (bfd_signed_vma) addend; | |
627 | ||
628 | if (saddend > 0xffff || saddend < 0) | |
629 | return bfd_reloc_overflow; | |
630 | ||
631 | insn = (0xfffe & addend) | |
632 | | (insn & ~0xfffe); | |
633 | break; | |
634 | ||
635 | case R_V850_CALLT_6_7_OFFSET: | |
636 | insn = bfd_get_16 (abfd, address); | |
637 | addend += ((insn & 0x3f) << 1); | |
638 | ||
639 | saddend = (bfd_signed_vma) addend; | |
640 | ||
641 | if (saddend > 0x7e || saddend < 0) | |
642 | return bfd_reloc_overflow; | |
643 | ||
644 | if (addend & 1) | |
645 | return bfd_reloc_dangerous; | |
646 | ||
647 | insn &= 0xff80; | |
648 | insn |= (addend >> 1); | |
649 | break; | |
650 | ||
252b5132 | 651 | case R_V850_16: |
de863c74 | 652 | case R_V810_HWORD: |
252b5132 RH |
653 | case R_V850_SDA_16_16_OFFSET: |
654 | case R_V850_ZDA_16_16_OFFSET: | |
655 | case R_V850_TDA_16_16_OFFSET: | |
656 | addend += bfd_get_16 (abfd, address); | |
435b1e90 | 657 | |
252b5132 | 658 | saddend = (bfd_signed_vma) addend; |
435b1e90 | 659 | |
252b5132 RH |
660 | if (saddend > 0x7fff || saddend < -0x8000) |
661 | return bfd_reloc_overflow; | |
662 | ||
663 | insn = addend; | |
664 | break; | |
435b1e90 | 665 | |
1cd986c5 | 666 | case R_V850_16_S1: |
252b5132 RH |
667 | case R_V850_SDA_15_16_OFFSET: |
668 | case R_V850_ZDA_15_16_OFFSET: | |
de863c74 | 669 | case R_V810_GPWLO_1: |
252b5132 RH |
670 | insn = bfd_get_16 (abfd, address); |
671 | addend += (insn & 0xfffe); | |
435b1e90 | 672 | |
252b5132 | 673 | saddend = (bfd_signed_vma) addend; |
435b1e90 | 674 | |
252b5132 RH |
675 | if (saddend > 0x7ffe || saddend < -0x8000) |
676 | return bfd_reloc_overflow; | |
435b1e90 | 677 | |
252b5132 | 678 | if (addend & 1) |
07d6d2b8 | 679 | return bfd_reloc_dangerous; |
435b1e90 | 680 | |
dc810e39 | 681 | insn = (addend &~ (bfd_vma) 1) | (insn & 1); |
252b5132 | 682 | break; |
435b1e90 | 683 | |
252b5132 RH |
684 | case R_V850_TDA_6_8_OFFSET: |
685 | insn = bfd_get_16 (abfd, address); | |
686 | addend += ((insn & 0x7e) << 1); | |
435b1e90 | 687 | |
252b5132 | 688 | saddend = (bfd_signed_vma) addend; |
435b1e90 | 689 | |
252b5132 RH |
690 | if (saddend > 0xfc || saddend < 0) |
691 | return bfd_reloc_overflow; | |
435b1e90 | 692 | |
252b5132 RH |
693 | if (addend & 3) |
694 | return bfd_reloc_dangerous; | |
435b1e90 | 695 | |
252b5132 RH |
696 | insn &= 0xff81; |
697 | insn |= (addend >> 1); | |
698 | break; | |
435b1e90 | 699 | |
252b5132 RH |
700 | case R_V850_TDA_7_8_OFFSET: |
701 | insn = bfd_get_16 (abfd, address); | |
702 | addend += ((insn & 0x7f) << 1); | |
435b1e90 | 703 | |
252b5132 | 704 | saddend = (bfd_signed_vma) addend; |
435b1e90 | 705 | |
252b5132 RH |
706 | if (saddend > 0xfe || saddend < 0) |
707 | return bfd_reloc_overflow; | |
435b1e90 | 708 | |
252b5132 RH |
709 | if (addend & 1) |
710 | return bfd_reloc_dangerous; | |
435b1e90 | 711 | |
252b5132 RH |
712 | insn &= 0xff80; |
713 | insn |= (addend >> 1); | |
714 | break; | |
435b1e90 | 715 | |
252b5132 RH |
716 | case R_V850_TDA_7_7_OFFSET: |
717 | insn = bfd_get_16 (abfd, address); | |
718 | addend += insn & 0x7f; | |
435b1e90 | 719 | |
252b5132 | 720 | saddend = (bfd_signed_vma) addend; |
435b1e90 | 721 | |
252b5132 RH |
722 | if (saddend > 0x7f || saddend < 0) |
723 | return bfd_reloc_overflow; | |
435b1e90 | 724 | |
252b5132 RH |
725 | insn &= 0xff80; |
726 | insn |= addend; | |
727 | break; | |
435b1e90 | 728 | |
252b5132 RH |
729 | case R_V850_TDA_4_5_OFFSET: |
730 | insn = bfd_get_16 (abfd, address); | |
731 | addend += ((insn & 0xf) << 1); | |
435b1e90 | 732 | |
252b5132 | 733 | saddend = (bfd_signed_vma) addend; |
435b1e90 | 734 | |
252b5132 RH |
735 | if (saddend > 0x1e || saddend < 0) |
736 | return bfd_reloc_overflow; | |
435b1e90 | 737 | |
252b5132 RH |
738 | if (addend & 1) |
739 | return bfd_reloc_dangerous; | |
435b1e90 | 740 | |
252b5132 RH |
741 | insn &= 0xfff0; |
742 | insn |= (addend >> 1); | |
743 | break; | |
435b1e90 | 744 | |
252b5132 RH |
745 | case R_V850_TDA_4_4_OFFSET: |
746 | insn = bfd_get_16 (abfd, address); | |
747 | addend += insn & 0xf; | |
435b1e90 | 748 | |
252b5132 | 749 | saddend = (bfd_signed_vma) addend; |
435b1e90 | 750 | |
252b5132 RH |
751 | if (saddend > 0xf || saddend < 0) |
752 | return bfd_reloc_overflow; | |
435b1e90 | 753 | |
252b5132 RH |
754 | insn &= 0xfff0; |
755 | insn |= addend; | |
756 | break; | |
435b1e90 | 757 | |
de863c74 NC |
758 | case R_V810_WLO_1: |
759 | case R_V850_HWLO: | |
760 | case R_V850_HWLO_1: | |
1cd986c5 NC |
761 | case R_V850_LO16_S1: |
762 | insn = bfd_get_16 (abfd, address); | |
763 | result = insn & 0xfffe; | |
764 | if (! v850_elf_perform_lo16_relocation (abfd, &result, addend)) | |
765 | return bfd_reloc_overflow; | |
766 | if (result & 1) | |
767 | return bfd_reloc_overflow; | |
768 | insn = (result & 0xfffe) | |
769 | | (insn & ~0xfffe); | |
770 | bfd_put_16 (abfd, insn, address); | |
771 | return bfd_reloc_ok; | |
772 | ||
de863c74 | 773 | case R_V850_BLO: |
1e50d24d RS |
774 | case R_V850_LO16_SPLIT_OFFSET: |
775 | insn = bfd_get_32 (abfd, address); | |
776 | result = ((insn & 0xfffe0000) >> 16) | ((insn & 0x20) >> 5); | |
777 | if (! v850_elf_perform_lo16_relocation (abfd, &result, addend)) | |
778 | return bfd_reloc_overflow; | |
779 | insn = (((result << 16) & 0xfffe0000) | |
780 | | ((result << 5) & 0x20) | |
781 | | (insn & ~0xfffe0020)); | |
782 | bfd_put_32 (abfd, insn, address); | |
783 | return bfd_reloc_ok; | |
784 | ||
1cd986c5 | 785 | case R_V850_16_SPLIT_OFFSET: |
252b5132 | 786 | case R_V850_SDA_16_16_SPLIT_OFFSET: |
1cd986c5 | 787 | case R_V850_ZDA_16_16_SPLIT_OFFSET: |
252b5132 RH |
788 | insn = bfd_get_32 (abfd, address); |
789 | addend += ((insn & 0xfffe0000) >> 16) + ((insn & 0x20) >> 5); | |
435b1e90 | 790 | |
252b5132 | 791 | saddend = (bfd_signed_vma) addend; |
435b1e90 | 792 | |
252b5132 RH |
793 | if (saddend > 0x7fff || saddend < -0x8000) |
794 | return bfd_reloc_overflow; | |
435b1e90 | 795 | |
252b5132 RH |
796 | insn &= 0x0001ffdf; |
797 | insn |= (addend & 1) << 5; | |
dc810e39 | 798 | insn |= (addend &~ (bfd_vma) 1) << 16; |
435b1e90 | 799 | |
dc810e39 | 800 | bfd_put_32 (abfd, (bfd_vma) insn, address); |
252b5132 | 801 | return bfd_reloc_ok; |
435b1e90 | 802 | |
252b5132 RH |
803 | case R_V850_GNU_VTINHERIT: |
804 | case R_V850_GNU_VTENTRY: | |
805 | return bfd_reloc_ok; | |
806 | ||
807 | } | |
808 | ||
dc810e39 | 809 | bfd_put_16 (abfd, (bfd_vma) insn, address); |
252b5132 RH |
810 | return bfd_reloc_ok; |
811 | } | |
252b5132 RH |
812 | \f |
813 | /* Insert the addend into the instruction. */ | |
e12dd2ea | 814 | |
252b5132 | 815 | static bfd_reloc_status_type |
47b0e7ad NC |
816 | v850_elf_reloc (bfd *abfd ATTRIBUTE_UNUSED, |
817 | arelent *reloc, | |
818 | asymbol *symbol, | |
819 | void * data ATTRIBUTE_UNUSED, | |
820 | asection *isection, | |
821 | bfd *obfd, | |
822 | char **err ATTRIBUTE_UNUSED) | |
252b5132 RH |
823 | { |
824 | long relocation; | |
435b1e90 | 825 | |
252b5132 RH |
826 | /* If there is an output BFD, |
827 | and the symbol is not a section name (which is only defined at final link time), | |
828 | and either we are not putting the addend into the instruction | |
e12dd2ea | 829 | or the addend is zero, so there is nothing to add into the instruction |
252b5132 | 830 | then just fixup the address and return. */ |
47b0e7ad | 831 | if (obfd != NULL |
252b5132 RH |
832 | && (symbol->flags & BSF_SECTION_SYM) == 0 |
833 | && (! reloc->howto->partial_inplace | |
834 | || reloc->addend == 0)) | |
835 | { | |
836 | reloc->address += isection->output_offset; | |
837 | return bfd_reloc_ok; | |
838 | } | |
435b1e90 | 839 | |
252b5132 RH |
840 | /* Catch relocs involving undefined symbols. */ |
841 | if (bfd_is_und_section (symbol->section) | |
842 | && (symbol->flags & BSF_WEAK) == 0 | |
843 | && obfd == NULL) | |
844 | return bfd_reloc_undefined; | |
845 | ||
846 | /* We handle final linking of some relocs ourselves. */ | |
847 | ||
848 | /* Is the address of the relocation really within the section? */ | |
07515404 | 849 | if (reloc->address > bfd_get_section_limit (abfd, isection)) |
252b5132 | 850 | return bfd_reloc_outofrange; |
435b1e90 | 851 | |
4cc11e76 | 852 | /* Work out which section the relocation is targeted at and the |
252b5132 | 853 | initial relocation command value. */ |
435b1e90 | 854 | |
b34976b6 | 855 | if (reloc->howto->pc_relative) |
86aba9db NC |
856 | return bfd_reloc_ok; |
857 | ||
252b5132 RH |
858 | /* Get symbol value. (Common symbols are special.) */ |
859 | if (bfd_is_com_section (symbol->section)) | |
860 | relocation = 0; | |
861 | else | |
862 | relocation = symbol->value; | |
435b1e90 | 863 | |
252b5132 RH |
864 | /* Convert input-section-relative symbol value to absolute + addend. */ |
865 | relocation += symbol->section->output_section->vma; | |
866 | relocation += symbol->section->output_offset; | |
867 | relocation += reloc->addend; | |
435b1e90 | 868 | |
435b1e90 | 869 | reloc->addend = relocation; |
252b5132 RH |
870 | return bfd_reloc_ok; |
871 | } | |
86aba9db NC |
872 | |
873 | /* This function is used for relocs which are only used | |
874 | for relaxing, which the linker should otherwise ignore. */ | |
875 | ||
876 | static bfd_reloc_status_type | |
47b0e7ad NC |
877 | v850_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, |
878 | arelent *reloc_entry, | |
879 | asymbol *symbol ATTRIBUTE_UNUSED, | |
880 | void * data ATTRIBUTE_UNUSED, | |
881 | asection *input_section, | |
882 | bfd *output_bfd, | |
883 | char **error_message ATTRIBUTE_UNUSED) | |
86aba9db NC |
884 | { |
885 | if (output_bfd != NULL) | |
886 | reloc_entry->address += input_section->output_offset; | |
887 | ||
888 | return bfd_reloc_ok; | |
889 | } | |
47b0e7ad | 890 | /* Note: It is REQUIRED that the 'type' value of each entry |
1cd986c5 | 891 | in this array match the index of the entry in the array. |
de863c74 | 892 | SeeAlso: RELOC_NUBMER in include/elf/v850.h. */ |
47b0e7ad NC |
893 | static reloc_howto_type v850_elf_howto_table[] = |
894 | { | |
895 | /* This reloc does nothing. */ | |
896 | HOWTO (R_V850_NONE, /* Type. */ | |
897 | 0, /* Rightshift. */ | |
6346d5ca AM |
898 | 3, /* Size (0 = byte, 1 = short, 2 = long). */ |
899 | 0, /* Bitsize. */ | |
0a1b45a2 | 900 | false, /* PC_relative. */ |
47b0e7ad | 901 | 0, /* Bitpos. */ |
6346d5ca | 902 | complain_overflow_dont, /* Complain_on_overflow. */ |
47b0e7ad NC |
903 | bfd_elf_generic_reloc, /* Special_function. */ |
904 | "R_V850_NONE", /* Name. */ | |
0a1b45a2 | 905 | false, /* Partial_inplace. */ |
47b0e7ad NC |
906 | 0, /* Src_mask. */ |
907 | 0, /* Dst_mask. */ | |
0a1b45a2 | 908 | false), /* PCrel_offset. */ |
47b0e7ad NC |
909 | |
910 | /* A PC relative 9 bit branch. */ | |
911 | HOWTO (R_V850_9_PCREL, /* Type. */ | |
1cd986c5 NC |
912 | 0, /* Rightshift. */ |
913 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
914 | 9, /* Bitsize. */ | |
0a1b45a2 | 915 | true, /* PC_relative. */ |
47b0e7ad NC |
916 | 0, /* Bitpos. */ |
917 | complain_overflow_bitfield, /* Complain_on_overflow. */ | |
918 | v850_elf_reloc, /* Special_function. */ | |
919 | "R_V850_9_PCREL", /* Name. */ | |
0a1b45a2 | 920 | false, /* Partial_inplace. */ |
47b0e7ad NC |
921 | 0x00ffffff, /* Src_mask. */ |
922 | 0x00ffffff, /* Dst_mask. */ | |
0a1b45a2 | 923 | true), /* PCrel_offset. */ |
47b0e7ad NC |
924 | |
925 | /* A PC relative 22 bit branch. */ | |
926 | HOWTO (R_V850_22_PCREL, /* Type. */ | |
1cd986c5 | 927 | 0, /* Rightshift. */ |
47b0e7ad NC |
928 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ |
929 | 22, /* Bitsize. */ | |
0a1b45a2 | 930 | true, /* PC_relative. */ |
1cd986c5 | 931 | 0, /* Bitpos. */ |
47b0e7ad NC |
932 | complain_overflow_signed, /* Complain_on_overflow. */ |
933 | v850_elf_reloc, /* Special_function. */ | |
934 | "R_V850_22_PCREL", /* Name. */ | |
0a1b45a2 | 935 | false, /* Partial_inplace. */ |
47b0e7ad NC |
936 | 0x07ffff80, /* Src_mask. */ |
937 | 0x07ffff80, /* Dst_mask. */ | |
0a1b45a2 | 938 | true), /* PCrel_offset. */ |
47b0e7ad NC |
939 | |
940 | /* High 16 bits of symbol value. */ | |
941 | HOWTO (R_V850_HI16_S, /* Type. */ | |
942 | 0, /* Rightshift. */ | |
943 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
944 | 16, /* Bitsize. */ | |
0a1b45a2 | 945 | false, /* PC_relative. */ |
47b0e7ad NC |
946 | 0, /* Bitpos. */ |
947 | complain_overflow_dont, /* Complain_on_overflow. */ | |
948 | v850_elf_reloc, /* Special_function. */ | |
949 | "R_V850_HI16_S", /* Name. */ | |
0a1b45a2 | 950 | false, /* Partial_inplace. */ |
47b0e7ad NC |
951 | 0xffff, /* Src_mask. */ |
952 | 0xffff, /* Dst_mask. */ | |
0a1b45a2 | 953 | false), /* PCrel_offset. */ |
47b0e7ad NC |
954 | |
955 | /* High 16 bits of symbol value. */ | |
956 | HOWTO (R_V850_HI16, /* Type. */ | |
957 | 0, /* Rightshift. */ | |
958 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
959 | 16, /* Bitsize. */ | |
0a1b45a2 | 960 | false, /* PC_relative. */ |
47b0e7ad NC |
961 | 0, /* Bitpos. */ |
962 | complain_overflow_dont, /* Complain_on_overflow. */ | |
963 | v850_elf_reloc, /* Special_function. */ | |
964 | "R_V850_HI16", /* Name. */ | |
0a1b45a2 | 965 | false, /* Partial_inplace. */ |
47b0e7ad NC |
966 | 0xffff, /* Src_mask. */ |
967 | 0xffff, /* Dst_mask. */ | |
0a1b45a2 | 968 | false), /* PCrel_offset. */ |
47b0e7ad NC |
969 | |
970 | /* Low 16 bits of symbol value. */ | |
971 | HOWTO (R_V850_LO16, /* Type. */ | |
972 | 0, /* Rightshift. */ | |
973 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
974 | 16, /* Bitsize. */ | |
0a1b45a2 | 975 | false, /* PC_relative. */ |
47b0e7ad NC |
976 | 0, /* Bitpos. */ |
977 | complain_overflow_dont, /* Complain_on_overflow. */ | |
978 | v850_elf_reloc, /* Special_function. */ | |
979 | "R_V850_LO16", /* Name. */ | |
0a1b45a2 | 980 | false, /* Partial_inplace. */ |
47b0e7ad NC |
981 | 0xffff, /* Src_mask. */ |
982 | 0xffff, /* Dst_mask. */ | |
0a1b45a2 | 983 | false), /* PCrel_offset. */ |
47b0e7ad NC |
984 | |
985 | /* Simple 32bit reloc. */ | |
986 | HOWTO (R_V850_ABS32, /* Type. */ | |
987 | 0, /* Rightshift. */ | |
988 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ | |
989 | 32, /* Bitsize. */ | |
0a1b45a2 | 990 | false, /* PC_relative. */ |
47b0e7ad NC |
991 | 0, /* Bitpos. */ |
992 | complain_overflow_dont, /* Complain_on_overflow. */ | |
993 | v850_elf_reloc, /* Special_function. */ | |
994 | "R_V850_ABS32", /* Name. */ | |
0a1b45a2 | 995 | false, /* Partial_inplace. */ |
47b0e7ad NC |
996 | 0xffffffff, /* Src_mask. */ |
997 | 0xffffffff, /* Dst_mask. */ | |
0a1b45a2 | 998 | false), /* PCrel_offset. */ |
47b0e7ad NC |
999 | |
1000 | /* Simple 16bit reloc. */ | |
1001 | HOWTO (R_V850_16, /* Type. */ | |
1002 | 0, /* Rightshift. */ | |
1003 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1004 | 16, /* Bitsize. */ | |
0a1b45a2 | 1005 | false, /* PC_relative. */ |
47b0e7ad NC |
1006 | 0, /* Bitpos. */ |
1007 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1008 | bfd_elf_generic_reloc, /* Special_function. */ | |
1009 | "R_V850_16", /* Name. */ | |
0a1b45a2 | 1010 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1011 | 0xffff, /* Src_mask. */ |
1012 | 0xffff, /* Dst_mask. */ | |
0a1b45a2 | 1013 | false), /* PCrel_offset. */ |
47b0e7ad | 1014 | |
07d6d2b8 | 1015 | /* Simple 8bit reloc. */ |
47b0e7ad NC |
1016 | HOWTO (R_V850_8, /* Type. */ |
1017 | 0, /* Rightshift. */ | |
1018 | 0, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1019 | 8, /* Bitsize. */ | |
0a1b45a2 | 1020 | false, /* PC_relative. */ |
47b0e7ad NC |
1021 | 0, /* Bitpos. */ |
1022 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1023 | bfd_elf_generic_reloc, /* Special_function. */ | |
1024 | "R_V850_8", /* Name. */ | |
0a1b45a2 | 1025 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1026 | 0xff, /* Src_mask. */ |
1027 | 0xff, /* Dst_mask. */ | |
0a1b45a2 | 1028 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1029 | |
1030 | /* 16 bit offset from the short data area pointer. */ | |
1031 | HOWTO (R_V850_SDA_16_16_OFFSET, /* Type. */ | |
1032 | 0, /* Rightshift. */ | |
1033 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1034 | 16, /* Bitsize. */ | |
0a1b45a2 | 1035 | false, /* PC_relative. */ |
47b0e7ad NC |
1036 | 0, /* Bitpos. */ |
1037 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1038 | v850_elf_reloc, /* Special_function. */ | |
1039 | "R_V850_SDA_16_16_OFFSET", /* Name. */ | |
0a1b45a2 | 1040 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1041 | 0xffff, /* Src_mask. */ |
1042 | 0xffff, /* Dst_mask. */ | |
0a1b45a2 | 1043 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1044 | |
1045 | /* 15 bit offset from the short data area pointer. */ | |
1046 | HOWTO (R_V850_SDA_15_16_OFFSET, /* Type. */ | |
1047 | 1, /* Rightshift. */ | |
1048 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1049 | 16, /* Bitsize. */ | |
0a1b45a2 | 1050 | false, /* PC_relative. */ |
47b0e7ad NC |
1051 | 1, /* Bitpos. */ |
1052 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1053 | v850_elf_reloc, /* Special_function. */ | |
1054 | "R_V850_SDA_15_16_OFFSET", /* Name. */ | |
0a1b45a2 | 1055 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1056 | 0xfffe, /* Src_mask. */ |
1057 | 0xfffe, /* Dst_mask. */ | |
0a1b45a2 | 1058 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1059 | |
1060 | /* 16 bit offset from the zero data area pointer. */ | |
1061 | HOWTO (R_V850_ZDA_16_16_OFFSET, /* Type. */ | |
1062 | 0, /* Rightshift. */ | |
1063 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1064 | 16, /* Bitsize. */ | |
0a1b45a2 | 1065 | false, /* PC_relative. */ |
47b0e7ad NC |
1066 | 0, /* Bitpos. */ |
1067 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1068 | v850_elf_reloc, /* Special_function. */ | |
1069 | "R_V850_ZDA_16_16_OFFSET", /* Name. */ | |
0a1b45a2 | 1070 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1071 | 0xffff, /* Src_mask. */ |
1072 | 0xffff, /* Dst_mask. */ | |
0a1b45a2 | 1073 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1074 | |
1075 | /* 15 bit offset from the zero data area pointer. */ | |
1076 | HOWTO (R_V850_ZDA_15_16_OFFSET, /* Type. */ | |
1077 | 1, /* Rightshift. */ | |
1078 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1079 | 16, /* Bitsize. */ | |
0a1b45a2 | 1080 | false, /* PC_relative. */ |
47b0e7ad NC |
1081 | 1, /* Bitpos. */ |
1082 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1083 | v850_elf_reloc, /* Special_function. */ | |
1084 | "R_V850_ZDA_15_16_OFFSET", /* Name. */ | |
0a1b45a2 | 1085 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1086 | 0xfffe, /* Src_mask. */ |
1087 | 0xfffe, /* Dst_mask. */ | |
0a1b45a2 | 1088 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1089 | |
1090 | /* 6 bit offset from the tiny data area pointer. */ | |
1091 | HOWTO (R_V850_TDA_6_8_OFFSET, /* Type. */ | |
1092 | 2, /* Rightshift. */ | |
1093 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1094 | 8, /* Bitsize. */ | |
0a1b45a2 | 1095 | false, /* PC_relative. */ |
47b0e7ad NC |
1096 | 1, /* Bitpos. */ |
1097 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1098 | v850_elf_reloc, /* Special_function. */ | |
1099 | "R_V850_TDA_6_8_OFFSET", /* Name. */ | |
0a1b45a2 | 1100 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1101 | 0x7e, /* Src_mask. */ |
1102 | 0x7e, /* Dst_mask. */ | |
0a1b45a2 | 1103 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1104 | |
1105 | /* 8 bit offset from the tiny data area pointer. */ | |
1106 | HOWTO (R_V850_TDA_7_8_OFFSET, /* Type. */ | |
1107 | 1, /* Rightshift. */ | |
1108 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1109 | 8, /* Bitsize. */ | |
0a1b45a2 | 1110 | false, /* PC_relative. */ |
47b0e7ad NC |
1111 | 0, /* Bitpos. */ |
1112 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1113 | v850_elf_reloc, /* Special_function. */ | |
1114 | "R_V850_TDA_7_8_OFFSET", /* Name. */ | |
0a1b45a2 | 1115 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1116 | 0x7f, /* Src_mask. */ |
1117 | 0x7f, /* Dst_mask. */ | |
0a1b45a2 | 1118 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1119 | |
1120 | /* 7 bit offset from the tiny data area pointer. */ | |
1121 | HOWTO (R_V850_TDA_7_7_OFFSET, /* Type. */ | |
1122 | 0, /* Rightshift. */ | |
1123 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1124 | 7, /* Bitsize. */ | |
0a1b45a2 | 1125 | false, /* PC_relative. */ |
47b0e7ad NC |
1126 | 0, /* Bitpos. */ |
1127 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1128 | v850_elf_reloc, /* Special_function. */ | |
1129 | "R_V850_TDA_7_7_OFFSET", /* Name. */ | |
0a1b45a2 | 1130 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1131 | 0x7f, /* Src_mask. */ |
1132 | 0x7f, /* Dst_mask. */ | |
0a1b45a2 | 1133 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1134 | |
1135 | /* 16 bit offset from the tiny data area pointer! */ | |
1136 | HOWTO (R_V850_TDA_16_16_OFFSET, /* Type. */ | |
1137 | 0, /* Rightshift. */ | |
1138 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1139 | 16, /* Bitsize. */ | |
0a1b45a2 | 1140 | false, /* PC_relative. */ |
47b0e7ad NC |
1141 | 0, /* Bitpos. */ |
1142 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1143 | v850_elf_reloc, /* Special_function. */ | |
1144 | "R_V850_TDA_16_16_OFFSET", /* Name. */ | |
0a1b45a2 | 1145 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1146 | 0xffff, /* Src_mask. */ |
1147 | 0xfff, /* Dst_mask. */ | |
0a1b45a2 | 1148 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1149 | |
1150 | /* 5 bit offset from the tiny data area pointer. */ | |
1151 | HOWTO (R_V850_TDA_4_5_OFFSET, /* Type. */ | |
1152 | 1, /* Rightshift. */ | |
1153 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1154 | 5, /* Bitsize. */ | |
0a1b45a2 | 1155 | false, /* PC_relative. */ |
47b0e7ad NC |
1156 | 0, /* Bitpos. */ |
1157 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1158 | v850_elf_reloc, /* Special_function. */ | |
1159 | "R_V850_TDA_4_5_OFFSET", /* Name. */ | |
0a1b45a2 | 1160 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1161 | 0x0f, /* Src_mask. */ |
1162 | 0x0f, /* Dst_mask. */ | |
0a1b45a2 | 1163 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1164 | |
1165 | /* 4 bit offset from the tiny data area pointer. */ | |
1166 | HOWTO (R_V850_TDA_4_4_OFFSET, /* Type. */ | |
1167 | 0, /* Rightshift. */ | |
1168 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1169 | 4, /* Bitsize. */ | |
0a1b45a2 | 1170 | false, /* PC_relative. */ |
47b0e7ad NC |
1171 | 0, /* Bitpos. */ |
1172 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1173 | v850_elf_reloc, /* Special_function. */ | |
1174 | "R_V850_TDA_4_4_OFFSET", /* Name. */ | |
0a1b45a2 | 1175 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1176 | 0x0f, /* Src_mask. */ |
1177 | 0x0f, /* Dst_mask. */ | |
0a1b45a2 | 1178 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1179 | |
1180 | /* 16 bit offset from the short data area pointer. */ | |
1181 | HOWTO (R_V850_SDA_16_16_SPLIT_OFFSET, /* Type. */ | |
1182 | 0, /* Rightshift. */ | |
1183 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1184 | 16, /* Bitsize. */ | |
0a1b45a2 | 1185 | false, /* PC_relative. */ |
47b0e7ad NC |
1186 | 0, /* Bitpos. */ |
1187 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1188 | v850_elf_reloc, /* Special_function. */ | |
1189 | "R_V850_SDA_16_16_SPLIT_OFFSET",/* Name. */ | |
0a1b45a2 | 1190 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1191 | 0xfffe0020, /* Src_mask. */ |
1192 | 0xfffe0020, /* Dst_mask. */ | |
0a1b45a2 | 1193 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1194 | |
1195 | /* 16 bit offset from the zero data area pointer. */ | |
1196 | HOWTO (R_V850_ZDA_16_16_SPLIT_OFFSET, /* Type. */ | |
1197 | 0, /* Rightshift. */ | |
1198 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1199 | 16, /* Bitsize. */ | |
0a1b45a2 | 1200 | false, /* PC_relative. */ |
47b0e7ad NC |
1201 | 0, /* Bitpos. */ |
1202 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1203 | v850_elf_reloc, /* Special_function. */ | |
1204 | "R_V850_ZDA_16_16_SPLIT_OFFSET",/* Name. */ | |
0a1b45a2 | 1205 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1206 | 0xfffe0020, /* Src_mask. */ |
1207 | 0xfffe0020, /* Dst_mask. */ | |
0a1b45a2 | 1208 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1209 | |
1210 | /* 6 bit offset from the call table base pointer. */ | |
1211 | HOWTO (R_V850_CALLT_6_7_OFFSET, /* Type. */ | |
1212 | 0, /* Rightshift. */ | |
1213 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1214 | 7, /* Bitsize. */ | |
0a1b45a2 | 1215 | false, /* PC_relative. */ |
47b0e7ad NC |
1216 | 0, /* Bitpos. */ |
1217 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1218 | v850_elf_reloc, /* Special_function. */ | |
1219 | "R_V850_CALLT_6_7_OFFSET", /* Name. */ | |
0a1b45a2 | 1220 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1221 | 0x3f, /* Src_mask. */ |
1222 | 0x3f, /* Dst_mask. */ | |
0a1b45a2 | 1223 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1224 | |
1225 | /* 16 bit offset from the call table base pointer. */ | |
1226 | HOWTO (R_V850_CALLT_16_16_OFFSET, /* Type. */ | |
1227 | 0, /* Rightshift. */ | |
1228 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1229 | 16, /* Bitsize. */ | |
0a1b45a2 | 1230 | false, /* PC_relative. */ |
47b0e7ad NC |
1231 | 0, /* Bitpos. */ |
1232 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1233 | v850_elf_reloc, /* Special_function. */ | |
1234 | "R_V850_CALLT_16_16_OFFSET", /* Name. */ | |
0a1b45a2 | 1235 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1236 | 0xffff, /* Src_mask. */ |
1237 | 0xffff, /* Dst_mask. */ | |
0a1b45a2 | 1238 | false), /* PCrel_offset. */ |
47b0e7ad | 1239 | |
1cd986c5 | 1240 | |
47b0e7ad NC |
1241 | /* GNU extension to record C++ vtable hierarchy */ |
1242 | HOWTO (R_V850_GNU_VTINHERIT, /* Type. */ | |
07d6d2b8 AM |
1243 | 0, /* Rightshift. */ |
1244 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1245 | 0, /* Bitsize. */ | |
0a1b45a2 | 1246 | false, /* PC_relative. */ |
07d6d2b8 | 1247 | 0, /* Bitpos. */ |
1cd986c5 | 1248 | complain_overflow_dont, /* Complain_on_overflow. */ |
07d6d2b8 | 1249 | NULL, /* Special_function. */ |
1cd986c5 | 1250 | "R_V850_GNU_VTINHERIT", /* Name. */ |
0a1b45a2 | 1251 | false, /* Partial_inplace. */ |
07d6d2b8 AM |
1252 | 0, /* Src_mask. */ |
1253 | 0, /* Dst_mask. */ | |
0a1b45a2 | 1254 | false), /* PCrel_offset. */ |
1cd986c5 NC |
1255 | |
1256 | /* GNU extension to record C++ vtable member usage. */ | |
07d6d2b8 AM |
1257 | HOWTO (R_V850_GNU_VTENTRY, /* Type. */ |
1258 | 0, /* Rightshift. */ | |
1259 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1260 | 0, /* Bitsize. */ | |
0a1b45a2 | 1261 | false, /* PC_relative. */ |
07d6d2b8 | 1262 | 0, /* Bitpos. */ |
1cd986c5 | 1263 | complain_overflow_dont, /* Complain_on_overflow. */ |
07d6d2b8 AM |
1264 | _bfd_elf_rel_vtable_reloc_fn, /* Special_function. */ |
1265 | "R_V850_GNU_VTENTRY", /* Name. */ | |
0a1b45a2 | 1266 | false, /* Partial_inplace. */ |
07d6d2b8 AM |
1267 | 0, /* Src_mask. */ |
1268 | 0, /* Dst_mask. */ | |
0a1b45a2 | 1269 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1270 | |
1271 | /* Indicates a .longcall pseudo-op. The compiler will generate a .longcall | |
1272 | pseudo-op when it finds a function call which can be relaxed. */ | |
1273 | HOWTO (R_V850_LONGCALL, /* Type. */ | |
07d6d2b8 AM |
1274 | 0, /* Rightshift. */ |
1275 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1276 | 32, /* Bitsize. */ | |
0a1b45a2 | 1277 | true, /* PC_relative. */ |
07d6d2b8 | 1278 | 0, /* Bitpos. */ |
1cd986c5 NC |
1279 | complain_overflow_signed, /* Complain_on_overflow. */ |
1280 | v850_elf_ignore_reloc, /* Special_function. */ | |
07d6d2b8 | 1281 | "R_V850_LONGCALL", /* Name. */ |
0a1b45a2 | 1282 | false, /* Partial_inplace. */ |
07d6d2b8 AM |
1283 | 0, /* Src_mask. */ |
1284 | 0, /* Dst_mask. */ | |
0a1b45a2 | 1285 | true), /* PCrel_offset. */ |
47b0e7ad NC |
1286 | |
1287 | /* Indicates a .longjump pseudo-op. The compiler will generate a | |
1288 | .longjump pseudo-op when it finds a branch which can be relaxed. */ | |
1289 | HOWTO (R_V850_LONGJUMP, /* Type. */ | |
07d6d2b8 AM |
1290 | 0, /* Rightshift. */ |
1291 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1292 | 32, /* Bitsize. */ | |
0a1b45a2 | 1293 | true, /* PC_relative. */ |
07d6d2b8 | 1294 | 0, /* Bitpos. */ |
1cd986c5 NC |
1295 | complain_overflow_signed, /* Complain_on_overflow. */ |
1296 | v850_elf_ignore_reloc, /* Special_function. */ | |
07d6d2b8 | 1297 | "R_V850_LONGJUMP", /* Name. */ |
0a1b45a2 | 1298 | false, /* Partial_inplace. */ |
07d6d2b8 AM |
1299 | 0, /* Src_mask. */ |
1300 | 0, /* Dst_mask. */ | |
0a1b45a2 | 1301 | true), /* PCrel_offset. */ |
07d6d2b8 AM |
1302 | |
1303 | HOWTO (R_V850_ALIGN, /* Type. */ | |
1304 | 0, /* Rightshift. */ | |
1305 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1306 | 0, /* Bitsize. */ | |
0a1b45a2 | 1307 | false, /* PC_relative. */ |
07d6d2b8 | 1308 | 0, /* Bitpos. */ |
1cd986c5 NC |
1309 | complain_overflow_unsigned, /* Complain_on_overflow. */ |
1310 | v850_elf_ignore_reloc, /* Special_function. */ | |
07d6d2b8 | 1311 | "R_V850_ALIGN", /* Name. */ |
0a1b45a2 | 1312 | false, /* Partial_inplace. */ |
07d6d2b8 AM |
1313 | 0, /* Src_mask. */ |
1314 | 0, /* Dst_mask. */ | |
0a1b45a2 | 1315 | true), /* PCrel_offset. */ |
1cd986c5 | 1316 | |
47b0e7ad NC |
1317 | /* Simple pc-relative 32bit reloc. */ |
1318 | HOWTO (R_V850_REL32, /* Type. */ | |
1319 | 0, /* Rightshift. */ | |
1320 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1321 | 32, /* Bitsize. */ | |
0a1b45a2 | 1322 | true, /* PC_relative. */ |
47b0e7ad NC |
1323 | 0, /* Bitpos. */ |
1324 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1325 | v850_elf_reloc, /* Special_function. */ | |
1326 | "R_V850_REL32", /* Name. */ | |
0a1b45a2 | 1327 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1328 | 0xffffffff, /* Src_mask. */ |
1329 | 0xffffffff, /* Dst_mask. */ | |
0a1b45a2 | 1330 | false), /* PCrel_offset. */ |
47b0e7ad NC |
1331 | |
1332 | /* An ld.bu version of R_V850_LO16. */ | |
1333 | HOWTO (R_V850_LO16_SPLIT_OFFSET, /* Type. */ | |
1334 | 0, /* Rightshift. */ | |
1335 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1336 | 16, /* Bitsize. */ | |
0a1b45a2 | 1337 | false, /* PC_relative. */ |
47b0e7ad NC |
1338 | 0, /* Bitpos. */ |
1339 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1340 | v850_elf_reloc, /* Special_function. */ | |
1341 | "R_V850_LO16_SPLIT_OFFSET", /* Name. */ | |
0a1b45a2 | 1342 | false, /* Partial_inplace. */ |
47b0e7ad NC |
1343 | 0xfffe0020, /* Src_mask. */ |
1344 | 0xfffe0020, /* Dst_mask. */ | |
0a1b45a2 | 1345 | false), /* PCrel_offset. */ |
1cd986c5 NC |
1346 | |
1347 | /* A unsigned PC relative 16 bit loop. */ | |
1348 | HOWTO (R_V850_16_PCREL, /* Type. */ | |
1349 | 0, /* Rightshift. */ | |
1350 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1351 | 16, /* Bitsize. */ | |
0a1b45a2 | 1352 | true, /* PC_relative. */ |
1cd986c5 NC |
1353 | 0, /* Bitpos. */ |
1354 | complain_overflow_bitfield, /* Complain_on_overflow. */ | |
1355 | v850_elf_reloc, /* Special_function. */ | |
1356 | "R_V850_16_PCREL", /* Name. */ | |
0a1b45a2 | 1357 | false, /* Partial_inplace. */ |
1cd986c5 NC |
1358 | 0xfffe, /* Src_mask. */ |
1359 | 0xfffe, /* Dst_mask. */ | |
0a1b45a2 | 1360 | true), /* PCrel_offset. */ |
1cd986c5 NC |
1361 | |
1362 | /* A PC relative 17 bit branch. */ | |
1363 | HOWTO (R_V850_17_PCREL, /* Type. */ | |
1364 | 0, /* Rightshift. */ | |
1365 | 2, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1366 | 17, /* Bitsize. */ | |
0a1b45a2 | 1367 | true, /* PC_relative. */ |
1cd986c5 NC |
1368 | 0, /* Bitpos. */ |
1369 | complain_overflow_bitfield, /* Complain_on_overflow. */ | |
1370 | v850_elf_reloc, /* Special_function. */ | |
1371 | "R_V850_17_PCREL", /* Name. */ | |
0a1b45a2 | 1372 | false, /* Partial_inplace. */ |
1cd986c5 NC |
1373 | 0x0010fffe, /* Src_mask. */ |
1374 | 0x0010fffe, /* Dst_mask. */ | |
0a1b45a2 | 1375 | true), /* PCrel_offset. */ |
1cd986c5 NC |
1376 | |
1377 | /* A 23bit offset ld/st. */ | |
1378 | HOWTO (R_V850_23, /* type. */ | |
1379 | 0, /* rightshift. */ | |
1380 | 2, /* size (0 = byte, 1 = short, 2 = long). */ | |
1381 | 23, /* bitsize. */ | |
0a1b45a2 | 1382 | false, /* pc_relative. */ |
1cd986c5 NC |
1383 | 0, /* bitpos. */ |
1384 | complain_overflow_dont, /* complain_on_overflow. */ | |
1385 | v850_elf_reloc, /* special_function. */ | |
1386 | "R_V850_23", /* name. */ | |
0a1b45a2 | 1387 | false, /* partial_inplace. */ |
1cd986c5 NC |
1388 | 0xffff07f0, /* src_mask. */ |
1389 | 0xffff07f0, /* dst_mask. */ | |
0a1b45a2 | 1390 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1391 | |
1392 | /* A PC relative 32 bit branch. */ | |
1393 | HOWTO (R_V850_32_PCREL, /* type. */ | |
1394 | 1, /* rightshift. */ | |
1395 | 2, /* size (0 = byte, 1 = short, 2 = long). */ | |
1396 | 32, /* bitsize. */ | |
0a1b45a2 | 1397 | true, /* pc_relative. */ |
1cd986c5 NC |
1398 | 1, /* bitpos. */ |
1399 | complain_overflow_signed, /* complain_on_overflow. */ | |
1400 | v850_elf_reloc, /* special_function. */ | |
1401 | "R_V850_32_PCREL", /* name. */ | |
0a1b45a2 | 1402 | false, /* partial_inplace. */ |
1cd986c5 NC |
1403 | 0xfffffffe, /* src_mask. */ |
1404 | 0xfffffffe, /* dst_mask. */ | |
0a1b45a2 | 1405 | true), /* pcrel_offset. */ |
1cd986c5 | 1406 | |
07d6d2b8 | 1407 | /* A absolute 32 bit branch. */ |
1cd986c5 NC |
1408 | HOWTO (R_V850_32_ABS, /* type. */ |
1409 | 1, /* rightshift. */ | |
1410 | 2, /* size (0 = byte, 1 = short, 2 = long). */ | |
1411 | 32, /* bitsize. */ | |
0a1b45a2 | 1412 | true, /* pc_relative. */ |
1cd986c5 NC |
1413 | 1, /* bitpos. */ |
1414 | complain_overflow_signed, /* complain_on_overflow. */ | |
1415 | v850_elf_reloc, /* special_function. */ | |
1416 | "R_V850_32_ABS", /* name. */ | |
0a1b45a2 | 1417 | false, /* partial_inplace. */ |
1cd986c5 NC |
1418 | 0xfffffffe, /* src_mask. */ |
1419 | 0xfffffffe, /* dst_mask. */ | |
0a1b45a2 | 1420 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1421 | |
1422 | /* High 16 bits of symbol value. */ | |
1423 | HOWTO (R_V850_HI16, /* Type. */ | |
1424 | 0, /* Rightshift. */ | |
1425 | 1, /* Size (0 = byte, 1 = short, 2 = long). */ | |
1426 | 16, /* Bitsize. */ | |
0a1b45a2 | 1427 | false, /* PC_relative. */ |
1cd986c5 NC |
1428 | 0, /* Bitpos. */ |
1429 | complain_overflow_dont, /* Complain_on_overflow. */ | |
1430 | v850_elf_reloc, /* Special_function. */ | |
1431 | "R_V850_HI16", /* Name. */ | |
0a1b45a2 | 1432 | false, /* Partial_inplace. */ |
1cd986c5 NC |
1433 | 0xffff, /* Src_mask. */ |
1434 | 0xffff, /* Dst_mask. */ | |
0a1b45a2 | 1435 | false), /* PCrel_offset. */ |
1cd986c5 NC |
1436 | |
1437 | /* Low 16 bits of symbol value. */ | |
1438 | HOWTO (R_V850_16_S1, /* type. */ | |
1439 | 1, /* rightshift. */ | |
1440 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1441 | 16, /* bitsize. */ | |
0a1b45a2 | 1442 | false, /* pc_relative. */ |
1cd986c5 NC |
1443 | 1, /* bitpos. */ |
1444 | complain_overflow_dont, /* complain_on_overflow. */ | |
1445 | v850_elf_reloc, /* special_function. */ | |
1446 | "R_V850_16_S1", /* name. */ | |
0a1b45a2 | 1447 | false, /* partial_inplace. */ |
1cd986c5 NC |
1448 | 0xfffe, /* src_mask. */ |
1449 | 0xfffe, /* dst_mask. */ | |
0a1b45a2 | 1450 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1451 | |
1452 | /* Low 16 bits of symbol value. */ | |
1453 | HOWTO (R_V850_LO16_S1, /* type. */ | |
1454 | 1, /* rightshift. */ | |
1455 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1456 | 16, /* bitsize. */ | |
0a1b45a2 | 1457 | false, /* pc_relative. */ |
1cd986c5 NC |
1458 | 1, /* bitpos. */ |
1459 | complain_overflow_dont, /* complain_on_overflow. */ | |
1460 | v850_elf_reloc, /* special_function. */ | |
1461 | "R_V850_LO16_S1", /* name. */ | |
0a1b45a2 | 1462 | false, /* partial_inplace. */ |
1cd986c5 NC |
1463 | 0xfffe, /* src_mask. */ |
1464 | 0xfffe, /* dst_mask. */ | |
0a1b45a2 | 1465 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1466 | |
1467 | /* 16 bit offset from the call table base pointer. */ | |
1468 | HOWTO (R_V850_CALLT_15_16_OFFSET, /* type. */ | |
1469 | 1, /* rightshift. */ | |
1470 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1471 | 16, /* bitsize. */ | |
0a1b45a2 | 1472 | false, /* pc_relative. */ |
1cd986c5 NC |
1473 | 1, /* bitpos. */ |
1474 | complain_overflow_dont, /* complain_on_overflow. */ | |
1475 | v850_elf_reloc, /* special_function. */ | |
1476 | "R_V850_CALLT_15_16_OFFSET", /* name. */ | |
0a1b45a2 | 1477 | false, /* partial_inplace. */ |
1cd986c5 NC |
1478 | 0xfffe, /* src_mask. */ |
1479 | 0xfffe, /* dst_mask. */ | |
0a1b45a2 | 1480 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1481 | |
1482 | /* Like R_V850_32 PCREL, but referring to the GOT table entry for | |
1483 | the symbol. */ | |
1484 | HOWTO (R_V850_32_GOTPCREL, /* type. */ | |
1485 | 0, /* rightshift. */ | |
1486 | 2, /* size (0 = byte, 1 = short, 2 = long). */ | |
1487 | 32, /* bitsize. */ | |
0a1b45a2 | 1488 | true, /* pc_relative. */ |
1cd986c5 NC |
1489 | 0, /* bitpos. */ |
1490 | complain_overflow_unsigned, /* complain_on_overflow. */ | |
1491 | v850_elf_reloc, /* special_function. */ | |
1492 | "R_V850_32_GOTPCREL", /* name. */ | |
0a1b45a2 | 1493 | false, /* partial_inplace. */ |
1cd986c5 NC |
1494 | 0xffffffff, /* src_mask. */ |
1495 | 0xffffffff, /* dst_mask. */ | |
0a1b45a2 | 1496 | true), /* pcrel_offset. */ |
1cd986c5 NC |
1497 | |
1498 | /* Like R_V850_SDA_, but referring to the GOT table entry for | |
1499 | the symbol. */ | |
1500 | HOWTO (R_V850_16_GOT, /* type. */ | |
1501 | 0, /* rightshift. */ | |
1502 | 2, /* size (0 = byte, 1 = short, 2 = long). */ | |
1503 | 16, /* bitsize. */ | |
0a1b45a2 | 1504 | false, /* pc_relative. */ |
1cd986c5 NC |
1505 | 0, /* bitpos. */ |
1506 | complain_overflow_unsigned, /* complain_on_overflow. */ | |
1507 | bfd_elf_generic_reloc, /* special_function. */ | |
1508 | "R_V850_16_GOT", /* name. */ | |
0a1b45a2 | 1509 | false, /* partial_inplace. */ |
1cd986c5 NC |
1510 | 0xffff, /* src_mask. */ |
1511 | 0xffff, /* dst_mask. */ | |
0a1b45a2 | 1512 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1513 | |
1514 | HOWTO (R_V850_32_GOT, /* type. */ | |
1515 | 0, /* rightshift. */ | |
1516 | 2, /* size (0 = byte, 1 = short, 2 = long). */ | |
1517 | 32, /* bitsize. */ | |
0a1b45a2 | 1518 | false, /* pc_relative. */ |
1cd986c5 NC |
1519 | 0, /* bitpos. */ |
1520 | complain_overflow_unsigned, /* complain_on_overflow. */ | |
1521 | bfd_elf_generic_reloc, /* special_function. */ | |
1522 | "R_V850_32_GOT", /* name. */ | |
0a1b45a2 | 1523 | false, /* partial_inplace. */ |
1cd986c5 NC |
1524 | 0xffffffff, /* src_mask. */ |
1525 | 0xffffffff, /* dst_mask. */ | |
0a1b45a2 | 1526 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1527 | |
1528 | /* Like R_V850_22_PCREL, but referring to the procedure linkage table | |
1529 | entry for the symbol. */ | |
1530 | HOWTO (R_V850_22_PLT, /* type. */ | |
1531 | 1, /* rightshift. */ | |
1532 | 2, /* size (0 = byte, 1 = short, 2 = long). */ | |
1533 | 22, /* bitsize. */ | |
0a1b45a2 | 1534 | true, /* pc_relative. */ |
1cd986c5 NC |
1535 | 7, /* bitpos. */ |
1536 | complain_overflow_signed, /* complain_on_overflow. */ | |
1537 | bfd_elf_generic_reloc, /* special_function. */ | |
1538 | "R_V850_22_PLT", /* name. */ | |
0a1b45a2 | 1539 | false, /* partial_inplace. */ |
1cd986c5 NC |
1540 | 0x07ffff80, /* src_mask. */ |
1541 | 0x07ffff80, /* dst_mask. */ | |
0a1b45a2 | 1542 | true), /* pcrel_offset. */ |
1cd986c5 NC |
1543 | |
1544 | HOWTO (R_V850_32_PLT, /* type. */ | |
1545 | 1, /* rightshift. */ | |
1546 | 2, /* size (0 = byte, 1 = short, 2 = long). */ | |
1547 | 32, /* bitsize. */ | |
0a1b45a2 | 1548 | true, /* pc_relative. */ |
1cd986c5 NC |
1549 | 1, /* bitpos. */ |
1550 | complain_overflow_signed, /* complain_on_overflow. */ | |
1551 | bfd_elf_generic_reloc, /* special_function. */ | |
1552 | "R_V850_32_PLT", /* name. */ | |
0a1b45a2 | 1553 | false, /* partial_inplace. */ |
1cd986c5 NC |
1554 | 0xffffffff, /* src_mask. */ |
1555 | 0xffffffff, /* dst_mask. */ | |
0a1b45a2 | 1556 | true), /* pcrel_offset. */ |
1cd986c5 NC |
1557 | |
1558 | /* This is used only by the dynamic linker. The symbol should exist | |
1559 | both in the object being run and in some shared library. The | |
1560 | dynamic linker copies the data addressed by the symbol from the | |
1561 | shared library into the object, because the object being | |
1562 | run has to have the data at some particular address. */ | |
1563 | HOWTO (R_V850_COPY, /* type. */ | |
1564 | 0, /* rightshift. */ | |
1565 | 2, /* size (0 = byte, 1 = short, 2 = long). */ | |
1566 | 32, /* bitsize. */ | |
0a1b45a2 | 1567 | false, /* pc_relative. */ |
1cd986c5 NC |
1568 | 0, /* bitpos. */ |
1569 | complain_overflow_bitfield, /* complain_on_overflow. */ | |
1570 | bfd_elf_generic_reloc, /* special_function. */ | |
1571 | "R_V850_COPY", /* name. */ | |
0a1b45a2 | 1572 | false, /* partial_inplace. */ |
1cd986c5 NC |
1573 | 0xffffffff, /* src_mask. */ |
1574 | 0xffffffff, /* dst_mask. */ | |
0a1b45a2 | 1575 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1576 | |
1577 | /* Like R_M32R_24, but used when setting global offset table | |
1578 | entries. */ | |
1579 | HOWTO (R_V850_GLOB_DAT, /* type. */ | |
1580 | 0, /* rightshift. */ | |
1581 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1582 | 32, /* bitsize. */ | |
0a1b45a2 | 1583 | false, /* pc_relative. */ |
1cd986c5 NC |
1584 | 0, /* bitpos. */ |
1585 | complain_overflow_bitfield, /* complain_on_overflow. */ | |
1586 | bfd_elf_generic_reloc, /* special_function. */ | |
1587 | "R_V850_GLOB_DAT", /* name. */ | |
0a1b45a2 | 1588 | false, /* partial_inplace. */ |
1cd986c5 NC |
1589 | 0xffffffff, /* src_mask. */ |
1590 | 0xffffffff, /* dst_mask. */ | |
0a1b45a2 | 1591 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1592 | |
1593 | /* Marks a procedure linkage table entry for a symbol. */ | |
1594 | HOWTO (R_V850_JMP_SLOT, /* type. */ | |
1595 | 0, /* rightshift. */ | |
1596 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1597 | 32, /* bitsize. */ | |
0a1b45a2 | 1598 | false, /* pc_relative. */ |
1cd986c5 NC |
1599 | 0, /* bitpos. */ |
1600 | complain_overflow_bitfield, /* complain_on_overflow. */ | |
1601 | bfd_elf_generic_reloc, /* special_function. */ | |
1602 | "R_V850_JMP_SLOT", /* name. */ | |
0a1b45a2 | 1603 | false, /* partial_inplace. */ |
1cd986c5 NC |
1604 | 0xffffffff, /* src_mask. */ |
1605 | 0xffffffff, /* dst_mask. */ | |
0a1b45a2 | 1606 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1607 | |
1608 | /* Used only by the dynamic linker. When the object is run, this | |
1609 | longword is set to the load address of the object, plus the | |
1610 | addend. */ | |
1611 | HOWTO (R_V850_RELATIVE, /* type. */ | |
1612 | 0, /* rightshift. */ | |
1613 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1614 | 32, /* bitsize. */ | |
0a1b45a2 | 1615 | false, /* pc_relative. */ |
1cd986c5 NC |
1616 | 0, /* bitpos. */ |
1617 | complain_overflow_bitfield, /* complain_on_overflow. */ | |
1618 | bfd_elf_generic_reloc, /* special_function. */ | |
1619 | "R_V850_RELATIVE", /* name. */ | |
0a1b45a2 | 1620 | false, /* partial_inplace. */ |
1cd986c5 NC |
1621 | 0xffffffff, /* src_mask. */ |
1622 | 0xffffffff, /* dst_mask. */ | |
0a1b45a2 | 1623 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1624 | |
1625 | HOWTO (R_V850_16_GOTOFF, /* type. */ | |
1626 | 0, /* rightshift. */ | |
1627 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1628 | 16, /* bitsize. */ | |
0a1b45a2 | 1629 | false, /* pc_relative. */ |
1cd986c5 NC |
1630 | 0, /* bitpos. */ |
1631 | complain_overflow_bitfield, /* complain_on_overflow. */ | |
1632 | bfd_elf_generic_reloc, /* special_function. */ | |
1633 | "R_V850_16_GOTOFF", /* name. */ | |
0a1b45a2 | 1634 | false, /* partial_inplace. */ |
1cd986c5 NC |
1635 | 0xffff, /* src_mask. */ |
1636 | 0xffff, /* dst_mask. */ | |
0a1b45a2 | 1637 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1638 | |
1639 | HOWTO (R_V850_32_GOTOFF, /* type. */ | |
1640 | 0, /* rightshift. */ | |
1641 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1642 | 32, /* bitsize. */ | |
0a1b45a2 | 1643 | false, /* pc_relative. */ |
1cd986c5 NC |
1644 | 0, /* bitpos. */ |
1645 | complain_overflow_bitfield, /* complain_on_overflow. */ | |
1646 | bfd_elf_generic_reloc, /* special_function. */ | |
1647 | "R_V850_32_GOTOFF", /* name. */ | |
0a1b45a2 | 1648 | false, /* partial_inplace. */ |
1cd986c5 NC |
1649 | 0xffffffff, /* src_mask. */ |
1650 | 0xffffffff, /* dst_mask. */ | |
0a1b45a2 | 1651 | false), /* pcrel_offset. */ |
1cd986c5 NC |
1652 | |
1653 | HOWTO (R_V850_CODE, /* type. */ | |
1654 | 0, /* rightshift. */ | |
1655 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1656 | 0, /* bitsize. */ | |
0a1b45a2 | 1657 | false, /* pc_relative. */ |
1cd986c5 NC |
1658 | 0, /* bitpos. */ |
1659 | complain_overflow_unsigned, /* complain_on_overflow. */ | |
1660 | v850_elf_ignore_reloc, /* special_function. */ | |
1661 | "R_V850_CODE", /* name. */ | |
0a1b45a2 | 1662 | false, /* partial_inplace. */ |
1cd986c5 NC |
1663 | 0, /* src_mask. */ |
1664 | 0, /* dst_mask. */ | |
0a1b45a2 | 1665 | true), /* pcrel_offset. */ |
1cd986c5 NC |
1666 | |
1667 | HOWTO (R_V850_DATA, /* type. */ | |
1668 | 0, /* rightshift. */ | |
1669 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1670 | 0, /* bitsize. */ | |
0a1b45a2 | 1671 | false, /* pc_relative. */ |
1cd986c5 NC |
1672 | 0, /* bitpos. */ |
1673 | complain_overflow_unsigned, /* complain_on_overflow. */ | |
1674 | v850_elf_ignore_reloc, /* special_function. */ | |
1675 | "R_V850_DATA", /* name. */ | |
0a1b45a2 | 1676 | false, /* partial_inplace. */ |
1cd986c5 NC |
1677 | 0, /* src_mask. */ |
1678 | 0, /* dst_mask. */ | |
0a1b45a2 | 1679 | true), /* pcrel_offset. */ |
1cd986c5 | 1680 | |
47b0e7ad NC |
1681 | }; |
1682 | ||
1683 | /* Map BFD reloc types to V850 ELF reloc types. */ | |
1684 | ||
1685 | struct v850_elf_reloc_map | |
1686 | { | |
1687 | /* BFD_RELOC_V850_CALLT_16_16_OFFSET is 258, which will not fix in an | |
1688 | unsigned char. */ | |
1689 | bfd_reloc_code_real_type bfd_reloc_val; | |
1690 | unsigned int elf_reloc_val; | |
1691 | }; | |
1692 | ||
1693 | static const struct v850_elf_reloc_map v850_elf_reloc_map[] = | |
1694 | { | |
07d6d2b8 AM |
1695 | { BFD_RELOC_NONE, R_V850_NONE }, |
1696 | { BFD_RELOC_V850_9_PCREL, R_V850_9_PCREL }, | |
1697 | { BFD_RELOC_V850_22_PCREL, R_V850_22_PCREL }, | |
1698 | { BFD_RELOC_HI16_S, R_V850_HI16_S }, | |
1699 | { BFD_RELOC_HI16, R_V850_HI16 }, | |
1700 | { BFD_RELOC_LO16, R_V850_LO16 }, | |
1701 | { BFD_RELOC_32, R_V850_ABS32 }, | |
1702 | { BFD_RELOC_32_PCREL, R_V850_REL32 }, | |
1703 | { BFD_RELOC_16, R_V850_16 }, | |
1704 | { BFD_RELOC_8, R_V850_8 }, | |
1705 | { BFD_RELOC_V850_SDA_16_16_OFFSET, R_V850_SDA_16_16_OFFSET }, | |
1706 | { BFD_RELOC_V850_SDA_15_16_OFFSET, R_V850_SDA_15_16_OFFSET }, | |
1707 | { BFD_RELOC_V850_ZDA_16_16_OFFSET, R_V850_ZDA_16_16_OFFSET }, | |
1708 | { BFD_RELOC_V850_ZDA_15_16_OFFSET, R_V850_ZDA_15_16_OFFSET }, | |
1709 | { BFD_RELOC_V850_TDA_6_8_OFFSET, R_V850_TDA_6_8_OFFSET }, | |
1710 | { BFD_RELOC_V850_TDA_7_8_OFFSET, R_V850_TDA_7_8_OFFSET }, | |
1711 | { BFD_RELOC_V850_TDA_7_7_OFFSET, R_V850_TDA_7_7_OFFSET }, | |
1712 | { BFD_RELOC_V850_TDA_16_16_OFFSET, R_V850_TDA_16_16_OFFSET }, | |
1713 | { BFD_RELOC_V850_TDA_4_5_OFFSET, R_V850_TDA_4_5_OFFSET }, | |
1714 | { BFD_RELOC_V850_TDA_4_4_OFFSET, R_V850_TDA_4_4_OFFSET }, | |
1715 | { BFD_RELOC_V850_LO16_SPLIT_OFFSET, R_V850_LO16_SPLIT_OFFSET }, | |
47b0e7ad NC |
1716 | { BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET, R_V850_SDA_16_16_SPLIT_OFFSET }, |
1717 | { BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET, R_V850_ZDA_16_16_SPLIT_OFFSET }, | |
07d6d2b8 AM |
1718 | { BFD_RELOC_V850_CALLT_6_7_OFFSET, R_V850_CALLT_6_7_OFFSET }, |
1719 | { BFD_RELOC_V850_CALLT_16_16_OFFSET, R_V850_CALLT_16_16_OFFSET }, | |
1720 | { BFD_RELOC_VTABLE_INHERIT, R_V850_GNU_VTINHERIT }, | |
1721 | { BFD_RELOC_VTABLE_ENTRY, R_V850_GNU_VTENTRY }, | |
1722 | { BFD_RELOC_V850_LONGCALL, R_V850_LONGCALL }, | |
1723 | { BFD_RELOC_V850_LONGJUMP, R_V850_LONGJUMP }, | |
1724 | { BFD_RELOC_V850_ALIGN, R_V850_ALIGN }, | |
1725 | { BFD_RELOC_V850_16_PCREL, R_V850_16_PCREL }, | |
1726 | { BFD_RELOC_V850_17_PCREL, R_V850_17_PCREL }, | |
1727 | { BFD_RELOC_V850_23, R_V850_23 }, | |
1728 | { BFD_RELOC_V850_32_PCREL, R_V850_32_PCREL }, | |
1729 | { BFD_RELOC_V850_32_ABS, R_V850_32_ABS }, | |
1730 | { BFD_RELOC_V850_16_SPLIT_OFFSET, R_V850_HI16 }, | |
1731 | { BFD_RELOC_V850_16_S1, R_V850_16_S1 }, | |
1732 | { BFD_RELOC_V850_LO16_S1, R_V850_LO16_S1 }, | |
1733 | { BFD_RELOC_V850_CALLT_15_16_OFFSET, R_V850_CALLT_15_16_OFFSET }, | |
1734 | { BFD_RELOC_V850_32_GOTPCREL, R_V850_32_GOTPCREL }, | |
1735 | { BFD_RELOC_V850_16_GOT, R_V850_16_GOT }, | |
1736 | { BFD_RELOC_V850_32_GOT, R_V850_32_GOT }, | |
1737 | { BFD_RELOC_V850_22_PLT_PCREL, R_V850_22_PLT }, | |
1738 | { BFD_RELOC_V850_32_PLT_PCREL, R_V850_32_PLT }, | |
1739 | { BFD_RELOC_V850_COPY, R_V850_COPY }, | |
1740 | { BFD_RELOC_V850_GLOB_DAT, R_V850_GLOB_DAT }, | |
1741 | { BFD_RELOC_V850_JMP_SLOT, R_V850_JMP_SLOT }, | |
1742 | { BFD_RELOC_V850_RELATIVE, R_V850_RELATIVE }, | |
1743 | { BFD_RELOC_V850_16_GOTOFF, R_V850_16_GOTOFF }, | |
1744 | { BFD_RELOC_V850_32_GOTOFF, R_V850_32_GOTOFF }, | |
1745 | { BFD_RELOC_V850_CODE, R_V850_CODE }, | |
1746 | { BFD_RELOC_V850_DATA, R_V850_DATA }, | |
47b0e7ad | 1747 | }; |
de863c74 NC |
1748 | |
1749 | #define V800_RELOC(name,sz,bit,shift,complain,pcrel,resolver) \ | |
1750 | HOWTO (name, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ | |
0a1b45a2 | 1751 | bfd_elf_ ## resolver ## _reloc, #name, false, 0, ~0, false) |
de863c74 NC |
1752 | |
1753 | #define V800_EMPTY(name) EMPTY_HOWTO (name - R_V810_NONE) | |
1754 | ||
1755 | #define bfd_elf_v850_reloc v850_elf_reloc | |
1756 | ||
1757 | /* Note: It is REQUIRED that the 'type' value (R_V810_...) of each entry | |
1758 | in this array match the index of the entry in the array minus 0x30. | |
1759 | See: bfd_elf_v850_relocate_section(), v800_elf_reloc_type_lookup() | |
1760 | and v800_elf_info_to_howto(). */ | |
1761 | ||
1762 | static reloc_howto_type v800_elf_howto_table[] = | |
1763 | { | |
0a1b45a2 AM |
1764 | V800_RELOC (R_V810_NONE, 0, 0, 0, dont, false, generic), /* Type = 0x30 */ |
1765 | V800_RELOC (R_V810_BYTE, 0, 8, 0, dont, false, generic), | |
1766 | V800_RELOC (R_V810_HWORD, 1, 16, 0, dont, false, generic), | |
1767 | V800_RELOC (R_V810_WORD, 2, 32, 0, dont, false, generic), | |
1768 | V800_RELOC (R_V810_WLO, 1, 16, 0, dont, false, generic), | |
1769 | V800_RELOC (R_V810_WHI, 1, 16, 0, dont, false, generic), | |
1770 | V800_RELOC (R_V810_WHI1, 1, 16, 0, dont, false, generic), | |
1771 | V800_RELOC (R_V810_GPBYTE, 0, 8, 0, dont, false, v850), | |
1772 | V800_RELOC (R_V810_GPHWORD, 1, 16, 0, dont, false, v850), | |
1773 | V800_RELOC (R_V810_GPWORD, 2, 32, 0, dont, false, v850), | |
1774 | V800_RELOC (R_V810_GPWLO, 1, 16, 0, dont, false, v850), | |
1775 | V800_RELOC (R_V810_GPWHI, 1, 16, 0, dont, false, v850), | |
1776 | V800_RELOC (R_V810_GPWHI1, 1, 16, 0, dont, false, v850), | |
1777 | V800_RELOC (R_V850_HWLO, 1, 16, 0, dont, false, generic), | |
de863c74 | 1778 | V800_EMPTY (R_V810_reserved1), |
0a1b45a2 AM |
1779 | V800_RELOC (R_V850_EP7BIT, 0, 7, 0, unsigned, false, v850), |
1780 | V800_RELOC (R_V850_EPHBYTE, 0, 8, 1, unsigned, false, v850), | |
1781 | V800_RELOC (R_V850_EPWBYTE, 0, 8, 2, unsigned, false, v850), | |
1782 | V800_RELOC (R_V850_REGHWLO, 1, 16, 0, dont, false, v850), | |
de863c74 | 1783 | V800_EMPTY (R_V810_reserved2), |
0a1b45a2 | 1784 | V800_RELOC (R_V850_GPHWLO, 1, 16, 0, dont, false, v850), |
de863c74 | 1785 | V800_EMPTY (R_V810_reserved3), |
0a1b45a2 AM |
1786 | V800_RELOC (R_V850_PCR22, 2, 22, 0, signed, true, generic), |
1787 | V800_RELOC (R_V850_BLO, 2, 24, 0, dont, false, v850), | |
1788 | V800_RELOC (R_V850_EP4BIT, 0, 4, 0, unsigned, false, v850), | |
1789 | V800_RELOC (R_V850_EP5BIT, 0, 5, 0, unsigned, false, v850), | |
1790 | V800_RELOC (R_V850_REGBLO, 2, 24, 0, dont, false, v850), | |
1791 | V800_RELOC (R_V850_GPBLO, 2, 24, 0, dont, false, v850), | |
1792 | V800_RELOC (R_V810_WLO_1, 1, 16, 0, dont, false, v850), | |
1793 | V800_RELOC (R_V810_GPWLO_1, 1, 16, 0, signed, false, v850), | |
1794 | V800_RELOC (R_V850_BLO_1, 2, 16, 0, signed, false, v850), | |
1795 | V800_RELOC (R_V850_HWLO_1, 1, 16, 0, signed, false, v850), | |
de863c74 | 1796 | V800_EMPTY (R_V810_reserved4), |
0a1b45a2 AM |
1797 | V800_RELOC (R_V850_GPBLO_1, 2, 16, 1, signed, false, v850), |
1798 | V800_RELOC (R_V850_GPHWLO_1, 1, 16, 1, signed, false, v850), | |
de863c74 | 1799 | V800_EMPTY (R_V810_reserved5), |
0a1b45a2 AM |
1800 | V800_RELOC (R_V850_EPBLO, 2, 16, 1, signed, false, v850), |
1801 | V800_RELOC (R_V850_EPHWLO, 1, 16, 1, signed, false, v850), | |
de863c74 | 1802 | V800_EMPTY (R_V810_reserved6), |
0a1b45a2 AM |
1803 | V800_RELOC (R_V850_EPWLO_N, 1, 16, 1, signed, false, v850), |
1804 | V800_RELOC (R_V850_PC32, 2, 32, 1, signed, true, v850), | |
1805 | V800_RELOC (R_V850_W23BIT, 2, 23, 1, signed, false, v850), | |
1806 | V800_RELOC (R_V850_GPW23BIT, 2, 23, 1, signed, false, v850), | |
1807 | V800_RELOC (R_V850_EPW23BIT, 2, 23, 1, signed, false, v850), | |
1808 | V800_RELOC (R_V850_B23BIT, 2, 23, 1, signed, false, v850), | |
1809 | V800_RELOC (R_V850_GPB23BIT, 2, 23, 1, signed, false, v850), | |
1810 | V800_RELOC (R_V850_EPB23BIT, 2, 23, 1, signed, false, v850), | |
1811 | V800_RELOC (R_V850_PC16U, 1, 16, 1, unsigned, true, generic), | |
1812 | V800_RELOC (R_V850_PC17, 2, 17, 1, signed, true, generic), | |
1813 | V800_RELOC (R_V850_DW8, 2, 8, 2, signed, false, v850), | |
1814 | V800_RELOC (R_V850_GPDW8, 2, 8, 2, signed, false, v850), | |
1815 | V800_RELOC (R_V850_EPDW8, 2, 8, 2, signed, false, v850), | |
1816 | V800_RELOC (R_V850_PC9, 1, 9, 3, signed, true, v850), | |
1817 | V800_RELOC (R_V810_REGBYTE, 0, 8, 0, dont, false, v850), | |
1818 | V800_RELOC (R_V810_REGHWORD, 1, 16, 0, dont, false, v850), | |
1819 | V800_RELOC (R_V810_REGWORD, 2, 32, 0, dont, false, v850), | |
1820 | V800_RELOC (R_V810_REGWLO, 1, 16, 0, dont, false, v850), | |
1821 | V800_RELOC (R_V810_REGWHI, 1, 16, 0, dont, false, v850), | |
1822 | V800_RELOC (R_V810_REGWHI1, 1, 16, 0, dont, false, v850), | |
1823 | V800_RELOC (R_V850_REGW23BIT, 2, 23, 1, signed, false, v850), | |
1824 | V800_RELOC (R_V850_REGB23BIT, 2, 23, 1, signed, false, v850), | |
1825 | V800_RELOC (R_V850_REGDW8, 2, 8, 2, signed, false, v850), | |
1826 | V800_RELOC (R_V810_EPBYTE, 0, 8, 0, dont, false, v850), | |
1827 | V800_RELOC (R_V810_EPHWORD, 1, 16, 0, dont, false, v850), | |
1828 | V800_RELOC (R_V810_EPWORD, 2, 32, 0, dont, false, v850), | |
1829 | V800_RELOC (R_V850_WLO23, 2, 32, 1, dont, false, v850), | |
1830 | V800_RELOC (R_V850_WORD_E, 2, 32, 1, dont, false, v850), | |
1831 | V800_RELOC (R_V850_REGWORD_E, 2, 32, 1, dont, false, v850), | |
1832 | V800_RELOC (R_V850_WORD, 2, 32, 0, dont, false, v850), | |
1833 | V800_RELOC (R_V850_GPWORD, 2, 32, 0, dont, false, v850), | |
1834 | V800_RELOC (R_V850_REGWORD, 2, 32, 0, dont, false, v850), | |
1835 | V800_RELOC (R_V850_EPWORD, 2, 32, 0, dont, false, v850), | |
1836 | V800_RELOC (R_V810_TPBYTE, 0, 8, 0, dont, false, v850), | |
1837 | V800_RELOC (R_V810_TPHWORD, 1, 16, 0, dont, false, v850), | |
1838 | V800_RELOC (R_V810_TPWORD, 2, 32, 0, dont, false, v850), | |
1839 | V800_RELOC (R_V810_TPWLO, 1, 16, 0, dont, false, v850), | |
1840 | V800_RELOC (R_V810_TPWHI, 1, 16, 0, dont, false, v850), | |
1841 | V800_RELOC (R_V810_TPWHI1, 1, 16, 0, dont, false, v850), | |
1842 | V800_RELOC (R_V850_TPHWLO, 1, 16, 1, dont, false, v850), | |
1843 | V800_RELOC (R_V850_TPBLO, 2, 24, 0, dont, false, v850), | |
1844 | V800_RELOC (R_V810_TPWLO_1, 1, 16, 0, signed, false, v850), | |
1845 | V800_RELOC (R_V850_TPBLO_1, 2, 16, 0, signed, false, v850), | |
1846 | V800_RELOC (R_V850_TPHWLO_1, 1, 16, 0, signed, false, v850), | |
1847 | V800_RELOC (R_V850_TP23BIT, 2, 23, 0, signed, false, v850), | |
1848 | V800_RELOC (R_V850_TPW23BIT, 2, 23, 0, signed, false, v850), | |
1849 | V800_RELOC (R_V850_TPDW8, 2, 8, 0, signed, false, v850) | |
de863c74 | 1850 | }; |
47b0e7ad NC |
1851 | \f |
1852 | /* Map a bfd relocation into the appropriate howto structure. */ | |
1853 | ||
1854 | static reloc_howto_type * | |
1855 | v850_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
1856 | bfd_reloc_code_real_type code) | |
1857 | { | |
1858 | unsigned int i; | |
1859 | ||
1860 | for (i = ARRAY_SIZE (v850_elf_reloc_map); i --;) | |
1861 | if (v850_elf_reloc_map[i].bfd_reloc_val == code) | |
1862 | { | |
1863 | unsigned int elf_reloc_val = v850_elf_reloc_map[i].elf_reloc_val; | |
1864 | ||
1865 | BFD_ASSERT (v850_elf_howto_table[elf_reloc_val].type == elf_reloc_val); | |
1866 | ||
1867 | return v850_elf_howto_table + elf_reloc_val; | |
1868 | } | |
1869 | ||
1870 | return NULL; | |
1871 | } | |
157090f7 AM |
1872 | |
1873 | static reloc_howto_type * | |
1874 | v850_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
1875 | const char *r_name) | |
1876 | { | |
1877 | unsigned int i; | |
1878 | ||
1879 | for (i = 0; | |
1880 | i < sizeof (v850_elf_howto_table) / sizeof (v850_elf_howto_table[0]); | |
1881 | i++) | |
1882 | if (v850_elf_howto_table[i].name != NULL | |
1883 | && strcasecmp (v850_elf_howto_table[i].name, r_name) == 0) | |
1884 | return &v850_elf_howto_table[i]; | |
1885 | ||
1886 | return NULL; | |
1887 | } | |
47b0e7ad NC |
1888 | \f |
1889 | /* Set the howto pointer for an V850 ELF reloc. */ | |
1890 | ||
0a1b45a2 | 1891 | static bool |
0aa13fee | 1892 | v850_elf_info_to_howto_rel (bfd *abfd, |
47b0e7ad NC |
1893 | arelent *cache_ptr, |
1894 | Elf_Internal_Rela *dst) | |
1895 | { | |
1896 | unsigned int r_type; | |
1897 | ||
1898 | r_type = ELF32_R_TYPE (dst->r_info); | |
5860e3f8 NC |
1899 | if (r_type >= (unsigned int) R_V850_max) |
1900 | { | |
695344c0 | 1901 | /* xgettext:c-format */ |
0aa13fee AM |
1902 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), |
1903 | abfd, r_type); | |
f3185997 | 1904 | bfd_set_error (bfd_error_bad_value); |
0a1b45a2 | 1905 | return false; |
5860e3f8 | 1906 | } |
47b0e7ad | 1907 | cache_ptr->howto = &v850_elf_howto_table[r_type]; |
0a1b45a2 | 1908 | return true; |
47b0e7ad NC |
1909 | } |
1910 | ||
1911 | /* Set the howto pointer for a V850 ELF reloc (type RELA). */ | |
1912 | ||
0a1b45a2 | 1913 | static bool |
0aa13fee | 1914 | v850_elf_info_to_howto_rela (bfd *abfd, |
f3185997 | 1915 | arelent * cache_ptr, |
47b0e7ad NC |
1916 | Elf_Internal_Rela *dst) |
1917 | { | |
1918 | unsigned int r_type; | |
1919 | ||
1920 | r_type = ELF32_R_TYPE (dst->r_info); | |
cd21f5da NC |
1921 | if (r_type >= (unsigned int) R_V850_max) |
1922 | { | |
695344c0 | 1923 | /* xgettext:c-format */ |
0aa13fee AM |
1924 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), |
1925 | abfd, r_type); | |
f3185997 | 1926 | bfd_set_error (bfd_error_bad_value); |
0a1b45a2 | 1927 | return false; |
cd21f5da | 1928 | } |
47b0e7ad | 1929 | cache_ptr->howto = &v850_elf_howto_table[r_type]; |
0a1b45a2 | 1930 | return true; |
47b0e7ad | 1931 | } |
252b5132 | 1932 | \f |
0a1b45a2 | 1933 | static bool |
47b0e7ad | 1934 | v850_elf_is_local_label_name (bfd *abfd ATTRIBUTE_UNUSED, const char *name) |
252b5132 RH |
1935 | { |
1936 | return ( (name[0] == '.' && (name[1] == 'L' || name[1] == '.')) | |
1937 | || (name[0] == '_' && name[1] == '.' && name[2] == 'L' && name[3] == '_')); | |
1938 | } | |
41702d50 | 1939 | |
0a1b45a2 | 1940 | static bool |
41702d50 NC |
1941 | v850_elf_is_target_special_symbol (bfd *abfd, asymbol *sym) |
1942 | { | |
1943 | return v850_elf_is_local_label_name (abfd, sym->name); | |
1944 | } | |
252b5132 | 1945 | \f |
5cec6941 NC |
1946 | /* We overload some of the bfd_reloc error codes for own purposes. */ |
1947 | #define bfd_reloc_gp_not_found bfd_reloc_other | |
1948 | #define bfd_reloc_ep_not_found bfd_reloc_continue | |
1949 | #define bfd_reloc_ctbp_not_found (bfd_reloc_dangerous + 1) | |
1950 | ||
252b5132 | 1951 | /* Perform a relocation as part of a final link. */ |
e12dd2ea | 1952 | |
252b5132 | 1953 | static bfd_reloc_status_type |
47b0e7ad NC |
1954 | v850_elf_final_link_relocate (reloc_howto_type *howto, |
1955 | bfd *input_bfd, | |
1956 | bfd *output_bfd ATTRIBUTE_UNUSED, | |
1957 | asection *input_section, | |
1958 | bfd_byte *contents, | |
1959 | bfd_vma offset, | |
1960 | bfd_vma value, | |
1961 | bfd_vma addend, | |
1962 | struct bfd_link_info *info, | |
1963 | asection *sym_sec, | |
1964 | int is_local ATTRIBUTE_UNUSED) | |
252b5132 | 1965 | { |
b34976b6 AM |
1966 | unsigned int r_type = howto->type; |
1967 | bfd_byte *hit_data = contents + offset; | |
252b5132 RH |
1968 | |
1969 | /* Adjust the value according to the relocation. */ | |
1970 | switch (r_type) | |
1971 | { | |
de863c74 | 1972 | case R_V850_PC9: |
252b5132 RH |
1973 | case R_V850_9_PCREL: |
1974 | value -= (input_section->output_section->vma | |
1975 | + input_section->output_offset); | |
1976 | value -= offset; | |
1977 | break; | |
435b1e90 | 1978 | |
de863c74 | 1979 | case R_V850_PC16U: |
1cd986c5 NC |
1980 | case R_V850_16_PCREL: |
1981 | value -= (input_section->output_section->vma | |
1982 | + input_section->output_offset | |
1983 | + offset); | |
1984 | ||
1985 | /* If the sign extension will corrupt the value then we have overflowed. */ | |
1986 | if ((value & 0xffff0000) != 0xffff0000) | |
1987 | return bfd_reloc_overflow; | |
1988 | ||
1989 | break; | |
1990 | ||
de863c74 | 1991 | case R_V850_PC17: |
1cd986c5 NC |
1992 | case R_V850_17_PCREL: |
1993 | value -= (input_section->output_section->vma | |
1994 | + input_section->output_offset | |
1995 | + offset); | |
1996 | ||
1997 | /* If the sign extension will corrupt the value then we have overflowed. */ | |
1998 | if (((value & 0xffff0000) != 0x0) && ((value & 0xffff0000) != 0xffff0000)) | |
1999 | return bfd_reloc_overflow; | |
2000 | ||
2001 | value = SEXT17 (value); | |
2002 | break; | |
2003 | ||
de863c74 | 2004 | case R_V850_PCR22: |
252b5132 RH |
2005 | case R_V850_22_PCREL: |
2006 | value -= (input_section->output_section->vma | |
2007 | + input_section->output_offset | |
2008 | + offset); | |
2009 | ||
232fb1a3 | 2010 | /* If the sign extension will corrupt the value then we have overflowed. */ |
1cd986c5 | 2011 | if (((value & 0xffe00000) != 0x0) && ((value & 0xffe00000) != 0xffe00000)) |
232fb1a3 | 2012 | return bfd_reloc_overflow; |
435b1e90 | 2013 | |
1cd986c5 NC |
2014 | /* Only the bottom 22 bits of the PC are valid. */ |
2015 | value = SEXT22 (value); | |
252b5132 | 2016 | break; |
435b1e90 | 2017 | |
de863c74 | 2018 | case R_V850_PC32: |
1cd986c5 | 2019 | case R_V850_32_PCREL: |
e30ddb24 NC |
2020 | value -= (input_section->output_section->vma |
2021 | + input_section->output_offset | |
2022 | + offset); | |
2023 | break; | |
2024 | ||
1cd986c5 NC |
2025 | case R_V850_32_ABS: |
2026 | case R_V850_23: | |
252b5132 RH |
2027 | case R_V850_HI16_S: |
2028 | case R_V850_HI16: | |
2029 | case R_V850_LO16: | |
1cd986c5 | 2030 | case R_V850_LO16_S1: |
1e50d24d | 2031 | case R_V850_LO16_SPLIT_OFFSET: |
252b5132 | 2032 | case R_V850_16: |
e30ddb24 | 2033 | case R_V850_ABS32: |
252b5132 | 2034 | case R_V850_8: |
de863c74 NC |
2035 | case R_V810_BYTE: |
2036 | case R_V810_HWORD: | |
2037 | case R_V810_WORD: | |
2038 | case R_V810_WLO: | |
2039 | case R_V810_WHI: | |
2040 | case R_V810_WHI1: | |
2041 | case R_V810_WLO_1: | |
2042 | case R_V850_WLO23: | |
2043 | case R_V850_BLO: | |
252b5132 RH |
2044 | break; |
2045 | ||
435b1e90 | 2046 | case R_V850_ZDA_15_16_OFFSET: |
252b5132 RH |
2047 | case R_V850_ZDA_16_16_OFFSET: |
2048 | case R_V850_ZDA_16_16_SPLIT_OFFSET: | |
2049 | if (sym_sec == NULL) | |
2050 | return bfd_reloc_undefined; | |
435b1e90 | 2051 | |
252b5132 RH |
2052 | value -= sym_sec->output_section->vma; |
2053 | break; | |
2054 | ||
2055 | case R_V850_SDA_15_16_OFFSET: | |
2056 | case R_V850_SDA_16_16_OFFSET: | |
2057 | case R_V850_SDA_16_16_SPLIT_OFFSET: | |
de863c74 | 2058 | case R_V810_GPWLO_1: |
252b5132 | 2059 | { |
07d6d2b8 | 2060 | unsigned long gp; |
252b5132 RH |
2061 | struct bfd_link_hash_entry * h; |
2062 | ||
2063 | if (sym_sec == NULL) | |
2064 | return bfd_reloc_undefined; | |
435b1e90 | 2065 | |
252b5132 | 2066 | /* Get the value of __gp. */ |
0a1b45a2 | 2067 | h = bfd_link_hash_lookup (info->hash, "__gp", false, false, true); |
47b0e7ad | 2068 | if (h == NULL |
252b5132 | 2069 | || h->type != bfd_link_hash_defined) |
5cec6941 | 2070 | return bfd_reloc_gp_not_found; |
252b5132 RH |
2071 | |
2072 | gp = (h->u.def.value | |
2073 | + h->u.def.section->output_section->vma | |
2074 | + h->u.def.section->output_offset); | |
2075 | ||
2076 | value -= sym_sec->output_section->vma; | |
2077 | value -= (gp - sym_sec->output_section->vma); | |
2078 | } | |
2079 | break; | |
2080 | ||
2081 | case R_V850_TDA_4_4_OFFSET: | |
2082 | case R_V850_TDA_4_5_OFFSET: | |
252b5132 RH |
2083 | case R_V850_TDA_7_7_OFFSET: |
2084 | case R_V850_TDA_7_8_OFFSET: | |
2085 | case R_V850_TDA_6_8_OFFSET: | |
1cd986c5 | 2086 | case R_V850_TDA_16_16_OFFSET: |
252b5132 | 2087 | { |
07d6d2b8 | 2088 | unsigned long ep; |
252b5132 | 2089 | struct bfd_link_hash_entry * h; |
435b1e90 | 2090 | |
252b5132 | 2091 | /* Get the value of __ep. */ |
0a1b45a2 | 2092 | h = bfd_link_hash_lookup (info->hash, "__ep", false, false, true); |
47b0e7ad | 2093 | if (h == NULL |
252b5132 | 2094 | || h->type != bfd_link_hash_defined) |
5cec6941 | 2095 | return bfd_reloc_ep_not_found; |
252b5132 RH |
2096 | |
2097 | ep = (h->u.def.value | |
2098 | + h->u.def.section->output_section->vma | |
2099 | + h->u.def.section->output_offset); | |
2100 | ||
2101 | value -= ep; | |
2102 | } | |
2103 | break; | |
435b1e90 | 2104 | |
252b5132 RH |
2105 | case R_V850_CALLT_6_7_OFFSET: |
2106 | { | |
07d6d2b8 | 2107 | unsigned long ctbp; |
252b5132 | 2108 | struct bfd_link_hash_entry * h; |
435b1e90 | 2109 | |
252b5132 | 2110 | /* Get the value of __ctbp. */ |
0a1b45a2 | 2111 | h = bfd_link_hash_lookup (info->hash, "__ctbp", false, false, true); |
47b0e7ad | 2112 | if (h == NULL |
252b5132 | 2113 | || h->type != bfd_link_hash_defined) |
5cec6941 | 2114 | return bfd_reloc_ctbp_not_found; |
252b5132 RH |
2115 | |
2116 | ctbp = (h->u.def.value | |
2117 | + h->u.def.section->output_section->vma | |
2118 | + h->u.def.section->output_offset); | |
2119 | value -= ctbp; | |
2120 | } | |
2121 | break; | |
435b1e90 | 2122 | |
1cd986c5 | 2123 | case R_V850_CALLT_15_16_OFFSET: |
252b5132 RH |
2124 | case R_V850_CALLT_16_16_OFFSET: |
2125 | { | |
07d6d2b8 | 2126 | unsigned long ctbp; |
252b5132 RH |
2127 | struct bfd_link_hash_entry * h; |
2128 | ||
2129 | if (sym_sec == NULL) | |
2130 | return bfd_reloc_undefined; | |
435b1e90 | 2131 | |
252b5132 | 2132 | /* Get the value of __ctbp. */ |
0a1b45a2 | 2133 | h = bfd_link_hash_lookup (info->hash, "__ctbp", false, false, true); |
47b0e7ad | 2134 | if (h == NULL |
252b5132 | 2135 | || h->type != bfd_link_hash_defined) |
5cec6941 | 2136 | return bfd_reloc_ctbp_not_found; |
252b5132 RH |
2137 | |
2138 | ctbp = (h->u.def.value | |
2139 | + h->u.def.section->output_section->vma | |
2140 | + h->u.def.section->output_offset); | |
2141 | ||
2142 | value -= sym_sec->output_section->vma; | |
2143 | value -= (ctbp - sym_sec->output_section->vma); | |
2144 | } | |
2145 | break; | |
435b1e90 | 2146 | |
252b5132 | 2147 | case R_V850_NONE: |
de863c74 | 2148 | case R_V810_NONE: |
252b5132 RH |
2149 | case R_V850_GNU_VTINHERIT: |
2150 | case R_V850_GNU_VTENTRY: | |
86aba9db NC |
2151 | case R_V850_LONGCALL: |
2152 | case R_V850_LONGJUMP: | |
2153 | case R_V850_ALIGN: | |
252b5132 RH |
2154 | return bfd_reloc_ok; |
2155 | ||
2156 | default: | |
de863c74 | 2157 | #ifdef DEBUG |
0aa13fee AM |
2158 | _bfd_error_handler ("%pB: unsupported relocation type %#x", |
2159 | input_bfd, r_type); | |
de863c74 | 2160 | #endif |
252b5132 RH |
2161 | return bfd_reloc_notsupported; |
2162 | } | |
2163 | ||
2164 | /* Perform the relocation. */ | |
435b1e90 | 2165 | return v850_elf_perform_relocation (input_bfd, r_type, value + addend, hit_data); |
252b5132 | 2166 | } |
252b5132 RH |
2167 | \f |
2168 | /* Relocate an V850 ELF section. */ | |
e12dd2ea | 2169 | |
0f684201 | 2170 | static int |
47b0e7ad NC |
2171 | v850_elf_relocate_section (bfd *output_bfd, |
2172 | struct bfd_link_info *info, | |
2173 | bfd *input_bfd, | |
2174 | asection *input_section, | |
2175 | bfd_byte *contents, | |
2176 | Elf_Internal_Rela *relocs, | |
2177 | Elf_Internal_Sym *local_syms, | |
2178 | asection **local_sections) | |
252b5132 | 2179 | { |
b34976b6 AM |
2180 | Elf_Internal_Shdr *symtab_hdr; |
2181 | struct elf_link_hash_entry **sym_hashes; | |
2182 | Elf_Internal_Rela *rel; | |
2183 | Elf_Internal_Rela *relend; | |
252b5132 RH |
2184 | |
2185 | symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; | |
2186 | sym_hashes = elf_sym_hashes (input_bfd); | |
2187 | ||
252b5132 RH |
2188 | /* Reset the list of remembered HI16S relocs to empty. */ |
2189 | free_hi16s = previous_hi16s; | |
2190 | previous_hi16s = NULL; | |
2191 | hi16s_counter = 0; | |
435b1e90 | 2192 | |
252b5132 RH |
2193 | rel = relocs; |
2194 | relend = relocs + input_section->reloc_count; | |
2195 | for (; rel < relend; rel++) | |
2196 | { | |
de863c74 | 2197 | unsigned int r_type; |
b34976b6 AM |
2198 | reloc_howto_type *howto; |
2199 | unsigned long r_symndx; | |
2200 | Elf_Internal_Sym *sym; | |
2201 | asection *sec; | |
2202 | struct elf_link_hash_entry *h; | |
2203 | bfd_vma relocation; | |
2204 | bfd_reloc_status_type r; | |
252b5132 RH |
2205 | |
2206 | r_symndx = ELF32_R_SYM (rel->r_info); | |
2207 | r_type = ELF32_R_TYPE (rel->r_info); | |
2208 | ||
2209 | if (r_type == R_V850_GNU_VTENTRY | |
07d6d2b8 AM |
2210 | || r_type == R_V850_GNU_VTINHERIT) |
2211 | continue; | |
252b5132 | 2212 | |
de863c74 NC |
2213 | if (bfd_get_arch (input_bfd) == bfd_arch_v850_rh850) |
2214 | howto = v800_elf_howto_table + (r_type - R_V810_NONE); | |
2215 | else | |
2216 | howto = v850_elf_howto_table + r_type; | |
2217 | ||
2218 | BFD_ASSERT (r_type == howto->type); | |
2219 | ||
252b5132 RH |
2220 | h = NULL; |
2221 | sym = NULL; | |
2222 | sec = NULL; | |
2223 | if (r_symndx < symtab_hdr->sh_info) | |
2224 | { | |
2225 | sym = local_syms + r_symndx; | |
2226 | sec = local_sections[r_symndx]; | |
8517fae7 | 2227 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); |
252b5132 RH |
2228 | } |
2229 | else | |
2230 | { | |
0a1b45a2 | 2231 | bool unresolved_reloc, warned, ignored; |
435b1e90 | 2232 | |
47b0e7ad NC |
2233 | /* Note - this check is delayed until now as it is possible and |
2234 | valid to have a file without any symbols but with relocs that | |
2235 | can be processed. */ | |
641bd093 NC |
2236 | if (sym_hashes == NULL) |
2237 | { | |
2238 | info->callbacks->warning | |
2239 | (info, "no hash table available", | |
2240 | NULL, input_bfd, input_section, (bfd_vma) 0); | |
2241 | ||
0a1b45a2 | 2242 | return false; |
641bd093 NC |
2243 | } |
2244 | ||
b2a8e766 AM |
2245 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
2246 | r_symndx, symtab_hdr, sym_hashes, | |
2247 | h, sec, relocation, | |
62d887d4 | 2248 | unresolved_reloc, warned, ignored); |
252b5132 RH |
2249 | } |
2250 | ||
dbaa2011 | 2251 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 2252 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 2253 | rel, 1, relend, howto, 0, contents); |
ab96bf03 | 2254 | |
0e1862bb | 2255 | if (bfd_link_relocatable (info)) |
ab96bf03 AM |
2256 | continue; |
2257 | ||
e12dd2ea | 2258 | /* FIXME: We should use the addend, but the COFF relocations don't. */ |
252b5132 RH |
2259 | r = v850_elf_final_link_relocate (howto, input_bfd, output_bfd, |
2260 | input_section, | |
2261 | contents, rel->r_offset, | |
2262 | relocation, rel->r_addend, | |
2263 | info, sec, h == NULL); | |
2264 | ||
2265 | if (r != bfd_reloc_ok) | |
2266 | { | |
2267 | const char * name; | |
47b0e7ad | 2268 | const char * msg = NULL; |
252b5132 RH |
2269 | |
2270 | if (h != NULL) | |
2271 | name = h->root.root.string; | |
2272 | else | |
2273 | { | |
2274 | name = (bfd_elf_string_from_elf_section | |
2275 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
2276 | if (name == NULL || *name == '\0') | |
fd361982 | 2277 | name = bfd_section_name (sec); |
252b5132 RH |
2278 | } |
2279 | ||
ceaf50a2 | 2280 | switch ((int) r) |
252b5132 RH |
2281 | { |
2282 | case bfd_reloc_overflow: | |
1a72702b AM |
2283 | (*info->callbacks->reloc_overflow) |
2284 | (info, (h ? &h->root : NULL), name, howto->name, | |
2285 | (bfd_vma) 0, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
2286 | break; |
2287 | ||
2288 | case bfd_reloc_undefined: | |
1a72702b | 2289 | (*info->callbacks->undefined_symbol) |
0a1b45a2 | 2290 | (info, name, input_bfd, input_section, rel->r_offset, true); |
252b5132 RH |
2291 | break; |
2292 | ||
2293 | case bfd_reloc_outofrange: | |
2294 | msg = _("internal error: out of range error"); | |
2295 | goto common_error; | |
2296 | ||
2297 | case bfd_reloc_notsupported: | |
2298 | msg = _("internal error: unsupported relocation error"); | |
2299 | goto common_error; | |
2300 | ||
2301 | case bfd_reloc_dangerous: | |
2302 | msg = _("internal error: dangerous relocation"); | |
2303 | goto common_error; | |
2304 | ||
5cec6941 | 2305 | case bfd_reloc_gp_not_found: |
252b5132 RH |
2306 | msg = _("could not locate special linker symbol __gp"); |
2307 | goto common_error; | |
2308 | ||
5cec6941 | 2309 | case bfd_reloc_ep_not_found: |
252b5132 RH |
2310 | msg = _("could not locate special linker symbol __ep"); |
2311 | goto common_error; | |
2312 | ||
5cec6941 | 2313 | case bfd_reloc_ctbp_not_found: |
252b5132 RH |
2314 | msg = _("could not locate special linker symbol __ctbp"); |
2315 | goto common_error; | |
435b1e90 | 2316 | |
252b5132 RH |
2317 | default: |
2318 | msg = _("internal error: unknown error"); | |
2319 | /* fall through */ | |
2320 | ||
2321 | common_error: | |
1a72702b AM |
2322 | (*info->callbacks->warning) (info, msg, name, input_bfd, |
2323 | input_section, rel->r_offset); | |
252b5132 RH |
2324 | break; |
2325 | } | |
2326 | } | |
2327 | } | |
2328 | ||
0a1b45a2 | 2329 | return true; |
252b5132 RH |
2330 | } |
2331 | ||
252b5132 | 2332 | static asection * |
47b0e7ad | 2333 | v850_elf_gc_mark_hook (asection *sec, |
07adf181 | 2334 | struct bfd_link_info *info, |
47b0e7ad NC |
2335 | Elf_Internal_Rela *rel, |
2336 | struct elf_link_hash_entry *h, | |
2337 | Elf_Internal_Sym *sym) | |
252b5132 RH |
2338 | { |
2339 | if (h != NULL) | |
07adf181 | 2340 | switch (ELF32_R_TYPE (rel->r_info)) |
252b5132 RH |
2341 | { |
2342 | case R_V850_GNU_VTINHERIT: | |
2343 | case R_V850_GNU_VTENTRY: | |
07adf181 AM |
2344 | return NULL; |
2345 | } | |
9ad5cbcf | 2346 | |
07adf181 | 2347 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
252b5132 | 2348 | } |
e12dd2ea | 2349 | |
685080f2 NC |
2350 | static void |
2351 | v850_set_note (bfd * abfd, asection * s, enum v850_notes note, unsigned int val) | |
2352 | { | |
2353 | bfd_byte * data = s->contents + ((note - 1) * SIZEOF_V850_NOTE); | |
2354 | ||
2355 | bfd_put_32 (abfd, 4, data + 0); | |
2356 | bfd_put_32 (abfd, 4, data + 4); | |
2357 | bfd_put_32 (abfd, note, data + 8); | |
2358 | memcpy (data + 12, V850_NOTE_NAME, 4); | |
2359 | bfd_put_32 (abfd, val, data + 16); | |
2360 | } | |
2361 | ||
2362 | /* Create the note section if not already present. This is done early so | |
2363 | that the linker maps the sections to the right place in the output. */ | |
2364 | ||
2365 | static asection * | |
2366 | v850_elf_make_note_section (bfd * abfd) | |
1b786873 | 2367 | { |
685080f2 NC |
2368 | asection *s; |
2369 | bfd_byte *data; | |
2370 | flagword flags; | |
2371 | enum v850_notes id; | |
2372 | ||
2373 | /* Make the note section. */ | |
2374 | flags = SEC_READONLY | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_MERGE; | |
2375 | ||
2376 | s = bfd_make_section_anyway_with_flags (abfd, V850_NOTE_SECNAME, flags); | |
2377 | if (s == NULL) | |
2378 | return NULL; | |
2379 | ||
fd361982 | 2380 | if (!bfd_set_section_alignment (s, 2)) |
685080f2 NC |
2381 | return NULL; |
2382 | ||
2383 | /* Allocate space for all known notes. */ | |
fd361982 | 2384 | if (!bfd_set_section_size (s, NUM_V850_NOTES * SIZEOF_V850_NOTE)) |
685080f2 NC |
2385 | return NULL; |
2386 | ||
2387 | data = bfd_zalloc (abfd, NUM_V850_NOTES * SIZEOF_V850_NOTE); | |
2388 | if (data == NULL) | |
2389 | return NULL; | |
2390 | ||
2391 | s->contents = data; | |
2392 | ||
2393 | /* Provide default (= uninitilaised) values for all of the notes. */ | |
2394 | for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++) | |
2395 | v850_set_note (abfd, s, id, 0); | |
2396 | ||
2397 | return s; | |
2398 | } | |
2399 | ||
2400 | /* Create the note section if not already present. This is done early so | |
2401 | that the linker maps the sections to the right place in the output. */ | |
2402 | ||
0a1b45a2 | 2403 | bool |
685080f2 NC |
2404 | v850_elf_create_sections (struct bfd_link_info * info) |
2405 | { | |
2406 | bfd * ibfd; | |
2407 | ||
2408 | /* If we already have a note section, do not make another. */ | |
2409 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) | |
2410 | if (bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME) != NULL) | |
0a1b45a2 | 2411 | return true; |
685080f2 NC |
2412 | |
2413 | return v850_elf_make_note_section (info->input_bfds) != NULL; | |
2414 | } | |
2415 | ||
0a1b45a2 | 2416 | bool |
685080f2 NC |
2417 | v850_elf_set_note (bfd * abfd, enum v850_notes note, unsigned int val) |
2418 | { | |
2419 | asection * notes = bfd_get_section_by_name (abfd, V850_NOTE_SECNAME); | |
2420 | ||
2421 | if (val > 2) | |
2422 | /* At the moment, no known note has a value over 2. */ | |
0a1b45a2 | 2423 | return false; |
685080f2 NC |
2424 | |
2425 | if (notes == NULL) | |
2426 | notes = v850_elf_make_note_section (abfd); | |
2427 | if (notes == NULL) | |
0a1b45a2 | 2428 | return false; |
685080f2 NC |
2429 | |
2430 | v850_set_note (abfd, notes, note, val); | |
0a1b45a2 | 2431 | return true; |
685080f2 NC |
2432 | } |
2433 | ||
71de3413 | 2434 | /* Copy a v850 note section from one object module to another. */ |
685080f2 | 2435 | |
71de3413 MR |
2436 | static void |
2437 | v850_elf_copy_notes (bfd *ibfd, bfd *obfd) | |
685080f2 NC |
2438 | { |
2439 | asection * onotes; | |
2440 | asection * inotes; | |
2441 | ||
2442 | /* If the output bfd does not have a note section, then | |
2443 | skip the merge. The normal input to output section | |
2444 | copying will take care of everythng for us. */ | |
2445 | if ((onotes = bfd_get_section_by_name (obfd, V850_NOTE_SECNAME)) == NULL) | |
71de3413 | 2446 | return; |
685080f2 | 2447 | |
e43fb831 | 2448 | if ((inotes = bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME)) == NULL) |
71de3413 | 2449 | return; |
e43fb831 | 2450 | |
fd361982 | 2451 | if (bfd_section_size (inotes) == bfd_section_size (onotes)) |
685080f2 NC |
2452 | { |
2453 | bfd_byte * icont; | |
2454 | bfd_byte * ocont; | |
2455 | ||
685080f2 NC |
2456 | if ((icont = elf_section_data (inotes)->this_hdr.contents) == NULL) |
2457 | BFD_ASSERT (bfd_malloc_and_get_section (ibfd, inotes, & icont)); | |
2458 | ||
2459 | if ((ocont = elf_section_data (onotes)->this_hdr.contents) == NULL) | |
cfd14a50 NC |
2460 | /* If the output is being stripped then it is possible for |
2461 | the notes section to disappear. In this case do nothing. */ | |
2462 | return; | |
685080f2 NC |
2463 | |
2464 | /* Copy/overwrite notes from the input to the output. */ | |
fd361982 | 2465 | memcpy (ocont, icont, bfd_section_size (onotes)); |
685080f2 | 2466 | } |
71de3413 | 2467 | } |
685080f2 | 2468 | |
71de3413 MR |
2469 | /* Copy backend specific data from one object module to another. */ |
2470 | ||
0a1b45a2 | 2471 | static bool |
71de3413 MR |
2472 | v850_elf_copy_private_bfd_data (bfd *ibfd, bfd *obfd) |
2473 | { | |
2474 | v850_elf_copy_notes (ibfd, obfd); | |
2475 | return _bfd_elf_copy_private_bfd_data (ibfd, obfd); | |
685080f2 NC |
2476 | } |
2477 | #define bfd_elf32_bfd_copy_private_bfd_data v850_elf_copy_private_bfd_data | |
2478 | ||
0a1b45a2 | 2479 | static bool |
685080f2 NC |
2480 | v850_elf_merge_notes (bfd * ibfd, bfd *obfd) |
2481 | { | |
2482 | asection * onotes; | |
2483 | asection * inotes; | |
0a1b45a2 | 2484 | bool result = true; |
685080f2 NC |
2485 | |
2486 | /* If the output bfd does not have a note section, then | |
2487 | skip the merge. The normal input to output section | |
2488 | copying will take care of everythng for us. */ | |
2489 | if ((onotes = bfd_get_section_by_name (obfd, V850_NOTE_SECNAME)) == NULL) | |
0a1b45a2 | 2490 | return true; |
685080f2 NC |
2491 | |
2492 | if ((inotes = bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME)) != NULL) | |
2493 | { | |
2494 | enum v850_notes id; | |
2495 | bfd_byte * icont; | |
2496 | bfd_byte * ocont; | |
2497 | ||
fd361982 | 2498 | BFD_ASSERT (bfd_section_size (inotes) == bfd_section_size (onotes)); |
685080f2 NC |
2499 | |
2500 | if ((icont = elf_section_data (inotes)->this_hdr.contents) == NULL) | |
2501 | BFD_ASSERT (bfd_malloc_and_get_section (ibfd, inotes, & icont)); | |
2502 | ||
2503 | if ((ocont = elf_section_data (onotes)->this_hdr.contents) == NULL) | |
2504 | BFD_ASSERT (bfd_malloc_and_get_section (obfd, onotes, & ocont)); | |
2505 | ||
2506 | for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++) | |
2507 | { | |
2508 | unsigned int ival; | |
2509 | unsigned int oval; | |
2510 | bfd_byte * idata = icont + ((id - 1) * SIZEOF_V850_NOTE) + 16; | |
2511 | bfd_byte * odata = ocont + ((id - 1) * SIZEOF_V850_NOTE) + 16; | |
2512 | ||
2513 | ival = bfd_get_32 (ibfd, idata); | |
2514 | oval = bfd_get_32 (obfd, odata); | |
2515 | ||
2516 | if (ival == 0 || ival == oval) | |
2517 | continue; | |
1b786873 | 2518 | |
685080f2 NC |
2519 | if (oval == 0) |
2520 | { | |
2521 | bfd_put_32 (obfd, ival, odata); | |
2522 | v850_set_note (obfd, onotes, id, ival); | |
2523 | continue; | |
2524 | } | |
2525 | ||
2526 | /* We have a mismatch. The ABI defines how to handle | |
2527 | this siutation on a per note type basis. */ | |
2528 | switch (id) | |
2529 | { | |
2530 | case V850_NOTE_ALIGNMENT: | |
2531 | if (oval == EF_RH850_DATA_ALIGN4) | |
2532 | { | |
2533 | _bfd_error_handler | |
695344c0 | 2534 | /* xgettext:c-format */ |
871b3ab2 | 2535 | (_("error: %pB needs 8-byte alignment but %pB is set for 4-byte alignment"), |
685080f2 | 2536 | ibfd, obfd); |
0a1b45a2 | 2537 | result = false; |
685080f2 NC |
2538 | } |
2539 | else | |
2540 | /* ibfd uses 4-byte alignment, obfd uses 8-byte alignment. | |
2541 | Leave the obfd alignment as it is. */ | |
2542 | BFD_ASSERT (oval == EF_RH850_DATA_ALIGN8); | |
2543 | ||
2544 | break; | |
2545 | ||
2546 | case V850_NOTE_DATA_SIZE: | |
2547 | if (oval == EF_RH850_DOUBLE32) | |
2548 | { | |
4eca0228 | 2549 | _bfd_error_handler |
695344c0 | 2550 | /* xgettext:c-format */ |
871b3ab2 AM |
2551 | (_("error: %pB uses 64-bit doubles but " |
2552 | "%pB uses 32-bit doubles"), ibfd, obfd); | |
0a1b45a2 | 2553 | result = false; |
685080f2 NC |
2554 | } |
2555 | else | |
2556 | /* ibfd uses 32-bit doubles, obfd uses 64-bit doubles. | |
2557 | This is acceptable. Honest, that is what the ABI says. */ | |
2558 | BFD_ASSERT (oval == EF_RH850_DOUBLE64); | |
2559 | break; | |
2560 | ||
2561 | case V850_NOTE_FPU_INFO: | |
2562 | if (oval == EF_RH850_FPU20) | |
2563 | { | |
4eca0228 | 2564 | _bfd_error_handler |
695344c0 | 2565 | /* xgettext:c-format */ |
871b3ab2 | 2566 | (_("error: %pB uses FPU-3.0 but %pB only supports FPU-2.0"), |
4eca0228 | 2567 | ibfd, obfd); |
0a1b45a2 | 2568 | result = false; |
685080f2 NC |
2569 | } |
2570 | else | |
2571 | /* ibfd uses FPU-2.0, obfd uses FPU-3.0. Leave obfd as it is. */ | |
2572 | BFD_ASSERT (oval == EF_RH850_FPU30); | |
2573 | ||
2574 | break; | |
2575 | ||
2576 | default: | |
2577 | /* None of the other conflicts matter. | |
2578 | Stick with the current output values. */ | |
2579 | break; | |
2580 | } | |
2581 | } | |
2582 | ||
2583 | /* FIXME: We should also check for conflicts between the notes | |
2584 | and the EF flags in the ELF header. */ | |
2585 | } | |
2586 | ||
2587 | return result; | |
2588 | } | |
2589 | ||
2590 | static void | |
2591 | print_v850_note (bfd * abfd, FILE * file, bfd_byte * data, enum v850_notes id) | |
2592 | { | |
2593 | unsigned int value = bfd_get_32 (abfd, data + ((id - 1) * SIZEOF_V850_NOTE) + 16); | |
2594 | ||
2595 | switch (id) | |
2596 | { | |
2597 | case V850_NOTE_ALIGNMENT: | |
2598 | fprintf (file, _(" alignment of 8-byte entities: ")); | |
2599 | switch (value) | |
2600 | { | |
2601 | case EF_RH850_DATA_ALIGN4: fprintf (file, _("4-byte")); break; | |
2602 | case EF_RH850_DATA_ALIGN8: fprintf (file, _("8-byte")); break; | |
2603 | case 0: fprintf (file, _("not set")); break; | |
2604 | default: fprintf (file, _("unknown: %x"), value); break; | |
2605 | } | |
2606 | fputc ('\n', file); | |
2607 | break; | |
1b786873 | 2608 | |
685080f2 NC |
2609 | case V850_NOTE_DATA_SIZE: |
2610 | fprintf (file, _(" size of doubles: ")); | |
2611 | switch (value) | |
2612 | { | |
2613 | case EF_RH850_DOUBLE32: fprintf (file, _("4-bytes")); break; | |
2614 | case EF_RH850_DOUBLE64: fprintf (file, _("8-bytes")); break; | |
2615 | case 0: fprintf (file, _("not set")); break; | |
2616 | default: fprintf (file, _("unknown: %x"), value); break; | |
2617 | } | |
2618 | fputc ('\n', file); | |
2619 | break; | |
1b786873 | 2620 | |
685080f2 NC |
2621 | case V850_NOTE_FPU_INFO: |
2622 | fprintf (file, _(" FPU support required: ")); | |
2623 | switch (value) | |
2624 | { | |
2625 | case EF_RH850_FPU20: fprintf (file, _("FPU-2.0")); break; | |
2626 | case EF_RH850_FPU30: fprintf (file, _("FPU-3.0")); break; | |
2627 | case 0: fprintf (file, _("none")); break; | |
2628 | default: fprintf (file, _("unknown: %x"), value); break; | |
2629 | } | |
2630 | fputc ('\n', file); | |
2631 | break; | |
1b786873 | 2632 | |
685080f2 NC |
2633 | case V850_NOTE_SIMD_INFO: |
2634 | fprintf (file, _("SIMD use: ")); | |
2635 | switch (value) | |
2636 | { | |
2637 | case EF_RH850_SIMD: fprintf (file, _("yes")); break; | |
2638 | case 0: fprintf (file, _("no")); break; | |
2639 | default: fprintf (file, _("unknown: %x"), value); break; | |
2640 | } | |
2641 | fputc ('\n', file); | |
2642 | break; | |
1b786873 | 2643 | |
685080f2 NC |
2644 | case V850_NOTE_CACHE_INFO: |
2645 | fprintf (file, _("CACHE use: ")); | |
2646 | switch (value) | |
2647 | { | |
2648 | case EF_RH850_CACHE: fprintf (file, _("yes")); break; | |
2649 | case 0: fprintf (file, _("no")); break; | |
2650 | default: fprintf (file, _("unknown: %x"), value); break; | |
2651 | } | |
2652 | fputc ('\n', file); | |
2653 | break; | |
1b786873 | 2654 | |
685080f2 NC |
2655 | case V850_NOTE_MMU_INFO: |
2656 | fprintf (file, _("MMU use: ")); | |
2657 | switch (value) | |
2658 | { | |
2659 | case EF_RH850_MMU: fprintf (file, _("yes")); break; | |
2660 | case 0: fprintf (file, _("no")); break; | |
2661 | default: fprintf (file, _("unknown: %x"), value); break; | |
2662 | } | |
2663 | fputc ('\n', file); | |
2664 | break; | |
1b786873 | 2665 | |
685080f2 NC |
2666 | default: |
2667 | BFD_ASSERT (0); | |
2668 | } | |
2669 | } | |
2670 | ||
2671 | static void | |
2672 | v850_elf_print_notes (bfd * abfd, FILE * file) | |
2673 | { | |
2674 | asection * notes = bfd_get_section_by_name (abfd, V850_NOTE_SECNAME); | |
2675 | enum v850_notes id; | |
2676 | ||
2677 | if (notes == NULL || notes->contents == NULL) | |
2678 | return; | |
2679 | ||
fd361982 | 2680 | BFD_ASSERT (bfd_section_size (notes) == NUM_V850_NOTES * SIZEOF_V850_NOTE); |
685080f2 NC |
2681 | |
2682 | for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++) | |
2683 | print_v850_note (abfd, file, notes->contents, id); | |
2684 | } | |
2685 | ||
de863c74 | 2686 | /* Set the right machine number and architecture. */ |
e12dd2ea | 2687 | |
0a1b45a2 | 2688 | static bool |
47b0e7ad | 2689 | v850_elf_object_p (bfd *abfd) |
252b5132 | 2690 | { |
de863c74 NC |
2691 | enum bfd_architecture arch; |
2692 | unsigned long mach; | |
2693 | ||
2694 | switch (elf_elfheader (abfd)->e_machine) | |
252b5132 | 2695 | { |
de863c74 NC |
2696 | case EM_V800: |
2697 | arch = bfd_arch_v850_rh850; | |
78c8d46c NC |
2698 | mach = (elf_elfheader (abfd)->e_flags & EF_V800_850E3) |
2699 | ? bfd_mach_v850e3v5 : bfd_mach_v850e2v3; | |
8ad30312 | 2700 | break; |
de863c74 NC |
2701 | |
2702 | case EM_CYGNUS_V850: | |
2703 | case EM_V850: | |
2704 | arch = bfd_arch_v850; | |
2705 | switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH) | |
2706 | { | |
2707 | default: | |
2708 | case E_V850_ARCH: mach = bfd_mach_v850; break; | |
2709 | case E_V850E_ARCH: mach = bfd_mach_v850e; break; | |
2710 | case E_V850E1_ARCH: mach = bfd_mach_v850e1; break; | |
2711 | case E_V850E2_ARCH: mach = bfd_mach_v850e2; break; | |
2712 | case E_V850E2V3_ARCH: mach = bfd_mach_v850e2v3; break; | |
78c8d46c | 2713 | case E_V850E3V5_ARCH: mach = bfd_mach_v850e3v5; break; |
de863c74 | 2714 | } |
1cd986c5 | 2715 | break; |
de863c74 NC |
2716 | |
2717 | default: | |
0a1b45a2 | 2718 | return false; |
252b5132 | 2719 | } |
de863c74 NC |
2720 | |
2721 | return bfd_default_set_arch_mach (abfd, arch, mach); | |
252b5132 RH |
2722 | } |
2723 | ||
2724 | /* Store the machine number in the flags field. */ | |
e12dd2ea | 2725 | |
0a1b45a2 | 2726 | static bool |
cc364be6 | 2727 | v850_elf_final_write_processing (bfd *abfd) |
252b5132 RH |
2728 | { |
2729 | unsigned long val; | |
2730 | ||
de863c74 | 2731 | switch (bfd_get_arch (abfd)) |
252b5132 | 2732 | { |
de863c74 NC |
2733 | case bfd_arch_v850_rh850: |
2734 | val = EF_RH850_ABI; | |
78c8d46c NC |
2735 | if (bfd_get_mach (abfd) == bfd_mach_v850e3v5) |
2736 | val |= EF_V800_850E3; | |
de863c74 NC |
2737 | elf_elfheader (abfd)->e_flags |= val; |
2738 | break; | |
2739 | ||
2740 | case bfd_arch_v850: | |
2741 | switch (bfd_get_mach (abfd)) | |
2742 | { | |
2743 | default: | |
2744 | case bfd_mach_v850: val = E_V850_ARCH; break; | |
2745 | case bfd_mach_v850e: val = E_V850E_ARCH; break; | |
2746 | case bfd_mach_v850e1: val = E_V850E1_ARCH; break; | |
2747 | case bfd_mach_v850e2: val = E_V850E2_ARCH; break; | |
2748 | case bfd_mach_v850e2v3: val = E_V850E2V3_ARCH; break; | |
78c8d46c | 2749 | case bfd_mach_v850e3v5: val = E_V850E3V5_ARCH; break; |
de863c74 NC |
2750 | } |
2751 | elf_elfheader (abfd)->e_flags &=~ EF_V850_ARCH; | |
2752 | elf_elfheader (abfd)->e_flags |= val; | |
2753 | break; | |
b34976b6 | 2754 | default: |
de863c74 | 2755 | break; |
252b5132 | 2756 | } |
cc364be6 | 2757 | return _bfd_elf_final_write_processing (abfd); |
252b5132 RH |
2758 | } |
2759 | ||
435b1e90 | 2760 | /* Function to keep V850 specific file flags. */ |
e12dd2ea | 2761 | |
0a1b45a2 | 2762 | static bool |
47b0e7ad | 2763 | v850_elf_set_private_flags (bfd *abfd, flagword flags) |
252b5132 RH |
2764 | { |
2765 | BFD_ASSERT (!elf_flags_init (abfd) | |
2766 | || elf_elfheader (abfd)->e_flags == flags); | |
2767 | ||
2768 | elf_elfheader (abfd)->e_flags = flags; | |
0a1b45a2 AM |
2769 | elf_flags_init (abfd) = true; |
2770 | return true; | |
252b5132 RH |
2771 | } |
2772 | ||
e12dd2ea NC |
2773 | /* Merge backend specific data from an object file |
2774 | to the output object file when linking. */ | |
47b0e7ad | 2775 | |
0a1b45a2 | 2776 | static bool |
50e03d47 | 2777 | v850_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) |
252b5132 | 2778 | { |
50e03d47 | 2779 | bfd *obfd = info->output_bfd; |
252b5132 RH |
2780 | flagword out_flags; |
2781 | flagword in_flags; | |
0a1b45a2 | 2782 | bool result = true; |
252b5132 RH |
2783 | |
2784 | if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour | |
2785 | || bfd_get_flavour (obfd) != bfd_target_elf_flavour) | |
0a1b45a2 | 2786 | return true; |
252b5132 | 2787 | |
685080f2 NC |
2788 | result &= v850_elf_merge_notes (ibfd, obfd); |
2789 | ||
252b5132 RH |
2790 | in_flags = elf_elfheader (ibfd)->e_flags; |
2791 | out_flags = elf_elfheader (obfd)->e_flags; | |
2792 | ||
2793 | if (! elf_flags_init (obfd)) | |
2794 | { | |
2795 | /* If the input is the default architecture then do not | |
2796 | bother setting the flags for the output architecture, | |
2797 | instead allow future merges to do this. If no future | |
2798 | merges ever set these flags then they will retain their | |
2799 | unitialised values, which surprise surprise, correspond | |
2800 | to the default values. */ | |
2801 | if (bfd_get_arch_info (ibfd)->the_default) | |
0a1b45a2 | 2802 | return true; |
435b1e90 | 2803 | |
0a1b45a2 | 2804 | elf_flags_init (obfd) = true; |
252b5132 RH |
2805 | elf_elfheader (obfd)->e_flags = in_flags; |
2806 | ||
2807 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
2808 | && bfd_get_arch_info (obfd)->the_default) | |
685080f2 | 2809 | result &= bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); |
252b5132 | 2810 | |
685080f2 | 2811 | return result; |
252b5132 RH |
2812 | } |
2813 | ||
2814 | /* Check flag compatibility. */ | |
2815 | if (in_flags == out_flags) | |
685080f2 | 2816 | return result; |
252b5132 | 2817 | |
de863c74 NC |
2818 | if (bfd_get_arch (obfd) == bfd_arch_v850_rh850) |
2819 | { | |
2820 | if ((in_flags & EF_V800_850E3) != (out_flags & EF_V800_850E3)) | |
2821 | { | |
4eca0228 | 2822 | _bfd_error_handler |
38f14ab8 | 2823 | (_("%pB: architecture mismatch with previous modules"), ibfd); |
de863c74 NC |
2824 | elf_elfheader (obfd)->e_flags |= EF_V800_850E3; |
2825 | } | |
2826 | ||
685080f2 | 2827 | return result; |
de863c74 NC |
2828 | } |
2829 | ||
252b5132 RH |
2830 | if ((in_flags & EF_V850_ARCH) != (out_flags & EF_V850_ARCH) |
2831 | && (in_flags & EF_V850_ARCH) != E_V850_ARCH) | |
8ad30312 | 2832 | { |
de863c74 | 2833 | /* Allow earlier architecture binaries to be linked with later binaries. |
07d6d2b8 AM |
2834 | Set the output binary to the later architecture, except for v850e1, |
2835 | which we set to v850e. */ | |
de863c74 | 2836 | if ( (in_flags & EF_V850_ARCH) == E_V850E1_ARCH |
07d6d2b8 AM |
2837 | && (out_flags & EF_V850_ARCH) == E_V850E_ARCH) |
2838 | return result; | |
8ad30312 | 2839 | |
de863c74 | 2840 | if ( (in_flags & EF_V850_ARCH) == E_V850_ARCH |
1cd986c5 | 2841 | && (out_flags & EF_V850_ARCH) == E_V850E_ARCH) |
8ad30312 NC |
2842 | { |
2843 | elf_elfheader (obfd)->e_flags = | |
2844 | ((out_flags & ~ EF_V850_ARCH) | E_V850E_ARCH); | |
685080f2 | 2845 | return result; |
8ad30312 NC |
2846 | } |
2847 | ||
de863c74 | 2848 | if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH |
1cd986c5 NC |
2849 | || (in_flags & EF_V850_ARCH) == E_V850E_ARCH) |
2850 | && (out_flags & EF_V850_ARCH) == E_V850E2_ARCH) | |
2851 | { | |
2852 | elf_elfheader (obfd)->e_flags = | |
2853 | ((out_flags & ~ EF_V850_ARCH) | E_V850E2_ARCH); | |
685080f2 | 2854 | return result; |
1cd986c5 NC |
2855 | } |
2856 | ||
de863c74 | 2857 | if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH |
1cd986c5 NC |
2858 | || (in_flags & EF_V850_ARCH) == E_V850E_ARCH |
2859 | || (in_flags & EF_V850_ARCH) == E_V850E2_ARCH) | |
2860 | && (out_flags & EF_V850_ARCH) == E_V850E2V3_ARCH) | |
2861 | { | |
2862 | elf_elfheader (obfd)->e_flags = | |
2863 | ((out_flags & ~ EF_V850_ARCH) | E_V850E2V3_ARCH); | |
685080f2 | 2864 | return result; |
1cd986c5 NC |
2865 | } |
2866 | ||
78c8d46c NC |
2867 | if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH |
2868 | || (in_flags & EF_V850_ARCH) == E_V850E_ARCH | |
2869 | || (in_flags & EF_V850_ARCH) == E_V850E2_ARCH | |
07d6d2b8 | 2870 | || (in_flags & EF_V850_ARCH) == E_V850E2V3_ARCH) |
78c8d46c NC |
2871 | && (out_flags & EF_V850_ARCH) == E_V850E3V5_ARCH) |
2872 | { | |
2873 | elf_elfheader (obfd)->e_flags = | |
2874 | ((out_flags & ~ EF_V850_ARCH) | E_V850E3V5_ARCH); | |
685080f2 | 2875 | return result; |
78c8d46c NC |
2876 | } |
2877 | ||
4eca0228 | 2878 | _bfd_error_handler |
38f14ab8 | 2879 | (_("%pB: architecture mismatch with previous modules"), ibfd); |
8ad30312 | 2880 | } |
252b5132 | 2881 | |
685080f2 | 2882 | return result; |
252b5132 | 2883 | } |
e12dd2ea NC |
2884 | |
2885 | /* Display the flags field. */ | |
252b5132 | 2886 | |
0a1b45a2 | 2887 | static bool |
47b0e7ad | 2888 | v850_elf_print_private_bfd_data (bfd *abfd, void * ptr) |
252b5132 RH |
2889 | { |
2890 | FILE * file = (FILE *) ptr; | |
435b1e90 | 2891 | |
252b5132 | 2892 | BFD_ASSERT (abfd != NULL && ptr != NULL); |
435b1e90 | 2893 | |
252b5132 | 2894 | _bfd_elf_print_private_bfd_data (abfd, ptr); |
435b1e90 | 2895 | |
1cd986c5 | 2896 | /* xgettext:c-format. */ |
252b5132 | 2897 | fprintf (file, _("private flags = %lx: "), elf_elfheader (abfd)->e_flags); |
435b1e90 | 2898 | |
de863c74 | 2899 | if (bfd_get_arch (abfd) == bfd_arch_v850_rh850) |
252b5132 | 2900 | { |
de863c74 | 2901 | if ((elf_elfheader (abfd)->e_flags & EF_RH850_ABI) != EF_RH850_ABI) |
68ffbac6 | 2902 | fprintf (file, _("unknown v850 architecture")); |
de863c74 NC |
2903 | else if (elf_elfheader (abfd)->e_flags & EF_V800_850E3) |
2904 | fprintf (file, _("v850 E3 architecture")); | |
2905 | else | |
2906 | fprintf (file, _("v850 architecture")); | |
de863c74 NC |
2907 | } |
2908 | else | |
2909 | { | |
2910 | switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH) | |
2911 | { | |
2912 | default: | |
2913 | case E_V850_ARCH: fprintf (file, _("v850 architecture")); break; | |
2914 | case E_V850E_ARCH: fprintf (file, _("v850e architecture")); break; | |
2915 | case E_V850E1_ARCH: fprintf (file, _("v850e1 architecture")); break; | |
2916 | case E_V850E2_ARCH: fprintf (file, _("v850e2 architecture")); break; | |
2917 | case E_V850E2V3_ARCH: fprintf (file, _("v850e2v3 architecture")); break; | |
78c8d46c | 2918 | case E_V850E3V5_ARCH: fprintf (file, _("v850e3v5 architecture")); break; |
de863c74 | 2919 | } |
252b5132 | 2920 | } |
435b1e90 | 2921 | |
252b5132 | 2922 | fputc ('\n', file); |
435b1e90 | 2923 | |
685080f2 NC |
2924 | v850_elf_print_notes (abfd, file); |
2925 | ||
0a1b45a2 | 2926 | return true; |
252b5132 RH |
2927 | } |
2928 | ||
2929 | /* V850 ELF uses four common sections. One is the usual one, and the | |
2930 | others are for (small) objects in one of the special data areas: | |
2931 | small, tiny and zero. All the objects are kept together, and then | |
2932 | referenced via the gp register, the ep register or the r0 register | |
2933 | respectively, which yields smaller, faster assembler code. This | |
2934 | approach is copied from elf32-mips.c. */ | |
2935 | ||
7f3a18cf AM |
2936 | static asection v850_elf_scom_section; |
2937 | static const asymbol v850_elf_scom_symbol = | |
2938 | GLOBAL_SYM_INIT (".scommon", &v850_elf_scom_section); | |
2939 | static asection v850_elf_scom_section = | |
2940 | BFD_FAKE_SECTION (v850_elf_scom_section, &v850_elf_scom_symbol, | |
2941 | ".scommon", 0, | |
2942 | SEC_IS_COMMON | SEC_SMALL_DATA | SEC_ALLOC | SEC_DATA); | |
2943 | ||
2944 | static asection v850_elf_tcom_section; | |
2945 | static const asymbol v850_elf_tcom_symbol = | |
2946 | GLOBAL_SYM_INIT (".tcommon", &v850_elf_tcom_section); | |
2947 | static asection v850_elf_tcom_section = | |
2948 | BFD_FAKE_SECTION (v850_elf_tcom_section, &v850_elf_tcom_symbol, | |
2949 | ".tcommon", 0, | |
2950 | SEC_IS_COMMON | SEC_SMALL_DATA); | |
2951 | ||
2952 | static asection v850_elf_zcom_section; | |
2953 | static const asymbol v850_elf_zcom_symbol = | |
2954 | GLOBAL_SYM_INIT (".zcommon", &v850_elf_zcom_section); | |
2955 | static asection v850_elf_zcom_section = | |
2956 | BFD_FAKE_SECTION (v850_elf_zcom_section, &v850_elf_zcom_symbol, | |
2957 | ".zcommon", 0, | |
2958 | SEC_IS_COMMON | SEC_SMALL_DATA); | |
252b5132 | 2959 | |
e12dd2ea NC |
2960 | /* Given a BFD section, try to locate the |
2961 | corresponding ELF section index. */ | |
252b5132 | 2962 | |
0a1b45a2 | 2963 | static bool |
47b0e7ad NC |
2964 | v850_elf_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED, |
2965 | asection *sec, | |
2966 | int *retval) | |
252b5132 | 2967 | { |
fd361982 | 2968 | if (strcmp (bfd_section_name (sec), ".scommon") == 0) |
252b5132 | 2969 | *retval = SHN_V850_SCOMMON; |
fd361982 | 2970 | else if (strcmp (bfd_section_name (sec), ".tcommon") == 0) |
252b5132 | 2971 | *retval = SHN_V850_TCOMMON; |
fd361982 | 2972 | else if (strcmp (bfd_section_name (sec), ".zcommon") == 0) |
252b5132 RH |
2973 | *retval = SHN_V850_ZCOMMON; |
2974 | else | |
0a1b45a2 | 2975 | return false; |
435b1e90 | 2976 | |
0a1b45a2 | 2977 | return true; |
252b5132 RH |
2978 | } |
2979 | ||
2980 | /* Handle the special V850 section numbers that a symbol may use. */ | |
2981 | ||
2982 | static void | |
47b0e7ad | 2983 | v850_elf_symbol_processing (bfd *abfd, asymbol *asym) |
252b5132 RH |
2984 | { |
2985 | elf_symbol_type * elfsym = (elf_symbol_type *) asym; | |
9ad5cbcf | 2986 | unsigned int indx; |
435b1e90 | 2987 | |
9ad5cbcf | 2988 | indx = elfsym->internal_elf_sym.st_shndx; |
252b5132 RH |
2989 | |
2990 | /* If the section index is an "ordinary" index, then it may | |
2991 | refer to a v850 specific section created by the assembler. | |
2992 | Check the section's type and change the index it matches. | |
435b1e90 | 2993 | |
252b5132 | 2994 | FIXME: Should we alter the st_shndx field as well ? */ |
435b1e90 | 2995 | |
9ad5cbcf | 2996 | if (indx < elf_numsections (abfd)) |
1cd986c5 | 2997 | switch (elf_elfsections (abfd)[indx]->sh_type) |
252b5132 RH |
2998 | { |
2999 | case SHT_V850_SCOMMON: | |
9ad5cbcf | 3000 | indx = SHN_V850_SCOMMON; |
252b5132 | 3001 | break; |
435b1e90 | 3002 | |
252b5132 | 3003 | case SHT_V850_TCOMMON: |
9ad5cbcf | 3004 | indx = SHN_V850_TCOMMON; |
252b5132 | 3005 | break; |
435b1e90 | 3006 | |
252b5132 | 3007 | case SHT_V850_ZCOMMON: |
9ad5cbcf | 3008 | indx = SHN_V850_ZCOMMON; |
252b5132 | 3009 | break; |
435b1e90 | 3010 | |
252b5132 RH |
3011 | default: |
3012 | break; | |
3013 | } | |
435b1e90 | 3014 | |
9ad5cbcf | 3015 | switch (indx) |
252b5132 RH |
3016 | { |
3017 | case SHN_V850_SCOMMON: | |
252b5132 RH |
3018 | asym->section = & v850_elf_scom_section; |
3019 | asym->value = elfsym->internal_elf_sym.st_size; | |
3020 | break; | |
435b1e90 | 3021 | |
252b5132 | 3022 | case SHN_V850_TCOMMON: |
252b5132 RH |
3023 | asym->section = & v850_elf_tcom_section; |
3024 | asym->value = elfsym->internal_elf_sym.st_size; | |
3025 | break; | |
3026 | ||
3027 | case SHN_V850_ZCOMMON: | |
252b5132 RH |
3028 | asym->section = & v850_elf_zcom_section; |
3029 | asym->value = elfsym->internal_elf_sym.st_size; | |
3030 | break; | |
3031 | } | |
3032 | } | |
3033 | ||
3034 | /* Hook called by the linker routine which adds symbols from an object | |
3035 | file. We must handle the special v850 section numbers here. */ | |
3036 | ||
0a1b45a2 | 3037 | static bool |
47b0e7ad NC |
3038 | v850_elf_add_symbol_hook (bfd *abfd, |
3039 | struct bfd_link_info *info ATTRIBUTE_UNUSED, | |
3040 | Elf_Internal_Sym *sym, | |
3041 | const char **namep ATTRIBUTE_UNUSED, | |
3042 | flagword *flagsp ATTRIBUTE_UNUSED, | |
3043 | asection **secp, | |
3044 | bfd_vma *valp) | |
252b5132 | 3045 | { |
9ad5cbcf | 3046 | unsigned int indx = sym->st_shndx; |
435b1e90 | 3047 | |
252b5132 RH |
3048 | /* If the section index is an "ordinary" index, then it may |
3049 | refer to a v850 specific section created by the assembler. | |
3050 | Check the section's type and change the index it matches. | |
435b1e90 | 3051 | |
252b5132 | 3052 | FIXME: Should we alter the st_shndx field as well ? */ |
435b1e90 | 3053 | |
9ad5cbcf | 3054 | if (indx < elf_numsections (abfd)) |
1cd986c5 | 3055 | switch (elf_elfsections (abfd)[indx]->sh_type) |
252b5132 RH |
3056 | { |
3057 | case SHT_V850_SCOMMON: | |
9ad5cbcf | 3058 | indx = SHN_V850_SCOMMON; |
252b5132 | 3059 | break; |
435b1e90 | 3060 | |
252b5132 | 3061 | case SHT_V850_TCOMMON: |
9ad5cbcf | 3062 | indx = SHN_V850_TCOMMON; |
252b5132 | 3063 | break; |
435b1e90 | 3064 | |
252b5132 | 3065 | case SHT_V850_ZCOMMON: |
9ad5cbcf | 3066 | indx = SHN_V850_ZCOMMON; |
252b5132 | 3067 | break; |
435b1e90 | 3068 | |
252b5132 RH |
3069 | default: |
3070 | break; | |
3071 | } | |
435b1e90 | 3072 | |
9ad5cbcf | 3073 | switch (indx) |
252b5132 RH |
3074 | { |
3075 | case SHN_V850_SCOMMON: | |
3076 | *secp = bfd_make_section_old_way (abfd, ".scommon"); | |
10885e24 | 3077 | (*secp)->flags |= SEC_IS_COMMON | SEC_SMALL_DATA; |
252b5132 RH |
3078 | *valp = sym->st_size; |
3079 | break; | |
435b1e90 | 3080 | |
252b5132 RH |
3081 | case SHN_V850_TCOMMON: |
3082 | *secp = bfd_make_section_old_way (abfd, ".tcommon"); | |
10885e24 | 3083 | (*secp)->flags |= SEC_IS_COMMON | SEC_SMALL_DATA; |
252b5132 RH |
3084 | *valp = sym->st_size; |
3085 | break; | |
435b1e90 | 3086 | |
252b5132 RH |
3087 | case SHN_V850_ZCOMMON: |
3088 | *secp = bfd_make_section_old_way (abfd, ".zcommon"); | |
10885e24 | 3089 | (*secp)->flags |= SEC_IS_COMMON | SEC_SMALL_DATA; |
252b5132 RH |
3090 | *valp = sym->st_size; |
3091 | break; | |
3092 | } | |
3093 | ||
0a1b45a2 | 3094 | return true; |
252b5132 RH |
3095 | } |
3096 | ||
6e0b88f1 | 3097 | static int |
47b0e7ad NC |
3098 | v850_elf_link_output_symbol_hook (struct bfd_link_info *info ATTRIBUTE_UNUSED, |
3099 | const char *name ATTRIBUTE_UNUSED, | |
3100 | Elf_Internal_Sym *sym, | |
3101 | asection *input_sec, | |
3dd2d30b | 3102 | struct elf_link_hash_entry *h ATTRIBUTE_UNUSED) |
252b5132 RH |
3103 | { |
3104 | /* If we see a common symbol, which implies a relocatable link, then | |
3105 | if a symbol was in a special common section in an input file, mark | |
3106 | it as a special common in the output file. */ | |
435b1e90 | 3107 | |
252b5132 RH |
3108 | if (sym->st_shndx == SHN_COMMON) |
3109 | { | |
3110 | if (strcmp (input_sec->name, ".scommon") == 0) | |
3111 | sym->st_shndx = SHN_V850_SCOMMON; | |
3112 | else if (strcmp (input_sec->name, ".tcommon") == 0) | |
3113 | sym->st_shndx = SHN_V850_TCOMMON; | |
3114 | else if (strcmp (input_sec->name, ".zcommon") == 0) | |
3115 | sym->st_shndx = SHN_V850_ZCOMMON; | |
3116 | } | |
3117 | ||
d4c87fc1 AM |
3118 | /* The price we pay for using h->other unused bits as flags in the |
3119 | linker is cleaning up after ourselves. */ | |
3dd2d30b AM |
3120 | |
3121 | sym->st_other &= ~(V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA | |
3122 | | V850_OTHER_ERROR); | |
d4c87fc1 | 3123 | |
6e0b88f1 | 3124 | return 1; |
252b5132 RH |
3125 | } |
3126 | ||
0a1b45a2 | 3127 | static bool |
6dc132d9 L |
3128 | v850_elf_section_from_shdr (bfd *abfd, |
3129 | Elf_Internal_Shdr *hdr, | |
3130 | const char *name, | |
3131 | int shindex) | |
252b5132 | 3132 | { |
bf577467 AM |
3133 | flagword flags; |
3134 | ||
252b5132 RH |
3135 | /* There ought to be a place to keep ELF backend specific flags, but |
3136 | at the moment there isn't one. We just keep track of the | |
3137 | sections by their name, instead. */ | |
3138 | ||
6dc132d9 | 3139 | if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) |
0a1b45a2 | 3140 | return false; |
252b5132 | 3141 | |
bf577467 | 3142 | flags = 0; |
252b5132 RH |
3143 | switch (hdr->sh_type) |
3144 | { | |
3145 | case SHT_V850_SCOMMON: | |
3146 | case SHT_V850_TCOMMON: | |
3147 | case SHT_V850_ZCOMMON: | |
bf577467 | 3148 | flags = SEC_IS_COMMON; |
252b5132 RH |
3149 | } |
3150 | ||
bf577467 AM |
3151 | if ((hdr->sh_flags & SHF_V850_GPREL) != 0) |
3152 | flags |= SEC_SMALL_DATA; | |
3153 | ||
3154 | return (flags == 0 | |
3155 | || bfd_set_section_flags (hdr->bfd_section, | |
3156 | hdr->bfd_section->flags | flags)); | |
252b5132 RH |
3157 | } |
3158 | ||
e12dd2ea NC |
3159 | /* Set the correct type for a V850 ELF section. We do this |
3160 | by the section name, which is a hack, but ought to work. */ | |
3161 | ||
0a1b45a2 | 3162 | static bool |
47b0e7ad NC |
3163 | v850_elf_fake_sections (bfd *abfd ATTRIBUTE_UNUSED, |
3164 | Elf_Internal_Shdr *hdr, | |
3165 | asection *sec) | |
252b5132 | 3166 | { |
47b0e7ad | 3167 | const char * name; |
252b5132 | 3168 | |
fd361982 | 3169 | name = bfd_section_name (sec); |
252b5132 RH |
3170 | |
3171 | if (strcmp (name, ".scommon") == 0) | |
47b0e7ad | 3172 | hdr->sh_type = SHT_V850_SCOMMON; |
252b5132 | 3173 | else if (strcmp (name, ".tcommon") == 0) |
47b0e7ad | 3174 | hdr->sh_type = SHT_V850_TCOMMON; |
252b5132 RH |
3175 | else if (strcmp (name, ".zcommon") == 0) |
3176 | hdr->sh_type = SHT_V850_ZCOMMON; | |
685080f2 NC |
3177 | /* Tweak the section type of .note.renesas. */ |
3178 | else if (strcmp (name, V850_NOTE_SECNAME) == 0) | |
3179 | { | |
3180 | hdr->sh_type = SHT_RENESAS_INFO; | |
3181 | hdr->sh_entsize = SIZEOF_V850_NOTE; | |
3182 | } | |
435b1e90 | 3183 | |
0a1b45a2 | 3184 | return true; |
252b5132 | 3185 | } |
86aba9db NC |
3186 | |
3187 | /* Delete some bytes from a section while relaxing. */ | |
3188 | ||
0a1b45a2 | 3189 | static bool |
47b0e7ad NC |
3190 | v850_elf_relax_delete_bytes (bfd *abfd, |
3191 | asection *sec, | |
3192 | bfd_vma addr, | |
3193 | bfd_vma toaddr, | |
3194 | int count) | |
86aba9db | 3195 | { |
b34976b6 AM |
3196 | Elf_Internal_Shdr *symtab_hdr; |
3197 | Elf32_External_Sym *extsyms; | |
3198 | Elf32_External_Sym *esym; | |
3199 | Elf32_External_Sym *esymend; | |
91d6fa6a | 3200 | int sym_index; |
b34976b6 AM |
3201 | unsigned int sec_shndx; |
3202 | bfd_byte *contents; | |
3203 | Elf_Internal_Rela *irel; | |
3204 | Elf_Internal_Rela *irelend; | |
3205 | struct elf_link_hash_entry *sym_hash; | |
b34976b6 | 3206 | Elf_External_Sym_Shndx *shndx; |
86aba9db NC |
3207 | |
3208 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
3209 | extsyms = (Elf32_External_Sym *) symtab_hdr->contents; | |
3210 | ||
3211 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
3212 | ||
3213 | contents = elf_section_data (sec)->this_hdr.contents; | |
3214 | ||
3215 | /* The deletion must stop at the next ALIGN reloc for an alignment | |
3216 | power larger than the number of bytes we are deleting. */ | |
3217 | ||
3218 | /* Actually delete the bytes. */ | |
3219 | #if (DEBUG_RELAX & 2) | |
3220 | fprintf (stderr, "relax_delete: contents: sec: %s %p .. %p %x\n", | |
3221 | sec->name, addr, toaddr, count ); | |
3222 | #endif | |
3223 | memmove (contents + addr, contents + addr + count, | |
3224 | toaddr - addr - count); | |
3225 | memset (contents + toaddr-count, 0, count); | |
3226 | ||
3227 | /* Adjust all the relocs. */ | |
3228 | irel = elf_section_data (sec)->relocs; | |
3229 | irelend = irel + sec->reloc_count; | |
6a40cf0c NC |
3230 | if (elf_symtab_shndx_list (abfd)) |
3231 | { | |
3232 | Elf_Internal_Shdr *shndx_hdr; | |
3233 | ||
3234 | shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr; | |
3235 | shndx = (Elf_External_Sym_Shndx *) shndx_hdr->contents; | |
3236 | } | |
3237 | else | |
3238 | { | |
3239 | shndx = NULL; | |
3240 | } | |
86aba9db NC |
3241 | |
3242 | for (; irel < irelend; irel++) | |
3243 | { | |
3244 | bfd_vma raddr, paddr, symval; | |
3245 | Elf_Internal_Sym isym; | |
3246 | ||
3247 | /* Get the new reloc address. */ | |
3248 | raddr = irel->r_offset; | |
3249 | if ((raddr >= (addr + count) && raddr < toaddr)) | |
b34976b6 | 3250 | irel->r_offset -= count; |
86aba9db NC |
3251 | |
3252 | if (raddr >= addr && raddr < addr + count) | |
3253 | { | |
3254 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
3255 | (int) R_V850_NONE); | |
3256 | continue; | |
3257 | } | |
b34976b6 | 3258 | |
86aba9db NC |
3259 | if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN) |
3260 | continue; | |
3261 | ||
3262 | bfd_elf32_swap_symbol_in (abfd, | |
3263 | extsyms + ELF32_R_SYM (irel->r_info), | |
3264 | shndx ? shndx + ELF32_R_SYM (irel->r_info) : NULL, | |
3265 | & isym); | |
b34976b6 | 3266 | |
86aba9db NC |
3267 | if (isym.st_shndx != sec_shndx) |
3268 | continue; | |
3269 | ||
3270 | /* Get the value of the symbol referred to by the reloc. */ | |
3271 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
3272 | { | |
3273 | symval = isym.st_value; | |
3274 | #if (DEBUG_RELAX & 2) | |
3275 | { | |
3276 | char * name = bfd_elf_string_from_elf_section | |
07d6d2b8 | 3277 | (abfd, symtab_hdr->sh_link, isym.st_name); |
86aba9db NC |
3278 | fprintf (stderr, |
3279 | "relax_delete: local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n", | |
3280 | sec->name, name, isym.st_name, | |
3281 | sec->output_section->vma, sec->output_offset, | |
3282 | isym.st_value, irel->r_addend); | |
3283 | } | |
3284 | #endif | |
3285 | } | |
3286 | else | |
3287 | { | |
3288 | unsigned long indx; | |
3289 | struct elf_link_hash_entry * h; | |
3290 | ||
3291 | /* An external symbol. */ | |
3292 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
3293 | ||
3294 | h = elf_sym_hashes (abfd) [indx]; | |
3295 | BFD_ASSERT (h != NULL); | |
3296 | ||
3297 | symval = h->root.u.def.value; | |
3298 | #if (DEBUG_RELAX & 2) | |
3299 | fprintf (stderr, | |
3300 | "relax_delete: defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n", | |
3301 | sec->name, h->root.root.string, h->root.u.def.value, | |
3302 | sec->output_section->vma, sec->output_offset, irel->r_addend); | |
3303 | #endif | |
3304 | } | |
b34976b6 | 3305 | |
86aba9db | 3306 | paddr = symval + irel->r_addend; |
b34976b6 | 3307 | |
86aba9db NC |
3308 | if ( (symval >= addr + count && symval < toaddr) |
3309 | && (paddr < addr + count || paddr >= toaddr)) | |
3310 | irel->r_addend += count; | |
3311 | else if ( (symval < addr + count || symval >= toaddr) | |
07d6d2b8 | 3312 | && (paddr >= addr + count && paddr < toaddr)) |
86aba9db NC |
3313 | irel->r_addend -= count; |
3314 | } | |
3315 | ||
3316 | /* Adjust the local symbols defined in this section. */ | |
3317 | esym = extsyms; | |
3318 | esymend = esym + symtab_hdr->sh_info; | |
3319 | ||
3320 | for (; esym < esymend; esym++, shndx = (shndx ? shndx + 1 : NULL)) | |
3321 | { | |
3322 | Elf_Internal_Sym isym; | |
3323 | ||
3324 | bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym); | |
3325 | ||
3326 | if (isym.st_shndx == sec_shndx | |
3327 | && isym.st_value >= addr + count | |
3328 | && isym.st_value < toaddr) | |
3329 | { | |
3330 | isym.st_value -= count; | |
3331 | ||
3332 | if (isym.st_value + isym.st_size >= toaddr) | |
b34976b6 AM |
3333 | isym.st_size += count; |
3334 | ||
63a23799 | 3335 | bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx); |
86aba9db NC |
3336 | } |
3337 | else if (isym.st_shndx == sec_shndx | |
3338 | && isym.st_value < addr + count) | |
3339 | { | |
3340 | if (isym.st_value+isym.st_size >= addr + count | |
3341 | && isym.st_value+isym.st_size < toaddr) | |
3342 | isym.st_size -= count; | |
3343 | ||
3344 | if (isym.st_value >= addr | |
3345 | && isym.st_value < addr + count) | |
3346 | isym.st_value = addr; | |
3347 | ||
63a23799 | 3348 | bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx); |
86aba9db NC |
3349 | } |
3350 | } | |
3351 | ||
3352 | /* Now adjust the global symbols defined in this section. */ | |
3353 | esym = extsyms + symtab_hdr->sh_info; | |
3354 | esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)); | |
3355 | ||
91d6fa6a | 3356 | for (sym_index = 0; esym < esymend; esym ++, sym_index ++) |
86aba9db NC |
3357 | { |
3358 | Elf_Internal_Sym isym; | |
3359 | ||
3360 | bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym); | |
91d6fa6a | 3361 | sym_hash = elf_sym_hashes (abfd) [sym_index]; |
86aba9db NC |
3362 | |
3363 | if (isym.st_shndx == sec_shndx | |
3364 | && ((sym_hash)->root.type == bfd_link_hash_defined | |
3365 | || (sym_hash)->root.type == bfd_link_hash_defweak) | |
3366 | && (sym_hash)->root.u.def.section == sec | |
3367 | && (sym_hash)->root.u.def.value >= addr + count | |
3368 | && (sym_hash)->root.u.def.value < toaddr) | |
3369 | { | |
3370 | if ((sym_hash)->root.u.def.value + isym.st_size >= toaddr) | |
3371 | { | |
3372 | isym.st_size += count; | |
63a23799 | 3373 | bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx); |
86aba9db NC |
3374 | } |
3375 | ||
3376 | (sym_hash)->root.u.def.value -= count; | |
3377 | } | |
3378 | else if (isym.st_shndx == sec_shndx | |
3379 | && ((sym_hash)->root.type == bfd_link_hash_defined | |
3380 | || (sym_hash)->root.type == bfd_link_hash_defweak) | |
3381 | && (sym_hash)->root.u.def.section == sec | |
3382 | && (sym_hash)->root.u.def.value < addr + count) | |
3383 | { | |
3384 | if ((sym_hash)->root.u.def.value+isym.st_size >= addr + count | |
3385 | && (sym_hash)->root.u.def.value+isym.st_size < toaddr) | |
3386 | isym.st_size -= count; | |
3387 | ||
3388 | if ((sym_hash)->root.u.def.value >= addr | |
3389 | && (sym_hash)->root.u.def.value < addr + count) | |
3390 | (sym_hash)->root.u.def.value = addr; | |
3391 | ||
63a23799 | 3392 | bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx); |
86aba9db NC |
3393 | } |
3394 | ||
3395 | if (shndx) | |
3396 | ++ shndx; | |
3397 | } | |
3398 | ||
0a1b45a2 | 3399 | return true; |
86aba9db NC |
3400 | } |
3401 | ||
07d6d2b8 AM |
3402 | #define NOP_OPCODE (0x0000) |
3403 | #define MOVHI 0x0640 /* 4byte. */ | |
3404 | #define MOVHI_MASK 0x07e0 | |
1cd986c5 | 3405 | #define MOVHI_R1(insn) ((insn) & 0x1f) /* 4byte. */ |
86aba9db | 3406 | #define MOVHI_R2(insn) ((insn) >> 11) |
07d6d2b8 AM |
3407 | #define MOVEA 0x0620 /* 2byte. */ |
3408 | #define MOVEA_MASK 0x07e0 | |
86aba9db NC |
3409 | #define MOVEA_R1(insn) ((insn) & 0x1f) |
3410 | #define MOVEA_R2(insn) ((insn) >> 11) | |
07d6d2b8 AM |
3411 | #define JARL_4 0x00040780 /* 4byte. */ |
3412 | #define JARL_4_MASK 0xFFFF07FF | |
86aba9db | 3413 | #define JARL_R2(insn) (int)(((insn) & (~JARL_4_MASK)) >> 11) |
07d6d2b8 AM |
3414 | #define ADD_I 0x0240 /* 2byte. */ |
3415 | #define ADD_I_MASK 0x07e0 | |
1cd986c5 | 3416 | #define ADD_I5(insn) ((((insn) & 0x001f) << 11) >> 11) /* 2byte. */ |
86aba9db | 3417 | #define ADD_R2(insn) ((insn) >> 11) |
07d6d2b8 AM |
3418 | #define JMP_R 0x0060 /* 2byte. */ |
3419 | #define JMP_R_MASK 0xFFE0 | |
86aba9db NC |
3420 | #define JMP_R1(insn) ((insn) & 0x1f) |
3421 | ||
0a1b45a2 | 3422 | static bool |
47b0e7ad NC |
3423 | v850_elf_relax_section (bfd *abfd, |
3424 | asection *sec, | |
3425 | struct bfd_link_info *link_info, | |
0a1b45a2 | 3426 | bool *again) |
86aba9db | 3427 | { |
b34976b6 AM |
3428 | Elf_Internal_Shdr *symtab_hdr; |
3429 | Elf_Internal_Rela *internal_relocs; | |
3430 | Elf_Internal_Rela *irel; | |
3431 | Elf_Internal_Rela *irelend; | |
3432 | Elf_Internal_Rela *irelalign = NULL; | |
3433 | Elf_Internal_Sym *isymbuf = NULL; | |
3434 | bfd_byte *contents = NULL; | |
3435 | bfd_vma addr = 0; | |
3436 | bfd_vma toaddr; | |
3437 | int align_pad_size = 0; | |
0a1b45a2 | 3438 | bool result = true; |
b34976b6 | 3439 | |
0a1b45a2 | 3440 | *again = false; |
86aba9db | 3441 | |
0e1862bb | 3442 | if (bfd_link_relocatable (link_info) |
86aba9db NC |
3443 | || (sec->flags & SEC_RELOC) == 0 |
3444 | || sec->reloc_count == 0) | |
0a1b45a2 | 3445 | return true; |
86aba9db | 3446 | |
86aba9db NC |
3447 | symtab_hdr = & elf_tdata (abfd)->symtab_hdr; |
3448 | ||
45d6a902 | 3449 | internal_relocs = (_bfd_elf_link_read_relocs |
47b0e7ad | 3450 | (abfd, sec, NULL, NULL, link_info->keep_memory)); |
86aba9db NC |
3451 | if (internal_relocs == NULL) |
3452 | goto error_return; | |
86aba9db NC |
3453 | |
3454 | irelend = internal_relocs + sec->reloc_count; | |
b34976b6 | 3455 | |
eea6121a | 3456 | while (addr < sec->size) |
86aba9db | 3457 | { |
eea6121a | 3458 | toaddr = sec->size; |
86aba9db NC |
3459 | |
3460 | for (irel = internal_relocs; irel < irelend; irel ++) | |
3461 | if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN | |
3462 | && irel->r_offset > addr | |
3463 | && irel->r_offset < toaddr) | |
3464 | toaddr = irel->r_offset; | |
b34976b6 | 3465 | |
86aba9db NC |
3466 | #ifdef DEBUG_RELAX |
3467 | fprintf (stderr, "relax region 0x%x to 0x%x align pad %d\n", | |
3468 | addr, toaddr, align_pad_size); | |
3469 | #endif | |
3470 | if (irelalign) | |
3471 | { | |
3472 | bfd_vma alignto; | |
3473 | bfd_vma alignmoveto; | |
3474 | ||
3475 | alignmoveto = BFD_ALIGN (addr - align_pad_size, 1 << irelalign->r_addend); | |
3476 | alignto = BFD_ALIGN (addr, 1 << irelalign->r_addend); | |
3477 | ||
3478 | if (alignmoveto < alignto) | |
3479 | { | |
544008aa | 3480 | bfd_vma i; |
86aba9db NC |
3481 | |
3482 | align_pad_size = alignto - alignmoveto; | |
3483 | #ifdef DEBUG_RELAX | |
3484 | fprintf (stderr, "relax move region 0x%x to 0x%x delete size 0x%x\n", | |
3485 | alignmoveto, toaddr, align_pad_size); | |
3486 | #endif | |
3487 | if (!v850_elf_relax_delete_bytes (abfd, sec, alignmoveto, | |
3488 | toaddr, align_pad_size)) | |
b34976b6 | 3489 | goto error_return; |
86aba9db NC |
3490 | |
3491 | for (i = BFD_ALIGN (toaddr - align_pad_size, 1); | |
3492 | (i + 1) < toaddr; i += 2) | |
3493 | bfd_put_16 (abfd, NOP_OPCODE, contents + i); | |
3494 | ||
3495 | addr = alignmoveto; | |
3496 | } | |
3497 | else | |
3498 | align_pad_size = 0; | |
3499 | } | |
3500 | ||
3501 | for (irel = internal_relocs; irel < irelend; irel++) | |
3502 | { | |
b34976b6 AM |
3503 | bfd_vma laddr; |
3504 | bfd_vma addend; | |
3505 | bfd_vma symval; | |
3506 | int insn[5]; | |
3507 | int no_match = -1; | |
3508 | Elf_Internal_Rela *hi_irelfn; | |
3509 | Elf_Internal_Rela *lo_irelfn; | |
3510 | Elf_Internal_Rela *irelcall; | |
3511 | bfd_signed_vma foff; | |
de863c74 | 3512 | unsigned int r_type; |
86aba9db NC |
3513 | |
3514 | if (! (irel->r_offset >= addr && irel->r_offset < toaddr | |
3515 | && (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL | |
3516 | || ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP))) | |
3517 | continue; | |
3518 | ||
3519 | #ifdef DEBUG_RELAX | |
3520 | fprintf (stderr, "relax check r_info 0x%x r_offset 0x%x r_addend 0x%x\n", | |
3521 | irel->r_info, | |
3522 | irel->r_offset, | |
3523 | irel->r_addend ); | |
3524 | #endif | |
3525 | ||
3526 | /* Get the section contents. */ | |
3527 | if (contents == NULL) | |
3528 | { | |
3529 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
3530 | contents = elf_section_data (sec)->this_hdr.contents; | |
3531 | else | |
3532 | { | |
47b0e7ad | 3533 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
86aba9db NC |
3534 | goto error_return; |
3535 | } | |
3536 | } | |
3537 | ||
5cec6941 NC |
3538 | /* Read this BFD's local symbols if we haven't done so already. */ |
3539 | if (isymbuf == NULL && symtab_hdr->sh_info != 0) | |
86aba9db | 3540 | { |
5cec6941 NC |
3541 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; |
3542 | if (isymbuf == NULL) | |
3543 | isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, | |
3544 | symtab_hdr->sh_info, 0, | |
3545 | NULL, NULL, NULL); | |
3546 | if (isymbuf == NULL) | |
3547 | goto error_return; | |
86aba9db NC |
3548 | } |
3549 | ||
3550 | laddr = irel->r_offset; | |
3551 | ||
3552 | if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL) | |
3553 | { | |
3554 | /* Check code for -mlong-calls output. */ | |
eea6121a | 3555 | if (laddr + 16 <= (bfd_vma) sec->size) |
86aba9db NC |
3556 | { |
3557 | insn[0] = bfd_get_16 (abfd, contents + laddr); | |
3558 | insn[1] = bfd_get_16 (abfd, contents + laddr + 4); | |
3559 | insn[2] = bfd_get_32 (abfd, contents + laddr + 8); | |
3560 | insn[3] = bfd_get_16 (abfd, contents + laddr + 12); | |
3561 | insn[4] = bfd_get_16 (abfd, contents + laddr + 14); | |
b34976b6 | 3562 | |
86aba9db NC |
3563 | if ((insn[0] & MOVHI_MASK) != MOVHI |
3564 | || MOVHI_R1 (insn[0]) != 0) | |
3565 | no_match = 0; | |
3566 | ||
3567 | if (no_match < 0 | |
3568 | && ((insn[1] & MOVEA_MASK) != MOVEA | |
3569 | || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1]))) | |
3570 | no_match = 1; | |
3571 | ||
3572 | if (no_match < 0 | |
3573 | && (insn[2] & JARL_4_MASK) != JARL_4) | |
3574 | no_match = 2; | |
3575 | ||
3576 | if (no_match < 0 | |
3577 | && ((insn[3] & ADD_I_MASK) != ADD_I | |
3578 | || ADD_I5 (insn[3]) != 4 | |
3579 | || JARL_R2 (insn[2]) != ADD_R2 (insn[3]))) | |
3580 | no_match = 3; | |
3581 | ||
3582 | if (no_match < 0 | |
3583 | && ((insn[4] & JMP_R_MASK) != JMP_R | |
3584 | || MOVEA_R2 (insn[1]) != JMP_R1 (insn[4]))) | |
3585 | no_match = 4; | |
3586 | } | |
3587 | else | |
3588 | { | |
4eca0228 | 3589 | _bfd_error_handler |
695344c0 | 3590 | /* xgettext:c-format */ |
38f14ab8 | 3591 | (_("%pB: %#" PRIx64 ": warning: %s points to " |
695344c0 | 3592 | "unrecognized insns"), |
38f14ab8 | 3593 | abfd, (uint64_t) irel->r_offset, "R_V850_LONGCALL"); |
86aba9db NC |
3594 | continue; |
3595 | } | |
3596 | ||
3597 | if (no_match >= 0) | |
3598 | { | |
4eca0228 | 3599 | _bfd_error_handler |
695344c0 | 3600 | /* xgettext:c-format */ |
38f14ab8 | 3601 | (_("%pB: %#" PRIx64 ": warning: %s points to " |
d42c267e | 3602 | "unrecognized insn %#x"), |
dae82561 | 3603 | abfd, |
2dcf00ce | 3604 | (uint64_t) (irel->r_offset + no_match), |
38f14ab8 | 3605 | "R_V850_LONGCALL", |
4eca0228 | 3606 | insn[no_match]); |
86aba9db | 3607 | continue; |
b34976b6 | 3608 | } |
86aba9db NC |
3609 | |
3610 | /* Get the reloc for the address from which the register is | |
07d6d2b8 AM |
3611 | being loaded. This reloc will tell us which function is |
3612 | actually being called. */ | |
68ffbac6 | 3613 | |
86aba9db | 3614 | for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++) |
de863c74 NC |
3615 | { |
3616 | r_type = ELF32_R_TYPE (hi_irelfn->r_info); | |
3617 | ||
3618 | if (hi_irelfn->r_offset == laddr + 2 | |
3619 | && (r_type == (int) R_V850_HI16_S || r_type == (int) R_V810_WHI1)) | |
3620 | break; | |
3621 | } | |
86aba9db NC |
3622 | |
3623 | for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++) | |
de863c74 NC |
3624 | { |
3625 | r_type = ELF32_R_TYPE (lo_irelfn->r_info); | |
3626 | ||
3627 | if (lo_irelfn->r_offset == laddr + 6 | |
3628 | && (r_type == (int) R_V850_LO16 || r_type == (int) R_V810_WLO)) | |
3629 | break; | |
3630 | } | |
86aba9db NC |
3631 | |
3632 | for (irelcall = internal_relocs; irelcall < irelend; irelcall ++) | |
de863c74 NC |
3633 | { |
3634 | r_type = ELF32_R_TYPE (irelcall->r_info); | |
3635 | ||
3636 | if (irelcall->r_offset == laddr + 8 | |
3637 | && (r_type == (int) R_V850_22_PCREL || r_type == (int) R_V850_PCR22)) | |
3638 | break; | |
3639 | } | |
86aba9db NC |
3640 | |
3641 | if ( hi_irelfn == irelend | |
3642 | || lo_irelfn == irelend | |
3643 | || irelcall == irelend) | |
3644 | { | |
4eca0228 | 3645 | _bfd_error_handler |
695344c0 | 3646 | /* xgettext:c-format */ |
38f14ab8 | 3647 | (_("%pB: %#" PRIx64 ": warning: %s points to " |
695344c0 | 3648 | "unrecognized reloc"), |
38f14ab8 | 3649 | abfd, (uint64_t) irel->r_offset, "R_V850_LONGCALL"); |
86aba9db NC |
3650 | |
3651 | continue; | |
3652 | } | |
b34976b6 | 3653 | |
86aba9db NC |
3654 | if (ELF32_R_SYM (irelcall->r_info) < symtab_hdr->sh_info) |
3655 | { | |
5cec6941 | 3656 | Elf_Internal_Sym * isym; |
86aba9db NC |
3657 | |
3658 | /* A local symbol. */ | |
5cec6941 | 3659 | isym = isymbuf + ELF32_R_SYM (irelcall->r_info); |
86aba9db | 3660 | |
5cec6941 | 3661 | symval = isym->st_value; |
86aba9db NC |
3662 | } |
3663 | else | |
3664 | { | |
3665 | unsigned long indx; | |
3666 | struct elf_link_hash_entry * h; | |
3667 | ||
3668 | /* An external symbol. */ | |
3669 | indx = ELF32_R_SYM (irelcall->r_info) - symtab_hdr->sh_info; | |
3670 | h = elf_sym_hashes (abfd)[indx]; | |
3671 | BFD_ASSERT (h != NULL); | |
3672 | ||
3673 | if ( h->root.type != bfd_link_hash_defined | |
3674 | && h->root.type != bfd_link_hash_defweak) | |
3675 | /* This appears to be a reference to an undefined | |
3676 | symbol. Just ignore it--it will be caught by the | |
3677 | regular reloc processing. */ | |
3678 | continue; | |
3679 | ||
3680 | symval = h->root.u.def.value; | |
3681 | } | |
3682 | ||
3683 | if (symval + irelcall->r_addend != irelcall->r_offset + 4) | |
3684 | { | |
4eca0228 | 3685 | _bfd_error_handler |
695344c0 | 3686 | /* xgettext:c-format */ |
38f14ab8 | 3687 | (_("%pB: %#" PRIx64 ": warning: %s points to " |
2dcf00ce | 3688 | "unrecognized reloc %#" PRIx64), |
38f14ab8 | 3689 | abfd, (uint64_t) irel->r_offset, "R_V850_LONGCALL", |
2dcf00ce | 3690 | (uint64_t) irelcall->r_offset); |
86aba9db NC |
3691 | continue; |
3692 | } | |
3693 | ||
3694 | /* Get the value of the symbol referred to by the reloc. */ | |
3695 | if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info) | |
3696 | { | |
b34976b6 AM |
3697 | Elf_Internal_Sym *isym; |
3698 | asection *sym_sec; | |
86aba9db NC |
3699 | |
3700 | /* A local symbol. */ | |
5cec6941 | 3701 | isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info); |
b34976b6 | 3702 | |
5cec6941 | 3703 | if (isym->st_shndx == SHN_UNDEF) |
86aba9db | 3704 | sym_sec = bfd_und_section_ptr; |
5cec6941 | 3705 | else if (isym->st_shndx == SHN_ABS) |
86aba9db | 3706 | sym_sec = bfd_abs_section_ptr; |
5cec6941 | 3707 | else if (isym->st_shndx == SHN_COMMON) |
86aba9db NC |
3708 | sym_sec = bfd_com_section_ptr; |
3709 | else | |
5cec6941 NC |
3710 | sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); |
3711 | symval = (isym->st_value | |
86aba9db NC |
3712 | + sym_sec->output_section->vma |
3713 | + sym_sec->output_offset); | |
3714 | } | |
3715 | else | |
3716 | { | |
3717 | unsigned long indx; | |
b34976b6 | 3718 | struct elf_link_hash_entry *h; |
86aba9db NC |
3719 | |
3720 | /* An external symbol. */ | |
5cec6941 | 3721 | indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info; |
86aba9db NC |
3722 | h = elf_sym_hashes (abfd)[indx]; |
3723 | BFD_ASSERT (h != NULL); | |
3724 | ||
3725 | if ( h->root.type != bfd_link_hash_defined | |
3726 | && h->root.type != bfd_link_hash_defweak) | |
3727 | /* This appears to be a reference to an undefined | |
3728 | symbol. Just ignore it--it will be caught by the | |
3729 | regular reloc processing. */ | |
3730 | continue; | |
3731 | ||
3732 | symval = (h->root.u.def.value | |
3733 | + h->root.u.def.section->output_section->vma | |
3734 | + h->root.u.def.section->output_offset); | |
3735 | } | |
3736 | ||
3737 | addend = irel->r_addend; | |
3738 | ||
3739 | foff = (symval + addend | |
3740 | - (irel->r_offset | |
3741 | + sec->output_section->vma | |
3742 | + sec->output_offset | |
3743 | + 4)); | |
3744 | #ifdef DEBUG_RELAX | |
3745 | fprintf (stderr, "relax longcall r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n", | |
3746 | irel->r_offset, | |
3747 | (irel->r_offset | |
3748 | + sec->output_section->vma | |
3749 | + sec->output_offset), | |
3750 | symval, addend, foff); | |
3751 | #endif | |
3752 | ||
3753 | if (foff < -0x100000 || foff >= 0x100000) | |
3754 | /* After all that work, we can't shorten this function call. */ | |
3755 | continue; | |
3756 | ||
3757 | /* For simplicity of coding, we are going to modify the section | |
07d6d2b8 AM |
3758 | contents, the section relocs, and the BFD symbol table. We |
3759 | must tell the rest of the code not to free up this | |
3760 | information. It would be possible to instead create a table | |
3761 | of changes which have to be made, as is done in coff-mips.c; | |
3762 | that would be more work, but would require less memory when | |
3763 | the linker is run. */ | |
86aba9db | 3764 | elf_section_data (sec)->relocs = internal_relocs; |
86aba9db | 3765 | elf_section_data (sec)->this_hdr.contents = contents; |
5cec6941 | 3766 | symtab_hdr->contents = (bfd_byte *) isymbuf; |
b34976b6 | 3767 | |
86aba9db | 3768 | /* Replace the long call with a jarl. */ |
de863c74 NC |
3769 | if (bfd_get_arch (abfd) == bfd_arch_v850_rh850) |
3770 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_PCR22); | |
3771 | else | |
3772 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_22_PCREL); | |
86aba9db NC |
3773 | |
3774 | addend = 0; | |
3775 | ||
3776 | if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info) | |
3777 | /* If this needs to be changed because of future relaxing, | |
3778 | it will be handled here like other internal IND12W | |
3779 | relocs. */ | |
3780 | bfd_put_32 (abfd, | |
3781 | 0x00000780 | (JARL_R2 (insn[2])<<11) | ((addend << 16) & 0xffff) | ((addend >> 16) & 0xf), | |
3782 | contents + irel->r_offset); | |
3783 | else | |
3784 | /* We can't fully resolve this yet, because the external | |
3785 | symbol value may be changed by future relaxing. | |
3786 | We let the final link phase handle it. */ | |
3787 | bfd_put_32 (abfd, 0x00000780 | (JARL_R2 (insn[2])<<11), | |
3788 | contents + irel->r_offset); | |
3789 | ||
b34976b6 | 3790 | hi_irelfn->r_info = |
86aba9db NC |
3791 | ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE); |
3792 | lo_irelfn->r_info = | |
3793 | ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE); | |
3794 | irelcall->r_info = | |
3795 | ELF32_R_INFO (ELF32_R_SYM (irelcall->r_info), R_V850_NONE); | |
3796 | ||
3797 | if (! v850_elf_relax_delete_bytes (abfd, sec, | |
3798 | irel->r_offset + 4, toaddr, 12)) | |
3799 | goto error_return; | |
3800 | ||
3801 | align_pad_size += 12; | |
3802 | } | |
3803 | else if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP) | |
3804 | { | |
3805 | /* Check code for -mlong-jumps output. */ | |
eea6121a | 3806 | if (laddr + 10 <= (bfd_vma) sec->size) |
86aba9db NC |
3807 | { |
3808 | insn[0] = bfd_get_16 (abfd, contents + laddr); | |
3809 | insn[1] = bfd_get_16 (abfd, contents + laddr + 4); | |
3810 | insn[2] = bfd_get_16 (abfd, contents + laddr + 8); | |
3811 | ||
3812 | if ((insn[0] & MOVHI_MASK) != MOVHI | |
3813 | || MOVHI_R1 (insn[0]) != 0) | |
3814 | no_match = 0; | |
3815 | ||
3816 | if (no_match < 0 | |
3817 | && ((insn[1] & MOVEA_MASK) != MOVEA | |
3818 | || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1]))) | |
3819 | no_match = 1; | |
3820 | ||
3821 | if (no_match < 0 | |
3822 | && ((insn[2] & JMP_R_MASK) != JMP_R | |
3823 | || MOVEA_R2 (insn[1]) != JMP_R1 (insn[2]))) | |
b93a662b | 3824 | no_match = 2; |
86aba9db NC |
3825 | } |
3826 | else | |
3827 | { | |
4eca0228 | 3828 | _bfd_error_handler |
695344c0 | 3829 | /* xgettext:c-format */ |
38f14ab8 | 3830 | (_("%pB: %#" PRIx64 ": warning: %s points to " |
695344c0 | 3831 | "unrecognized insns"), |
38f14ab8 | 3832 | abfd, (uint64_t) irel->r_offset, "R_V850_LONGJUMP"); |
86aba9db NC |
3833 | continue; |
3834 | } | |
3835 | ||
3836 | if (no_match >= 0) | |
3837 | { | |
4eca0228 | 3838 | _bfd_error_handler |
695344c0 | 3839 | /* xgettext:c-format */ |
38f14ab8 | 3840 | (_("%pB: %#" PRIx64 ": warning: %s points to " |
d42c267e | 3841 | "unrecognized insn %#x"), |
dae82561 | 3842 | abfd, |
2dcf00ce | 3843 | (uint64_t) (irel->r_offset + no_match), |
38f14ab8 | 3844 | "R_V850_LONGJUMP", |
4eca0228 | 3845 | insn[no_match]); |
86aba9db NC |
3846 | continue; |
3847 | } | |
3848 | ||
3849 | /* Get the reloc for the address from which the register is | |
07d6d2b8 AM |
3850 | being loaded. This reloc will tell us which function is |
3851 | actually being called. */ | |
86aba9db | 3852 | for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++) |
de863c74 NC |
3853 | { |
3854 | r_type = ELF32_R_TYPE (hi_irelfn->r_info); | |
3855 | ||
3856 | if (hi_irelfn->r_offset == laddr + 2 | |
3857 | && ((r_type == (int) R_V850_HI16_S) || r_type == (int) R_V810_WHI1)) | |
3858 | break; | |
3859 | } | |
86aba9db NC |
3860 | |
3861 | for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++) | |
de863c74 NC |
3862 | { |
3863 | r_type = ELF32_R_TYPE (lo_irelfn->r_info); | |
3864 | ||
3865 | if (lo_irelfn->r_offset == laddr + 6 | |
3866 | && (r_type == (int) R_V850_LO16 || r_type == (int) R_V810_WLO)) | |
3867 | break; | |
3868 | } | |
86aba9db NC |
3869 | |
3870 | if ( hi_irelfn == irelend | |
3871 | || lo_irelfn == irelend) | |
3872 | { | |
4eca0228 | 3873 | _bfd_error_handler |
695344c0 | 3874 | /* xgettext:c-format */ |
38f14ab8 | 3875 | (_("%pB: %#" PRIx64 ": warning: %s points to " |
695344c0 | 3876 | "unrecognized reloc"), |
38f14ab8 | 3877 | abfd, (uint64_t) irel->r_offset, "R_V850_LONGJUMP"); |
86aba9db NC |
3878 | continue; |
3879 | } | |
b34976b6 | 3880 | |
86aba9db NC |
3881 | /* Get the value of the symbol referred to by the reloc. */ |
3882 | if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info) | |
3883 | { | |
5cec6941 | 3884 | Elf_Internal_Sym * isym; |
07d6d2b8 | 3885 | asection * sym_sec; |
86aba9db NC |
3886 | |
3887 | /* A local symbol. */ | |
5cec6941 NC |
3888 | isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info); |
3889 | ||
3890 | if (isym->st_shndx == SHN_UNDEF) | |
86aba9db | 3891 | sym_sec = bfd_und_section_ptr; |
5cec6941 | 3892 | else if (isym->st_shndx == SHN_ABS) |
86aba9db | 3893 | sym_sec = bfd_abs_section_ptr; |
5cec6941 | 3894 | else if (isym->st_shndx == SHN_COMMON) |
86aba9db NC |
3895 | sym_sec = bfd_com_section_ptr; |
3896 | else | |
5cec6941 NC |
3897 | sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); |
3898 | symval = (isym->st_value | |
86aba9db NC |
3899 | + sym_sec->output_section->vma |
3900 | + sym_sec->output_offset); | |
3901 | #ifdef DEBUG_RELAX | |
3902 | { | |
3903 | char * name = bfd_elf_string_from_elf_section | |
5cec6941 | 3904 | (abfd, symtab_hdr->sh_link, isym->st_name); |
86aba9db NC |
3905 | |
3906 | fprintf (stderr, "relax long jump local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n", | |
5cec6941 NC |
3907 | sym_sec->name, name, isym->st_name, |
3908 | sym_sec->output_section->vma, | |
3909 | sym_sec->output_offset, | |
3910 | isym->st_value, irel->r_addend); | |
86aba9db NC |
3911 | } |
3912 | #endif | |
3913 | } | |
3914 | else | |
3915 | { | |
3916 | unsigned long indx; | |
3917 | struct elf_link_hash_entry * h; | |
3918 | ||
3919 | /* An external symbol. */ | |
3920 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
3921 | h = elf_sym_hashes (abfd)[indx]; | |
3922 | BFD_ASSERT (h != NULL); | |
3923 | ||
3924 | if ( h->root.type != bfd_link_hash_defined | |
3925 | && h->root.type != bfd_link_hash_defweak) | |
3926 | /* This appears to be a reference to an undefined | |
3927 | symbol. Just ignore it--it will be caught by the | |
3928 | regular reloc processing. */ | |
3929 | continue; | |
3930 | ||
3931 | symval = (h->root.u.def.value | |
3932 | + h->root.u.def.section->output_section->vma | |
3933 | + h->root.u.def.section->output_offset); | |
3934 | #ifdef DEBUG_RELAX | |
3935 | fprintf (stderr, | |
3936 | "relax longjump defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n", | |
3937 | sec->name, h->root.root.string, h->root.u.def.value, | |
3938 | sec->output_section->vma, sec->output_offset, irel->r_addend); | |
3939 | #endif | |
3940 | } | |
3941 | ||
3942 | addend = irel->r_addend; | |
3943 | ||
3944 | foff = (symval + addend | |
3945 | - (irel->r_offset | |
3946 | + sec->output_section->vma | |
3947 | + sec->output_offset | |
3948 | + 4)); | |
3949 | #ifdef DEBUG_RELAX | |
3950 | fprintf (stderr, "relax longjump r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n", | |
3951 | irel->r_offset, | |
3952 | (irel->r_offset | |
3953 | + sec->output_section->vma | |
3954 | + sec->output_offset), | |
3955 | symval, addend, foff); | |
3956 | #endif | |
3957 | if (foff < -0x100000 || foff >= 0x100000) | |
3958 | /* After all that work, we can't shorten this function call. */ | |
3959 | continue; | |
3960 | ||
3961 | /* For simplicity of coding, we are going to modify the section | |
07d6d2b8 AM |
3962 | contents, the section relocs, and the BFD symbol table. We |
3963 | must tell the rest of the code not to free up this | |
3964 | information. It would be possible to instead create a table | |
3965 | of changes which have to be made, as is done in coff-mips.c; | |
3966 | that would be more work, but would require less memory when | |
3967 | the linker is run. */ | |
86aba9db | 3968 | elf_section_data (sec)->relocs = internal_relocs; |
86aba9db | 3969 | elf_section_data (sec)->this_hdr.contents = contents; |
5cec6941 | 3970 | symtab_hdr->contents = (bfd_byte *) isymbuf; |
86aba9db NC |
3971 | |
3972 | if (foff < -0x100 || foff >= 0x100) | |
3973 | { | |
3974 | /* Replace the long jump with a jr. */ | |
3975 | ||
de863c74 NC |
3976 | if (bfd_get_arch (abfd) == bfd_arch_v850_rh850) |
3977 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_PCR22); | |
3978 | else | |
3979 | irel->r_info = | |
3980 | ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_22_PCREL); | |
b34976b6 | 3981 | |
86aba9db NC |
3982 | irel->r_addend = addend; |
3983 | addend = 0; | |
3984 | ||
3985 | if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info) | |
3986 | /* If this needs to be changed because of future relaxing, | |
3987 | it will be handled here like other internal IND12W | |
3988 | relocs. */ | |
3989 | bfd_put_32 (abfd, | |
3990 | 0x00000780 | ((addend << 15) & 0xffff0000) | ((addend >> 17) & 0xf), | |
3991 | contents + irel->r_offset); | |
3992 | else | |
3993 | /* We can't fully resolve this yet, because the external | |
3994 | symbol value may be changed by future relaxing. | |
3995 | We let the final link phase handle it. */ | |
3996 | bfd_put_32 (abfd, 0x00000780, contents + irel->r_offset); | |
3997 | ||
3998 | hi_irelfn->r_info = | |
3999 | ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE); | |
4000 | lo_irelfn->r_info = | |
4001 | ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE); | |
4002 | if (!v850_elf_relax_delete_bytes (abfd, sec, | |
4003 | irel->r_offset + 4, toaddr, 6)) | |
4004 | goto error_return; | |
4005 | ||
4006 | align_pad_size += 6; | |
4007 | } | |
4008 | else | |
4009 | { | |
4010 | /* Replace the long jump with a br. */ | |
4011 | ||
de863c74 NC |
4012 | if (bfd_get_arch (abfd) == bfd_arch_v850_rh850) |
4013 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_PC9); | |
4014 | else | |
4015 | irel->r_info = | |
4016 | ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_9_PCREL); | |
86aba9db NC |
4017 | |
4018 | irel->r_addend = addend; | |
4019 | addend = 0; | |
4020 | ||
4021 | if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info) | |
4022 | /* If this needs to be changed because of future relaxing, | |
4023 | it will be handled here like other internal IND12W | |
4024 | relocs. */ | |
4025 | bfd_put_16 (abfd, | |
4026 | 0x0585 | ((addend << 10) & 0xf800) | ((addend << 3) & 0x0070), | |
4027 | contents + irel->r_offset); | |
4028 | else | |
4029 | /* We can't fully resolve this yet, because the external | |
4030 | symbol value may be changed by future relaxing. | |
4031 | We let the final link phase handle it. */ | |
4032 | bfd_put_16 (abfd, 0x0585, contents + irel->r_offset); | |
4033 | ||
4034 | hi_irelfn->r_info = | |
4035 | ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE); | |
4036 | lo_irelfn->r_info = | |
4037 | ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE); | |
4038 | if (!v850_elf_relax_delete_bytes (abfd, sec, | |
4039 | irel->r_offset + 2, toaddr, 8)) | |
4040 | goto error_return; | |
4041 | ||
4042 | align_pad_size += 8; | |
4043 | } | |
4044 | } | |
4045 | } | |
4046 | ||
4047 | irelalign = NULL; | |
4048 | for (irel = internal_relocs; irel < irelend; irel++) | |
4049 | { | |
4050 | if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN | |
4051 | && irel->r_offset == toaddr) | |
4052 | { | |
4053 | irel->r_offset -= align_pad_size; | |
4054 | ||
4055 | if (irelalign == NULL || irelalign->r_addend > irel->r_addend) | |
4056 | irelalign = irel; | |
4057 | } | |
4058 | } | |
4059 | ||
4060 | addr = toaddr; | |
4061 | } | |
4062 | ||
4063 | if (!irelalign) | |
4064 | { | |
4065 | #ifdef DEBUG_RELAX | |
4066 | fprintf (stderr, "relax pad %d shorten %d -> %d\n", | |
4067 | align_pad_size, | |
eea6121a AM |
4068 | sec->size, |
4069 | sec->size - align_pad_size); | |
86aba9db | 4070 | #endif |
eea6121a | 4071 | sec->size -= align_pad_size; |
86aba9db NC |
4072 | } |
4073 | ||
5cec6941 | 4074 | finish: |
c9594989 | 4075 | if (elf_section_data (sec)->relocs != internal_relocs) |
5cec6941 | 4076 | free (internal_relocs); |
86aba9db | 4077 | |
c9594989 | 4078 | if (elf_section_data (sec)->this_hdr.contents != (unsigned char *) contents) |
5cec6941 | 4079 | free (contents); |
86aba9db | 4080 | |
c9594989 | 4081 | if (symtab_hdr->contents != (bfd_byte *) isymbuf) |
5cec6941 | 4082 | free (isymbuf); |
86aba9db | 4083 | |
5cec6941 | 4084 | return result; |
86aba9db | 4085 | |
5cec6941 | 4086 | error_return: |
0a1b45a2 | 4087 | result = false; |
5cec6941 | 4088 | goto finish; |
86aba9db | 4089 | } |
2f89ff8d | 4090 | |
b35d266b | 4091 | static const struct bfd_elf_special_section v850_elf_special_sections[] = |
7f4d3958 | 4092 | { |
0112cd26 NC |
4093 | { STRING_COMMA_LEN (".call_table_data"), 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE) }, |
4094 | { STRING_COMMA_LEN (".call_table_text"), 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE | |
4095 | + SHF_EXECINSTR) }, | |
07d6d2b8 | 4096 | { STRING_COMMA_LEN (".rosdata"), -2, SHT_PROGBITS, (SHF_ALLOC |
0112cd26 | 4097 | + SHF_V850_GPREL) }, |
07d6d2b8 | 4098 | { STRING_COMMA_LEN (".rozdata"), -2, SHT_PROGBITS, (SHF_ALLOC |
0112cd26 | 4099 | + SHF_V850_R0REL) }, |
07d6d2b8 | 4100 | { STRING_COMMA_LEN (".sbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE |
0112cd26 | 4101 | + SHF_V850_GPREL) }, |
07d6d2b8 | 4102 | { STRING_COMMA_LEN (".scommon"), -2, SHT_V850_SCOMMON, (SHF_ALLOC + SHF_WRITE |
0112cd26 | 4103 | + SHF_V850_GPREL) }, |
07d6d2b8 | 4104 | { STRING_COMMA_LEN (".sdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE |
0112cd26 | 4105 | + SHF_V850_GPREL) }, |
07d6d2b8 | 4106 | { STRING_COMMA_LEN (".tbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE |
0112cd26 | 4107 | + SHF_V850_EPREL) }, |
07d6d2b8 | 4108 | { STRING_COMMA_LEN (".tcommon"), -2, SHT_V850_TCOMMON, (SHF_ALLOC + SHF_WRITE |
0112cd26 | 4109 | + SHF_V850_R0REL) }, |
07d6d2b8 | 4110 | { STRING_COMMA_LEN (".tdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE |
0112cd26 | 4111 | + SHF_V850_EPREL) }, |
07d6d2b8 | 4112 | { STRING_COMMA_LEN (".zbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE |
0112cd26 | 4113 | + SHF_V850_R0REL) }, |
07d6d2b8 | 4114 | { STRING_COMMA_LEN (".zcommon"), -2, SHT_V850_ZCOMMON, (SHF_ALLOC + SHF_WRITE |
0112cd26 | 4115 | + SHF_V850_R0REL) }, |
07d6d2b8 | 4116 | { STRING_COMMA_LEN (".zdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE |
0112cd26 | 4117 | + SHF_V850_R0REL) }, |
07d6d2b8 | 4118 | { NULL, 0, 0, 0, 0 } |
7f4d3958 | 4119 | }; |
252b5132 | 4120 | \f |
6d00b590 | 4121 | #define TARGET_LITTLE_SYM v850_elf32_vec |
252b5132 RH |
4122 | #define TARGET_LITTLE_NAME "elf32-v850" |
4123 | #define ELF_ARCH bfd_arch_v850 | |
aa4f99bb AO |
4124 | #define ELF_MACHINE_CODE EM_V850 |
4125 | #define ELF_MACHINE_ALT1 EM_CYGNUS_V850 | |
252b5132 | 4126 | #define ELF_MAXPAGESIZE 0x1000 |
435b1e90 | 4127 | |
252b5132 RH |
4128 | #define elf_info_to_howto v850_elf_info_to_howto_rela |
4129 | #define elf_info_to_howto_rel v850_elf_info_to_howto_rel | |
4130 | ||
4131 | #define elf_backend_check_relocs v850_elf_check_relocs | |
07d6d2b8 | 4132 | #define elf_backend_relocate_section v850_elf_relocate_section |
252b5132 | 4133 | #define elf_backend_object_p v850_elf_object_p |
07d6d2b8 AM |
4134 | #define elf_backend_final_write_processing v850_elf_final_write_processing |
4135 | #define elf_backend_section_from_bfd_section v850_elf_section_from_bfd_section | |
252b5132 RH |
4136 | #define elf_backend_symbol_processing v850_elf_symbol_processing |
4137 | #define elf_backend_add_symbol_hook v850_elf_add_symbol_hook | |
07d6d2b8 | 4138 | #define elf_backend_link_output_symbol_hook v850_elf_link_output_symbol_hook |
252b5132 RH |
4139 | #define elf_backend_section_from_shdr v850_elf_section_from_shdr |
4140 | #define elf_backend_fake_sections v850_elf_fake_sections | |
07d6d2b8 | 4141 | #define elf_backend_gc_mark_hook v850_elf_gc_mark_hook |
29ef7005 | 4142 | #define elf_backend_special_sections v850_elf_special_sections |
252b5132 | 4143 | |
07d6d2b8 | 4144 | #define elf_backend_can_gc_sections 1 |
685080f2 | 4145 | #define elf_backend_rela_normal 1 |
252b5132 | 4146 | |
252b5132 | 4147 | #define bfd_elf32_bfd_is_local_label_name v850_elf_is_local_label_name |
41702d50 NC |
4148 | #define bfd_elf32_bfd_is_target_special_symbol v850_elf_is_target_special_symbol |
4149 | ||
252b5132 | 4150 | #define bfd_elf32_bfd_reloc_type_lookup v850_elf_reloc_type_lookup |
07d6d2b8 AM |
4151 | #define bfd_elf32_bfd_reloc_name_lookup v850_elf_reloc_name_lookup |
4152 | #define bfd_elf32_bfd_merge_private_bfd_data v850_elf_merge_private_bfd_data | |
252b5132 RH |
4153 | #define bfd_elf32_bfd_set_private_flags v850_elf_set_private_flags |
4154 | #define bfd_elf32_bfd_print_private_bfd_data v850_elf_print_private_bfd_data | |
86aba9db | 4155 | #define bfd_elf32_bfd_relax_section v850_elf_relax_section |
252b5132 RH |
4156 | |
4157 | #define elf_symbol_leading_char '_' | |
4158 | ||
de863c74 NC |
4159 | #undef elf32_bed |
4160 | #define elf32_bed elf32_v850_bed | |
4161 | ||
4162 | #include "elf32-target.h" | |
4163 | ||
4164 | /* Map BFD reloc types to V800 ELF reloc types. */ | |
4165 | ||
4166 | static const struct v850_elf_reloc_map v800_elf_reloc_map[] = | |
4167 | { | |
07d6d2b8 AM |
4168 | { BFD_RELOC_NONE, R_V810_NONE }, |
4169 | { BFD_RELOC_8, R_V810_BYTE }, | |
4170 | { BFD_RELOC_16, R_V810_HWORD }, | |
4171 | { BFD_RELOC_32, R_V810_WORD }, | |
4172 | { BFD_RELOC_LO16, R_V810_WLO }, | |
4173 | { BFD_RELOC_HI16, R_V810_WHI }, | |
4174 | { BFD_RELOC_HI16_S, R_V810_WHI1 }, | |
4175 | { BFD_RELOC_V850_32_PCREL, R_V850_PC32 }, | |
4176 | { BFD_RELOC_V850_22_PCREL, R_V850_PCR22 }, | |
4177 | { BFD_RELOC_V850_17_PCREL, R_V850_PC17 }, | |
4178 | { BFD_RELOC_V850_16_PCREL, R_V850_PC16U }, | |
de863c74 | 4179 | { BFD_RELOC_V850_9_PCREL, R_V850_PC9 }, |
07d6d2b8 AM |
4180 | { BFD_RELOC_V850_LO16_S1, R_V810_WLO_1 }, /* Or R_V850_HWLO or R_V850_HWLO_1. */ |
4181 | { BFD_RELOC_V850_23, R_V850_WLO23 }, | |
de863c74 NC |
4182 | { BFD_RELOC_V850_LO16_SPLIT_OFFSET, R_V850_BLO }, |
4183 | { BFD_RELOC_V850_ZDA_16_16_OFFSET, R_V810_HWORD }, | |
4184 | { BFD_RELOC_V850_TDA_16_16_OFFSET, R_V810_HWORD }, | |
4185 | { BFD_RELOC_V850_SDA_16_16_OFFSET, R_V810_HWORD }, | |
4186 | { BFD_RELOC_V850_SDA_15_16_OFFSET, R_V810_GPWLO_1 } | |
4187 | }; | |
4188 | ||
4189 | /* Map a bfd relocation into the appropriate howto structure. */ | |
4190 | ||
4191 | static reloc_howto_type * | |
4192 | v800_elf_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code) | |
4193 | { | |
4194 | unsigned int i; | |
4195 | ||
4196 | BFD_ASSERT (bfd_get_arch (abfd) == bfd_arch_v850_rh850); | |
4197 | ||
4198 | for (i = ARRAY_SIZE (v800_elf_reloc_map); i --;) | |
4199 | if (v800_elf_reloc_map[i].bfd_reloc_val == code) | |
4200 | { | |
4201 | unsigned int elf_reloc_val = v800_elf_reloc_map[i].elf_reloc_val; | |
4202 | unsigned int idx = elf_reloc_val - R_V810_NONE; | |
4203 | ||
4204 | BFD_ASSERT (v800_elf_howto_table[idx].type == elf_reloc_val); | |
4205 | ||
4206 | return v800_elf_howto_table + idx; | |
4207 | } | |
4208 | ||
4209 | #ifdef DEBUG | |
4210 | fprintf (stderr, "failed to find v800 equiv of bfd reloc code %d\n", code); | |
4211 | #endif | |
4212 | return NULL; | |
4213 | } | |
4214 | ||
4215 | static reloc_howto_type * | |
4216 | v800_elf_reloc_name_lookup (bfd * abfd, const char * r_name) | |
4217 | { | |
4218 | unsigned int i; | |
4219 | ||
4220 | BFD_ASSERT (bfd_get_arch (abfd) == bfd_arch_v850_rh850); | |
4221 | ||
4222 | for (i = ARRAY_SIZE (v800_elf_howto_table); i--;) | |
4223 | if (v800_elf_howto_table[i].name != NULL | |
4224 | && strcasecmp (v800_elf_howto_table[i].name, r_name) == 0) | |
4225 | return v800_elf_howto_table + i; | |
4226 | ||
4227 | return NULL; | |
4228 | } | |
4229 | ||
4230 | ||
4231 | /* Set the howto pointer in CACHE_PTR for a V800 ELF reloc. */ | |
4232 | ||
0a1b45a2 | 4233 | static bool |
07d6d2b8 AM |
4234 | v800_elf_info_to_howto (bfd * abfd, |
4235 | arelent * cache_ptr, | |
de863c74 NC |
4236 | Elf_Internal_Rela * dst) |
4237 | { | |
4238 | unsigned int r_type = ELF32_R_TYPE (dst->r_info); | |
4239 | ||
de863c74 NC |
4240 | if (r_type == R_V800_NONE) |
4241 | r_type = R_V810_NONE; | |
4242 | ||
f3185997 NC |
4243 | if (bfd_get_arch (abfd) != bfd_arch_v850_rh850 |
4244 | || r_type >= (unsigned int) R_V800_max | |
4245 | || r_type < (unsigned int) R_V810_NONE | |
4246 | || (r_type - R_V810_NONE) >= ARRAY_SIZE (v800_elf_howto_table)) | |
4247 | { | |
4248 | /* xgettext:c-format */ | |
4249 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), | |
4250 | abfd, r_type); | |
4251 | bfd_set_error (bfd_error_bad_value); | |
0a1b45a2 | 4252 | return false; |
f3185997 | 4253 | } |
de863c74 | 4254 | |
f3185997 | 4255 | cache_ptr->howto = v800_elf_howto_table + (r_type - R_V810_NONE); |
0a1b45a2 | 4256 | return true; |
de863c74 NC |
4257 | } |
4258 | \f | |
de863c74 | 4259 | #undef TARGET_LITTLE_SYM |
6d00b590 | 4260 | #define TARGET_LITTLE_SYM v800_elf32_vec |
de863c74 NC |
4261 | #undef TARGET_LITTLE_NAME |
4262 | #define TARGET_LITTLE_NAME "elf32-v850-rh850" | |
4263 | #undef ELF_ARCH | |
4264 | #define ELF_ARCH bfd_arch_v850_rh850 | |
4265 | #undef ELF_MACHINE_CODE | |
4266 | #define ELF_MACHINE_CODE EM_V800 | |
4267 | #undef ELF_MACHINE_ALT1 | |
4268 | ||
4269 | #undef elf32_bed | |
4270 | #define elf32_bed elf32_v850_rh850_bed | |
4271 | ||
4272 | #undef elf_info_to_howto | |
4273 | #define elf_info_to_howto v800_elf_info_to_howto | |
4274 | #undef elf_info_to_howto_rel | |
4275 | #define elf_info_to_howto_rel NULL | |
4276 | #undef bfd_elf32_bfd_reloc_type_lookup | |
4277 | #define bfd_elf32_bfd_reloc_type_lookup v800_elf_reloc_type_lookup | |
4278 | #undef bfd_elf32_bfd_reloc_name_lookup | |
4279 | #define bfd_elf32_bfd_reloc_name_lookup v800_elf_reloc_name_lookup | |
4280 | ||
252b5132 | 4281 | #include "elf32-target.h" |