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c906108c SS |
1 | /* Simulator instruction decoder for i960base. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
5 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. | |
6 | ||
7 | This file is part of the GNU Simulators. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #define WANT_CPU i960base | |
26 | #define WANT_CPU_I960BASE | |
27 | ||
28 | #include "sim-main.h" | |
29 | #include "sim-assert.h" | |
30 | ||
c906108c SS |
31 | /* The instruction descriptor array. |
32 | This is computed at runtime. Space for it is not malloc'd to save a | |
33 | teensy bit of cpu in the decoder. Moving it to malloc space is trivial | |
34 | but won't be done until necessary (we don't currently support the runtime | |
35 | addition of instructions nor an SMP machine with different cpus). */ | |
36 | static IDESC i960base_insn_data[I960BASE_INSN_MAX]; | |
37 | ||
c906108c SS |
38 | /* Commas between elements are contained in the macros. |
39 | Some of these are conditionally compiled out. */ | |
40 | ||
41 | static const struct insn_sem i960base_insn_sem[] = | |
42 | { | |
96baa820 JM |
43 | { VIRTUAL_INSN_X_INVALID, I960BASE_INSN_X_INVALID, I960BASE_SFMT_EMPTY }, |
44 | { VIRTUAL_INSN_X_AFTER, I960BASE_INSN_X_AFTER, I960BASE_SFMT_EMPTY }, | |
45 | { VIRTUAL_INSN_X_BEFORE, I960BASE_INSN_X_BEFORE, I960BASE_SFMT_EMPTY }, | |
46 | { VIRTUAL_INSN_X_CTI_CHAIN, I960BASE_INSN_X_CTI_CHAIN, I960BASE_SFMT_EMPTY }, | |
47 | { VIRTUAL_INSN_X_CHAIN, I960BASE_INSN_X_CHAIN, I960BASE_SFMT_EMPTY }, | |
48 | { VIRTUAL_INSN_X_BEGIN, I960BASE_INSN_X_BEGIN, I960BASE_SFMT_EMPTY }, | |
49 | { I960_INSN_MULO, I960BASE_INSN_MULO, I960BASE_SFMT_MULO }, | |
50 | { I960_INSN_MULO1, I960BASE_INSN_MULO1, I960BASE_SFMT_MULO1 }, | |
51 | { I960_INSN_MULO2, I960BASE_INSN_MULO2, I960BASE_SFMT_MULO2 }, | |
52 | { I960_INSN_MULO3, I960BASE_INSN_MULO3, I960BASE_SFMT_MULO3 }, | |
53 | { I960_INSN_REMO, I960BASE_INSN_REMO, I960BASE_SFMT_MULO }, | |
54 | { I960_INSN_REMO1, I960BASE_INSN_REMO1, I960BASE_SFMT_MULO1 }, | |
55 | { I960_INSN_REMO2, I960BASE_INSN_REMO2, I960BASE_SFMT_MULO2 }, | |
56 | { I960_INSN_REMO3, I960BASE_INSN_REMO3, I960BASE_SFMT_MULO3 }, | |
57 | { I960_INSN_DIVO, I960BASE_INSN_DIVO, I960BASE_SFMT_MULO }, | |
58 | { I960_INSN_DIVO1, I960BASE_INSN_DIVO1, I960BASE_SFMT_MULO1 }, | |
59 | { I960_INSN_DIVO2, I960BASE_INSN_DIVO2, I960BASE_SFMT_MULO2 }, | |
60 | { I960_INSN_DIVO3, I960BASE_INSN_DIVO3, I960BASE_SFMT_MULO3 }, | |
61 | { I960_INSN_REMI, I960BASE_INSN_REMI, I960BASE_SFMT_MULO }, | |
62 | { I960_INSN_REMI1, I960BASE_INSN_REMI1, I960BASE_SFMT_MULO1 }, | |
63 | { I960_INSN_REMI2, I960BASE_INSN_REMI2, I960BASE_SFMT_MULO2 }, | |
64 | { I960_INSN_REMI3, I960BASE_INSN_REMI3, I960BASE_SFMT_MULO3 }, | |
65 | { I960_INSN_DIVI, I960BASE_INSN_DIVI, I960BASE_SFMT_MULO }, | |
66 | { I960_INSN_DIVI1, I960BASE_INSN_DIVI1, I960BASE_SFMT_MULO1 }, | |
67 | { I960_INSN_DIVI2, I960BASE_INSN_DIVI2, I960BASE_SFMT_MULO2 }, | |
68 | { I960_INSN_DIVI3, I960BASE_INSN_DIVI3, I960BASE_SFMT_MULO3 }, | |
69 | { I960_INSN_ADDO, I960BASE_INSN_ADDO, I960BASE_SFMT_MULO }, | |
70 | { I960_INSN_ADDO1, I960BASE_INSN_ADDO1, I960BASE_SFMT_MULO1 }, | |
71 | { I960_INSN_ADDO2, I960BASE_INSN_ADDO2, I960BASE_SFMT_MULO2 }, | |
72 | { I960_INSN_ADDO3, I960BASE_INSN_ADDO3, I960BASE_SFMT_MULO3 }, | |
73 | { I960_INSN_SUBO, I960BASE_INSN_SUBO, I960BASE_SFMT_MULO }, | |
74 | { I960_INSN_SUBO1, I960BASE_INSN_SUBO1, I960BASE_SFMT_MULO1 }, | |
75 | { I960_INSN_SUBO2, I960BASE_INSN_SUBO2, I960BASE_SFMT_MULO2 }, | |
76 | { I960_INSN_SUBO3, I960BASE_INSN_SUBO3, I960BASE_SFMT_MULO3 }, | |
77 | { I960_INSN_NOTBIT, I960BASE_INSN_NOTBIT, I960BASE_SFMT_NOTBIT }, | |
78 | { I960_INSN_NOTBIT1, I960BASE_INSN_NOTBIT1, I960BASE_SFMT_NOTBIT1 }, | |
79 | { I960_INSN_NOTBIT2, I960BASE_INSN_NOTBIT2, I960BASE_SFMT_NOTBIT2 }, | |
80 | { I960_INSN_NOTBIT3, I960BASE_INSN_NOTBIT3, I960BASE_SFMT_NOTBIT3 }, | |
81 | { I960_INSN_AND, I960BASE_INSN_AND, I960BASE_SFMT_MULO }, | |
82 | { I960_INSN_AND1, I960BASE_INSN_AND1, I960BASE_SFMT_MULO1 }, | |
83 | { I960_INSN_AND2, I960BASE_INSN_AND2, I960BASE_SFMT_MULO2 }, | |
84 | { I960_INSN_AND3, I960BASE_INSN_AND3, I960BASE_SFMT_MULO3 }, | |
85 | { I960_INSN_ANDNOT, I960BASE_INSN_ANDNOT, I960BASE_SFMT_MULO }, | |
86 | { I960_INSN_ANDNOT1, I960BASE_INSN_ANDNOT1, I960BASE_SFMT_MULO1 }, | |
87 | { I960_INSN_ANDNOT2, I960BASE_INSN_ANDNOT2, I960BASE_SFMT_MULO2 }, | |
88 | { I960_INSN_ANDNOT3, I960BASE_INSN_ANDNOT3, I960BASE_SFMT_MULO3 }, | |
89 | { I960_INSN_SETBIT, I960BASE_INSN_SETBIT, I960BASE_SFMT_NOTBIT }, | |
90 | { I960_INSN_SETBIT1, I960BASE_INSN_SETBIT1, I960BASE_SFMT_NOTBIT1 }, | |
91 | { I960_INSN_SETBIT2, I960BASE_INSN_SETBIT2, I960BASE_SFMT_NOTBIT2 }, | |
92 | { I960_INSN_SETBIT3, I960BASE_INSN_SETBIT3, I960BASE_SFMT_NOTBIT3 }, | |
93 | { I960_INSN_NOTAND, I960BASE_INSN_NOTAND, I960BASE_SFMT_MULO }, | |
94 | { I960_INSN_NOTAND1, I960BASE_INSN_NOTAND1, I960BASE_SFMT_MULO1 }, | |
95 | { I960_INSN_NOTAND2, I960BASE_INSN_NOTAND2, I960BASE_SFMT_MULO2 }, | |
96 | { I960_INSN_NOTAND3, I960BASE_INSN_NOTAND3, I960BASE_SFMT_MULO3 }, | |
97 | { I960_INSN_XOR, I960BASE_INSN_XOR, I960BASE_SFMT_MULO }, | |
98 | { I960_INSN_XOR1, I960BASE_INSN_XOR1, I960BASE_SFMT_MULO1 }, | |
99 | { I960_INSN_XOR2, I960BASE_INSN_XOR2, I960BASE_SFMT_MULO2 }, | |
100 | { I960_INSN_XOR3, I960BASE_INSN_XOR3, I960BASE_SFMT_MULO3 }, | |
101 | { I960_INSN_OR, I960BASE_INSN_OR, I960BASE_SFMT_MULO }, | |
102 | { I960_INSN_OR1, I960BASE_INSN_OR1, I960BASE_SFMT_MULO1 }, | |
103 | { I960_INSN_OR2, I960BASE_INSN_OR2, I960BASE_SFMT_MULO2 }, | |
104 | { I960_INSN_OR3, I960BASE_INSN_OR3, I960BASE_SFMT_MULO3 }, | |
105 | { I960_INSN_NOR, I960BASE_INSN_NOR, I960BASE_SFMT_MULO }, | |
106 | { I960_INSN_NOR1, I960BASE_INSN_NOR1, I960BASE_SFMT_MULO1 }, | |
107 | { I960_INSN_NOR2, I960BASE_INSN_NOR2, I960BASE_SFMT_MULO2 }, | |
108 | { I960_INSN_NOR3, I960BASE_INSN_NOR3, I960BASE_SFMT_MULO3 }, | |
109 | { I960_INSN_XNOR, I960BASE_INSN_XNOR, I960BASE_SFMT_MULO }, | |
110 | { I960_INSN_XNOR1, I960BASE_INSN_XNOR1, I960BASE_SFMT_MULO1 }, | |
111 | { I960_INSN_XNOR2, I960BASE_INSN_XNOR2, I960BASE_SFMT_MULO2 }, | |
112 | { I960_INSN_XNOR3, I960BASE_INSN_XNOR3, I960BASE_SFMT_MULO3 }, | |
113 | { I960_INSN_NOT, I960BASE_INSN_NOT, I960BASE_SFMT_NOT }, | |
114 | { I960_INSN_NOT1, I960BASE_INSN_NOT1, I960BASE_SFMT_NOT1 }, | |
115 | { I960_INSN_NOT2, I960BASE_INSN_NOT2, I960BASE_SFMT_NOT }, | |
116 | { I960_INSN_NOT3, I960BASE_INSN_NOT3, I960BASE_SFMT_NOT1 }, | |
117 | { I960_INSN_ORNOT, I960BASE_INSN_ORNOT, I960BASE_SFMT_MULO }, | |
118 | { I960_INSN_ORNOT1, I960BASE_INSN_ORNOT1, I960BASE_SFMT_MULO1 }, | |
119 | { I960_INSN_ORNOT2, I960BASE_INSN_ORNOT2, I960BASE_SFMT_MULO2 }, | |
120 | { I960_INSN_ORNOT3, I960BASE_INSN_ORNOT3, I960BASE_SFMT_MULO3 }, | |
121 | { I960_INSN_CLRBIT, I960BASE_INSN_CLRBIT, I960BASE_SFMT_NOTBIT }, | |
122 | { I960_INSN_CLRBIT1, I960BASE_INSN_CLRBIT1, I960BASE_SFMT_NOTBIT1 }, | |
123 | { I960_INSN_CLRBIT2, I960BASE_INSN_CLRBIT2, I960BASE_SFMT_NOTBIT2 }, | |
124 | { I960_INSN_CLRBIT3, I960BASE_INSN_CLRBIT3, I960BASE_SFMT_NOTBIT3 }, | |
125 | { I960_INSN_SHLO, I960BASE_INSN_SHLO, I960BASE_SFMT_SHLO }, | |
126 | { I960_INSN_SHLO1, I960BASE_INSN_SHLO1, I960BASE_SFMT_SHLO1 }, | |
127 | { I960_INSN_SHLO2, I960BASE_INSN_SHLO2, I960BASE_SFMT_SHLO2 }, | |
128 | { I960_INSN_SHLO3, I960BASE_INSN_SHLO3, I960BASE_SFMT_SHLO3 }, | |
129 | { I960_INSN_SHRO, I960BASE_INSN_SHRO, I960BASE_SFMT_SHLO }, | |
130 | { I960_INSN_SHRO1, I960BASE_INSN_SHRO1, I960BASE_SFMT_SHLO1 }, | |
131 | { I960_INSN_SHRO2, I960BASE_INSN_SHRO2, I960BASE_SFMT_SHLO2 }, | |
132 | { I960_INSN_SHRO3, I960BASE_INSN_SHRO3, I960BASE_SFMT_SHLO3 }, | |
133 | { I960_INSN_SHLI, I960BASE_INSN_SHLI, I960BASE_SFMT_SHLO }, | |
134 | { I960_INSN_SHLI1, I960BASE_INSN_SHLI1, I960BASE_SFMT_SHLO1 }, | |
135 | { I960_INSN_SHLI2, I960BASE_INSN_SHLI2, I960BASE_SFMT_SHLO2 }, | |
136 | { I960_INSN_SHLI3, I960BASE_INSN_SHLI3, I960BASE_SFMT_SHLO3 }, | |
137 | { I960_INSN_SHRI, I960BASE_INSN_SHRI, I960BASE_SFMT_SHLO }, | |
138 | { I960_INSN_SHRI1, I960BASE_INSN_SHRI1, I960BASE_SFMT_SHLO1 }, | |
139 | { I960_INSN_SHRI2, I960BASE_INSN_SHRI2, I960BASE_SFMT_SHLO2 }, | |
140 | { I960_INSN_SHRI3, I960BASE_INSN_SHRI3, I960BASE_SFMT_SHLO3 }, | |
141 | { I960_INSN_EMUL, I960BASE_INSN_EMUL, I960BASE_SFMT_EMUL }, | |
142 | { I960_INSN_EMUL1, I960BASE_INSN_EMUL1, I960BASE_SFMT_EMUL1 }, | |
143 | { I960_INSN_EMUL2, I960BASE_INSN_EMUL2, I960BASE_SFMT_EMUL2 }, | |
144 | { I960_INSN_EMUL3, I960BASE_INSN_EMUL3, I960BASE_SFMT_EMUL3 }, | |
145 | { I960_INSN_MOV, I960BASE_INSN_MOV, I960BASE_SFMT_NOT }, | |
146 | { I960_INSN_MOV1, I960BASE_INSN_MOV1, I960BASE_SFMT_NOT1 }, | |
147 | { I960_INSN_MOVL, I960BASE_INSN_MOVL, I960BASE_SFMT_MOVL }, | |
148 | { I960_INSN_MOVL1, I960BASE_INSN_MOVL1, I960BASE_SFMT_MOVL1 }, | |
149 | { I960_INSN_MOVT, I960BASE_INSN_MOVT, I960BASE_SFMT_MOVT }, | |
150 | { I960_INSN_MOVT1, I960BASE_INSN_MOVT1, I960BASE_SFMT_MOVT1 }, | |
151 | { I960_INSN_MOVQ, I960BASE_INSN_MOVQ, I960BASE_SFMT_MOVQ }, | |
152 | { I960_INSN_MOVQ1, I960BASE_INSN_MOVQ1, I960BASE_SFMT_MOVQ1 }, | |
153 | { I960_INSN_MODPC, I960BASE_INSN_MODPC, I960BASE_SFMT_MODPC }, | |
154 | { I960_INSN_MODAC, I960BASE_INSN_MODAC, I960BASE_SFMT_MODPC }, | |
155 | { I960_INSN_LDA_OFFSET, I960BASE_INSN_LDA_OFFSET, I960BASE_SFMT_LDA_OFFSET }, | |
156 | { I960_INSN_LDA_INDIRECT_OFFSET, I960BASE_INSN_LDA_INDIRECT_OFFSET, I960BASE_SFMT_LDA_INDIRECT_OFFSET }, | |
157 | { I960_INSN_LDA_INDIRECT, I960BASE_INSN_LDA_INDIRECT, I960BASE_SFMT_LDA_INDIRECT }, | |
158 | { I960_INSN_LDA_INDIRECT_INDEX, I960BASE_INSN_LDA_INDIRECT_INDEX, I960BASE_SFMT_LDA_INDIRECT_INDEX }, | |
159 | { I960_INSN_LDA_DISP, I960BASE_INSN_LDA_DISP, I960BASE_SFMT_LDA_DISP }, | |
160 | { I960_INSN_LDA_INDIRECT_DISP, I960BASE_INSN_LDA_INDIRECT_DISP, I960BASE_SFMT_LDA_INDIRECT_DISP }, | |
161 | { I960_INSN_LDA_INDEX_DISP, I960BASE_INSN_LDA_INDEX_DISP, I960BASE_SFMT_LDA_INDEX_DISP }, | |
162 | { I960_INSN_LDA_INDIRECT_INDEX_DISP, I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDA_INDIRECT_INDEX_DISP }, | |
163 | { I960_INSN_LD_OFFSET, I960BASE_INSN_LD_OFFSET, I960BASE_SFMT_LD_OFFSET }, | |
164 | { I960_INSN_LD_INDIRECT_OFFSET, I960BASE_INSN_LD_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, | |
165 | { I960_INSN_LD_INDIRECT, I960BASE_INSN_LD_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, | |
166 | { I960_INSN_LD_INDIRECT_INDEX, I960BASE_INSN_LD_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, | |
167 | { I960_INSN_LD_DISP, I960BASE_INSN_LD_DISP, I960BASE_SFMT_LD_DISP }, | |
168 | { I960_INSN_LD_INDIRECT_DISP, I960BASE_INSN_LD_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, | |
169 | { I960_INSN_LD_INDEX_DISP, I960BASE_INSN_LD_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, | |
170 | { I960_INSN_LD_INDIRECT_INDEX_DISP, I960BASE_INSN_LD_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, | |
171 | { I960_INSN_LDOB_OFFSET, I960BASE_INSN_LDOB_OFFSET, I960BASE_SFMT_LD_OFFSET }, | |
172 | { I960_INSN_LDOB_INDIRECT_OFFSET, I960BASE_INSN_LDOB_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, | |
173 | { I960_INSN_LDOB_INDIRECT, I960BASE_INSN_LDOB_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, | |
174 | { I960_INSN_LDOB_INDIRECT_INDEX, I960BASE_INSN_LDOB_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, | |
175 | { I960_INSN_LDOB_DISP, I960BASE_INSN_LDOB_DISP, I960BASE_SFMT_LD_DISP }, | |
176 | { I960_INSN_LDOB_INDIRECT_DISP, I960BASE_INSN_LDOB_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, | |
177 | { I960_INSN_LDOB_INDEX_DISP, I960BASE_INSN_LDOB_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, | |
178 | { I960_INSN_LDOB_INDIRECT_INDEX_DISP, I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, | |
179 | { I960_INSN_LDOS_OFFSET, I960BASE_INSN_LDOS_OFFSET, I960BASE_SFMT_LD_OFFSET }, | |
180 | { I960_INSN_LDOS_INDIRECT_OFFSET, I960BASE_INSN_LDOS_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, | |
181 | { I960_INSN_LDOS_INDIRECT, I960BASE_INSN_LDOS_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, | |
182 | { I960_INSN_LDOS_INDIRECT_INDEX, I960BASE_INSN_LDOS_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, | |
183 | { I960_INSN_LDOS_DISP, I960BASE_INSN_LDOS_DISP, I960BASE_SFMT_LD_DISP }, | |
184 | { I960_INSN_LDOS_INDIRECT_DISP, I960BASE_INSN_LDOS_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, | |
185 | { I960_INSN_LDOS_INDEX_DISP, I960BASE_INSN_LDOS_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, | |
186 | { I960_INSN_LDOS_INDIRECT_INDEX_DISP, I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, | |
187 | { I960_INSN_LDIB_OFFSET, I960BASE_INSN_LDIB_OFFSET, I960BASE_SFMT_LD_OFFSET }, | |
188 | { I960_INSN_LDIB_INDIRECT_OFFSET, I960BASE_INSN_LDIB_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, | |
189 | { I960_INSN_LDIB_INDIRECT, I960BASE_INSN_LDIB_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, | |
190 | { I960_INSN_LDIB_INDIRECT_INDEX, I960BASE_INSN_LDIB_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, | |
191 | { I960_INSN_LDIB_DISP, I960BASE_INSN_LDIB_DISP, I960BASE_SFMT_LD_DISP }, | |
192 | { I960_INSN_LDIB_INDIRECT_DISP, I960BASE_INSN_LDIB_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, | |
193 | { I960_INSN_LDIB_INDEX_DISP, I960BASE_INSN_LDIB_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, | |
194 | { I960_INSN_LDIB_INDIRECT_INDEX_DISP, I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, | |
195 | { I960_INSN_LDIS_OFFSET, I960BASE_INSN_LDIS_OFFSET, I960BASE_SFMT_LD_OFFSET }, | |
196 | { I960_INSN_LDIS_INDIRECT_OFFSET, I960BASE_INSN_LDIS_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, | |
197 | { I960_INSN_LDIS_INDIRECT, I960BASE_INSN_LDIS_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, | |
198 | { I960_INSN_LDIS_INDIRECT_INDEX, I960BASE_INSN_LDIS_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, | |
199 | { I960_INSN_LDIS_DISP, I960BASE_INSN_LDIS_DISP, I960BASE_SFMT_LD_DISP }, | |
200 | { I960_INSN_LDIS_INDIRECT_DISP, I960BASE_INSN_LDIS_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, | |
201 | { I960_INSN_LDIS_INDEX_DISP, I960BASE_INSN_LDIS_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, | |
202 | { I960_INSN_LDIS_INDIRECT_INDEX_DISP, I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, | |
203 | { I960_INSN_LDL_OFFSET, I960BASE_INSN_LDL_OFFSET, I960BASE_SFMT_LDL_OFFSET }, | |
204 | { I960_INSN_LDL_INDIRECT_OFFSET, I960BASE_INSN_LDL_INDIRECT_OFFSET, I960BASE_SFMT_LDL_INDIRECT_OFFSET }, | |
205 | { I960_INSN_LDL_INDIRECT, I960BASE_INSN_LDL_INDIRECT, I960BASE_SFMT_LDL_INDIRECT }, | |
206 | { I960_INSN_LDL_INDIRECT_INDEX, I960BASE_INSN_LDL_INDIRECT_INDEX, I960BASE_SFMT_LDL_INDIRECT_INDEX }, | |
207 | { I960_INSN_LDL_DISP, I960BASE_INSN_LDL_DISP, I960BASE_SFMT_LDL_DISP }, | |
208 | { I960_INSN_LDL_INDIRECT_DISP, I960BASE_INSN_LDL_INDIRECT_DISP, I960BASE_SFMT_LDL_INDIRECT_DISP }, | |
209 | { I960_INSN_LDL_INDEX_DISP, I960BASE_INSN_LDL_INDEX_DISP, I960BASE_SFMT_LDL_INDEX_DISP }, | |
210 | { I960_INSN_LDL_INDIRECT_INDEX_DISP, I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDL_INDIRECT_INDEX_DISP }, | |
211 | { I960_INSN_LDT_OFFSET, I960BASE_INSN_LDT_OFFSET, I960BASE_SFMT_LDT_OFFSET }, | |
212 | { I960_INSN_LDT_INDIRECT_OFFSET, I960BASE_INSN_LDT_INDIRECT_OFFSET, I960BASE_SFMT_LDT_INDIRECT_OFFSET }, | |
213 | { I960_INSN_LDT_INDIRECT, I960BASE_INSN_LDT_INDIRECT, I960BASE_SFMT_LDT_INDIRECT }, | |
214 | { I960_INSN_LDT_INDIRECT_INDEX, I960BASE_INSN_LDT_INDIRECT_INDEX, I960BASE_SFMT_LDT_INDIRECT_INDEX }, | |
215 | { I960_INSN_LDT_DISP, I960BASE_INSN_LDT_DISP, I960BASE_SFMT_LDT_DISP }, | |
216 | { I960_INSN_LDT_INDIRECT_DISP, I960BASE_INSN_LDT_INDIRECT_DISP, I960BASE_SFMT_LDT_INDIRECT_DISP }, | |
217 | { I960_INSN_LDT_INDEX_DISP, I960BASE_INSN_LDT_INDEX_DISP, I960BASE_SFMT_LDT_INDEX_DISP }, | |
218 | { I960_INSN_LDT_INDIRECT_INDEX_DISP, I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDT_INDIRECT_INDEX_DISP }, | |
219 | { I960_INSN_LDQ_OFFSET, I960BASE_INSN_LDQ_OFFSET, I960BASE_SFMT_LDQ_OFFSET }, | |
220 | { I960_INSN_LDQ_INDIRECT_OFFSET, I960BASE_INSN_LDQ_INDIRECT_OFFSET, I960BASE_SFMT_LDQ_INDIRECT_OFFSET }, | |
221 | { I960_INSN_LDQ_INDIRECT, I960BASE_INSN_LDQ_INDIRECT, I960BASE_SFMT_LDQ_INDIRECT }, | |
222 | { I960_INSN_LDQ_INDIRECT_INDEX, I960BASE_INSN_LDQ_INDIRECT_INDEX, I960BASE_SFMT_LDQ_INDIRECT_INDEX }, | |
223 | { I960_INSN_LDQ_DISP, I960BASE_INSN_LDQ_DISP, I960BASE_SFMT_LDQ_DISP }, | |
224 | { I960_INSN_LDQ_INDIRECT_DISP, I960BASE_INSN_LDQ_INDIRECT_DISP, I960BASE_SFMT_LDQ_INDIRECT_DISP }, | |
225 | { I960_INSN_LDQ_INDEX_DISP, I960BASE_INSN_LDQ_INDEX_DISP, I960BASE_SFMT_LDQ_INDEX_DISP }, | |
226 | { I960_INSN_LDQ_INDIRECT_INDEX_DISP, I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDQ_INDIRECT_INDEX_DISP }, | |
227 | { I960_INSN_ST_OFFSET, I960BASE_INSN_ST_OFFSET, I960BASE_SFMT_ST_OFFSET }, | |
228 | { I960_INSN_ST_INDIRECT_OFFSET, I960BASE_INSN_ST_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET }, | |
229 | { I960_INSN_ST_INDIRECT, I960BASE_INSN_ST_INDIRECT, I960BASE_SFMT_ST_INDIRECT }, | |
230 | { I960_INSN_ST_INDIRECT_INDEX, I960BASE_INSN_ST_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX }, | |
231 | { I960_INSN_ST_DISP, I960BASE_INSN_ST_DISP, I960BASE_SFMT_ST_DISP }, | |
232 | { I960_INSN_ST_INDIRECT_DISP, I960BASE_INSN_ST_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP }, | |
233 | { I960_INSN_ST_INDEX_DISP, I960BASE_INSN_ST_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP }, | |
234 | { I960_INSN_ST_INDIRECT_INDEX_DISP, I960BASE_INSN_ST_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP }, | |
235 | { I960_INSN_STOB_OFFSET, I960BASE_INSN_STOB_OFFSET, I960BASE_SFMT_ST_OFFSET }, | |
236 | { I960_INSN_STOB_INDIRECT_OFFSET, I960BASE_INSN_STOB_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET }, | |
237 | { I960_INSN_STOB_INDIRECT, I960BASE_INSN_STOB_INDIRECT, I960BASE_SFMT_ST_INDIRECT }, | |
238 | { I960_INSN_STOB_INDIRECT_INDEX, I960BASE_INSN_STOB_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX }, | |
239 | { I960_INSN_STOB_DISP, I960BASE_INSN_STOB_DISP, I960BASE_SFMT_ST_DISP }, | |
240 | { I960_INSN_STOB_INDIRECT_DISP, I960BASE_INSN_STOB_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP }, | |
241 | { I960_INSN_STOB_INDEX_DISP, I960BASE_INSN_STOB_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP }, | |
242 | { I960_INSN_STOB_INDIRECT_INDEX_DISP, I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP }, | |
243 | { I960_INSN_STOS_OFFSET, I960BASE_INSN_STOS_OFFSET, I960BASE_SFMT_ST_OFFSET }, | |
244 | { I960_INSN_STOS_INDIRECT_OFFSET, I960BASE_INSN_STOS_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET }, | |
245 | { I960_INSN_STOS_INDIRECT, I960BASE_INSN_STOS_INDIRECT, I960BASE_SFMT_ST_INDIRECT }, | |
246 | { I960_INSN_STOS_INDIRECT_INDEX, I960BASE_INSN_STOS_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX }, | |
247 | { I960_INSN_STOS_DISP, I960BASE_INSN_STOS_DISP, I960BASE_SFMT_ST_DISP }, | |
248 | { I960_INSN_STOS_INDIRECT_DISP, I960BASE_INSN_STOS_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP }, | |
249 | { I960_INSN_STOS_INDEX_DISP, I960BASE_INSN_STOS_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP }, | |
250 | { I960_INSN_STOS_INDIRECT_INDEX_DISP, I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP }, | |
251 | { I960_INSN_STL_OFFSET, I960BASE_INSN_STL_OFFSET, I960BASE_SFMT_STL_OFFSET }, | |
252 | { I960_INSN_STL_INDIRECT_OFFSET, I960BASE_INSN_STL_INDIRECT_OFFSET, I960BASE_SFMT_STL_INDIRECT_OFFSET }, | |
253 | { I960_INSN_STL_INDIRECT, I960BASE_INSN_STL_INDIRECT, I960BASE_SFMT_STL_INDIRECT }, | |
254 | { I960_INSN_STL_INDIRECT_INDEX, I960BASE_INSN_STL_INDIRECT_INDEX, I960BASE_SFMT_STL_INDIRECT_INDEX }, | |
255 | { I960_INSN_STL_DISP, I960BASE_INSN_STL_DISP, I960BASE_SFMT_STL_DISP }, | |
256 | { I960_INSN_STL_INDIRECT_DISP, I960BASE_INSN_STL_INDIRECT_DISP, I960BASE_SFMT_STL_INDIRECT_DISP }, | |
257 | { I960_INSN_STL_INDEX_DISP, I960BASE_INSN_STL_INDEX_DISP, I960BASE_SFMT_STL_INDEX_DISP }, | |
258 | { I960_INSN_STL_INDIRECT_INDEX_DISP, I960BASE_INSN_STL_INDIRECT_INDEX_DISP, I960BASE_SFMT_STL_INDIRECT_INDEX_DISP }, | |
259 | { I960_INSN_STT_OFFSET, I960BASE_INSN_STT_OFFSET, I960BASE_SFMT_STT_OFFSET }, | |
260 | { I960_INSN_STT_INDIRECT_OFFSET, I960BASE_INSN_STT_INDIRECT_OFFSET, I960BASE_SFMT_STT_INDIRECT_OFFSET }, | |
261 | { I960_INSN_STT_INDIRECT, I960BASE_INSN_STT_INDIRECT, I960BASE_SFMT_STT_INDIRECT }, | |
262 | { I960_INSN_STT_INDIRECT_INDEX, I960BASE_INSN_STT_INDIRECT_INDEX, I960BASE_SFMT_STT_INDIRECT_INDEX }, | |
263 | { I960_INSN_STT_DISP, I960BASE_INSN_STT_DISP, I960BASE_SFMT_STT_DISP }, | |
264 | { I960_INSN_STT_INDIRECT_DISP, I960BASE_INSN_STT_INDIRECT_DISP, I960BASE_SFMT_STT_INDIRECT_DISP }, | |
265 | { I960_INSN_STT_INDEX_DISP, I960BASE_INSN_STT_INDEX_DISP, I960BASE_SFMT_STT_INDEX_DISP }, | |
266 | { I960_INSN_STT_INDIRECT_INDEX_DISP, I960BASE_INSN_STT_INDIRECT_INDEX_DISP, I960BASE_SFMT_STT_INDIRECT_INDEX_DISP }, | |
267 | { I960_INSN_STQ_OFFSET, I960BASE_INSN_STQ_OFFSET, I960BASE_SFMT_STQ_OFFSET }, | |
268 | { I960_INSN_STQ_INDIRECT_OFFSET, I960BASE_INSN_STQ_INDIRECT_OFFSET, I960BASE_SFMT_STQ_INDIRECT_OFFSET }, | |
269 | { I960_INSN_STQ_INDIRECT, I960BASE_INSN_STQ_INDIRECT, I960BASE_SFMT_STQ_INDIRECT }, | |
270 | { I960_INSN_STQ_INDIRECT_INDEX, I960BASE_INSN_STQ_INDIRECT_INDEX, I960BASE_SFMT_STQ_INDIRECT_INDEX }, | |
271 | { I960_INSN_STQ_DISP, I960BASE_INSN_STQ_DISP, I960BASE_SFMT_STQ_DISP }, | |
272 | { I960_INSN_STQ_INDIRECT_DISP, I960BASE_INSN_STQ_INDIRECT_DISP, I960BASE_SFMT_STQ_INDIRECT_DISP }, | |
273 | { I960_INSN_STQ_INDEX_DISP, I960BASE_INSN_STQ_INDEX_DISP, I960BASE_SFMT_STQ_INDEX_DISP }, | |
274 | { I960_INSN_STQ_INDIRECT_INDEX_DISP, I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_STQ_INDIRECT_INDEX_DISP }, | |
275 | { I960_INSN_CMPOBE_REG, I960BASE_INSN_CMPOBE_REG, I960BASE_SFMT_CMPOBE_REG }, | |
276 | { I960_INSN_CMPOBE_LIT, I960BASE_INSN_CMPOBE_LIT, I960BASE_SFMT_CMPOBE_LIT }, | |
277 | { I960_INSN_CMPOBNE_REG, I960BASE_INSN_CMPOBNE_REG, I960BASE_SFMT_CMPOBE_REG }, | |
278 | { I960_INSN_CMPOBNE_LIT, I960BASE_INSN_CMPOBNE_LIT, I960BASE_SFMT_CMPOBE_LIT }, | |
279 | { I960_INSN_CMPOBL_REG, I960BASE_INSN_CMPOBL_REG, I960BASE_SFMT_CMPOBL_REG }, | |
280 | { I960_INSN_CMPOBL_LIT, I960BASE_INSN_CMPOBL_LIT, I960BASE_SFMT_CMPOBL_LIT }, | |
281 | { I960_INSN_CMPOBLE_REG, I960BASE_INSN_CMPOBLE_REG, I960BASE_SFMT_CMPOBL_REG }, | |
282 | { I960_INSN_CMPOBLE_LIT, I960BASE_INSN_CMPOBLE_LIT, I960BASE_SFMT_CMPOBL_LIT }, | |
283 | { I960_INSN_CMPOBG_REG, I960BASE_INSN_CMPOBG_REG, I960BASE_SFMT_CMPOBL_REG }, | |
284 | { I960_INSN_CMPOBG_LIT, I960BASE_INSN_CMPOBG_LIT, I960BASE_SFMT_CMPOBL_LIT }, | |
285 | { I960_INSN_CMPOBGE_REG, I960BASE_INSN_CMPOBGE_REG, I960BASE_SFMT_CMPOBL_REG }, | |
286 | { I960_INSN_CMPOBGE_LIT, I960BASE_INSN_CMPOBGE_LIT, I960BASE_SFMT_CMPOBL_LIT }, | |
287 | { I960_INSN_CMPIBE_REG, I960BASE_INSN_CMPIBE_REG, I960BASE_SFMT_CMPOBE_REG }, | |
288 | { I960_INSN_CMPIBE_LIT, I960BASE_INSN_CMPIBE_LIT, I960BASE_SFMT_CMPOBE_LIT }, | |
289 | { I960_INSN_CMPIBNE_REG, I960BASE_INSN_CMPIBNE_REG, I960BASE_SFMT_CMPOBE_REG }, | |
290 | { I960_INSN_CMPIBNE_LIT, I960BASE_INSN_CMPIBNE_LIT, I960BASE_SFMT_CMPOBE_LIT }, | |
291 | { I960_INSN_CMPIBL_REG, I960BASE_INSN_CMPIBL_REG, I960BASE_SFMT_CMPOBE_REG }, | |
292 | { I960_INSN_CMPIBL_LIT, I960BASE_INSN_CMPIBL_LIT, I960BASE_SFMT_CMPOBE_LIT }, | |
293 | { I960_INSN_CMPIBLE_REG, I960BASE_INSN_CMPIBLE_REG, I960BASE_SFMT_CMPOBE_REG }, | |
294 | { I960_INSN_CMPIBLE_LIT, I960BASE_INSN_CMPIBLE_LIT, I960BASE_SFMT_CMPOBE_LIT }, | |
295 | { I960_INSN_CMPIBG_REG, I960BASE_INSN_CMPIBG_REG, I960BASE_SFMT_CMPOBE_REG }, | |
296 | { I960_INSN_CMPIBG_LIT, I960BASE_INSN_CMPIBG_LIT, I960BASE_SFMT_CMPOBE_LIT }, | |
297 | { I960_INSN_CMPIBGE_REG, I960BASE_INSN_CMPIBGE_REG, I960BASE_SFMT_CMPOBE_REG }, | |
298 | { I960_INSN_CMPIBGE_LIT, I960BASE_INSN_CMPIBGE_LIT, I960BASE_SFMT_CMPOBE_LIT }, | |
299 | { I960_INSN_BBC_REG, I960BASE_INSN_BBC_REG, I960BASE_SFMT_BBC_REG }, | |
300 | { I960_INSN_BBC_LIT, I960BASE_INSN_BBC_LIT, I960BASE_SFMT_BBC_LIT }, | |
301 | { I960_INSN_BBS_REG, I960BASE_INSN_BBS_REG, I960BASE_SFMT_BBC_REG }, | |
302 | { I960_INSN_BBS_LIT, I960BASE_INSN_BBS_LIT, I960BASE_SFMT_BBC_LIT }, | |
303 | { I960_INSN_CMPI, I960BASE_INSN_CMPI, I960BASE_SFMT_CMPI }, | |
304 | { I960_INSN_CMPI1, I960BASE_INSN_CMPI1, I960BASE_SFMT_CMPI1 }, | |
305 | { I960_INSN_CMPI2, I960BASE_INSN_CMPI2, I960BASE_SFMT_CMPI2 }, | |
306 | { I960_INSN_CMPI3, I960BASE_INSN_CMPI3, I960BASE_SFMT_CMPI3 }, | |
307 | { I960_INSN_CMPO, I960BASE_INSN_CMPO, I960BASE_SFMT_CMPO }, | |
308 | { I960_INSN_CMPO1, I960BASE_INSN_CMPO1, I960BASE_SFMT_CMPO1 }, | |
309 | { I960_INSN_CMPO2, I960BASE_INSN_CMPO2, I960BASE_SFMT_CMPO2 }, | |
310 | { I960_INSN_CMPO3, I960BASE_INSN_CMPO3, I960BASE_SFMT_CMPO3 }, | |
311 | { I960_INSN_TESTNO_REG, I960BASE_INSN_TESTNO_REG, I960BASE_SFMT_TESTNO_REG }, | |
312 | { I960_INSN_TESTG_REG, I960BASE_INSN_TESTG_REG, I960BASE_SFMT_TESTNO_REG }, | |
313 | { I960_INSN_TESTE_REG, I960BASE_INSN_TESTE_REG, I960BASE_SFMT_TESTNO_REG }, | |
314 | { I960_INSN_TESTGE_REG, I960BASE_INSN_TESTGE_REG, I960BASE_SFMT_TESTNO_REG }, | |
315 | { I960_INSN_TESTL_REG, I960BASE_INSN_TESTL_REG, I960BASE_SFMT_TESTNO_REG }, | |
316 | { I960_INSN_TESTNE_REG, I960BASE_INSN_TESTNE_REG, I960BASE_SFMT_TESTNO_REG }, | |
317 | { I960_INSN_TESTLE_REG, I960BASE_INSN_TESTLE_REG, I960BASE_SFMT_TESTNO_REG }, | |
318 | { I960_INSN_TESTO_REG, I960BASE_INSN_TESTO_REG, I960BASE_SFMT_TESTNO_REG }, | |
319 | { I960_INSN_BNO, I960BASE_INSN_BNO, I960BASE_SFMT_BNO }, | |
320 | { I960_INSN_BG, I960BASE_INSN_BG, I960BASE_SFMT_BNO }, | |
321 | { I960_INSN_BE, I960BASE_INSN_BE, I960BASE_SFMT_BNO }, | |
322 | { I960_INSN_BGE, I960BASE_INSN_BGE, I960BASE_SFMT_BNO }, | |
323 | { I960_INSN_BL, I960BASE_INSN_BL, I960BASE_SFMT_BNO }, | |
324 | { I960_INSN_BNE, I960BASE_INSN_BNE, I960BASE_SFMT_BNO }, | |
325 | { I960_INSN_BLE, I960BASE_INSN_BLE, I960BASE_SFMT_BNO }, | |
326 | { I960_INSN_BO, I960BASE_INSN_BO, I960BASE_SFMT_BNO }, | |
327 | { I960_INSN_B, I960BASE_INSN_B, I960BASE_SFMT_B }, | |
328 | { I960_INSN_BX_INDIRECT_OFFSET, I960BASE_INSN_BX_INDIRECT_OFFSET, I960BASE_SFMT_BX_INDIRECT_OFFSET }, | |
329 | { I960_INSN_BX_INDIRECT, I960BASE_INSN_BX_INDIRECT, I960BASE_SFMT_BX_INDIRECT }, | |
330 | { I960_INSN_BX_INDIRECT_INDEX, I960BASE_INSN_BX_INDIRECT_INDEX, I960BASE_SFMT_BX_INDIRECT_INDEX }, | |
331 | { I960_INSN_BX_DISP, I960BASE_INSN_BX_DISP, I960BASE_SFMT_BX_DISP }, | |
332 | { I960_INSN_BX_INDIRECT_DISP, I960BASE_INSN_BX_INDIRECT_DISP, I960BASE_SFMT_BX_INDIRECT_DISP }, | |
333 | { I960_INSN_CALLX_DISP, I960BASE_INSN_CALLX_DISP, I960BASE_SFMT_CALLX_DISP }, | |
334 | { I960_INSN_CALLX_INDIRECT, I960BASE_INSN_CALLX_INDIRECT, I960BASE_SFMT_CALLX_INDIRECT }, | |
335 | { I960_INSN_CALLX_INDIRECT_OFFSET, I960BASE_INSN_CALLX_INDIRECT_OFFSET, I960BASE_SFMT_CALLX_INDIRECT_OFFSET }, | |
336 | { I960_INSN_RET, I960BASE_INSN_RET, I960BASE_SFMT_RET }, | |
337 | { I960_INSN_CALLS, I960BASE_INSN_CALLS, I960BASE_SFMT_CALLS }, | |
338 | { I960_INSN_FMARK, I960BASE_INSN_FMARK, I960BASE_SFMT_FMARK }, | |
339 | { I960_INSN_FLUSHREG, I960BASE_INSN_FLUSHREG, I960BASE_SFMT_FLUSHREG }, | |
c906108c SS |
340 | }; |
341 | ||
96baa820 JM |
342 | static const struct insn_sem i960base_insn_sem_invalid = { |
343 | VIRTUAL_INSN_X_INVALID, I960BASE_INSN_X_INVALID, I960BASE_SFMT_EMPTY | |
c906108c SS |
344 | }; |
345 | ||
c906108c SS |
346 | /* Initialize an IDESC from the compile-time computable parts. */ |
347 | ||
348 | static INLINE void | |
349 | init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) | |
350 | { | |
351 | const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; | |
352 | ||
353 | id->num = t->index; | |
96baa820 | 354 | id->sfmt = t->sfmt; |
c906108c SS |
355 | if ((int) t->type <= 0) |
356 | id->idata = & cgen_virtual_insn_table[- (int) t->type]; | |
357 | else | |
358 | id->idata = & insn_table[t->type]; | |
359 | id->attrs = CGEN_INSN_ATTRS (id->idata); | |
360 | /* Oh my god, a magic number. */ | |
361 | id->length = CGEN_INSN_BITSIZE (id->idata) / 8; | |
96baa820 | 362 | |
c906108c SS |
363 | #if WITH_PROFILE_MODEL_P |
364 | id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; | |
365 | { | |
366 | SIM_DESC sd = CPU_STATE (cpu); | |
367 | SIM_ASSERT (t->index == id->timing->num); | |
368 | } | |
369 | #endif | |
96baa820 JM |
370 | |
371 | /* Semantic pointers are initialized elsewhere. */ | |
c906108c SS |
372 | } |
373 | ||
374 | /* Initialize the instruction descriptor table. */ | |
375 | ||
376 | void | |
377 | i960base_init_idesc_table (SIM_CPU *cpu) | |
378 | { | |
379 | IDESC *id,*tabend; | |
380 | const struct insn_sem *t,*tend; | |
381 | int tabsize = I960BASE_INSN_MAX; | |
382 | IDESC *table = i960base_insn_data; | |
383 | ||
384 | memset (table, 0, tabsize * sizeof (IDESC)); | |
385 | ||
386 | /* First set all entries to the `invalid insn'. */ | |
387 | t = & i960base_insn_sem_invalid; | |
388 | for (id = table, tabend = table + tabsize; id < tabend; ++id) | |
389 | init_idesc (cpu, id, t); | |
390 | ||
391 | /* Now fill in the values for the chosen cpu. */ | |
392 | for (t = i960base_insn_sem, tend = t + sizeof (i960base_insn_sem) / sizeof (*t); | |
393 | t != tend; ++t) | |
394 | { | |
395 | init_idesc (cpu, & table[t->index], t); | |
396 | } | |
397 | ||
398 | /* Link the IDESC table into the cpu. */ | |
399 | CPU_IDESC (cpu) = table; | |
400 | } | |
401 | ||
c906108c SS |
402 | /* Given an instruction, return a pointer to its IDESC entry. */ |
403 | ||
404 | const IDESC * | |
405 | i960base_decode (SIM_CPU *current_cpu, IADDR pc, | |
406 | CGEN_INSN_INT base_insn, | |
407 | ARGBUF *abuf) | |
408 | { | |
7a292a7a SS |
409 | /* Result of decoder. */ |
410 | I960BASE_INSN_TYPE itype; | |
c906108c SS |
411 | |
412 | { | |
7a292a7a SS |
413 | CGEN_INSN_INT insn = base_insn; |
414 | ||
415 | { | |
416 | unsigned int val = (((insn >> 24) & (255 << 0))); | |
417 | switch (val) | |
418 | { | |
96baa820 JM |
419 | case 8 : itype = I960BASE_INSN_B; goto extract_sfmt_b; |
420 | case 10 : itype = I960BASE_INSN_RET; goto extract_sfmt_ret; | |
421 | case 16 : itype = I960BASE_INSN_BNO; goto extract_sfmt_bno; | |
422 | case 17 : itype = I960BASE_INSN_BG; goto extract_sfmt_bno; | |
423 | case 18 : itype = I960BASE_INSN_BE; goto extract_sfmt_bno; | |
424 | case 19 : itype = I960BASE_INSN_BGE; goto extract_sfmt_bno; | |
425 | case 20 : itype = I960BASE_INSN_BL; goto extract_sfmt_bno; | |
426 | case 21 : itype = I960BASE_INSN_BNE; goto extract_sfmt_bno; | |
427 | case 22 : itype = I960BASE_INSN_BLE; goto extract_sfmt_bno; | |
428 | case 23 : itype = I960BASE_INSN_BO; goto extract_sfmt_bno; | |
429 | case 32 : itype = I960BASE_INSN_TESTNO_REG; goto extract_sfmt_testno_reg; | |
430 | case 33 : itype = I960BASE_INSN_TESTG_REG; goto extract_sfmt_testno_reg; | |
431 | case 34 : itype = I960BASE_INSN_TESTE_REG; goto extract_sfmt_testno_reg; | |
432 | case 35 : itype = I960BASE_INSN_TESTGE_REG; goto extract_sfmt_testno_reg; | |
433 | case 36 : itype = I960BASE_INSN_TESTL_REG; goto extract_sfmt_testno_reg; | |
434 | case 37 : itype = I960BASE_INSN_TESTNE_REG; goto extract_sfmt_testno_reg; | |
435 | case 38 : itype = I960BASE_INSN_TESTLE_REG; goto extract_sfmt_testno_reg; | |
436 | case 39 : itype = I960BASE_INSN_TESTO_REG; goto extract_sfmt_testno_reg; | |
7a292a7a | 437 | case 48 : |
c906108c | 438 | { |
7a292a7a SS |
439 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); |
440 | switch (val) | |
c906108c | 441 | { |
96baa820 JM |
442 | case 0 : itype = I960BASE_INSN_BBC_REG; goto extract_sfmt_bbc_reg; |
443 | case 4 : itype = I960BASE_INSN_BBC_LIT; goto extract_sfmt_bbc_lit; | |
444 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 445 | } |
7a292a7a SS |
446 | } |
447 | case 49 : | |
448 | { | |
449 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
450 | switch (val) | |
c906108c | 451 | { |
96baa820 JM |
452 | case 0 : itype = I960BASE_INSN_CMPOBG_REG; goto extract_sfmt_cmpobl_reg; |
453 | case 4 : itype = I960BASE_INSN_CMPOBG_LIT; goto extract_sfmt_cmpobl_lit; | |
454 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 455 | } |
7a292a7a SS |
456 | } |
457 | case 50 : | |
458 | { | |
459 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
460 | switch (val) | |
c906108c | 461 | { |
96baa820 JM |
462 | case 0 : itype = I960BASE_INSN_CMPOBE_REG; goto extract_sfmt_cmpobe_reg; |
463 | case 4 : itype = I960BASE_INSN_CMPOBE_LIT; goto extract_sfmt_cmpobe_lit; | |
464 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 465 | } |
7a292a7a SS |
466 | } |
467 | case 51 : | |
468 | { | |
469 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
470 | switch (val) | |
c906108c | 471 | { |
96baa820 JM |
472 | case 0 : itype = I960BASE_INSN_CMPOBGE_REG; goto extract_sfmt_cmpobl_reg; |
473 | case 4 : itype = I960BASE_INSN_CMPOBGE_LIT; goto extract_sfmt_cmpobl_lit; | |
474 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 475 | } |
7a292a7a SS |
476 | } |
477 | case 52 : | |
478 | { | |
479 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
480 | switch (val) | |
c906108c | 481 | { |
96baa820 JM |
482 | case 0 : itype = I960BASE_INSN_CMPOBL_REG; goto extract_sfmt_cmpobl_reg; |
483 | case 4 : itype = I960BASE_INSN_CMPOBL_LIT; goto extract_sfmt_cmpobl_lit; | |
484 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 485 | } |
7a292a7a SS |
486 | } |
487 | case 53 : | |
488 | { | |
489 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
490 | switch (val) | |
c906108c | 491 | { |
96baa820 JM |
492 | case 0 : itype = I960BASE_INSN_CMPOBNE_REG; goto extract_sfmt_cmpobe_reg; |
493 | case 4 : itype = I960BASE_INSN_CMPOBNE_LIT; goto extract_sfmt_cmpobe_lit; | |
494 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 495 | } |
7a292a7a SS |
496 | } |
497 | case 54 : | |
498 | { | |
499 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
500 | switch (val) | |
c906108c | 501 | { |
96baa820 JM |
502 | case 0 : itype = I960BASE_INSN_CMPOBLE_REG; goto extract_sfmt_cmpobl_reg; |
503 | case 4 : itype = I960BASE_INSN_CMPOBLE_LIT; goto extract_sfmt_cmpobl_lit; | |
504 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 505 | } |
7a292a7a SS |
506 | } |
507 | case 55 : | |
508 | { | |
509 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
510 | switch (val) | |
c906108c | 511 | { |
96baa820 JM |
512 | case 0 : itype = I960BASE_INSN_BBS_REG; goto extract_sfmt_bbc_reg; |
513 | case 4 : itype = I960BASE_INSN_BBS_LIT; goto extract_sfmt_bbc_lit; | |
514 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 515 | } |
7a292a7a SS |
516 | } |
517 | case 57 : | |
518 | { | |
519 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
520 | switch (val) | |
c906108c | 521 | { |
96baa820 JM |
522 | case 0 : itype = I960BASE_INSN_CMPIBG_REG; goto extract_sfmt_cmpobe_reg; |
523 | case 4 : itype = I960BASE_INSN_CMPIBG_LIT; goto extract_sfmt_cmpobe_lit; | |
524 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 525 | } |
7a292a7a SS |
526 | } |
527 | case 58 : | |
528 | { | |
529 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
530 | switch (val) | |
c906108c | 531 | { |
96baa820 JM |
532 | case 0 : itype = I960BASE_INSN_CMPIBE_REG; goto extract_sfmt_cmpobe_reg; |
533 | case 4 : itype = I960BASE_INSN_CMPIBE_LIT; goto extract_sfmt_cmpobe_lit; | |
534 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 535 | } |
7a292a7a SS |
536 | } |
537 | case 59 : | |
538 | { | |
539 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
540 | switch (val) | |
c906108c | 541 | { |
96baa820 JM |
542 | case 0 : itype = I960BASE_INSN_CMPIBGE_REG; goto extract_sfmt_cmpobe_reg; |
543 | case 4 : itype = I960BASE_INSN_CMPIBGE_LIT; goto extract_sfmt_cmpobe_lit; | |
544 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 545 | } |
7a292a7a SS |
546 | } |
547 | case 60 : | |
548 | { | |
549 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
550 | switch (val) | |
c906108c | 551 | { |
96baa820 JM |
552 | case 0 : itype = I960BASE_INSN_CMPIBL_REG; goto extract_sfmt_cmpobe_reg; |
553 | case 4 : itype = I960BASE_INSN_CMPIBL_LIT; goto extract_sfmt_cmpobe_lit; | |
554 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 555 | } |
7a292a7a SS |
556 | } |
557 | case 61 : | |
558 | { | |
559 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
560 | switch (val) | |
c906108c | 561 | { |
96baa820 JM |
562 | case 0 : itype = I960BASE_INSN_CMPIBNE_REG; goto extract_sfmt_cmpobe_reg; |
563 | case 4 : itype = I960BASE_INSN_CMPIBNE_LIT; goto extract_sfmt_cmpobe_lit; | |
564 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 565 | } |
7a292a7a SS |
566 | } |
567 | case 62 : | |
568 | { | |
569 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
570 | switch (val) | |
c906108c | 571 | { |
96baa820 JM |
572 | case 0 : itype = I960BASE_INSN_CMPIBLE_REG; goto extract_sfmt_cmpobe_reg; |
573 | case 4 : itype = I960BASE_INSN_CMPIBLE_LIT; goto extract_sfmt_cmpobe_lit; | |
574 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 575 | } |
7a292a7a SS |
576 | } |
577 | case 88 : | |
578 | { | |
579 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
580 | switch (val) | |
c906108c | 581 | { |
7a292a7a SS |
582 | case 0 : |
583 | { | |
584 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
585 | switch (val) | |
586 | { | |
96baa820 JM |
587 | case 0 : itype = I960BASE_INSN_NOTBIT; goto extract_sfmt_notbit; |
588 | case 2 : itype = I960BASE_INSN_AND; goto extract_sfmt_mulo; | |
589 | case 4 : itype = I960BASE_INSN_ANDNOT; goto extract_sfmt_mulo; | |
590 | case 6 : itype = I960BASE_INSN_SETBIT; goto extract_sfmt_notbit; | |
591 | case 8 : itype = I960BASE_INSN_NOTAND; goto extract_sfmt_mulo; | |
592 | case 12 : itype = I960BASE_INSN_XOR; goto extract_sfmt_mulo; | |
593 | case 14 : itype = I960BASE_INSN_OR; goto extract_sfmt_mulo; | |
594 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
595 | } |
596 | } | |
597 | case 1 : | |
598 | { | |
599 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
600 | switch (val) | |
601 | { | |
96baa820 JM |
602 | case 0 : itype = I960BASE_INSN_NOR; goto extract_sfmt_mulo; |
603 | case 2 : itype = I960BASE_INSN_XNOR; goto extract_sfmt_mulo; | |
604 | case 4 : itype = I960BASE_INSN_NOT; goto extract_sfmt_not; | |
605 | case 6 : itype = I960BASE_INSN_ORNOT; goto extract_sfmt_mulo; | |
606 | case 8 : itype = I960BASE_INSN_CLRBIT; goto extract_sfmt_notbit; | |
607 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
608 | } |
609 | } | |
610 | case 2 : | |
611 | { | |
612 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
613 | switch (val) | |
614 | { | |
96baa820 JM |
615 | case 0 : itype = I960BASE_INSN_NOTBIT1; goto extract_sfmt_notbit1; |
616 | case 2 : itype = I960BASE_INSN_AND1; goto extract_sfmt_mulo1; | |
617 | case 4 : itype = I960BASE_INSN_ANDNOT1; goto extract_sfmt_mulo1; | |
618 | case 6 : itype = I960BASE_INSN_SETBIT1; goto extract_sfmt_notbit1; | |
619 | case 8 : itype = I960BASE_INSN_NOTAND1; goto extract_sfmt_mulo1; | |
620 | case 12 : itype = I960BASE_INSN_XOR1; goto extract_sfmt_mulo1; | |
621 | case 14 : itype = I960BASE_INSN_OR1; goto extract_sfmt_mulo1; | |
622 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
623 | } |
624 | } | |
625 | case 3 : | |
626 | { | |
627 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
628 | switch (val) | |
629 | { | |
96baa820 JM |
630 | case 0 : itype = I960BASE_INSN_NOR1; goto extract_sfmt_mulo1; |
631 | case 2 : itype = I960BASE_INSN_XNOR1; goto extract_sfmt_mulo1; | |
632 | case 4 : itype = I960BASE_INSN_NOT1; goto extract_sfmt_not1; | |
633 | case 6 : itype = I960BASE_INSN_ORNOT1; goto extract_sfmt_mulo1; | |
634 | case 8 : itype = I960BASE_INSN_CLRBIT1; goto extract_sfmt_notbit1; | |
635 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
636 | } |
637 | } | |
638 | case 4 : | |
639 | { | |
640 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
641 | switch (val) | |
642 | { | |
96baa820 JM |
643 | case 0 : itype = I960BASE_INSN_NOTBIT2; goto extract_sfmt_notbit2; |
644 | case 2 : itype = I960BASE_INSN_AND2; goto extract_sfmt_mulo2; | |
645 | case 4 : itype = I960BASE_INSN_ANDNOT2; goto extract_sfmt_mulo2; | |
646 | case 6 : itype = I960BASE_INSN_SETBIT2; goto extract_sfmt_notbit2; | |
647 | case 8 : itype = I960BASE_INSN_NOTAND2; goto extract_sfmt_mulo2; | |
648 | case 12 : itype = I960BASE_INSN_XOR2; goto extract_sfmt_mulo2; | |
649 | case 14 : itype = I960BASE_INSN_OR2; goto extract_sfmt_mulo2; | |
650 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
651 | } |
652 | } | |
653 | case 5 : | |
654 | { | |
655 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
656 | switch (val) | |
657 | { | |
96baa820 JM |
658 | case 0 : itype = I960BASE_INSN_NOR2; goto extract_sfmt_mulo2; |
659 | case 2 : itype = I960BASE_INSN_XNOR2; goto extract_sfmt_mulo2; | |
660 | case 4 : itype = I960BASE_INSN_NOT2; goto extract_sfmt_not; | |
661 | case 6 : itype = I960BASE_INSN_ORNOT2; goto extract_sfmt_mulo2; | |
662 | case 8 : itype = I960BASE_INSN_CLRBIT2; goto extract_sfmt_notbit2; | |
663 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
664 | } |
665 | } | |
666 | case 6 : | |
667 | { | |
668 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
669 | switch (val) | |
670 | { | |
96baa820 JM |
671 | case 0 : itype = I960BASE_INSN_NOTBIT3; goto extract_sfmt_notbit3; |
672 | case 2 : itype = I960BASE_INSN_AND3; goto extract_sfmt_mulo3; | |
673 | case 4 : itype = I960BASE_INSN_ANDNOT3; goto extract_sfmt_mulo3; | |
674 | case 6 : itype = I960BASE_INSN_SETBIT3; goto extract_sfmt_notbit3; | |
675 | case 8 : itype = I960BASE_INSN_NOTAND3; goto extract_sfmt_mulo3; | |
676 | case 12 : itype = I960BASE_INSN_XOR3; goto extract_sfmt_mulo3; | |
677 | case 14 : itype = I960BASE_INSN_OR3; goto extract_sfmt_mulo3; | |
678 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
679 | } |
680 | } | |
681 | case 7 : | |
682 | { | |
683 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
684 | switch (val) | |
c906108c | 685 | { |
96baa820 JM |
686 | case 0 : itype = I960BASE_INSN_NOR3; goto extract_sfmt_mulo3; |
687 | case 2 : itype = I960BASE_INSN_XNOR3; goto extract_sfmt_mulo3; | |
688 | case 4 : itype = I960BASE_INSN_NOT3; goto extract_sfmt_not1; | |
689 | case 6 : itype = I960BASE_INSN_ORNOT3; goto extract_sfmt_mulo3; | |
690 | case 8 : itype = I960BASE_INSN_CLRBIT3; goto extract_sfmt_notbit3; | |
691 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 692 | } |
7a292a7a | 693 | } |
96baa820 | 694 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 695 | } |
7a292a7a SS |
696 | } |
697 | case 89 : | |
698 | { | |
699 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
700 | switch (val) | |
c906108c | 701 | { |
7a292a7a SS |
702 | case 0 : |
703 | { | |
704 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
705 | switch (val) | |
706 | { | |
96baa820 JM |
707 | case 0 : itype = I960BASE_INSN_ADDO; goto extract_sfmt_mulo; |
708 | case 4 : itype = I960BASE_INSN_SUBO; goto extract_sfmt_mulo; | |
709 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
710 | } |
711 | } | |
712 | case 1 : | |
713 | { | |
714 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
715 | switch (val) | |
716 | { | |
96baa820 JM |
717 | case 0 : itype = I960BASE_INSN_SHRO; goto extract_sfmt_shlo; |
718 | case 6 : itype = I960BASE_INSN_SHRI; goto extract_sfmt_shlo; | |
719 | case 8 : itype = I960BASE_INSN_SHLO; goto extract_sfmt_shlo; | |
720 | case 12 : itype = I960BASE_INSN_SHLI; goto extract_sfmt_shlo; | |
721 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
722 | } |
723 | } | |
724 | case 2 : | |
725 | { | |
726 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
727 | switch (val) | |
728 | { | |
96baa820 JM |
729 | case 0 : itype = I960BASE_INSN_ADDO1; goto extract_sfmt_mulo1; |
730 | case 4 : itype = I960BASE_INSN_SUBO1; goto extract_sfmt_mulo1; | |
731 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
732 | } |
733 | } | |
734 | case 3 : | |
735 | { | |
736 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
737 | switch (val) | |
738 | { | |
96baa820 JM |
739 | case 0 : itype = I960BASE_INSN_SHRO1; goto extract_sfmt_shlo1; |
740 | case 6 : itype = I960BASE_INSN_SHRI1; goto extract_sfmt_shlo1; | |
741 | case 8 : itype = I960BASE_INSN_SHLO1; goto extract_sfmt_shlo1; | |
742 | case 12 : itype = I960BASE_INSN_SHLI1; goto extract_sfmt_shlo1; | |
743 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
744 | } |
745 | } | |
746 | case 4 : | |
747 | { | |
748 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
749 | switch (val) | |
750 | { | |
96baa820 JM |
751 | case 0 : itype = I960BASE_INSN_ADDO2; goto extract_sfmt_mulo2; |
752 | case 4 : itype = I960BASE_INSN_SUBO2; goto extract_sfmt_mulo2; | |
753 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
754 | } |
755 | } | |
756 | case 5 : | |
757 | { | |
758 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
759 | switch (val) | |
760 | { | |
96baa820 JM |
761 | case 0 : itype = I960BASE_INSN_SHRO2; goto extract_sfmt_shlo2; |
762 | case 6 : itype = I960BASE_INSN_SHRI2; goto extract_sfmt_shlo2; | |
763 | case 8 : itype = I960BASE_INSN_SHLO2; goto extract_sfmt_shlo2; | |
764 | case 12 : itype = I960BASE_INSN_SHLI2; goto extract_sfmt_shlo2; | |
765 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
766 | } |
767 | } | |
768 | case 6 : | |
769 | { | |
770 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
771 | switch (val) | |
772 | { | |
96baa820 JM |
773 | case 0 : itype = I960BASE_INSN_ADDO3; goto extract_sfmt_mulo3; |
774 | case 4 : itype = I960BASE_INSN_SUBO3; goto extract_sfmt_mulo3; | |
775 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
776 | } |
777 | } | |
778 | case 7 : | |
779 | { | |
780 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
781 | switch (val) | |
c906108c | 782 | { |
96baa820 JM |
783 | case 0 : itype = I960BASE_INSN_SHRO3; goto extract_sfmt_shlo3; |
784 | case 6 : itype = I960BASE_INSN_SHRI3; goto extract_sfmt_shlo3; | |
785 | case 8 : itype = I960BASE_INSN_SHLO3; goto extract_sfmt_shlo3; | |
786 | case 12 : itype = I960BASE_INSN_SHLI3; goto extract_sfmt_shlo3; | |
787 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 788 | } |
7a292a7a | 789 | } |
96baa820 | 790 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 791 | } |
7a292a7a SS |
792 | } |
793 | case 90 : | |
794 | { | |
795 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
796 | switch (val) | |
c906108c | 797 | { |
7a292a7a SS |
798 | case 8 : |
799 | { | |
800 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
801 | switch (val) | |
802 | { | |
96baa820 JM |
803 | case 0 : itype = I960BASE_INSN_CMPO; goto extract_sfmt_cmpo; |
804 | case 2 : itype = I960BASE_INSN_CMPI; goto extract_sfmt_cmpi; | |
805 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
806 | } |
807 | } | |
808 | case 10 : | |
809 | { | |
810 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
811 | switch (val) | |
812 | { | |
96baa820 JM |
813 | case 0 : itype = I960BASE_INSN_CMPO1; goto extract_sfmt_cmpo1; |
814 | case 2 : itype = I960BASE_INSN_CMPI1; goto extract_sfmt_cmpi1; | |
815 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
816 | } |
817 | } | |
818 | case 12 : | |
819 | { | |
820 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
821 | switch (val) | |
822 | { | |
96baa820 JM |
823 | case 0 : itype = I960BASE_INSN_CMPO2; goto extract_sfmt_cmpo2; |
824 | case 2 : itype = I960BASE_INSN_CMPI2; goto extract_sfmt_cmpi2; | |
825 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
826 | } |
827 | } | |
828 | case 14 : | |
829 | { | |
830 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
831 | switch (val) | |
c906108c | 832 | { |
96baa820 JM |
833 | case 0 : itype = I960BASE_INSN_CMPO3; goto extract_sfmt_cmpo3; |
834 | case 2 : itype = I960BASE_INSN_CMPI3; goto extract_sfmt_cmpi3; | |
835 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 836 | } |
7a292a7a | 837 | } |
96baa820 | 838 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 839 | } |
7a292a7a SS |
840 | } |
841 | case 92 : | |
842 | { | |
843 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
844 | switch (val) | |
c906108c | 845 | { |
96baa820 JM |
846 | case 5 : itype = I960BASE_INSN_MOV; goto extract_sfmt_not; |
847 | case 7 : itype = I960BASE_INSN_MOV1; goto extract_sfmt_not1; | |
848 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 849 | } |
7a292a7a SS |
850 | } |
851 | case 93 : | |
852 | { | |
853 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
854 | switch (val) | |
c906108c | 855 | { |
96baa820 JM |
856 | case 5 : itype = I960BASE_INSN_MOVL; goto extract_sfmt_movl; |
857 | case 7 : itype = I960BASE_INSN_MOVL1; goto extract_sfmt_movl1; | |
858 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 859 | } |
7a292a7a SS |
860 | } |
861 | case 94 : | |
862 | { | |
863 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
864 | switch (val) | |
c906108c | 865 | { |
96baa820 JM |
866 | case 5 : itype = I960BASE_INSN_MOVT; goto extract_sfmt_movt; |
867 | case 7 : itype = I960BASE_INSN_MOVT1; goto extract_sfmt_movt1; | |
868 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 869 | } |
7a292a7a SS |
870 | } |
871 | case 95 : | |
872 | { | |
873 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
874 | switch (val) | |
c906108c | 875 | { |
96baa820 JM |
876 | case 5 : itype = I960BASE_INSN_MOVQ; goto extract_sfmt_movq; |
877 | case 7 : itype = I960BASE_INSN_MOVQ1; goto extract_sfmt_movq1; | |
878 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 879 | } |
7a292a7a | 880 | } |
96baa820 JM |
881 | case 100 : itype = I960BASE_INSN_MODAC; goto extract_sfmt_modpc; |
882 | case 101 : itype = I960BASE_INSN_MODPC; goto extract_sfmt_modpc; | |
7a292a7a SS |
883 | case 102 : |
884 | { | |
885 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
886 | switch (val) | |
c906108c | 887 | { |
96baa820 | 888 | case 12 : itype = I960BASE_INSN_CALLS; goto extract_sfmt_calls; |
7a292a7a SS |
889 | case 15 : |
890 | { | |
891 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
892 | switch (val) | |
c906108c | 893 | { |
96baa820 JM |
894 | case 8 : itype = I960BASE_INSN_FMARK; goto extract_sfmt_fmark; |
895 | case 10 : itype = I960BASE_INSN_FLUSHREG; goto extract_sfmt_flushreg; | |
896 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 897 | } |
7a292a7a | 898 | } |
96baa820 | 899 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 900 | } |
7a292a7a SS |
901 | } |
902 | case 103 : | |
903 | { | |
904 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
905 | switch (val) | |
c906108c | 906 | { |
96baa820 JM |
907 | case 0 : itype = I960BASE_INSN_EMUL; goto extract_sfmt_emul; |
908 | case 2 : itype = I960BASE_INSN_EMUL1; goto extract_sfmt_emul1; | |
909 | case 4 : itype = I960BASE_INSN_EMUL2; goto extract_sfmt_emul2; | |
910 | case 6 : itype = I960BASE_INSN_EMUL3; goto extract_sfmt_emul3; | |
911 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 912 | } |
7a292a7a SS |
913 | } |
914 | case 112 : | |
915 | { | |
916 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
917 | switch (val) | |
c906108c | 918 | { |
96baa820 | 919 | case 0 : itype = I960BASE_INSN_MULO; goto extract_sfmt_mulo; |
7a292a7a SS |
920 | case 1 : |
921 | { | |
922 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
923 | switch (val) | |
924 | { | |
96baa820 JM |
925 | case 0 : itype = I960BASE_INSN_REMO; goto extract_sfmt_mulo; |
926 | case 6 : itype = I960BASE_INSN_DIVO; goto extract_sfmt_mulo; | |
927 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
928 | } |
929 | } | |
96baa820 | 930 | case 2 : itype = I960BASE_INSN_MULO1; goto extract_sfmt_mulo1; |
7a292a7a SS |
931 | case 3 : |
932 | { | |
933 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
934 | switch (val) | |
935 | { | |
96baa820 JM |
936 | case 0 : itype = I960BASE_INSN_REMO1; goto extract_sfmt_mulo1; |
937 | case 6 : itype = I960BASE_INSN_DIVO1; goto extract_sfmt_mulo1; | |
938 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
939 | } |
940 | } | |
96baa820 | 941 | case 4 : itype = I960BASE_INSN_MULO2; goto extract_sfmt_mulo2; |
7a292a7a SS |
942 | case 5 : |
943 | { | |
944 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
945 | switch (val) | |
c906108c | 946 | { |
96baa820 JM |
947 | case 0 : itype = I960BASE_INSN_REMO2; goto extract_sfmt_mulo2; |
948 | case 6 : itype = I960BASE_INSN_DIVO2; goto extract_sfmt_mulo2; | |
949 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 950 | } |
7a292a7a | 951 | } |
96baa820 | 952 | case 6 : itype = I960BASE_INSN_MULO3; goto extract_sfmt_mulo3; |
7a292a7a SS |
953 | case 7 : |
954 | { | |
955 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
956 | switch (val) | |
957 | { | |
96baa820 JM |
958 | case 0 : itype = I960BASE_INSN_REMO3; goto extract_sfmt_mulo3; |
959 | case 6 : itype = I960BASE_INSN_DIVO3; goto extract_sfmt_mulo3; | |
960 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
961 | } |
962 | } | |
96baa820 | 963 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 964 | } |
7a292a7a SS |
965 | } |
966 | case 116 : | |
967 | { | |
968 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
969 | switch (val) | |
c906108c | 970 | { |
7a292a7a SS |
971 | case 1 : |
972 | { | |
973 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
974 | switch (val) | |
975 | { | |
96baa820 JM |
976 | case 0 : itype = I960BASE_INSN_REMI; goto extract_sfmt_mulo; |
977 | case 6 : itype = I960BASE_INSN_DIVI; goto extract_sfmt_mulo; | |
978 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
979 | } |
980 | } | |
981 | case 3 : | |
982 | { | |
983 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
984 | switch (val) | |
985 | { | |
96baa820 JM |
986 | case 0 : itype = I960BASE_INSN_REMI1; goto extract_sfmt_mulo1; |
987 | case 6 : itype = I960BASE_INSN_DIVI1; goto extract_sfmt_mulo1; | |
988 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
989 | } |
990 | } | |
991 | case 5 : | |
992 | { | |
993 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
994 | switch (val) | |
c906108c | 995 | { |
96baa820 JM |
996 | case 0 : itype = I960BASE_INSN_REMI2; goto extract_sfmt_mulo2; |
997 | case 6 : itype = I960BASE_INSN_DIVI2; goto extract_sfmt_mulo2; | |
998 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 999 | } |
7a292a7a SS |
1000 | } |
1001 | case 7 : | |
1002 | { | |
1003 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
1004 | switch (val) | |
1005 | { | |
96baa820 JM |
1006 | case 0 : itype = I960BASE_INSN_REMI3; goto extract_sfmt_mulo3; |
1007 | case 6 : itype = I960BASE_INSN_DIVI3; goto extract_sfmt_mulo3; | |
1008 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
7a292a7a SS |
1009 | } |
1010 | } | |
96baa820 | 1011 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 1012 | } |
7a292a7a SS |
1013 | } |
1014 | case 128 : | |
1015 | { | |
1016 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1017 | switch (val) | |
c906108c | 1018 | { |
7a292a7a SS |
1019 | case 0 : /* fall through */ |
1020 | case 1 : /* fall through */ | |
1021 | case 2 : /* fall through */ | |
96baa820 JM |
1022 | case 3 : itype = I960BASE_INSN_LDOB_OFFSET; goto extract_sfmt_ld_offset; |
1023 | case 4 : itype = I960BASE_INSN_LDOB_INDIRECT; goto extract_sfmt_ld_indirect; | |
1024 | case 7 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; | |
7a292a7a SS |
1025 | case 8 : /* fall through */ |
1026 | case 9 : /* fall through */ | |
1027 | case 10 : /* fall through */ | |
96baa820 JM |
1028 | case 11 : itype = I960BASE_INSN_LDOB_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; |
1029 | case 12 : itype = I960BASE_INSN_LDOB_DISP; goto extract_sfmt_ld_disp; | |
1030 | case 13 : itype = I960BASE_INSN_LDOB_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; | |
1031 | case 14 : itype = I960BASE_INSN_LDOB_INDEX_DISP; goto extract_sfmt_ld_index_disp; | |
1032 | case 15 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; | |
1033 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1034 | } |
7a292a7a SS |
1035 | } |
1036 | case 130 : | |
1037 | { | |
1038 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1039 | switch (val) | |
c906108c | 1040 | { |
7a292a7a SS |
1041 | case 0 : /* fall through */ |
1042 | case 1 : /* fall through */ | |
1043 | case 2 : /* fall through */ | |
96baa820 JM |
1044 | case 3 : itype = I960BASE_INSN_STOB_OFFSET; goto extract_sfmt_st_offset; |
1045 | case 4 : itype = I960BASE_INSN_STOB_INDIRECT; goto extract_sfmt_st_indirect; | |
1046 | case 7 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index; | |
7a292a7a SS |
1047 | case 8 : /* fall through */ |
1048 | case 9 : /* fall through */ | |
1049 | case 10 : /* fall through */ | |
96baa820 JM |
1050 | case 11 : itype = I960BASE_INSN_STOB_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset; |
1051 | case 12 : itype = I960BASE_INSN_STOB_DISP; goto extract_sfmt_st_disp; | |
1052 | case 13 : itype = I960BASE_INSN_STOB_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp; | |
1053 | case 14 : itype = I960BASE_INSN_STOB_INDEX_DISP; goto extract_sfmt_st_index_disp; | |
1054 | case 15 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp; | |
1055 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1056 | } |
7a292a7a SS |
1057 | } |
1058 | case 132 : | |
1059 | { | |
1060 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1061 | switch (val) | |
c906108c | 1062 | { |
96baa820 JM |
1063 | case 4 : itype = I960BASE_INSN_BX_INDIRECT; goto extract_sfmt_bx_indirect; |
1064 | case 7 : itype = I960BASE_INSN_BX_INDIRECT_INDEX; goto extract_sfmt_bx_indirect_index; | |
7a292a7a SS |
1065 | case 8 : /* fall through */ |
1066 | case 9 : /* fall through */ | |
1067 | case 10 : /* fall through */ | |
96baa820 JM |
1068 | case 11 : itype = I960BASE_INSN_BX_INDIRECT_OFFSET; goto extract_sfmt_bx_indirect_offset; |
1069 | case 12 : itype = I960BASE_INSN_BX_DISP; goto extract_sfmt_bx_disp; | |
1070 | case 13 : itype = I960BASE_INSN_BX_INDIRECT_DISP; goto extract_sfmt_bx_indirect_disp; | |
1071 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1072 | } |
7a292a7a SS |
1073 | } |
1074 | case 134 : | |
1075 | { | |
1076 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1077 | switch (val) | |
c906108c | 1078 | { |
96baa820 | 1079 | case 4 : itype = I960BASE_INSN_CALLX_INDIRECT; goto extract_sfmt_callx_indirect; |
7a292a7a SS |
1080 | case 8 : /* fall through */ |
1081 | case 9 : /* fall through */ | |
1082 | case 10 : /* fall through */ | |
96baa820 JM |
1083 | case 11 : itype = I960BASE_INSN_CALLX_INDIRECT_OFFSET; goto extract_sfmt_callx_indirect_offset; |
1084 | case 12 : itype = I960BASE_INSN_CALLX_DISP; goto extract_sfmt_callx_disp; | |
1085 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1086 | } |
7a292a7a SS |
1087 | } |
1088 | case 136 : | |
1089 | { | |
1090 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1091 | switch (val) | |
c906108c | 1092 | { |
7a292a7a SS |
1093 | case 0 : /* fall through */ |
1094 | case 1 : /* fall through */ | |
1095 | case 2 : /* fall through */ | |
96baa820 JM |
1096 | case 3 : itype = I960BASE_INSN_LDOS_OFFSET; goto extract_sfmt_ld_offset; |
1097 | case 4 : itype = I960BASE_INSN_LDOS_INDIRECT; goto extract_sfmt_ld_indirect; | |
1098 | case 7 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; | |
7a292a7a SS |
1099 | case 8 : /* fall through */ |
1100 | case 9 : /* fall through */ | |
1101 | case 10 : /* fall through */ | |
96baa820 JM |
1102 | case 11 : itype = I960BASE_INSN_LDOS_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; |
1103 | case 12 : itype = I960BASE_INSN_LDOS_DISP; goto extract_sfmt_ld_disp; | |
1104 | case 13 : itype = I960BASE_INSN_LDOS_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; | |
1105 | case 14 : itype = I960BASE_INSN_LDOS_INDEX_DISP; goto extract_sfmt_ld_index_disp; | |
1106 | case 15 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; | |
1107 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1108 | } |
7a292a7a SS |
1109 | } |
1110 | case 138 : | |
1111 | { | |
1112 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1113 | switch (val) | |
c906108c | 1114 | { |
7a292a7a SS |
1115 | case 0 : /* fall through */ |
1116 | case 1 : /* fall through */ | |
1117 | case 2 : /* fall through */ | |
96baa820 JM |
1118 | case 3 : itype = I960BASE_INSN_STOS_OFFSET; goto extract_sfmt_st_offset; |
1119 | case 4 : itype = I960BASE_INSN_STOS_INDIRECT; goto extract_sfmt_st_indirect; | |
1120 | case 7 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index; | |
7a292a7a SS |
1121 | case 8 : /* fall through */ |
1122 | case 9 : /* fall through */ | |
1123 | case 10 : /* fall through */ | |
96baa820 JM |
1124 | case 11 : itype = I960BASE_INSN_STOS_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset; |
1125 | case 12 : itype = I960BASE_INSN_STOS_DISP; goto extract_sfmt_st_disp; | |
1126 | case 13 : itype = I960BASE_INSN_STOS_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp; | |
1127 | case 14 : itype = I960BASE_INSN_STOS_INDEX_DISP; goto extract_sfmt_st_index_disp; | |
1128 | case 15 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp; | |
1129 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1130 | } |
7a292a7a SS |
1131 | } |
1132 | case 140 : | |
1133 | { | |
1134 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1135 | switch (val) | |
c906108c | 1136 | { |
7a292a7a SS |
1137 | case 0 : /* fall through */ |
1138 | case 1 : /* fall through */ | |
1139 | case 2 : /* fall through */ | |
96baa820 JM |
1140 | case 3 : itype = I960BASE_INSN_LDA_OFFSET; goto extract_sfmt_lda_offset; |
1141 | case 4 : itype = I960BASE_INSN_LDA_INDIRECT; goto extract_sfmt_lda_indirect; | |
1142 | case 7 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX; goto extract_sfmt_lda_indirect_index; | |
7a292a7a SS |
1143 | case 8 : /* fall through */ |
1144 | case 9 : /* fall through */ | |
1145 | case 10 : /* fall through */ | |
96baa820 JM |
1146 | case 11 : itype = I960BASE_INSN_LDA_INDIRECT_OFFSET; goto extract_sfmt_lda_indirect_offset; |
1147 | case 12 : itype = I960BASE_INSN_LDA_DISP; goto extract_sfmt_lda_disp; | |
1148 | case 13 : itype = I960BASE_INSN_LDA_INDIRECT_DISP; goto extract_sfmt_lda_indirect_disp; | |
1149 | case 14 : itype = I960BASE_INSN_LDA_INDEX_DISP; goto extract_sfmt_lda_index_disp; | |
1150 | case 15 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX_DISP; goto extract_sfmt_lda_indirect_index_disp; | |
1151 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1152 | } |
7a292a7a SS |
1153 | } |
1154 | case 144 : | |
1155 | { | |
1156 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1157 | switch (val) | |
c906108c | 1158 | { |
7a292a7a SS |
1159 | case 0 : /* fall through */ |
1160 | case 1 : /* fall through */ | |
1161 | case 2 : /* fall through */ | |
96baa820 JM |
1162 | case 3 : itype = I960BASE_INSN_LD_OFFSET; goto extract_sfmt_ld_offset; |
1163 | case 4 : itype = I960BASE_INSN_LD_INDIRECT; goto extract_sfmt_ld_indirect; | |
1164 | case 7 : itype = I960BASE_INSN_LD_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; | |
7a292a7a SS |
1165 | case 8 : /* fall through */ |
1166 | case 9 : /* fall through */ | |
1167 | case 10 : /* fall through */ | |
96baa820 JM |
1168 | case 11 : itype = I960BASE_INSN_LD_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; |
1169 | case 12 : itype = I960BASE_INSN_LD_DISP; goto extract_sfmt_ld_disp; | |
1170 | case 13 : itype = I960BASE_INSN_LD_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; | |
1171 | case 14 : itype = I960BASE_INSN_LD_INDEX_DISP; goto extract_sfmt_ld_index_disp; | |
1172 | case 15 : itype = I960BASE_INSN_LD_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; | |
1173 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1174 | } |
7a292a7a SS |
1175 | } |
1176 | case 146 : | |
1177 | { | |
1178 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1179 | switch (val) | |
c906108c | 1180 | { |
7a292a7a SS |
1181 | case 0 : /* fall through */ |
1182 | case 1 : /* fall through */ | |
1183 | case 2 : /* fall through */ | |
96baa820 JM |
1184 | case 3 : itype = I960BASE_INSN_ST_OFFSET; goto extract_sfmt_st_offset; |
1185 | case 4 : itype = I960BASE_INSN_ST_INDIRECT; goto extract_sfmt_st_indirect; | |
1186 | case 7 : itype = I960BASE_INSN_ST_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index; | |
7a292a7a SS |
1187 | case 8 : /* fall through */ |
1188 | case 9 : /* fall through */ | |
1189 | case 10 : /* fall through */ | |
96baa820 JM |
1190 | case 11 : itype = I960BASE_INSN_ST_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset; |
1191 | case 12 : itype = I960BASE_INSN_ST_DISP; goto extract_sfmt_st_disp; | |
1192 | case 13 : itype = I960BASE_INSN_ST_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp; | |
1193 | case 14 : itype = I960BASE_INSN_ST_INDEX_DISP; goto extract_sfmt_st_index_disp; | |
1194 | case 15 : itype = I960BASE_INSN_ST_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp; | |
1195 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1196 | } |
7a292a7a SS |
1197 | } |
1198 | case 152 : | |
1199 | { | |
1200 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1201 | switch (val) | |
c906108c | 1202 | { |
7a292a7a SS |
1203 | case 0 : /* fall through */ |
1204 | case 1 : /* fall through */ | |
1205 | case 2 : /* fall through */ | |
96baa820 JM |
1206 | case 3 : itype = I960BASE_INSN_LDL_OFFSET; goto extract_sfmt_ldl_offset; |
1207 | case 4 : itype = I960BASE_INSN_LDL_INDIRECT; goto extract_sfmt_ldl_indirect; | |
1208 | case 7 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX; goto extract_sfmt_ldl_indirect_index; | |
7a292a7a SS |
1209 | case 8 : /* fall through */ |
1210 | case 9 : /* fall through */ | |
1211 | case 10 : /* fall through */ | |
96baa820 JM |
1212 | case 11 : itype = I960BASE_INSN_LDL_INDIRECT_OFFSET; goto extract_sfmt_ldl_indirect_offset; |
1213 | case 12 : itype = I960BASE_INSN_LDL_DISP; goto extract_sfmt_ldl_disp; | |
1214 | case 13 : itype = I960BASE_INSN_LDL_INDIRECT_DISP; goto extract_sfmt_ldl_indirect_disp; | |
1215 | case 14 : itype = I960BASE_INSN_LDL_INDEX_DISP; goto extract_sfmt_ldl_index_disp; | |
1216 | case 15 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX_DISP; goto extract_sfmt_ldl_indirect_index_disp; | |
1217 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1218 | } |
7a292a7a SS |
1219 | } |
1220 | case 154 : | |
1221 | { | |
1222 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1223 | switch (val) | |
c906108c | 1224 | { |
7a292a7a SS |
1225 | case 0 : /* fall through */ |
1226 | case 1 : /* fall through */ | |
1227 | case 2 : /* fall through */ | |
96baa820 JM |
1228 | case 3 : itype = I960BASE_INSN_STL_OFFSET; goto extract_sfmt_stl_offset; |
1229 | case 4 : itype = I960BASE_INSN_STL_INDIRECT; goto extract_sfmt_stl_indirect; | |
1230 | case 7 : itype = I960BASE_INSN_STL_INDIRECT_INDEX; goto extract_sfmt_stl_indirect_index; | |
7a292a7a SS |
1231 | case 8 : /* fall through */ |
1232 | case 9 : /* fall through */ | |
1233 | case 10 : /* fall through */ | |
96baa820 JM |
1234 | case 11 : itype = I960BASE_INSN_STL_INDIRECT_OFFSET; goto extract_sfmt_stl_indirect_offset; |
1235 | case 12 : itype = I960BASE_INSN_STL_DISP; goto extract_sfmt_stl_disp; | |
1236 | case 13 : itype = I960BASE_INSN_STL_INDIRECT_DISP; goto extract_sfmt_stl_indirect_disp; | |
1237 | case 14 : itype = I960BASE_INSN_STL_INDEX_DISP; goto extract_sfmt_stl_index_disp; | |
1238 | case 15 : itype = I960BASE_INSN_STL_INDIRECT_INDEX_DISP; goto extract_sfmt_stl_indirect_index_disp; | |
1239 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1240 | } |
7a292a7a SS |
1241 | } |
1242 | case 160 : | |
1243 | { | |
1244 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1245 | switch (val) | |
c906108c | 1246 | { |
7a292a7a SS |
1247 | case 0 : /* fall through */ |
1248 | case 1 : /* fall through */ | |
1249 | case 2 : /* fall through */ | |
96baa820 JM |
1250 | case 3 : itype = I960BASE_INSN_LDT_OFFSET; goto extract_sfmt_ldt_offset; |
1251 | case 4 : itype = I960BASE_INSN_LDT_INDIRECT; goto extract_sfmt_ldt_indirect; | |
1252 | case 7 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX; goto extract_sfmt_ldt_indirect_index; | |
7a292a7a SS |
1253 | case 8 : /* fall through */ |
1254 | case 9 : /* fall through */ | |
1255 | case 10 : /* fall through */ | |
96baa820 JM |
1256 | case 11 : itype = I960BASE_INSN_LDT_INDIRECT_OFFSET; goto extract_sfmt_ldt_indirect_offset; |
1257 | case 12 : itype = I960BASE_INSN_LDT_DISP; goto extract_sfmt_ldt_disp; | |
1258 | case 13 : itype = I960BASE_INSN_LDT_INDIRECT_DISP; goto extract_sfmt_ldt_indirect_disp; | |
1259 | case 14 : itype = I960BASE_INSN_LDT_INDEX_DISP; goto extract_sfmt_ldt_index_disp; | |
1260 | case 15 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX_DISP; goto extract_sfmt_ldt_indirect_index_disp; | |
1261 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1262 | } |
7a292a7a SS |
1263 | } |
1264 | case 162 : | |
1265 | { | |
1266 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1267 | switch (val) | |
c906108c | 1268 | { |
7a292a7a SS |
1269 | case 0 : /* fall through */ |
1270 | case 1 : /* fall through */ | |
1271 | case 2 : /* fall through */ | |
96baa820 JM |
1272 | case 3 : itype = I960BASE_INSN_STT_OFFSET; goto extract_sfmt_stt_offset; |
1273 | case 4 : itype = I960BASE_INSN_STT_INDIRECT; goto extract_sfmt_stt_indirect; | |
1274 | case 7 : itype = I960BASE_INSN_STT_INDIRECT_INDEX; goto extract_sfmt_stt_indirect_index; | |
7a292a7a SS |
1275 | case 8 : /* fall through */ |
1276 | case 9 : /* fall through */ | |
1277 | case 10 : /* fall through */ | |
96baa820 JM |
1278 | case 11 : itype = I960BASE_INSN_STT_INDIRECT_OFFSET; goto extract_sfmt_stt_indirect_offset; |
1279 | case 12 : itype = I960BASE_INSN_STT_DISP; goto extract_sfmt_stt_disp; | |
1280 | case 13 : itype = I960BASE_INSN_STT_INDIRECT_DISP; goto extract_sfmt_stt_indirect_disp; | |
1281 | case 14 : itype = I960BASE_INSN_STT_INDEX_DISP; goto extract_sfmt_stt_index_disp; | |
1282 | case 15 : itype = I960BASE_INSN_STT_INDIRECT_INDEX_DISP; goto extract_sfmt_stt_indirect_index_disp; | |
1283 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1284 | } |
7a292a7a SS |
1285 | } |
1286 | case 176 : | |
1287 | { | |
1288 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1289 | switch (val) | |
c906108c | 1290 | { |
7a292a7a SS |
1291 | case 0 : /* fall through */ |
1292 | case 1 : /* fall through */ | |
1293 | case 2 : /* fall through */ | |
96baa820 JM |
1294 | case 3 : itype = I960BASE_INSN_LDQ_OFFSET; goto extract_sfmt_ldq_offset; |
1295 | case 4 : itype = I960BASE_INSN_LDQ_INDIRECT; goto extract_sfmt_ldq_indirect; | |
1296 | case 7 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX; goto extract_sfmt_ldq_indirect_index; | |
7a292a7a SS |
1297 | case 8 : /* fall through */ |
1298 | case 9 : /* fall through */ | |
1299 | case 10 : /* fall through */ | |
96baa820 JM |
1300 | case 11 : itype = I960BASE_INSN_LDQ_INDIRECT_OFFSET; goto extract_sfmt_ldq_indirect_offset; |
1301 | case 12 : itype = I960BASE_INSN_LDQ_DISP; goto extract_sfmt_ldq_disp; | |
1302 | case 13 : itype = I960BASE_INSN_LDQ_INDIRECT_DISP; goto extract_sfmt_ldq_indirect_disp; | |
1303 | case 14 : itype = I960BASE_INSN_LDQ_INDEX_DISP; goto extract_sfmt_ldq_index_disp; | |
1304 | case 15 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP; goto extract_sfmt_ldq_indirect_index_disp; | |
1305 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1306 | } |
7a292a7a SS |
1307 | } |
1308 | case 178 : | |
1309 | { | |
1310 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1311 | switch (val) | |
c906108c | 1312 | { |
7a292a7a SS |
1313 | case 0 : /* fall through */ |
1314 | case 1 : /* fall through */ | |
1315 | case 2 : /* fall through */ | |
96baa820 JM |
1316 | case 3 : itype = I960BASE_INSN_STQ_OFFSET; goto extract_sfmt_stq_offset; |
1317 | case 4 : itype = I960BASE_INSN_STQ_INDIRECT; goto extract_sfmt_stq_indirect; | |
1318 | case 7 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX; goto extract_sfmt_stq_indirect_index; | |
7a292a7a SS |
1319 | case 8 : /* fall through */ |
1320 | case 9 : /* fall through */ | |
1321 | case 10 : /* fall through */ | |
96baa820 JM |
1322 | case 11 : itype = I960BASE_INSN_STQ_INDIRECT_OFFSET; goto extract_sfmt_stq_indirect_offset; |
1323 | case 12 : itype = I960BASE_INSN_STQ_DISP; goto extract_sfmt_stq_disp; | |
1324 | case 13 : itype = I960BASE_INSN_STQ_INDIRECT_DISP; goto extract_sfmt_stq_indirect_disp; | |
1325 | case 14 : itype = I960BASE_INSN_STQ_INDEX_DISP; goto extract_sfmt_stq_index_disp; | |
1326 | case 15 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX_DISP; goto extract_sfmt_stq_indirect_index_disp; | |
1327 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1328 | } |
7a292a7a SS |
1329 | } |
1330 | case 192 : | |
1331 | { | |
1332 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1333 | switch (val) | |
c906108c | 1334 | { |
7a292a7a SS |
1335 | case 0 : /* fall through */ |
1336 | case 1 : /* fall through */ | |
1337 | case 2 : /* fall through */ | |
96baa820 JM |
1338 | case 3 : itype = I960BASE_INSN_LDIB_OFFSET; goto extract_sfmt_ld_offset; |
1339 | case 4 : itype = I960BASE_INSN_LDIB_INDIRECT; goto extract_sfmt_ld_indirect; | |
1340 | case 7 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; | |
7a292a7a SS |
1341 | case 8 : /* fall through */ |
1342 | case 9 : /* fall through */ | |
1343 | case 10 : /* fall through */ | |
96baa820 JM |
1344 | case 11 : itype = I960BASE_INSN_LDIB_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; |
1345 | case 12 : itype = I960BASE_INSN_LDIB_DISP; goto extract_sfmt_ld_disp; | |
1346 | case 13 : itype = I960BASE_INSN_LDIB_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; | |
1347 | case 14 : itype = I960BASE_INSN_LDIB_INDEX_DISP; goto extract_sfmt_ld_index_disp; | |
1348 | case 15 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; | |
1349 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1350 | } |
7a292a7a SS |
1351 | } |
1352 | case 200 : | |
1353 | { | |
1354 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1355 | switch (val) | |
c906108c | 1356 | { |
7a292a7a SS |
1357 | case 0 : /* fall through */ |
1358 | case 1 : /* fall through */ | |
1359 | case 2 : /* fall through */ | |
96baa820 JM |
1360 | case 3 : itype = I960BASE_INSN_LDIS_OFFSET; goto extract_sfmt_ld_offset; |
1361 | case 4 : itype = I960BASE_INSN_LDIS_INDIRECT; goto extract_sfmt_ld_indirect; | |
1362 | case 7 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; | |
7a292a7a SS |
1363 | case 8 : /* fall through */ |
1364 | case 9 : /* fall through */ | |
1365 | case 10 : /* fall through */ | |
96baa820 JM |
1366 | case 11 : itype = I960BASE_INSN_LDIS_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; |
1367 | case 12 : itype = I960BASE_INSN_LDIS_DISP; goto extract_sfmt_ld_disp; | |
1368 | case 13 : itype = I960BASE_INSN_LDIS_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; | |
1369 | case 14 : itype = I960BASE_INSN_LDIS_INDEX_DISP; goto extract_sfmt_ld_index_disp; | |
1370 | case 15 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; | |
1371 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 1372 | } |
c906108c | 1373 | } |
96baa820 | 1374 | default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; |
7a292a7a | 1375 | } |
c906108c | 1376 | } |
c906108c SS |
1377 | } |
1378 | ||
1379 | /* The instruction has been decoded, now extract the fields. */ | |
1380 | ||
96baa820 | 1381 | extract_sfmt_empty: |
c906108c | 1382 | { |
7a292a7a | 1383 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1384 | CGEN_INSN_INT insn = base_insn; |
1385 | #define FLD(f) abuf->fields.fmt_empty.f | |
c906108c | 1386 | |
c906108c SS |
1387 | |
1388 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1389 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); |
c906108c SS |
1390 | |
1391 | #undef FLD | |
7a292a7a | 1392 | return idesc; |
c906108c SS |
1393 | } |
1394 | ||
96baa820 | 1395 | extract_sfmt_mulo: |
c906108c | 1396 | { |
7a292a7a | 1397 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1398 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1399 | #define FLD(f) abuf->fields.sfmt_emul.f |
1400 | UINT f_srcdst; | |
1401 | UINT f_src2; | |
1402 | UINT f_src1; | |
c906108c | 1403 | |
96baa820 JM |
1404 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1405 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1406 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1407 | |
1408 | /* Record the fields for the semantic handler. */ | |
1409 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1410 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1411 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1412 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1413 | |
1414 | #if WITH_PROFILE_MODEL_P | |
1415 | /* Record the fields for profiling. */ | |
1416 | if (PROFILE_MODEL_P (current_cpu)) | |
1417 | { | |
1418 | FLD (in_src1) = f_src1; | |
1419 | FLD (in_src2) = f_src2; | |
1420 | FLD (out_dst) = f_srcdst; | |
1421 | } | |
1422 | #endif | |
1423 | #undef FLD | |
7a292a7a | 1424 | return idesc; |
c906108c SS |
1425 | } |
1426 | ||
96baa820 | 1427 | extract_sfmt_mulo1: |
c906108c | 1428 | { |
7a292a7a | 1429 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1430 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1431 | #define FLD(f) abuf->fields.sfmt_emul1.f |
1432 | UINT f_srcdst; | |
1433 | UINT f_src2; | |
1434 | UINT f_src1; | |
c906108c | 1435 | |
96baa820 JM |
1436 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1437 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1438 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1439 | |
1440 | /* Record the fields for the semantic handler. */ | |
1441 | FLD (f_src1) = f_src1; | |
1442 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1443 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1444 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1445 | |
1446 | #if WITH_PROFILE_MODEL_P | |
1447 | /* Record the fields for profiling. */ | |
1448 | if (PROFILE_MODEL_P (current_cpu)) | |
1449 | { | |
1450 | FLD (in_src2) = f_src2; | |
1451 | FLD (out_dst) = f_srcdst; | |
1452 | } | |
1453 | #endif | |
1454 | #undef FLD | |
7a292a7a | 1455 | return idesc; |
c906108c SS |
1456 | } |
1457 | ||
96baa820 | 1458 | extract_sfmt_mulo2: |
c906108c | 1459 | { |
7a292a7a | 1460 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1461 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1462 | #define FLD(f) abuf->fields.sfmt_emul2.f |
1463 | UINT f_srcdst; | |
1464 | UINT f_src2; | |
1465 | UINT f_src1; | |
c906108c | 1466 | |
96baa820 JM |
1467 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1468 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1469 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1470 | |
1471 | /* Record the fields for the semantic handler. */ | |
1472 | FLD (f_src2) = f_src2; | |
1473 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1474 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1475 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1476 | |
1477 | #if WITH_PROFILE_MODEL_P | |
1478 | /* Record the fields for profiling. */ | |
1479 | if (PROFILE_MODEL_P (current_cpu)) | |
1480 | { | |
1481 | FLD (in_src1) = f_src1; | |
1482 | FLD (out_dst) = f_srcdst; | |
1483 | } | |
1484 | #endif | |
1485 | #undef FLD | |
7a292a7a | 1486 | return idesc; |
c906108c SS |
1487 | } |
1488 | ||
96baa820 | 1489 | extract_sfmt_mulo3: |
c906108c | 1490 | { |
7a292a7a | 1491 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1492 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1493 | #define FLD(f) abuf->fields.sfmt_emul3.f |
1494 | UINT f_srcdst; | |
1495 | UINT f_src2; | |
1496 | UINT f_src1; | |
c906108c | 1497 | |
96baa820 JM |
1498 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1499 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1500 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1501 | |
1502 | /* Record the fields for the semantic handler. */ | |
1503 | FLD (f_src1) = f_src1; | |
1504 | FLD (f_src2) = f_src2; | |
1505 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1506 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1507 | |
1508 | #if WITH_PROFILE_MODEL_P | |
1509 | /* Record the fields for profiling. */ | |
1510 | if (PROFILE_MODEL_P (current_cpu)) | |
1511 | { | |
1512 | FLD (out_dst) = f_srcdst; | |
1513 | } | |
1514 | #endif | |
1515 | #undef FLD | |
7a292a7a | 1516 | return idesc; |
c906108c SS |
1517 | } |
1518 | ||
96baa820 | 1519 | extract_sfmt_notbit: |
c906108c | 1520 | { |
7a292a7a | 1521 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1522 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1523 | #define FLD(f) abuf->fields.sfmt_emul.f |
1524 | UINT f_srcdst; | |
1525 | UINT f_src2; | |
1526 | UINT f_src1; | |
c906108c | 1527 | |
96baa820 JM |
1528 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1529 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1530 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1531 | |
1532 | /* Record the fields for the semantic handler. */ | |
1533 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1534 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1535 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1536 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1537 | |
1538 | #if WITH_PROFILE_MODEL_P | |
1539 | /* Record the fields for profiling. */ | |
1540 | if (PROFILE_MODEL_P (current_cpu)) | |
1541 | { | |
1542 | FLD (in_src1) = f_src1; | |
1543 | FLD (in_src2) = f_src2; | |
1544 | FLD (out_dst) = f_srcdst; | |
1545 | } | |
1546 | #endif | |
1547 | #undef FLD | |
7a292a7a | 1548 | return idesc; |
c906108c SS |
1549 | } |
1550 | ||
96baa820 | 1551 | extract_sfmt_notbit1: |
c906108c | 1552 | { |
7a292a7a | 1553 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1554 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1555 | #define FLD(f) abuf->fields.sfmt_emul1.f |
1556 | UINT f_srcdst; | |
1557 | UINT f_src2; | |
1558 | UINT f_src1; | |
c906108c | 1559 | |
96baa820 JM |
1560 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1561 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1562 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1563 | |
1564 | /* Record the fields for the semantic handler. */ | |
1565 | FLD (f_src1) = f_src1; | |
1566 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1567 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1568 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1569 | |
1570 | #if WITH_PROFILE_MODEL_P | |
1571 | /* Record the fields for profiling. */ | |
1572 | if (PROFILE_MODEL_P (current_cpu)) | |
1573 | { | |
1574 | FLD (in_src2) = f_src2; | |
1575 | FLD (out_dst) = f_srcdst; | |
1576 | } | |
1577 | #endif | |
1578 | #undef FLD | |
7a292a7a | 1579 | return idesc; |
c906108c SS |
1580 | } |
1581 | ||
96baa820 | 1582 | extract_sfmt_notbit2: |
c906108c | 1583 | { |
7a292a7a | 1584 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1585 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1586 | #define FLD(f) abuf->fields.sfmt_emul2.f |
1587 | UINT f_srcdst; | |
1588 | UINT f_src2; | |
1589 | UINT f_src1; | |
c906108c | 1590 | |
96baa820 JM |
1591 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1592 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1593 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1594 | |
1595 | /* Record the fields for the semantic handler. */ | |
1596 | FLD (f_src2) = f_src2; | |
1597 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1598 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1599 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1600 | |
1601 | #if WITH_PROFILE_MODEL_P | |
1602 | /* Record the fields for profiling. */ | |
1603 | if (PROFILE_MODEL_P (current_cpu)) | |
1604 | { | |
1605 | FLD (in_src1) = f_src1; | |
1606 | FLD (out_dst) = f_srcdst; | |
1607 | } | |
1608 | #endif | |
1609 | #undef FLD | |
7a292a7a | 1610 | return idesc; |
c906108c SS |
1611 | } |
1612 | ||
96baa820 | 1613 | extract_sfmt_notbit3: |
c906108c | 1614 | { |
7a292a7a | 1615 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1616 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1617 | #define FLD(f) abuf->fields.sfmt_emul3.f |
1618 | UINT f_srcdst; | |
1619 | UINT f_src2; | |
1620 | UINT f_src1; | |
c906108c | 1621 | |
96baa820 JM |
1622 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1623 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1624 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1625 | |
1626 | /* Record the fields for the semantic handler. */ | |
1627 | FLD (f_src1) = f_src1; | |
1628 | FLD (f_src2) = f_src2; | |
1629 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1630 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1631 | |
1632 | #if WITH_PROFILE_MODEL_P | |
1633 | /* Record the fields for profiling. */ | |
1634 | if (PROFILE_MODEL_P (current_cpu)) | |
1635 | { | |
1636 | FLD (out_dst) = f_srcdst; | |
1637 | } | |
1638 | #endif | |
1639 | #undef FLD | |
7a292a7a | 1640 | return idesc; |
c906108c SS |
1641 | } |
1642 | ||
96baa820 | 1643 | extract_sfmt_not: |
c906108c | 1644 | { |
7a292a7a | 1645 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1646 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1647 | #define FLD(f) abuf->fields.sfmt_emul2.f |
1648 | UINT f_srcdst; | |
1649 | UINT f_src1; | |
c906108c | 1650 | |
96baa820 JM |
1651 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1652 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1653 | |
1654 | /* Record the fields for the semantic handler. */ | |
1655 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1656 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1657 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_not", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1658 | |
1659 | #if WITH_PROFILE_MODEL_P | |
1660 | /* Record the fields for profiling. */ | |
1661 | if (PROFILE_MODEL_P (current_cpu)) | |
1662 | { | |
1663 | FLD (in_src1) = f_src1; | |
1664 | FLD (out_dst) = f_srcdst; | |
1665 | } | |
1666 | #endif | |
1667 | #undef FLD | |
7a292a7a | 1668 | return idesc; |
c906108c SS |
1669 | } |
1670 | ||
96baa820 | 1671 | extract_sfmt_not1: |
c906108c | 1672 | { |
7a292a7a | 1673 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1674 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1675 | #define FLD(f) abuf->fields.sfmt_emul3.f |
1676 | UINT f_srcdst; | |
1677 | UINT f_src1; | |
c906108c | 1678 | |
96baa820 JM |
1679 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1680 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1681 | |
1682 | /* Record the fields for the semantic handler. */ | |
1683 | FLD (f_src1) = f_src1; | |
1684 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1685 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_not1", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1686 | |
1687 | #if WITH_PROFILE_MODEL_P | |
1688 | /* Record the fields for profiling. */ | |
1689 | if (PROFILE_MODEL_P (current_cpu)) | |
1690 | { | |
1691 | FLD (out_dst) = f_srcdst; | |
1692 | } | |
1693 | #endif | |
1694 | #undef FLD | |
7a292a7a SS |
1695 | return idesc; |
1696 | } | |
1697 | ||
96baa820 | 1698 | extract_sfmt_shlo: |
7a292a7a SS |
1699 | { |
1700 | const IDESC *idesc = &i960base_insn_data[itype]; | |
1701 | CGEN_INSN_INT insn = base_insn; | |
96baa820 JM |
1702 | #define FLD(f) abuf->fields.sfmt_emul.f |
1703 | UINT f_srcdst; | |
1704 | UINT f_src2; | |
1705 | UINT f_src1; | |
7a292a7a | 1706 | |
96baa820 JM |
1707 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1708 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1709 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
7a292a7a SS |
1710 | |
1711 | /* Record the fields for the semantic handler. */ | |
1712 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1713 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1714 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1715 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
7a292a7a SS |
1716 | |
1717 | #if WITH_PROFILE_MODEL_P | |
1718 | /* Record the fields for profiling. */ | |
1719 | if (PROFILE_MODEL_P (current_cpu)) | |
1720 | { | |
1721 | FLD (in_src1) = f_src1; | |
1722 | FLD (in_src2) = f_src2; | |
1723 | FLD (out_dst) = f_srcdst; | |
1724 | } | |
1725 | #endif | |
1726 | #undef FLD | |
1727 | return idesc; | |
1728 | } | |
1729 | ||
96baa820 | 1730 | extract_sfmt_shlo1: |
7a292a7a SS |
1731 | { |
1732 | const IDESC *idesc = &i960base_insn_data[itype]; | |
1733 | CGEN_INSN_INT insn = base_insn; | |
96baa820 JM |
1734 | #define FLD(f) abuf->fields.sfmt_emul1.f |
1735 | UINT f_srcdst; | |
1736 | UINT f_src2; | |
1737 | UINT f_src1; | |
7a292a7a | 1738 | |
96baa820 JM |
1739 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1740 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1741 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
7a292a7a SS |
1742 | |
1743 | /* Record the fields for the semantic handler. */ | |
1744 | FLD (f_src1) = f_src1; | |
1745 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1746 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1747 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
7a292a7a SS |
1748 | |
1749 | #if WITH_PROFILE_MODEL_P | |
1750 | /* Record the fields for profiling. */ | |
1751 | if (PROFILE_MODEL_P (current_cpu)) | |
1752 | { | |
1753 | FLD (in_src2) = f_src2; | |
1754 | FLD (out_dst) = f_srcdst; | |
1755 | } | |
1756 | #endif | |
1757 | #undef FLD | |
1758 | return idesc; | |
c906108c SS |
1759 | } |
1760 | ||
96baa820 | 1761 | extract_sfmt_shlo2: |
c906108c | 1762 | { |
7a292a7a SS |
1763 | const IDESC *idesc = &i960base_insn_data[itype]; |
1764 | CGEN_INSN_INT insn = base_insn; | |
96baa820 JM |
1765 | #define FLD(f) abuf->fields.sfmt_emul2.f |
1766 | UINT f_srcdst; | |
1767 | UINT f_src2; | |
1768 | UINT f_src1; | |
7a292a7a | 1769 | |
96baa820 JM |
1770 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1771 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1772 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
7a292a7a SS |
1773 | |
1774 | /* Record the fields for the semantic handler. */ | |
1775 | FLD (f_src2) = f_src2; | |
1776 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1777 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1778 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
7a292a7a SS |
1779 | |
1780 | #if WITH_PROFILE_MODEL_P | |
1781 | /* Record the fields for profiling. */ | |
1782 | if (PROFILE_MODEL_P (current_cpu)) | |
1783 | { | |
1784 | FLD (in_src1) = f_src1; | |
1785 | FLD (out_dst) = f_srcdst; | |
1786 | } | |
1787 | #endif | |
1788 | #undef FLD | |
1789 | return idesc; | |
1790 | } | |
1791 | ||
96baa820 | 1792 | extract_sfmt_shlo3: |
7a292a7a SS |
1793 | { |
1794 | const IDESC *idesc = &i960base_insn_data[itype]; | |
1795 | CGEN_INSN_INT insn = base_insn; | |
96baa820 JM |
1796 | #define FLD(f) abuf->fields.sfmt_emul3.f |
1797 | UINT f_srcdst; | |
1798 | UINT f_src2; | |
1799 | UINT f_src1; | |
7a292a7a | 1800 | |
96baa820 JM |
1801 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1802 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1803 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
7a292a7a SS |
1804 | |
1805 | /* Record the fields for the semantic handler. */ | |
1806 | FLD (f_src1) = f_src1; | |
1807 | FLD (f_src2) = f_src2; | |
1808 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1809 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
7a292a7a SS |
1810 | |
1811 | #if WITH_PROFILE_MODEL_P | |
1812 | /* Record the fields for profiling. */ | |
1813 | if (PROFILE_MODEL_P (current_cpu)) | |
1814 | { | |
1815 | FLD (out_dst) = f_srcdst; | |
1816 | } | |
1817 | #endif | |
1818 | #undef FLD | |
1819 | return idesc; | |
1820 | } | |
1821 | ||
96baa820 | 1822 | extract_sfmt_emul: |
7a292a7a SS |
1823 | { |
1824 | const IDESC *idesc = &i960base_insn_data[itype]; | |
c906108c | 1825 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1826 | #define FLD(f) abuf->fields.sfmt_emul.f |
1827 | UINT f_srcdst; | |
1828 | UINT f_src2; | |
1829 | UINT f_src1; | |
c906108c | 1830 | |
96baa820 JM |
1831 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1832 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1833 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1834 | |
1835 | /* Record the fields for the semantic handler. */ | |
1836 | FLD (f_srcdst) = f_srcdst; | |
1837 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1838 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1839 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1840 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul", "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1841 | |
1842 | #if WITH_PROFILE_MODEL_P | |
1843 | /* Record the fields for profiling. */ | |
1844 | if (PROFILE_MODEL_P (current_cpu)) | |
1845 | { | |
1846 | FLD (in_src1) = f_src1; | |
1847 | FLD (in_src2) = f_src2; | |
1848 | FLD (out_dst) = f_srcdst; | |
104c1213 | 1849 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
1850 | } |
1851 | #endif | |
1852 | #undef FLD | |
7a292a7a | 1853 | return idesc; |
c906108c SS |
1854 | } |
1855 | ||
96baa820 | 1856 | extract_sfmt_emul1: |
c906108c | 1857 | { |
7a292a7a | 1858 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1859 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1860 | #define FLD(f) abuf->fields.sfmt_emul1.f |
1861 | UINT f_srcdst; | |
1862 | UINT f_src2; | |
1863 | UINT f_src1; | |
c906108c | 1864 | |
96baa820 JM |
1865 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1866 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1867 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1868 | |
1869 | /* Record the fields for the semantic handler. */ | |
1870 | FLD (f_srcdst) = f_srcdst; | |
1871 | FLD (f_src1) = f_src1; | |
1872 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1873 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1874 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1875 | |
1876 | #if WITH_PROFILE_MODEL_P | |
1877 | /* Record the fields for profiling. */ | |
1878 | if (PROFILE_MODEL_P (current_cpu)) | |
1879 | { | |
1880 | FLD (in_src2) = f_src2; | |
1881 | FLD (out_dst) = f_srcdst; | |
104c1213 | 1882 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
1883 | } |
1884 | #endif | |
1885 | #undef FLD | |
7a292a7a | 1886 | return idesc; |
c906108c SS |
1887 | } |
1888 | ||
96baa820 | 1889 | extract_sfmt_emul2: |
c906108c | 1890 | { |
7a292a7a | 1891 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1892 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1893 | #define FLD(f) abuf->fields.sfmt_emul2.f |
1894 | UINT f_srcdst; | |
1895 | UINT f_src2; | |
1896 | UINT f_src1; | |
c906108c | 1897 | |
96baa820 JM |
1898 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1899 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1900 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1901 | |
1902 | /* Record the fields for the semantic handler. */ | |
1903 | FLD (f_srcdst) = f_srcdst; | |
1904 | FLD (f_src2) = f_src2; | |
1905 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1906 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1907 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul2", "f_srcdst 0x%x", 'x', f_srcdst, "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1908 | |
1909 | #if WITH_PROFILE_MODEL_P | |
1910 | /* Record the fields for profiling. */ | |
1911 | if (PROFILE_MODEL_P (current_cpu)) | |
1912 | { | |
1913 | FLD (in_src1) = f_src1; | |
1914 | FLD (out_dst) = f_srcdst; | |
104c1213 | 1915 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
1916 | } |
1917 | #endif | |
1918 | #undef FLD | |
7a292a7a | 1919 | return idesc; |
c906108c SS |
1920 | } |
1921 | ||
96baa820 | 1922 | extract_sfmt_emul3: |
c906108c | 1923 | { |
7a292a7a | 1924 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1925 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1926 | #define FLD(f) abuf->fields.sfmt_emul3.f |
1927 | UINT f_srcdst; | |
1928 | UINT f_src2; | |
1929 | UINT f_src1; | |
c906108c | 1930 | |
96baa820 JM |
1931 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1932 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
1933 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1934 | |
1935 | /* Record the fields for the semantic handler. */ | |
1936 | FLD (f_srcdst) = f_srcdst; | |
1937 | FLD (f_src1) = f_src1; | |
1938 | FLD (f_src2) = f_src2; | |
1939 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1940 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul3", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1941 | |
1942 | #if WITH_PROFILE_MODEL_P | |
1943 | /* Record the fields for profiling. */ | |
1944 | if (PROFILE_MODEL_P (current_cpu)) | |
1945 | { | |
1946 | FLD (out_dst) = f_srcdst; | |
104c1213 | 1947 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
1948 | } |
1949 | #endif | |
1950 | #undef FLD | |
7a292a7a | 1951 | return idesc; |
c906108c SS |
1952 | } |
1953 | ||
96baa820 | 1954 | extract_sfmt_movl: |
c906108c | 1955 | { |
7a292a7a | 1956 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1957 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1958 | #define FLD(f) abuf->fields.sfmt_movq.f |
1959 | UINT f_srcdst; | |
1960 | UINT f_src1; | |
c906108c | 1961 | |
96baa820 JM |
1962 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1963 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1964 | |
1965 | /* Record the fields for the semantic handler. */ | |
1966 | FLD (f_src1) = f_src1; | |
1967 | FLD (f_srcdst) = f_srcdst; | |
1968 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1969 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 1970 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
1971 | |
1972 | #if WITH_PROFILE_MODEL_P | |
1973 | /* Record the fields for profiling. */ | |
1974 | if (PROFILE_MODEL_P (current_cpu)) | |
1975 | { | |
104c1213 | 1976 | FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_1) = ((FLD (f_src1)) + (1)); |
c906108c SS |
1977 | FLD (in_src1) = f_src1; |
1978 | FLD (out_dst) = f_srcdst; | |
104c1213 | 1979 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
1980 | } |
1981 | #endif | |
1982 | #undef FLD | |
7a292a7a | 1983 | return idesc; |
c906108c SS |
1984 | } |
1985 | ||
96baa820 | 1986 | extract_sfmt_movl1: |
c906108c | 1987 | { |
7a292a7a | 1988 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 1989 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
1990 | #define FLD(f) abuf->fields.sfmt_emul3.f |
1991 | UINT f_srcdst; | |
1992 | UINT f_src1; | |
c906108c | 1993 | |
96baa820 JM |
1994 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
1995 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
1996 | |
1997 | /* Record the fields for the semantic handler. */ | |
1998 | FLD (f_srcdst) = f_srcdst; | |
1999 | FLD (f_src1) = f_src1; | |
2000 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2001 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2002 | |
2003 | #if WITH_PROFILE_MODEL_P | |
2004 | /* Record the fields for profiling. */ | |
2005 | if (PROFILE_MODEL_P (current_cpu)) | |
2006 | { | |
2007 | FLD (out_dst) = f_srcdst; | |
104c1213 | 2008 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
2009 | } |
2010 | #endif | |
2011 | #undef FLD | |
7a292a7a | 2012 | return idesc; |
c906108c SS |
2013 | } |
2014 | ||
96baa820 | 2015 | extract_sfmt_movt: |
c906108c | 2016 | { |
7a292a7a | 2017 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2018 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2019 | #define FLD(f) abuf->fields.sfmt_movq.f |
2020 | UINT f_srcdst; | |
2021 | UINT f_src1; | |
c906108c | 2022 | |
96baa820 JM |
2023 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2024 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2025 | |
2026 | /* Record the fields for the semantic handler. */ | |
2027 | FLD (f_src1) = f_src1; | |
2028 | FLD (f_srcdst) = f_srcdst; | |
2029 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
2030 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2031 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2032 | |
2033 | #if WITH_PROFILE_MODEL_P | |
2034 | /* Record the fields for profiling. */ | |
2035 | if (PROFILE_MODEL_P (current_cpu)) | |
2036 | { | |
104c1213 JM |
2037 | FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_1) = ((FLD (f_src1)) + (1)); |
2038 | FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_2) = ((FLD (f_src1)) + (2)); | |
c906108c SS |
2039 | FLD (in_src1) = f_src1; |
2040 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
2041 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
2042 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
2043 | } |
2044 | #endif | |
2045 | #undef FLD | |
7a292a7a | 2046 | return idesc; |
c906108c SS |
2047 | } |
2048 | ||
96baa820 | 2049 | extract_sfmt_movt1: |
c906108c | 2050 | { |
7a292a7a | 2051 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2052 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2053 | #define FLD(f) abuf->fields.sfmt_movq.f |
2054 | UINT f_srcdst; | |
2055 | UINT f_src1; | |
c906108c | 2056 | |
96baa820 JM |
2057 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2058 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2059 | |
2060 | /* Record the fields for the semantic handler. */ | |
2061 | FLD (f_srcdst) = f_srcdst; | |
2062 | FLD (f_src1) = f_src1; | |
2063 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2064 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2065 | |
2066 | #if WITH_PROFILE_MODEL_P | |
2067 | /* Record the fields for profiling. */ | |
2068 | if (PROFILE_MODEL_P (current_cpu)) | |
2069 | { | |
2070 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
2071 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
2072 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
2073 | } |
2074 | #endif | |
2075 | #undef FLD | |
7a292a7a | 2076 | return idesc; |
c906108c SS |
2077 | } |
2078 | ||
96baa820 | 2079 | extract_sfmt_movq: |
c906108c | 2080 | { |
7a292a7a | 2081 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2082 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2083 | #define FLD(f) abuf->fields.sfmt_movq.f |
2084 | UINT f_srcdst; | |
2085 | UINT f_src1; | |
c906108c | 2086 | |
96baa820 JM |
2087 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2088 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2089 | |
2090 | /* Record the fields for the semantic handler. */ | |
2091 | FLD (f_src1) = f_src1; | |
2092 | FLD (f_srcdst) = f_srcdst; | |
2093 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
2094 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2095 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movq", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2096 | |
2097 | #if WITH_PROFILE_MODEL_P | |
2098 | /* Record the fields for profiling. */ | |
2099 | if (PROFILE_MODEL_P (current_cpu)) | |
2100 | { | |
104c1213 JM |
2101 | FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_1) = ((FLD (f_src1)) + (1)); |
2102 | FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_2) = ((FLD (f_src1)) + (2)); | |
2103 | FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_3) = ((FLD (f_src1)) + (3)); | |
c906108c SS |
2104 | FLD (in_src1) = f_src1; |
2105 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
2106 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
2107 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
2108 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
2109 | } |
2110 | #endif | |
2111 | #undef FLD | |
7a292a7a | 2112 | return idesc; |
c906108c SS |
2113 | } |
2114 | ||
96baa820 | 2115 | extract_sfmt_movq1: |
c906108c | 2116 | { |
7a292a7a | 2117 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2118 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2119 | #define FLD(f) abuf->fields.sfmt_movq.f |
2120 | UINT f_srcdst; | |
2121 | UINT f_src1; | |
c906108c | 2122 | |
96baa820 JM |
2123 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2124 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2125 | |
2126 | /* Record the fields for the semantic handler. */ | |
2127 | FLD (f_srcdst) = f_srcdst; | |
2128 | FLD (f_src1) = f_src1; | |
2129 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2130 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movq1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2131 | |
2132 | #if WITH_PROFILE_MODEL_P | |
2133 | /* Record the fields for profiling. */ | |
2134 | if (PROFILE_MODEL_P (current_cpu)) | |
2135 | { | |
2136 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
2137 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
2138 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
2139 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
2140 | } |
2141 | #endif | |
2142 | #undef FLD | |
7a292a7a | 2143 | return idesc; |
c906108c SS |
2144 | } |
2145 | ||
96baa820 | 2146 | extract_sfmt_modpc: |
c906108c | 2147 | { |
7a292a7a | 2148 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2149 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2150 | #define FLD(f) abuf->fields.sfmt_emul1.f |
2151 | UINT f_srcdst; | |
2152 | UINT f_src2; | |
c906108c | 2153 | |
96baa820 JM |
2154 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2155 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
2156 | |
2157 | /* Record the fields for the semantic handler. */ | |
2158 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
2159 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2160 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_modpc", "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2161 | |
2162 | #if WITH_PROFILE_MODEL_P | |
2163 | /* Record the fields for profiling. */ | |
2164 | if (PROFILE_MODEL_P (current_cpu)) | |
2165 | { | |
2166 | FLD (in_src2) = f_src2; | |
2167 | FLD (out_dst) = f_srcdst; | |
2168 | } | |
2169 | #endif | |
2170 | #undef FLD | |
7a292a7a | 2171 | return idesc; |
c906108c SS |
2172 | } |
2173 | ||
96baa820 | 2174 | extract_sfmt_lda_offset: |
c906108c | 2175 | { |
7a292a7a | 2176 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2177 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2178 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
2179 | UINT f_srcdst; | |
2180 | UINT f_offset; | |
c906108c | 2181 | |
96baa820 JM |
2182 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2183 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
2184 | |
2185 | /* Record the fields for the semantic handler. */ | |
2186 | FLD (f_offset) = f_offset; | |
2187 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2188 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2189 | |
2190 | #if WITH_PROFILE_MODEL_P | |
2191 | /* Record the fields for profiling. */ | |
2192 | if (PROFILE_MODEL_P (current_cpu)) | |
2193 | { | |
2194 | FLD (out_dst) = f_srcdst; | |
2195 | } | |
2196 | #endif | |
2197 | #undef FLD | |
7a292a7a | 2198 | return idesc; |
c906108c SS |
2199 | } |
2200 | ||
96baa820 | 2201 | extract_sfmt_lda_indirect_offset: |
c906108c | 2202 | { |
7a292a7a | 2203 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2204 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2205 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
2206 | UINT f_srcdst; | |
2207 | UINT f_abase; | |
2208 | UINT f_offset; | |
c906108c | 2209 | |
96baa820 JM |
2210 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2211 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
2212 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
2213 | |
2214 | /* Record the fields for the semantic handler. */ | |
2215 | FLD (f_offset) = f_offset; | |
2216 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2217 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2218 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2219 | |
2220 | #if WITH_PROFILE_MODEL_P | |
2221 | /* Record the fields for profiling. */ | |
2222 | if (PROFILE_MODEL_P (current_cpu)) | |
2223 | { | |
2224 | FLD (in_abase) = f_abase; | |
2225 | FLD (out_dst) = f_srcdst; | |
2226 | } | |
2227 | #endif | |
2228 | #undef FLD | |
7a292a7a | 2229 | return idesc; |
c906108c SS |
2230 | } |
2231 | ||
96baa820 | 2232 | extract_sfmt_lda_indirect: |
c906108c | 2233 | { |
7a292a7a | 2234 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2235 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2236 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
2237 | UINT f_srcdst; | |
2238 | UINT f_abase; | |
c906108c | 2239 | |
96baa820 JM |
2240 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2241 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
2242 | |
2243 | /* Record the fields for the semantic handler. */ | |
2244 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2245 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2246 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2247 | |
2248 | #if WITH_PROFILE_MODEL_P | |
2249 | /* Record the fields for profiling. */ | |
2250 | if (PROFILE_MODEL_P (current_cpu)) | |
2251 | { | |
2252 | FLD (in_abase) = f_abase; | |
2253 | FLD (out_dst) = f_srcdst; | |
2254 | } | |
2255 | #endif | |
2256 | #undef FLD | |
7a292a7a | 2257 | return idesc; |
c906108c SS |
2258 | } |
2259 | ||
96baa820 | 2260 | extract_sfmt_lda_indirect_index: |
c906108c | 2261 | { |
7a292a7a | 2262 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2263 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2264 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2265 | UINT f_srcdst; | |
2266 | UINT f_abase; | |
2267 | UINT f_scale; | |
2268 | UINT f_index; | |
c906108c | 2269 | |
96baa820 JM |
2270 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2271 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
2272 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
2273 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2274 | |
2275 | /* Record the fields for the semantic handler. */ | |
2276 | FLD (f_scale) = f_scale; | |
2277 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2278 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2279 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2280 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2281 | |
2282 | #if WITH_PROFILE_MODEL_P | |
2283 | /* Record the fields for profiling. */ | |
2284 | if (PROFILE_MODEL_P (current_cpu)) | |
2285 | { | |
2286 | FLD (in_abase) = f_abase; | |
2287 | FLD (in_index) = f_index; | |
2288 | FLD (out_dst) = f_srcdst; | |
2289 | } | |
2290 | #endif | |
2291 | #undef FLD | |
7a292a7a | 2292 | return idesc; |
c906108c SS |
2293 | } |
2294 | ||
96baa820 | 2295 | extract_sfmt_lda_disp: |
c906108c | 2296 | { |
7a292a7a | 2297 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2298 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2299 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2300 | UINT f_optdisp; | |
2301 | UINT f_srcdst; | |
2302 | /* Contents of trailing part of insn. */ | |
2303 | UINT word_1; | |
c906108c | 2304 | |
96baa820 JM |
2305 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2306 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2307 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
c906108c SS |
2308 | |
2309 | /* Record the fields for the semantic handler. */ | |
2310 | FLD (f_optdisp) = f_optdisp; | |
2311 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2312 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2313 | |
2314 | #if WITH_PROFILE_MODEL_P | |
2315 | /* Record the fields for profiling. */ | |
2316 | if (PROFILE_MODEL_P (current_cpu)) | |
2317 | { | |
2318 | FLD (out_dst) = f_srcdst; | |
2319 | } | |
2320 | #endif | |
2321 | #undef FLD | |
7a292a7a | 2322 | return idesc; |
c906108c SS |
2323 | } |
2324 | ||
96baa820 | 2325 | extract_sfmt_lda_indirect_disp: |
c906108c | 2326 | { |
7a292a7a | 2327 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2328 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2329 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2330 | UINT f_optdisp; | |
2331 | UINT f_srcdst; | |
2332 | UINT f_abase; | |
2333 | /* Contents of trailing part of insn. */ | |
2334 | UINT word_1; | |
c906108c | 2335 | |
96baa820 JM |
2336 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2337 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2338 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
2339 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
2340 | |
2341 | /* Record the fields for the semantic handler. */ | |
2342 | FLD (f_optdisp) = f_optdisp; | |
2343 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2344 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2345 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2346 | |
2347 | #if WITH_PROFILE_MODEL_P | |
2348 | /* Record the fields for profiling. */ | |
2349 | if (PROFILE_MODEL_P (current_cpu)) | |
2350 | { | |
2351 | FLD (in_abase) = f_abase; | |
2352 | FLD (out_dst) = f_srcdst; | |
2353 | } | |
2354 | #endif | |
2355 | #undef FLD | |
7a292a7a | 2356 | return idesc; |
c906108c SS |
2357 | } |
2358 | ||
96baa820 | 2359 | extract_sfmt_lda_index_disp: |
c906108c | 2360 | { |
7a292a7a | 2361 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2362 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2363 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2364 | UINT f_optdisp; | |
2365 | UINT f_srcdst; | |
2366 | UINT f_scale; | |
2367 | UINT f_index; | |
2368 | /* Contents of trailing part of insn. */ | |
2369 | UINT word_1; | |
c906108c | 2370 | |
96baa820 JM |
2371 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2372 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2373 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
2374 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
2375 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2376 | |
2377 | /* Record the fields for the semantic handler. */ | |
2378 | FLD (f_optdisp) = f_optdisp; | |
2379 | FLD (f_scale) = f_scale; | |
2380 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2381 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2382 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2383 | |
2384 | #if WITH_PROFILE_MODEL_P | |
2385 | /* Record the fields for profiling. */ | |
2386 | if (PROFILE_MODEL_P (current_cpu)) | |
2387 | { | |
2388 | FLD (in_index) = f_index; | |
2389 | FLD (out_dst) = f_srcdst; | |
2390 | } | |
2391 | #endif | |
2392 | #undef FLD | |
7a292a7a | 2393 | return idesc; |
c906108c SS |
2394 | } |
2395 | ||
96baa820 | 2396 | extract_sfmt_lda_indirect_index_disp: |
c906108c | 2397 | { |
7a292a7a | 2398 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2399 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2400 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2401 | UINT f_optdisp; | |
2402 | UINT f_srcdst; | |
2403 | UINT f_abase; | |
2404 | UINT f_scale; | |
2405 | UINT f_index; | |
2406 | /* Contents of trailing part of insn. */ | |
2407 | UINT word_1; | |
c906108c | 2408 | |
96baa820 JM |
2409 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2410 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2411 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
2412 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
2413 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
2414 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2415 | |
2416 | /* Record the fields for the semantic handler. */ | |
2417 | FLD (f_optdisp) = f_optdisp; | |
2418 | FLD (f_scale) = f_scale; | |
2419 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2420 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2421 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2422 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2423 | |
2424 | #if WITH_PROFILE_MODEL_P | |
2425 | /* Record the fields for profiling. */ | |
2426 | if (PROFILE_MODEL_P (current_cpu)) | |
2427 | { | |
2428 | FLD (in_abase) = f_abase; | |
2429 | FLD (in_index) = f_index; | |
2430 | FLD (out_dst) = f_srcdst; | |
2431 | } | |
2432 | #endif | |
2433 | #undef FLD | |
7a292a7a | 2434 | return idesc; |
c906108c SS |
2435 | } |
2436 | ||
96baa820 | 2437 | extract_sfmt_ld_offset: |
c906108c | 2438 | { |
7a292a7a | 2439 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2440 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2441 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
2442 | UINT f_srcdst; | |
2443 | UINT f_offset; | |
c906108c | 2444 | |
96baa820 JM |
2445 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2446 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
2447 | |
2448 | /* Record the fields for the semantic handler. */ | |
2449 | FLD (f_offset) = f_offset; | |
2450 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2451 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2452 | |
2453 | #if WITH_PROFILE_MODEL_P | |
2454 | /* Record the fields for profiling. */ | |
2455 | if (PROFILE_MODEL_P (current_cpu)) | |
2456 | { | |
2457 | FLD (out_dst) = f_srcdst; | |
2458 | } | |
2459 | #endif | |
2460 | #undef FLD | |
7a292a7a | 2461 | return idesc; |
c906108c SS |
2462 | } |
2463 | ||
96baa820 | 2464 | extract_sfmt_ld_indirect_offset: |
c906108c | 2465 | { |
7a292a7a | 2466 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2467 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2468 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
2469 | UINT f_srcdst; | |
2470 | UINT f_abase; | |
2471 | UINT f_offset; | |
c906108c | 2472 | |
96baa820 JM |
2473 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2474 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
2475 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
2476 | |
2477 | /* Record the fields for the semantic handler. */ | |
2478 | FLD (f_offset) = f_offset; | |
2479 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2480 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2481 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2482 | |
2483 | #if WITH_PROFILE_MODEL_P | |
2484 | /* Record the fields for profiling. */ | |
2485 | if (PROFILE_MODEL_P (current_cpu)) | |
2486 | { | |
2487 | FLD (in_abase) = f_abase; | |
2488 | FLD (out_dst) = f_srcdst; | |
2489 | } | |
2490 | #endif | |
2491 | #undef FLD | |
7a292a7a | 2492 | return idesc; |
c906108c SS |
2493 | } |
2494 | ||
96baa820 | 2495 | extract_sfmt_ld_indirect: |
c906108c | 2496 | { |
7a292a7a | 2497 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2498 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2499 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
2500 | UINT f_srcdst; | |
2501 | UINT f_abase; | |
c906108c | 2502 | |
96baa820 JM |
2503 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2504 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
2505 | |
2506 | /* Record the fields for the semantic handler. */ | |
2507 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2508 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2509 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2510 | |
2511 | #if WITH_PROFILE_MODEL_P | |
2512 | /* Record the fields for profiling. */ | |
2513 | if (PROFILE_MODEL_P (current_cpu)) | |
2514 | { | |
2515 | FLD (in_abase) = f_abase; | |
2516 | FLD (out_dst) = f_srcdst; | |
2517 | } | |
2518 | #endif | |
2519 | #undef FLD | |
7a292a7a | 2520 | return idesc; |
c906108c SS |
2521 | } |
2522 | ||
96baa820 | 2523 | extract_sfmt_ld_indirect_index: |
c906108c | 2524 | { |
7a292a7a | 2525 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2526 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2527 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2528 | UINT f_srcdst; | |
2529 | UINT f_abase; | |
2530 | UINT f_scale; | |
2531 | UINT f_index; | |
c906108c | 2532 | |
96baa820 JM |
2533 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2534 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
2535 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
2536 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2537 | |
2538 | /* Record the fields for the semantic handler. */ | |
2539 | FLD (f_scale) = f_scale; | |
2540 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2541 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2542 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2543 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2544 | |
2545 | #if WITH_PROFILE_MODEL_P | |
2546 | /* Record the fields for profiling. */ | |
2547 | if (PROFILE_MODEL_P (current_cpu)) | |
2548 | { | |
2549 | FLD (in_abase) = f_abase; | |
2550 | FLD (in_index) = f_index; | |
2551 | FLD (out_dst) = f_srcdst; | |
2552 | } | |
2553 | #endif | |
2554 | #undef FLD | |
7a292a7a | 2555 | return idesc; |
c906108c SS |
2556 | } |
2557 | ||
96baa820 | 2558 | extract_sfmt_ld_disp: |
c906108c | 2559 | { |
7a292a7a | 2560 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2561 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2562 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2563 | UINT f_optdisp; | |
2564 | UINT f_srcdst; | |
2565 | /* Contents of trailing part of insn. */ | |
2566 | UINT word_1; | |
c906108c | 2567 | |
96baa820 JM |
2568 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2569 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2570 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
c906108c SS |
2571 | |
2572 | /* Record the fields for the semantic handler. */ | |
2573 | FLD (f_optdisp) = f_optdisp; | |
2574 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2575 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2576 | |
2577 | #if WITH_PROFILE_MODEL_P | |
2578 | /* Record the fields for profiling. */ | |
2579 | if (PROFILE_MODEL_P (current_cpu)) | |
2580 | { | |
2581 | FLD (out_dst) = f_srcdst; | |
2582 | } | |
2583 | #endif | |
2584 | #undef FLD | |
7a292a7a | 2585 | return idesc; |
c906108c SS |
2586 | } |
2587 | ||
96baa820 | 2588 | extract_sfmt_ld_indirect_disp: |
c906108c | 2589 | { |
7a292a7a | 2590 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2591 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2592 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2593 | UINT f_optdisp; | |
2594 | UINT f_srcdst; | |
2595 | UINT f_abase; | |
2596 | /* Contents of trailing part of insn. */ | |
2597 | UINT word_1; | |
c906108c | 2598 | |
96baa820 JM |
2599 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2600 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2601 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
2602 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
2603 | |
2604 | /* Record the fields for the semantic handler. */ | |
2605 | FLD (f_optdisp) = f_optdisp; | |
2606 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2607 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2608 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2609 | |
2610 | #if WITH_PROFILE_MODEL_P | |
2611 | /* Record the fields for profiling. */ | |
2612 | if (PROFILE_MODEL_P (current_cpu)) | |
2613 | { | |
2614 | FLD (in_abase) = f_abase; | |
2615 | FLD (out_dst) = f_srcdst; | |
2616 | } | |
2617 | #endif | |
2618 | #undef FLD | |
7a292a7a | 2619 | return idesc; |
c906108c SS |
2620 | } |
2621 | ||
96baa820 | 2622 | extract_sfmt_ld_index_disp: |
c906108c | 2623 | { |
7a292a7a | 2624 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2625 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2626 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2627 | UINT f_optdisp; | |
2628 | UINT f_srcdst; | |
2629 | UINT f_scale; | |
2630 | UINT f_index; | |
2631 | /* Contents of trailing part of insn. */ | |
2632 | UINT word_1; | |
c906108c | 2633 | |
96baa820 JM |
2634 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2635 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2636 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
2637 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
2638 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2639 | |
2640 | /* Record the fields for the semantic handler. */ | |
2641 | FLD (f_optdisp) = f_optdisp; | |
2642 | FLD (f_scale) = f_scale; | |
2643 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2644 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2645 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2646 | |
2647 | #if WITH_PROFILE_MODEL_P | |
2648 | /* Record the fields for profiling. */ | |
2649 | if (PROFILE_MODEL_P (current_cpu)) | |
2650 | { | |
2651 | FLD (in_index) = f_index; | |
2652 | FLD (out_dst) = f_srcdst; | |
2653 | } | |
2654 | #endif | |
2655 | #undef FLD | |
7a292a7a | 2656 | return idesc; |
c906108c SS |
2657 | } |
2658 | ||
96baa820 | 2659 | extract_sfmt_ld_indirect_index_disp: |
c906108c | 2660 | { |
7a292a7a | 2661 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2662 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2663 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2664 | UINT f_optdisp; | |
2665 | UINT f_srcdst; | |
2666 | UINT f_abase; | |
2667 | UINT f_scale; | |
2668 | UINT f_index; | |
2669 | /* Contents of trailing part of insn. */ | |
2670 | UINT word_1; | |
c906108c | 2671 | |
96baa820 JM |
2672 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2673 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2674 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
2675 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
2676 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
2677 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2678 | |
2679 | /* Record the fields for the semantic handler. */ | |
2680 | FLD (f_optdisp) = f_optdisp; | |
2681 | FLD (f_scale) = f_scale; | |
2682 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2683 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2684 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2685 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2686 | |
2687 | #if WITH_PROFILE_MODEL_P | |
2688 | /* Record the fields for profiling. */ | |
2689 | if (PROFILE_MODEL_P (current_cpu)) | |
2690 | { | |
2691 | FLD (in_abase) = f_abase; | |
2692 | FLD (in_index) = f_index; | |
2693 | FLD (out_dst) = f_srcdst; | |
2694 | } | |
2695 | #endif | |
2696 | #undef FLD | |
7a292a7a | 2697 | return idesc; |
c906108c SS |
2698 | } |
2699 | ||
96baa820 | 2700 | extract_sfmt_ldl_offset: |
c906108c | 2701 | { |
7a292a7a | 2702 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2703 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2704 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
2705 | UINT f_srcdst; | |
2706 | UINT f_offset; | |
c906108c | 2707 | |
96baa820 JM |
2708 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2709 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
2710 | |
2711 | /* Record the fields for the semantic handler. */ | |
96baa820 | 2712 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
2713 | FLD (f_offset) = f_offset; |
2714 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2715 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2716 | |
2717 | #if WITH_PROFILE_MODEL_P | |
2718 | /* Record the fields for profiling. */ | |
2719 | if (PROFILE_MODEL_P (current_cpu)) | |
2720 | { | |
2721 | FLD (out_dst) = f_srcdst; | |
104c1213 | 2722 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
2723 | } |
2724 | #endif | |
2725 | #undef FLD | |
7a292a7a | 2726 | return idesc; |
c906108c SS |
2727 | } |
2728 | ||
96baa820 | 2729 | extract_sfmt_ldl_indirect_offset: |
c906108c | 2730 | { |
7a292a7a | 2731 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2732 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2733 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
2734 | UINT f_srcdst; | |
2735 | UINT f_abase; | |
2736 | UINT f_offset; | |
c906108c | 2737 | |
96baa820 JM |
2738 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2739 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
2740 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
2741 | |
2742 | /* Record the fields for the semantic handler. */ | |
96baa820 | 2743 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
2744 | FLD (f_offset) = f_offset; |
2745 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2746 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2747 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2748 | |
2749 | #if WITH_PROFILE_MODEL_P | |
2750 | /* Record the fields for profiling. */ | |
2751 | if (PROFILE_MODEL_P (current_cpu)) | |
2752 | { | |
2753 | FLD (in_abase) = f_abase; | |
2754 | FLD (out_dst) = f_srcdst; | |
104c1213 | 2755 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
2756 | } |
2757 | #endif | |
2758 | #undef FLD | |
7a292a7a | 2759 | return idesc; |
c906108c SS |
2760 | } |
2761 | ||
96baa820 | 2762 | extract_sfmt_ldl_indirect: |
c906108c | 2763 | { |
7a292a7a | 2764 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2765 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2766 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
2767 | UINT f_srcdst; | |
2768 | UINT f_abase; | |
c906108c | 2769 | |
96baa820 JM |
2770 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2771 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
2772 | |
2773 | /* Record the fields for the semantic handler. */ | |
96baa820 | 2774 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
2775 | FLD (i_abase) = & CPU (h_gr)[f_abase]; |
2776 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2777 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2778 | |
2779 | #if WITH_PROFILE_MODEL_P | |
2780 | /* Record the fields for profiling. */ | |
2781 | if (PROFILE_MODEL_P (current_cpu)) | |
2782 | { | |
2783 | FLD (in_abase) = f_abase; | |
2784 | FLD (out_dst) = f_srcdst; | |
104c1213 | 2785 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
2786 | } |
2787 | #endif | |
2788 | #undef FLD | |
7a292a7a | 2789 | return idesc; |
c906108c SS |
2790 | } |
2791 | ||
96baa820 | 2792 | extract_sfmt_ldl_indirect_index: |
c906108c | 2793 | { |
7a292a7a | 2794 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2795 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2796 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2797 | UINT f_srcdst; | |
2798 | UINT f_abase; | |
2799 | UINT f_scale; | |
2800 | UINT f_index; | |
c906108c | 2801 | |
96baa820 JM |
2802 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2803 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
2804 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
2805 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2806 | |
2807 | /* Record the fields for the semantic handler. */ | |
96baa820 | 2808 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
2809 | FLD (f_scale) = f_scale; |
2810 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2811 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2812 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2813 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2814 | |
2815 | #if WITH_PROFILE_MODEL_P | |
2816 | /* Record the fields for profiling. */ | |
2817 | if (PROFILE_MODEL_P (current_cpu)) | |
2818 | { | |
2819 | FLD (in_abase) = f_abase; | |
2820 | FLD (in_index) = f_index; | |
2821 | FLD (out_dst) = f_srcdst; | |
104c1213 | 2822 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
2823 | } |
2824 | #endif | |
2825 | #undef FLD | |
7a292a7a | 2826 | return idesc; |
c906108c SS |
2827 | } |
2828 | ||
96baa820 | 2829 | extract_sfmt_ldl_disp: |
c906108c | 2830 | { |
7a292a7a | 2831 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2832 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2833 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2834 | UINT f_optdisp; | |
2835 | UINT f_srcdst; | |
2836 | /* Contents of trailing part of insn. */ | |
2837 | UINT word_1; | |
c906108c | 2838 | |
96baa820 JM |
2839 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2840 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2841 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
c906108c SS |
2842 | |
2843 | /* Record the fields for the semantic handler. */ | |
96baa820 | 2844 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
2845 | FLD (f_optdisp) = f_optdisp; |
2846 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2847 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2848 | |
2849 | #if WITH_PROFILE_MODEL_P | |
2850 | /* Record the fields for profiling. */ | |
2851 | if (PROFILE_MODEL_P (current_cpu)) | |
2852 | { | |
2853 | FLD (out_dst) = f_srcdst; | |
104c1213 | 2854 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
2855 | } |
2856 | #endif | |
2857 | #undef FLD | |
7a292a7a | 2858 | return idesc; |
c906108c SS |
2859 | } |
2860 | ||
96baa820 | 2861 | extract_sfmt_ldl_indirect_disp: |
c906108c | 2862 | { |
7a292a7a | 2863 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2864 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2865 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2866 | UINT f_optdisp; | |
2867 | UINT f_srcdst; | |
2868 | UINT f_abase; | |
2869 | /* Contents of trailing part of insn. */ | |
2870 | UINT word_1; | |
c906108c | 2871 | |
96baa820 JM |
2872 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2873 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2874 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
2875 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
2876 | |
2877 | /* Record the fields for the semantic handler. */ | |
96baa820 | 2878 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
2879 | FLD (f_optdisp) = f_optdisp; |
2880 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2881 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2882 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2883 | |
2884 | #if WITH_PROFILE_MODEL_P | |
2885 | /* Record the fields for profiling. */ | |
2886 | if (PROFILE_MODEL_P (current_cpu)) | |
2887 | { | |
2888 | FLD (in_abase) = f_abase; | |
2889 | FLD (out_dst) = f_srcdst; | |
104c1213 | 2890 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
2891 | } |
2892 | #endif | |
2893 | #undef FLD | |
7a292a7a | 2894 | return idesc; |
c906108c SS |
2895 | } |
2896 | ||
96baa820 | 2897 | extract_sfmt_ldl_index_disp: |
c906108c | 2898 | { |
7a292a7a | 2899 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2900 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2901 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2902 | UINT f_optdisp; | |
2903 | UINT f_srcdst; | |
2904 | UINT f_scale; | |
2905 | UINT f_index; | |
2906 | /* Contents of trailing part of insn. */ | |
2907 | UINT word_1; | |
c906108c | 2908 | |
96baa820 JM |
2909 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2910 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2911 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
2912 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
2913 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2914 | |
2915 | /* Record the fields for the semantic handler. */ | |
96baa820 | 2916 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
2917 | FLD (f_optdisp) = f_optdisp; |
2918 | FLD (f_scale) = f_scale; | |
2919 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2920 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2921 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2922 | |
2923 | #if WITH_PROFILE_MODEL_P | |
2924 | /* Record the fields for profiling. */ | |
2925 | if (PROFILE_MODEL_P (current_cpu)) | |
2926 | { | |
2927 | FLD (in_index) = f_index; | |
2928 | FLD (out_dst) = f_srcdst; | |
104c1213 | 2929 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
2930 | } |
2931 | #endif | |
2932 | #undef FLD | |
7a292a7a | 2933 | return idesc; |
c906108c SS |
2934 | } |
2935 | ||
96baa820 | 2936 | extract_sfmt_ldl_indirect_index_disp: |
c906108c | 2937 | { |
7a292a7a | 2938 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2939 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2940 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
2941 | UINT f_optdisp; | |
2942 | UINT f_srcdst; | |
2943 | UINT f_abase; | |
2944 | UINT f_scale; | |
2945 | UINT f_index; | |
2946 | /* Contents of trailing part of insn. */ | |
2947 | UINT word_1; | |
c906108c | 2948 | |
96baa820 JM |
2949 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
2950 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
2951 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
2952 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
2953 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
2954 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
2955 | |
2956 | /* Record the fields for the semantic handler. */ | |
96baa820 | 2957 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
2958 | FLD (f_optdisp) = f_optdisp; |
2959 | FLD (f_scale) = f_scale; | |
2960 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2961 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2962 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2963 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2964 | |
2965 | #if WITH_PROFILE_MODEL_P | |
2966 | /* Record the fields for profiling. */ | |
2967 | if (PROFILE_MODEL_P (current_cpu)) | |
2968 | { | |
2969 | FLD (in_abase) = f_abase; | |
2970 | FLD (in_index) = f_index; | |
2971 | FLD (out_dst) = f_srcdst; | |
104c1213 | 2972 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
2973 | } |
2974 | #endif | |
2975 | #undef FLD | |
7a292a7a | 2976 | return idesc; |
c906108c SS |
2977 | } |
2978 | ||
96baa820 | 2979 | extract_sfmt_ldt_offset: |
c906108c | 2980 | { |
7a292a7a | 2981 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 2982 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
2983 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
2984 | UINT f_srcdst; | |
2985 | UINT f_offset; | |
c906108c | 2986 | |
96baa820 JM |
2987 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
2988 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
2989 | |
2990 | /* Record the fields for the semantic handler. */ | |
96baa820 | 2991 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
2992 | FLD (f_offset) = f_offset; |
2993 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 2994 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
2995 | |
2996 | #if WITH_PROFILE_MODEL_P | |
2997 | /* Record the fields for profiling. */ | |
2998 | if (PROFILE_MODEL_P (current_cpu)) | |
2999 | { | |
3000 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3001 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3002 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3003 | } |
3004 | #endif | |
3005 | #undef FLD | |
7a292a7a | 3006 | return idesc; |
c906108c SS |
3007 | } |
3008 | ||
96baa820 | 3009 | extract_sfmt_ldt_indirect_offset: |
c906108c | 3010 | { |
7a292a7a | 3011 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3012 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3013 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
3014 | UINT f_srcdst; | |
3015 | UINT f_abase; | |
3016 | UINT f_offset; | |
c906108c | 3017 | |
96baa820 JM |
3018 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3019 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3020 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
3021 | |
3022 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3023 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3024 | FLD (f_offset) = f_offset; |
3025 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3026 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3027 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3028 | |
3029 | #if WITH_PROFILE_MODEL_P | |
3030 | /* Record the fields for profiling. */ | |
3031 | if (PROFILE_MODEL_P (current_cpu)) | |
3032 | { | |
3033 | FLD (in_abase) = f_abase; | |
3034 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3035 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3036 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3037 | } |
3038 | #endif | |
3039 | #undef FLD | |
7a292a7a | 3040 | return idesc; |
c906108c SS |
3041 | } |
3042 | ||
96baa820 | 3043 | extract_sfmt_ldt_indirect: |
c906108c | 3044 | { |
7a292a7a | 3045 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3046 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3047 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
3048 | UINT f_srcdst; | |
3049 | UINT f_abase; | |
c906108c | 3050 | |
96baa820 JM |
3051 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3052 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
3053 | |
3054 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3055 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3056 | FLD (i_abase) = & CPU (h_gr)[f_abase]; |
3057 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3058 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3059 | |
3060 | #if WITH_PROFILE_MODEL_P | |
3061 | /* Record the fields for profiling. */ | |
3062 | if (PROFILE_MODEL_P (current_cpu)) | |
3063 | { | |
3064 | FLD (in_abase) = f_abase; | |
3065 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3066 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3067 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3068 | } |
3069 | #endif | |
3070 | #undef FLD | |
7a292a7a | 3071 | return idesc; |
c906108c SS |
3072 | } |
3073 | ||
96baa820 | 3074 | extract_sfmt_ldt_indirect_index: |
c906108c | 3075 | { |
7a292a7a | 3076 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3077 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3078 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
3079 | UINT f_srcdst; | |
3080 | UINT f_abase; | |
3081 | UINT f_scale; | |
3082 | UINT f_index; | |
c906108c | 3083 | |
96baa820 JM |
3084 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3085 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3086 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
3087 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
3088 | |
3089 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3090 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3091 | FLD (f_scale) = f_scale; |
3092 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3093 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3094 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3095 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3096 | |
3097 | #if WITH_PROFILE_MODEL_P | |
3098 | /* Record the fields for profiling. */ | |
3099 | if (PROFILE_MODEL_P (current_cpu)) | |
3100 | { | |
3101 | FLD (in_abase) = f_abase; | |
3102 | FLD (in_index) = f_index; | |
3103 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3104 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3105 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3106 | } |
3107 | #endif | |
3108 | #undef FLD | |
7a292a7a | 3109 | return idesc; |
c906108c SS |
3110 | } |
3111 | ||
96baa820 | 3112 | extract_sfmt_ldt_disp: |
c906108c | 3113 | { |
7a292a7a | 3114 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3115 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3116 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
3117 | UINT f_optdisp; | |
3118 | UINT f_srcdst; | |
3119 | /* Contents of trailing part of insn. */ | |
3120 | UINT word_1; | |
c906108c | 3121 | |
96baa820 JM |
3122 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3123 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3124 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
c906108c SS |
3125 | |
3126 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3127 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3128 | FLD (f_optdisp) = f_optdisp; |
3129 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3130 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3131 | |
3132 | #if WITH_PROFILE_MODEL_P | |
3133 | /* Record the fields for profiling. */ | |
3134 | if (PROFILE_MODEL_P (current_cpu)) | |
3135 | { | |
3136 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3137 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3138 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3139 | } |
3140 | #endif | |
3141 | #undef FLD | |
7a292a7a | 3142 | return idesc; |
c906108c SS |
3143 | } |
3144 | ||
96baa820 | 3145 | extract_sfmt_ldt_indirect_disp: |
c906108c | 3146 | { |
7a292a7a | 3147 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3148 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3149 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
3150 | UINT f_optdisp; | |
3151 | UINT f_srcdst; | |
3152 | UINT f_abase; | |
3153 | /* Contents of trailing part of insn. */ | |
3154 | UINT word_1; | |
c906108c | 3155 | |
96baa820 JM |
3156 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3157 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3158 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
3159 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
3160 | |
3161 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3162 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3163 | FLD (f_optdisp) = f_optdisp; |
3164 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3165 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3166 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3167 | |
3168 | #if WITH_PROFILE_MODEL_P | |
3169 | /* Record the fields for profiling. */ | |
3170 | if (PROFILE_MODEL_P (current_cpu)) | |
3171 | { | |
3172 | FLD (in_abase) = f_abase; | |
3173 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3174 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3175 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3176 | } |
3177 | #endif | |
3178 | #undef FLD | |
7a292a7a | 3179 | return idesc; |
c906108c SS |
3180 | } |
3181 | ||
96baa820 | 3182 | extract_sfmt_ldt_index_disp: |
c906108c | 3183 | { |
7a292a7a | 3184 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3185 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3186 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
3187 | UINT f_optdisp; | |
3188 | UINT f_srcdst; | |
3189 | UINT f_scale; | |
3190 | UINT f_index; | |
3191 | /* Contents of trailing part of insn. */ | |
3192 | UINT word_1; | |
c906108c | 3193 | |
96baa820 JM |
3194 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3195 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3196 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
3197 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
3198 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
3199 | |
3200 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3201 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3202 | FLD (f_optdisp) = f_optdisp; |
3203 | FLD (f_scale) = f_scale; | |
3204 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3205 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3206 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3207 | |
3208 | #if WITH_PROFILE_MODEL_P | |
3209 | /* Record the fields for profiling. */ | |
3210 | if (PROFILE_MODEL_P (current_cpu)) | |
3211 | { | |
3212 | FLD (in_index) = f_index; | |
3213 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3214 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3215 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3216 | } |
3217 | #endif | |
3218 | #undef FLD | |
7a292a7a | 3219 | return idesc; |
c906108c SS |
3220 | } |
3221 | ||
96baa820 | 3222 | extract_sfmt_ldt_indirect_index_disp: |
c906108c | 3223 | { |
7a292a7a | 3224 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3225 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3226 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
3227 | UINT f_optdisp; | |
3228 | UINT f_srcdst; | |
3229 | UINT f_abase; | |
3230 | UINT f_scale; | |
3231 | UINT f_index; | |
3232 | /* Contents of trailing part of insn. */ | |
3233 | UINT word_1; | |
c906108c | 3234 | |
96baa820 JM |
3235 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3236 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3237 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
3238 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3239 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
3240 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
3241 | |
3242 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3243 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3244 | FLD (f_optdisp) = f_optdisp; |
3245 | FLD (f_scale) = f_scale; | |
3246 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3247 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3248 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3249 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3250 | |
3251 | #if WITH_PROFILE_MODEL_P | |
3252 | /* Record the fields for profiling. */ | |
3253 | if (PROFILE_MODEL_P (current_cpu)) | |
3254 | { | |
3255 | FLD (in_abase) = f_abase; | |
3256 | FLD (in_index) = f_index; | |
3257 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3258 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3259 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3260 | } |
3261 | #endif | |
3262 | #undef FLD | |
7a292a7a | 3263 | return idesc; |
c906108c SS |
3264 | } |
3265 | ||
96baa820 | 3266 | extract_sfmt_ldq_offset: |
c906108c | 3267 | { |
7a292a7a | 3268 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3269 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3270 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
3271 | UINT f_srcdst; | |
3272 | UINT f_offset; | |
c906108c | 3273 | |
96baa820 JM |
3274 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3275 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
3276 | |
3277 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3278 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3279 | FLD (f_offset) = f_offset; |
3280 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3281 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3282 | |
3283 | #if WITH_PROFILE_MODEL_P | |
3284 | /* Record the fields for profiling. */ | |
3285 | if (PROFILE_MODEL_P (current_cpu)) | |
3286 | { | |
3287 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3288 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3289 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
3290 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
3291 | } |
3292 | #endif | |
3293 | #undef FLD | |
7a292a7a | 3294 | return idesc; |
c906108c SS |
3295 | } |
3296 | ||
96baa820 | 3297 | extract_sfmt_ldq_indirect_offset: |
c906108c | 3298 | { |
7a292a7a | 3299 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3300 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3301 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
3302 | UINT f_srcdst; | |
3303 | UINT f_abase; | |
3304 | UINT f_offset; | |
c906108c | 3305 | |
96baa820 JM |
3306 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3307 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3308 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
3309 | |
3310 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3311 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3312 | FLD (f_offset) = f_offset; |
3313 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3314 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3315 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3316 | |
3317 | #if WITH_PROFILE_MODEL_P | |
3318 | /* Record the fields for profiling. */ | |
3319 | if (PROFILE_MODEL_P (current_cpu)) | |
3320 | { | |
3321 | FLD (in_abase) = f_abase; | |
3322 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3323 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3324 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
3325 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
3326 | } |
3327 | #endif | |
3328 | #undef FLD | |
7a292a7a | 3329 | return idesc; |
c906108c SS |
3330 | } |
3331 | ||
96baa820 | 3332 | extract_sfmt_ldq_indirect: |
c906108c | 3333 | { |
7a292a7a | 3334 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3335 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3336 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
3337 | UINT f_srcdst; | |
3338 | UINT f_abase; | |
c906108c | 3339 | |
96baa820 JM |
3340 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3341 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
3342 | |
3343 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3344 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3345 | FLD (i_abase) = & CPU (h_gr)[f_abase]; |
3346 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3347 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3348 | |
3349 | #if WITH_PROFILE_MODEL_P | |
3350 | /* Record the fields for profiling. */ | |
3351 | if (PROFILE_MODEL_P (current_cpu)) | |
3352 | { | |
3353 | FLD (in_abase) = f_abase; | |
3354 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3355 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3356 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
3357 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
3358 | } |
3359 | #endif | |
3360 | #undef FLD | |
7a292a7a | 3361 | return idesc; |
c906108c SS |
3362 | } |
3363 | ||
96baa820 | 3364 | extract_sfmt_ldq_indirect_index: |
c906108c | 3365 | { |
7a292a7a | 3366 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3367 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3368 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
3369 | UINT f_srcdst; | |
3370 | UINT f_abase; | |
3371 | UINT f_scale; | |
3372 | UINT f_index; | |
c906108c | 3373 | |
96baa820 JM |
3374 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3375 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3376 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
3377 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
3378 | |
3379 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3380 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3381 | FLD (f_scale) = f_scale; |
3382 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3383 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3384 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3385 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3386 | |
3387 | #if WITH_PROFILE_MODEL_P | |
3388 | /* Record the fields for profiling. */ | |
3389 | if (PROFILE_MODEL_P (current_cpu)) | |
3390 | { | |
3391 | FLD (in_abase) = f_abase; | |
3392 | FLD (in_index) = f_index; | |
3393 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3394 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3395 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
3396 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
3397 | } |
3398 | #endif | |
3399 | #undef FLD | |
7a292a7a | 3400 | return idesc; |
c906108c SS |
3401 | } |
3402 | ||
96baa820 | 3403 | extract_sfmt_ldq_disp: |
c906108c | 3404 | { |
7a292a7a | 3405 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3406 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3407 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
3408 | UINT f_optdisp; | |
3409 | UINT f_srcdst; | |
3410 | /* Contents of trailing part of insn. */ | |
3411 | UINT word_1; | |
c906108c | 3412 | |
96baa820 JM |
3413 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3414 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3415 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
c906108c SS |
3416 | |
3417 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3418 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3419 | FLD (f_optdisp) = f_optdisp; |
3420 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3421 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3422 | |
3423 | #if WITH_PROFILE_MODEL_P | |
3424 | /* Record the fields for profiling. */ | |
3425 | if (PROFILE_MODEL_P (current_cpu)) | |
3426 | { | |
3427 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3428 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3429 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
3430 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
3431 | } |
3432 | #endif | |
3433 | #undef FLD | |
7a292a7a | 3434 | return idesc; |
c906108c SS |
3435 | } |
3436 | ||
96baa820 | 3437 | extract_sfmt_ldq_indirect_disp: |
c906108c | 3438 | { |
7a292a7a | 3439 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3440 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3441 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
3442 | UINT f_optdisp; | |
3443 | UINT f_srcdst; | |
3444 | UINT f_abase; | |
3445 | /* Contents of trailing part of insn. */ | |
3446 | UINT word_1; | |
c906108c | 3447 | |
96baa820 JM |
3448 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3449 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3450 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
3451 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
3452 | |
3453 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3454 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3455 | FLD (f_optdisp) = f_optdisp; |
3456 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3457 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3458 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3459 | |
3460 | #if WITH_PROFILE_MODEL_P | |
3461 | /* Record the fields for profiling. */ | |
3462 | if (PROFILE_MODEL_P (current_cpu)) | |
3463 | { | |
3464 | FLD (in_abase) = f_abase; | |
3465 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3466 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3467 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
3468 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
3469 | } |
3470 | #endif | |
3471 | #undef FLD | |
7a292a7a | 3472 | return idesc; |
c906108c SS |
3473 | } |
3474 | ||
96baa820 | 3475 | extract_sfmt_ldq_index_disp: |
c906108c | 3476 | { |
7a292a7a | 3477 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3478 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3479 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
3480 | UINT f_optdisp; | |
3481 | UINT f_srcdst; | |
3482 | UINT f_scale; | |
3483 | UINT f_index; | |
3484 | /* Contents of trailing part of insn. */ | |
3485 | UINT word_1; | |
c906108c | 3486 | |
96baa820 JM |
3487 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3488 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3489 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
3490 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
3491 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
3492 | |
3493 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3494 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3495 | FLD (f_optdisp) = f_optdisp; |
3496 | FLD (f_scale) = f_scale; | |
3497 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3498 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3499 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3500 | |
3501 | #if WITH_PROFILE_MODEL_P | |
3502 | /* Record the fields for profiling. */ | |
3503 | if (PROFILE_MODEL_P (current_cpu)) | |
3504 | { | |
3505 | FLD (in_index) = f_index; | |
3506 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3507 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3508 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
3509 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
3510 | } |
3511 | #endif | |
3512 | #undef FLD | |
7a292a7a | 3513 | return idesc; |
c906108c SS |
3514 | } |
3515 | ||
96baa820 | 3516 | extract_sfmt_ldq_indirect_index_disp: |
c906108c | 3517 | { |
7a292a7a | 3518 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3519 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3520 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
3521 | UINT f_optdisp; | |
3522 | UINT f_srcdst; | |
3523 | UINT f_abase; | |
3524 | UINT f_scale; | |
3525 | UINT f_index; | |
3526 | /* Contents of trailing part of insn. */ | |
3527 | UINT word_1; | |
c906108c | 3528 | |
96baa820 JM |
3529 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3530 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3531 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
3532 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3533 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
3534 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
3535 | |
3536 | /* Record the fields for the semantic handler. */ | |
96baa820 | 3537 | FLD (f_srcdst) = f_srcdst; |
c906108c SS |
3538 | FLD (f_optdisp) = f_optdisp; |
3539 | FLD (f_scale) = f_scale; | |
3540 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3541 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3542 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 3543 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
3544 | |
3545 | #if WITH_PROFILE_MODEL_P | |
3546 | /* Record the fields for profiling. */ | |
3547 | if (PROFILE_MODEL_P (current_cpu)) | |
3548 | { | |
3549 | FLD (in_abase) = f_abase; | |
3550 | FLD (in_index) = f_index; | |
3551 | FLD (out_dst) = f_srcdst; | |
104c1213 JM |
3552 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); |
3553 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); | |
3554 | FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
3555 | } |
3556 | #endif | |
3557 | #undef FLD | |
7a292a7a | 3558 | return idesc; |
c906108c SS |
3559 | } |
3560 | ||
96baa820 | 3561 | extract_sfmt_st_offset: |
c906108c | 3562 | { |
7a292a7a | 3563 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3564 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3565 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
3566 | UINT f_srcdst; | |
3567 | UINT f_offset; | |
c906108c | 3568 | |
96baa820 JM |
3569 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3570 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
3571 | |
3572 | /* Record the fields for the semantic handler. */ | |
3573 | FLD (f_offset) = f_offset; | |
96baa820 JM |
3574 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3575 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3576 | |
3577 | #if WITH_PROFILE_MODEL_P | |
3578 | /* Record the fields for profiling. */ | |
3579 | if (PROFILE_MODEL_P (current_cpu)) | |
3580 | { | |
96baa820 | 3581 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3582 | } |
3583 | #endif | |
3584 | #undef FLD | |
7a292a7a | 3585 | return idesc; |
c906108c SS |
3586 | } |
3587 | ||
96baa820 | 3588 | extract_sfmt_st_indirect_offset: |
c906108c | 3589 | { |
7a292a7a | 3590 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3591 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3592 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
3593 | UINT f_srcdst; | |
3594 | UINT f_abase; | |
3595 | UINT f_offset; | |
c906108c | 3596 | |
96baa820 JM |
3597 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3598 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3599 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
3600 | |
3601 | /* Record the fields for the semantic handler. */ | |
3602 | FLD (f_offset) = f_offset; | |
3603 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 JM |
3604 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3605 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3606 | |
3607 | #if WITH_PROFILE_MODEL_P | |
3608 | /* Record the fields for profiling. */ | |
3609 | if (PROFILE_MODEL_P (current_cpu)) | |
3610 | { | |
3611 | FLD (in_abase) = f_abase; | |
96baa820 | 3612 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3613 | } |
3614 | #endif | |
3615 | #undef FLD | |
7a292a7a | 3616 | return idesc; |
c906108c SS |
3617 | } |
3618 | ||
96baa820 | 3619 | extract_sfmt_st_indirect: |
c906108c | 3620 | { |
7a292a7a | 3621 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3622 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3623 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
3624 | UINT f_srcdst; | |
3625 | UINT f_abase; | |
c906108c | 3626 | |
96baa820 JM |
3627 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3628 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
3629 | |
3630 | /* Record the fields for the semantic handler. */ | |
3631 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 JM |
3632 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3633 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3634 | |
3635 | #if WITH_PROFILE_MODEL_P | |
3636 | /* Record the fields for profiling. */ | |
3637 | if (PROFILE_MODEL_P (current_cpu)) | |
3638 | { | |
3639 | FLD (in_abase) = f_abase; | |
96baa820 | 3640 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3641 | } |
3642 | #endif | |
3643 | #undef FLD | |
7a292a7a | 3644 | return idesc; |
c906108c SS |
3645 | } |
3646 | ||
96baa820 | 3647 | extract_sfmt_st_indirect_index: |
c906108c | 3648 | { |
7a292a7a | 3649 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3650 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3651 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
3652 | UINT f_srcdst; | |
3653 | UINT f_abase; | |
3654 | UINT f_scale; | |
3655 | UINT f_index; | |
c906108c | 3656 | |
96baa820 JM |
3657 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3658 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3659 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
3660 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
3661 | |
3662 | /* Record the fields for the semantic handler. */ | |
3663 | FLD (f_scale) = f_scale; | |
3664 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3665 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
96baa820 JM |
3666 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3667 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3668 | |
3669 | #if WITH_PROFILE_MODEL_P | |
3670 | /* Record the fields for profiling. */ | |
3671 | if (PROFILE_MODEL_P (current_cpu)) | |
3672 | { | |
3673 | FLD (in_abase) = f_abase; | |
3674 | FLD (in_index) = f_index; | |
96baa820 | 3675 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3676 | } |
3677 | #endif | |
3678 | #undef FLD | |
7a292a7a | 3679 | return idesc; |
c906108c SS |
3680 | } |
3681 | ||
96baa820 | 3682 | extract_sfmt_st_disp: |
c906108c | 3683 | { |
7a292a7a | 3684 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3685 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3686 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
3687 | UINT f_optdisp; | |
3688 | UINT f_srcdst; | |
3689 | /* Contents of trailing part of insn. */ | |
3690 | UINT word_1; | |
c906108c | 3691 | |
96baa820 JM |
3692 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3693 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3694 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
c906108c SS |
3695 | |
3696 | /* Record the fields for the semantic handler. */ | |
3697 | FLD (f_optdisp) = f_optdisp; | |
96baa820 JM |
3698 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3699 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3700 | |
3701 | #if WITH_PROFILE_MODEL_P | |
3702 | /* Record the fields for profiling. */ | |
3703 | if (PROFILE_MODEL_P (current_cpu)) | |
3704 | { | |
96baa820 | 3705 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3706 | } |
3707 | #endif | |
3708 | #undef FLD | |
7a292a7a | 3709 | return idesc; |
c906108c SS |
3710 | } |
3711 | ||
96baa820 | 3712 | extract_sfmt_st_indirect_disp: |
c906108c | 3713 | { |
7a292a7a | 3714 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3715 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3716 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
3717 | UINT f_optdisp; | |
3718 | UINT f_srcdst; | |
3719 | UINT f_abase; | |
3720 | /* Contents of trailing part of insn. */ | |
3721 | UINT word_1; | |
c906108c | 3722 | |
96baa820 JM |
3723 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3724 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3725 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
3726 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
3727 | |
3728 | /* Record the fields for the semantic handler. */ | |
3729 | FLD (f_optdisp) = f_optdisp; | |
3730 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 JM |
3731 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3732 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3733 | |
3734 | #if WITH_PROFILE_MODEL_P | |
3735 | /* Record the fields for profiling. */ | |
3736 | if (PROFILE_MODEL_P (current_cpu)) | |
3737 | { | |
3738 | FLD (in_abase) = f_abase; | |
96baa820 | 3739 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3740 | } |
3741 | #endif | |
3742 | #undef FLD | |
7a292a7a | 3743 | return idesc; |
c906108c SS |
3744 | } |
3745 | ||
96baa820 | 3746 | extract_sfmt_st_index_disp: |
c906108c | 3747 | { |
7a292a7a | 3748 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3749 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3750 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
3751 | UINT f_optdisp; | |
3752 | UINT f_srcdst; | |
3753 | UINT f_scale; | |
3754 | UINT f_index; | |
3755 | /* Contents of trailing part of insn. */ | |
3756 | UINT word_1; | |
c906108c | 3757 | |
96baa820 JM |
3758 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3759 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3760 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
3761 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
3762 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
3763 | |
3764 | /* Record the fields for the semantic handler. */ | |
3765 | FLD (f_optdisp) = f_optdisp; | |
3766 | FLD (f_scale) = f_scale; | |
3767 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
96baa820 JM |
3768 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3769 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3770 | |
3771 | #if WITH_PROFILE_MODEL_P | |
3772 | /* Record the fields for profiling. */ | |
3773 | if (PROFILE_MODEL_P (current_cpu)) | |
3774 | { | |
3775 | FLD (in_index) = f_index; | |
96baa820 | 3776 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3777 | } |
3778 | #endif | |
3779 | #undef FLD | |
7a292a7a | 3780 | return idesc; |
c906108c SS |
3781 | } |
3782 | ||
96baa820 | 3783 | extract_sfmt_st_indirect_index_disp: |
c906108c | 3784 | { |
7a292a7a | 3785 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3786 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3787 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
3788 | UINT f_optdisp; | |
3789 | UINT f_srcdst; | |
3790 | UINT f_abase; | |
3791 | UINT f_scale; | |
3792 | UINT f_index; | |
3793 | /* Contents of trailing part of insn. */ | |
3794 | UINT word_1; | |
c906108c | 3795 | |
96baa820 JM |
3796 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3797 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3798 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
3799 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3800 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
3801 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
3802 | |
3803 | /* Record the fields for the semantic handler. */ | |
3804 | FLD (f_optdisp) = f_optdisp; | |
3805 | FLD (f_scale) = f_scale; | |
3806 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3807 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
96baa820 JM |
3808 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3809 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3810 | |
3811 | #if WITH_PROFILE_MODEL_P | |
3812 | /* Record the fields for profiling. */ | |
3813 | if (PROFILE_MODEL_P (current_cpu)) | |
3814 | { | |
3815 | FLD (in_abase) = f_abase; | |
3816 | FLD (in_index) = f_index; | |
96baa820 | 3817 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3818 | } |
3819 | #endif | |
3820 | #undef FLD | |
7a292a7a | 3821 | return idesc; |
c906108c SS |
3822 | } |
3823 | ||
96baa820 | 3824 | extract_sfmt_stl_offset: |
c906108c | 3825 | { |
7a292a7a | 3826 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3827 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3828 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
3829 | UINT f_srcdst; | |
3830 | UINT f_offset; | |
c906108c | 3831 | |
96baa820 JM |
3832 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3833 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
3834 | |
3835 | /* Record the fields for the semantic handler. */ | |
3836 | FLD (f_srcdst) = f_srcdst; | |
3837 | FLD (f_offset) = f_offset; | |
96baa820 JM |
3838 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3839 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3840 | |
3841 | #if WITH_PROFILE_MODEL_P | |
3842 | /* Record the fields for profiling. */ | |
3843 | if (PROFILE_MODEL_P (current_cpu)) | |
3844 | { | |
104c1213 | 3845 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
96baa820 | 3846 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3847 | } |
3848 | #endif | |
3849 | #undef FLD | |
7a292a7a | 3850 | return idesc; |
c906108c SS |
3851 | } |
3852 | ||
96baa820 | 3853 | extract_sfmt_stl_indirect_offset: |
c906108c | 3854 | { |
7a292a7a | 3855 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3856 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3857 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
3858 | UINT f_srcdst; | |
3859 | UINT f_abase; | |
3860 | UINT f_offset; | |
c906108c | 3861 | |
96baa820 JM |
3862 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3863 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3864 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
3865 | |
3866 | /* Record the fields for the semantic handler. */ | |
3867 | FLD (f_srcdst) = f_srcdst; | |
3868 | FLD (f_offset) = f_offset; | |
3869 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 JM |
3870 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3871 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3872 | |
3873 | #if WITH_PROFILE_MODEL_P | |
3874 | /* Record the fields for profiling. */ | |
3875 | if (PROFILE_MODEL_P (current_cpu)) | |
3876 | { | |
3877 | FLD (in_abase) = f_abase; | |
104c1213 | 3878 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
96baa820 | 3879 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3880 | } |
3881 | #endif | |
3882 | #undef FLD | |
7a292a7a | 3883 | return idesc; |
c906108c SS |
3884 | } |
3885 | ||
96baa820 | 3886 | extract_sfmt_stl_indirect: |
c906108c | 3887 | { |
7a292a7a | 3888 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3889 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3890 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
3891 | UINT f_srcdst; | |
3892 | UINT f_abase; | |
c906108c | 3893 | |
96baa820 JM |
3894 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3895 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
3896 | |
3897 | /* Record the fields for the semantic handler. */ | |
3898 | FLD (f_srcdst) = f_srcdst; | |
3899 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 JM |
3900 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3901 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3902 | |
3903 | #if WITH_PROFILE_MODEL_P | |
3904 | /* Record the fields for profiling. */ | |
3905 | if (PROFILE_MODEL_P (current_cpu)) | |
3906 | { | |
3907 | FLD (in_abase) = f_abase; | |
104c1213 | 3908 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
96baa820 | 3909 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3910 | } |
3911 | #endif | |
3912 | #undef FLD | |
7a292a7a | 3913 | return idesc; |
c906108c SS |
3914 | } |
3915 | ||
96baa820 | 3916 | extract_sfmt_stl_indirect_index: |
c906108c | 3917 | { |
7a292a7a | 3918 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3919 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3920 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
3921 | UINT f_srcdst; | |
3922 | UINT f_abase; | |
3923 | UINT f_scale; | |
3924 | UINT f_index; | |
c906108c | 3925 | |
96baa820 JM |
3926 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
3927 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
3928 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
3929 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
3930 | |
3931 | /* Record the fields for the semantic handler. */ | |
3932 | FLD (f_srcdst) = f_srcdst; | |
3933 | FLD (f_scale) = f_scale; | |
3934 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3935 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
96baa820 JM |
3936 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3937 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3938 | |
3939 | #if WITH_PROFILE_MODEL_P | |
3940 | /* Record the fields for profiling. */ | |
3941 | if (PROFILE_MODEL_P (current_cpu)) | |
3942 | { | |
3943 | FLD (in_abase) = f_abase; | |
104c1213 | 3944 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c | 3945 | FLD (in_index) = f_index; |
96baa820 | 3946 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3947 | } |
3948 | #endif | |
3949 | #undef FLD | |
7a292a7a | 3950 | return idesc; |
c906108c SS |
3951 | } |
3952 | ||
96baa820 | 3953 | extract_sfmt_stl_disp: |
c906108c | 3954 | { |
7a292a7a | 3955 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3956 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3957 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
3958 | UINT f_optdisp; | |
3959 | UINT f_srcdst; | |
3960 | /* Contents of trailing part of insn. */ | |
3961 | UINT word_1; | |
c906108c | 3962 | |
96baa820 JM |
3963 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3964 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3965 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
c906108c SS |
3966 | |
3967 | /* Record the fields for the semantic handler. */ | |
3968 | FLD (f_srcdst) = f_srcdst; | |
3969 | FLD (f_optdisp) = f_optdisp; | |
96baa820 JM |
3970 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
3971 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
3972 | |
3973 | #if WITH_PROFILE_MODEL_P | |
3974 | /* Record the fields for profiling. */ | |
3975 | if (PROFILE_MODEL_P (current_cpu)) | |
3976 | { | |
104c1213 | 3977 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
96baa820 | 3978 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
3979 | } |
3980 | #endif | |
3981 | #undef FLD | |
7a292a7a | 3982 | return idesc; |
c906108c SS |
3983 | } |
3984 | ||
96baa820 | 3985 | extract_sfmt_stl_indirect_disp: |
c906108c | 3986 | { |
7a292a7a | 3987 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 3988 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
3989 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
3990 | UINT f_optdisp; | |
3991 | UINT f_srcdst; | |
3992 | UINT f_abase; | |
3993 | /* Contents of trailing part of insn. */ | |
3994 | UINT word_1; | |
c906108c | 3995 | |
96baa820 JM |
3996 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
3997 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
3998 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
3999 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
4000 | |
4001 | /* Record the fields for the semantic handler. */ | |
4002 | FLD (f_srcdst) = f_srcdst; | |
4003 | FLD (f_optdisp) = f_optdisp; | |
4004 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 JM |
4005 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
4006 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
4007 | |
4008 | #if WITH_PROFILE_MODEL_P | |
4009 | /* Record the fields for profiling. */ | |
4010 | if (PROFILE_MODEL_P (current_cpu)) | |
4011 | { | |
4012 | FLD (in_abase) = f_abase; | |
104c1213 | 4013 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
96baa820 | 4014 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
4015 | } |
4016 | #endif | |
4017 | #undef FLD | |
7a292a7a | 4018 | return idesc; |
c906108c SS |
4019 | } |
4020 | ||
96baa820 | 4021 | extract_sfmt_stl_index_disp: |
c906108c | 4022 | { |
7a292a7a | 4023 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4024 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4025 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4026 | UINT f_optdisp; | |
4027 | UINT f_srcdst; | |
4028 | UINT f_scale; | |
4029 | UINT f_index; | |
4030 | /* Contents of trailing part of insn. */ | |
4031 | UINT word_1; | |
c906108c | 4032 | |
96baa820 JM |
4033 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
4034 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
4035 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
4036 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
4037 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4038 | |
4039 | /* Record the fields for the semantic handler. */ | |
4040 | FLD (f_srcdst) = f_srcdst; | |
4041 | FLD (f_optdisp) = f_optdisp; | |
4042 | FLD (f_scale) = f_scale; | |
4043 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
96baa820 JM |
4044 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
4045 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
4046 | |
4047 | #if WITH_PROFILE_MODEL_P | |
4048 | /* Record the fields for profiling. */ | |
4049 | if (PROFILE_MODEL_P (current_cpu)) | |
4050 | { | |
104c1213 | 4051 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c | 4052 | FLD (in_index) = f_index; |
96baa820 | 4053 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
4054 | } |
4055 | #endif | |
4056 | #undef FLD | |
7a292a7a | 4057 | return idesc; |
c906108c SS |
4058 | } |
4059 | ||
96baa820 | 4060 | extract_sfmt_stl_indirect_index_disp: |
c906108c | 4061 | { |
7a292a7a | 4062 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4063 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4064 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4065 | UINT f_optdisp; | |
4066 | UINT f_srcdst; | |
4067 | UINT f_abase; | |
4068 | UINT f_scale; | |
4069 | UINT f_index; | |
4070 | /* Contents of trailing part of insn. */ | |
4071 | UINT word_1; | |
c906108c | 4072 | |
96baa820 JM |
4073 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
4074 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
4075 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
4076 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4077 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
4078 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4079 | |
4080 | /* Record the fields for the semantic handler. */ | |
4081 | FLD (f_srcdst) = f_srcdst; | |
4082 | FLD (f_optdisp) = f_optdisp; | |
4083 | FLD (f_scale) = f_scale; | |
4084 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4085 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
96baa820 JM |
4086 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
4087 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
4088 | |
4089 | #if WITH_PROFILE_MODEL_P | |
4090 | /* Record the fields for profiling. */ | |
4091 | if (PROFILE_MODEL_P (current_cpu)) | |
4092 | { | |
4093 | FLD (in_abase) = f_abase; | |
104c1213 | 4094 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c | 4095 | FLD (in_index) = f_index; |
96baa820 | 4096 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
4097 | } |
4098 | #endif | |
4099 | #undef FLD | |
7a292a7a | 4100 | return idesc; |
c906108c SS |
4101 | } |
4102 | ||
96baa820 | 4103 | extract_sfmt_stt_offset: |
c906108c | 4104 | { |
7a292a7a | 4105 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4106 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4107 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
4108 | UINT f_srcdst; | |
4109 | UINT f_offset; | |
c906108c | 4110 | |
96baa820 JM |
4111 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4112 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
4113 | |
4114 | /* Record the fields for the semantic handler. */ | |
4115 | FLD (f_srcdst) = f_srcdst; | |
4116 | FLD (f_offset) = f_offset; | |
96baa820 JM |
4117 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
4118 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
4119 | |
4120 | #if WITH_PROFILE_MODEL_P | |
4121 | /* Record the fields for profiling. */ | |
4122 | if (PROFILE_MODEL_P (current_cpu)) | |
4123 | { | |
104c1213 JM |
4124 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4125 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
96baa820 | 4126 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
4127 | } |
4128 | #endif | |
4129 | #undef FLD | |
7a292a7a | 4130 | return idesc; |
c906108c SS |
4131 | } |
4132 | ||
96baa820 | 4133 | extract_sfmt_stt_indirect_offset: |
c906108c | 4134 | { |
7a292a7a | 4135 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4136 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4137 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
4138 | UINT f_srcdst; | |
4139 | UINT f_abase; | |
4140 | UINT f_offset; | |
c906108c | 4141 | |
96baa820 JM |
4142 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4143 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4144 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
4145 | |
4146 | /* Record the fields for the semantic handler. */ | |
4147 | FLD (f_srcdst) = f_srcdst; | |
4148 | FLD (f_offset) = f_offset; | |
4149 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 JM |
4150 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
4151 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
4152 | |
4153 | #if WITH_PROFILE_MODEL_P | |
4154 | /* Record the fields for profiling. */ | |
4155 | if (PROFILE_MODEL_P (current_cpu)) | |
4156 | { | |
4157 | FLD (in_abase) = f_abase; | |
104c1213 JM |
4158 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4159 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
96baa820 | 4160 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
4161 | } |
4162 | #endif | |
4163 | #undef FLD | |
7a292a7a | 4164 | return idesc; |
c906108c SS |
4165 | } |
4166 | ||
96baa820 | 4167 | extract_sfmt_stt_indirect: |
c906108c | 4168 | { |
7a292a7a | 4169 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4170 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4171 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
4172 | UINT f_srcdst; | |
4173 | UINT f_abase; | |
c906108c | 4174 | |
96baa820 JM |
4175 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4176 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
4177 | |
4178 | /* Record the fields for the semantic handler. */ | |
4179 | FLD (f_srcdst) = f_srcdst; | |
4180 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 JM |
4181 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
4182 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
4183 | |
4184 | #if WITH_PROFILE_MODEL_P | |
4185 | /* Record the fields for profiling. */ | |
4186 | if (PROFILE_MODEL_P (current_cpu)) | |
4187 | { | |
4188 | FLD (in_abase) = f_abase; | |
104c1213 JM |
4189 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4190 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
96baa820 | 4191 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
4192 | } |
4193 | #endif | |
4194 | #undef FLD | |
7a292a7a | 4195 | return idesc; |
c906108c SS |
4196 | } |
4197 | ||
96baa820 | 4198 | extract_sfmt_stt_indirect_index: |
c906108c | 4199 | { |
7a292a7a | 4200 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4201 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4202 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4203 | UINT f_srcdst; | |
4204 | UINT f_abase; | |
4205 | UINT f_scale; | |
4206 | UINT f_index; | |
c906108c | 4207 | |
96baa820 JM |
4208 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4209 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4210 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
4211 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4212 | |
4213 | /* Record the fields for the semantic handler. */ | |
4214 | FLD (f_srcdst) = f_srcdst; | |
4215 | FLD (f_scale) = f_scale; | |
4216 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4217 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
96baa820 JM |
4218 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
4219 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
4220 | |
4221 | #if WITH_PROFILE_MODEL_P | |
4222 | /* Record the fields for profiling. */ | |
4223 | if (PROFILE_MODEL_P (current_cpu)) | |
4224 | { | |
4225 | FLD (in_abase) = f_abase; | |
104c1213 JM |
4226 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4227 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c | 4228 | FLD (in_index) = f_index; |
96baa820 | 4229 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
4230 | } |
4231 | #endif | |
4232 | #undef FLD | |
7a292a7a | 4233 | return idesc; |
c906108c SS |
4234 | } |
4235 | ||
96baa820 | 4236 | extract_sfmt_stt_disp: |
c906108c | 4237 | { |
7a292a7a | 4238 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4239 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4240 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4241 | UINT f_optdisp; | |
4242 | UINT f_srcdst; | |
4243 | /* Contents of trailing part of insn. */ | |
4244 | UINT word_1; | |
c906108c | 4245 | |
96baa820 JM |
4246 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
4247 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
4248 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
c906108c SS |
4249 | |
4250 | /* Record the fields for the semantic handler. */ | |
4251 | FLD (f_srcdst) = f_srcdst; | |
4252 | FLD (f_optdisp) = f_optdisp; | |
96baa820 JM |
4253 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
4254 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
4255 | |
4256 | #if WITH_PROFILE_MODEL_P | |
4257 | /* Record the fields for profiling. */ | |
4258 | if (PROFILE_MODEL_P (current_cpu)) | |
4259 | { | |
104c1213 JM |
4260 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4261 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
96baa820 | 4262 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
4263 | } |
4264 | #endif | |
4265 | #undef FLD | |
7a292a7a | 4266 | return idesc; |
c906108c SS |
4267 | } |
4268 | ||
96baa820 | 4269 | extract_sfmt_stt_indirect_disp: |
c906108c | 4270 | { |
7a292a7a | 4271 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4272 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4273 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4274 | UINT f_optdisp; | |
4275 | UINT f_srcdst; | |
4276 | UINT f_abase; | |
4277 | /* Contents of trailing part of insn. */ | |
4278 | UINT word_1; | |
c906108c | 4279 | |
96baa820 JM |
4280 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
4281 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
4282 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
4283 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
4284 | |
4285 | /* Record the fields for the semantic handler. */ | |
4286 | FLD (f_srcdst) = f_srcdst; | |
4287 | FLD (f_optdisp) = f_optdisp; | |
4288 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 JM |
4289 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
4290 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
4291 | |
4292 | #if WITH_PROFILE_MODEL_P | |
4293 | /* Record the fields for profiling. */ | |
4294 | if (PROFILE_MODEL_P (current_cpu)) | |
4295 | { | |
4296 | FLD (in_abase) = f_abase; | |
104c1213 JM |
4297 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4298 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
96baa820 | 4299 | FLD (in_st_src) = f_srcdst; |
c906108c SS |
4300 | } |
4301 | #endif | |
4302 | #undef FLD | |
7a292a7a | 4303 | return idesc; |
c906108c SS |
4304 | } |
4305 | ||
96baa820 | 4306 | extract_sfmt_stt_index_disp: |
c906108c | 4307 | { |
7a292a7a | 4308 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4309 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4310 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4311 | UINT f_optdisp; | |
4312 | UINT f_srcdst; | |
4313 | UINT f_scale; | |
4314 | UINT f_index; | |
4315 | /* Contents of trailing part of insn. */ | |
4316 | UINT word_1; | |
c906108c | 4317 | |
96baa820 JM |
4318 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
4319 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
4320 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
4321 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
4322 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4323 | |
4324 | /* Record the fields for the semantic handler. */ | |
4325 | FLD (f_srcdst) = f_srcdst; | |
4326 | FLD (f_optdisp) = f_optdisp; | |
4327 | FLD (f_scale) = f_scale; | |
4328 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
96baa820 JM |
4329 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; |
4330 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
c906108c SS |
4331 | |
4332 | #if WITH_PROFILE_MODEL_P | |
4333 | /* Record the fields for profiling. */ | |
4334 | if (PROFILE_MODEL_P (current_cpu)) | |
4335 | { | |
104c1213 JM |
4336 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4337 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
4338 | FLD (in_index) = f_index; |
4339 | FLD (in_st_src) = f_srcdst; | |
4340 | } | |
4341 | #endif | |
4342 | #undef FLD | |
7a292a7a | 4343 | return idesc; |
c906108c SS |
4344 | } |
4345 | ||
96baa820 | 4346 | extract_sfmt_stt_indirect_index_disp: |
c906108c | 4347 | { |
7a292a7a | 4348 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4349 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4350 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4351 | UINT f_optdisp; | |
4352 | UINT f_srcdst; | |
4353 | UINT f_abase; | |
4354 | UINT f_scale; | |
4355 | UINT f_index; | |
4356 | /* Contents of trailing part of insn. */ | |
4357 | UINT word_1; | |
c906108c | 4358 | |
96baa820 JM |
4359 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
4360 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
4361 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
4362 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4363 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
4364 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4365 | |
4366 | /* Record the fields for the semantic handler. */ | |
4367 | FLD (f_srcdst) = f_srcdst; | |
4368 | FLD (f_optdisp) = f_optdisp; | |
4369 | FLD (f_scale) = f_scale; | |
4370 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4371 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4372 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 4373 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
4374 | |
4375 | #if WITH_PROFILE_MODEL_P | |
4376 | /* Record the fields for profiling. */ | |
4377 | if (PROFILE_MODEL_P (current_cpu)) | |
4378 | { | |
4379 | FLD (in_abase) = f_abase; | |
104c1213 JM |
4380 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4381 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
4382 | FLD (in_index) = f_index; |
4383 | FLD (in_st_src) = f_srcdst; | |
4384 | } | |
4385 | #endif | |
4386 | #undef FLD | |
7a292a7a | 4387 | return idesc; |
c906108c SS |
4388 | } |
4389 | ||
96baa820 | 4390 | extract_sfmt_stq_offset: |
c906108c | 4391 | { |
7a292a7a | 4392 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4393 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4394 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
4395 | UINT f_srcdst; | |
4396 | UINT f_offset; | |
c906108c | 4397 | |
96baa820 JM |
4398 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4399 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
4400 | |
4401 | /* Record the fields for the semantic handler. */ | |
4402 | FLD (f_srcdst) = f_srcdst; | |
4403 | FLD (f_offset) = f_offset; | |
4404 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 4405 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
4406 | |
4407 | #if WITH_PROFILE_MODEL_P | |
4408 | /* Record the fields for profiling. */ | |
4409 | if (PROFILE_MODEL_P (current_cpu)) | |
4410 | { | |
104c1213 JM |
4411 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4412 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
4413 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4414 | FLD (in_st_src) = f_srcdst; |
4415 | } | |
4416 | #endif | |
4417 | #undef FLD | |
7a292a7a | 4418 | return idesc; |
c906108c SS |
4419 | } |
4420 | ||
96baa820 | 4421 | extract_sfmt_stq_indirect_offset: |
c906108c | 4422 | { |
7a292a7a | 4423 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4424 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4425 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
4426 | UINT f_srcdst; | |
4427 | UINT f_abase; | |
4428 | UINT f_offset; | |
c906108c | 4429 | |
96baa820 JM |
4430 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4431 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4432 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
4433 | |
4434 | /* Record the fields for the semantic handler. */ | |
4435 | FLD (f_srcdst) = f_srcdst; | |
4436 | FLD (f_offset) = f_offset; | |
4437 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4438 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 4439 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
4440 | |
4441 | #if WITH_PROFILE_MODEL_P | |
4442 | /* Record the fields for profiling. */ | |
4443 | if (PROFILE_MODEL_P (current_cpu)) | |
4444 | { | |
4445 | FLD (in_abase) = f_abase; | |
104c1213 JM |
4446 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4447 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
4448 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4449 | FLD (in_st_src) = f_srcdst; |
4450 | } | |
4451 | #endif | |
4452 | #undef FLD | |
7a292a7a | 4453 | return idesc; |
c906108c SS |
4454 | } |
4455 | ||
96baa820 | 4456 | extract_sfmt_stq_indirect: |
c906108c | 4457 | { |
7a292a7a | 4458 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4459 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4460 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
4461 | UINT f_srcdst; | |
4462 | UINT f_abase; | |
c906108c | 4463 | |
96baa820 JM |
4464 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4465 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
4466 | |
4467 | /* Record the fields for the semantic handler. */ | |
4468 | FLD (f_srcdst) = f_srcdst; | |
4469 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4470 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 4471 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
4472 | |
4473 | #if WITH_PROFILE_MODEL_P | |
4474 | /* Record the fields for profiling. */ | |
4475 | if (PROFILE_MODEL_P (current_cpu)) | |
4476 | { | |
4477 | FLD (in_abase) = f_abase; | |
104c1213 JM |
4478 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4479 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
4480 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4481 | FLD (in_st_src) = f_srcdst; |
4482 | } | |
4483 | #endif | |
4484 | #undef FLD | |
7a292a7a | 4485 | return idesc; |
c906108c SS |
4486 | } |
4487 | ||
96baa820 | 4488 | extract_sfmt_stq_indirect_index: |
c906108c | 4489 | { |
7a292a7a | 4490 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4491 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4492 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4493 | UINT f_srcdst; | |
4494 | UINT f_abase; | |
4495 | UINT f_scale; | |
4496 | UINT f_index; | |
c906108c | 4497 | |
96baa820 JM |
4498 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4499 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4500 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
4501 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4502 | |
4503 | /* Record the fields for the semantic handler. */ | |
4504 | FLD (f_srcdst) = f_srcdst; | |
4505 | FLD (f_scale) = f_scale; | |
4506 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4507 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4508 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 4509 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
4510 | |
4511 | #if WITH_PROFILE_MODEL_P | |
4512 | /* Record the fields for profiling. */ | |
4513 | if (PROFILE_MODEL_P (current_cpu)) | |
4514 | { | |
4515 | FLD (in_abase) = f_abase; | |
104c1213 JM |
4516 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4517 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
4518 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4519 | FLD (in_index) = f_index; |
4520 | FLD (in_st_src) = f_srcdst; | |
4521 | } | |
4522 | #endif | |
4523 | #undef FLD | |
7a292a7a | 4524 | return idesc; |
c906108c SS |
4525 | } |
4526 | ||
96baa820 | 4527 | extract_sfmt_stq_disp: |
c906108c | 4528 | { |
7a292a7a | 4529 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4530 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4531 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4532 | UINT f_optdisp; | |
4533 | UINT f_srcdst; | |
4534 | /* Contents of trailing part of insn. */ | |
4535 | UINT word_1; | |
c906108c | 4536 | |
96baa820 JM |
4537 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
4538 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
4539 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
c906108c SS |
4540 | |
4541 | /* Record the fields for the semantic handler. */ | |
4542 | FLD (f_srcdst) = f_srcdst; | |
4543 | FLD (f_optdisp) = f_optdisp; | |
4544 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 4545 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
4546 | |
4547 | #if WITH_PROFILE_MODEL_P | |
4548 | /* Record the fields for profiling. */ | |
4549 | if (PROFILE_MODEL_P (current_cpu)) | |
4550 | { | |
104c1213 JM |
4551 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4552 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
4553 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4554 | FLD (in_st_src) = f_srcdst; |
4555 | } | |
4556 | #endif | |
4557 | #undef FLD | |
7a292a7a | 4558 | return idesc; |
c906108c SS |
4559 | } |
4560 | ||
96baa820 | 4561 | extract_sfmt_stq_indirect_disp: |
c906108c | 4562 | { |
7a292a7a | 4563 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4564 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4565 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4566 | UINT f_optdisp; | |
4567 | UINT f_srcdst; | |
4568 | UINT f_abase; | |
4569 | /* Contents of trailing part of insn. */ | |
4570 | UINT word_1; | |
c906108c | 4571 | |
96baa820 JM |
4572 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
4573 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
4574 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
4575 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
4576 | |
4577 | /* Record the fields for the semantic handler. */ | |
4578 | FLD (f_srcdst) = f_srcdst; | |
4579 | FLD (f_optdisp) = f_optdisp; | |
4580 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4581 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 4582 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
4583 | |
4584 | #if WITH_PROFILE_MODEL_P | |
4585 | /* Record the fields for profiling. */ | |
4586 | if (PROFILE_MODEL_P (current_cpu)) | |
4587 | { | |
4588 | FLD (in_abase) = f_abase; | |
104c1213 JM |
4589 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4590 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
4591 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4592 | FLD (in_st_src) = f_srcdst; |
4593 | } | |
4594 | #endif | |
4595 | #undef FLD | |
7a292a7a | 4596 | return idesc; |
c906108c SS |
4597 | } |
4598 | ||
96baa820 | 4599 | extract_sfmt_stq_index_disp: |
c906108c | 4600 | { |
7a292a7a | 4601 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4602 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4603 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4604 | UINT f_optdisp; | |
4605 | UINT f_srcdst; | |
4606 | UINT f_scale; | |
4607 | UINT f_index; | |
4608 | /* Contents of trailing part of insn. */ | |
4609 | UINT word_1; | |
c906108c | 4610 | |
96baa820 JM |
4611 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
4612 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
4613 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
4614 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
4615 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4616 | |
4617 | /* Record the fields for the semantic handler. */ | |
4618 | FLD (f_srcdst) = f_srcdst; | |
4619 | FLD (f_optdisp) = f_optdisp; | |
4620 | FLD (f_scale) = f_scale; | |
4621 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4622 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 4623 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
4624 | |
4625 | #if WITH_PROFILE_MODEL_P | |
4626 | /* Record the fields for profiling. */ | |
4627 | if (PROFILE_MODEL_P (current_cpu)) | |
4628 | { | |
104c1213 JM |
4629 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4630 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
4631 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4632 | FLD (in_index) = f_index; |
4633 | FLD (in_st_src) = f_srcdst; | |
4634 | } | |
4635 | #endif | |
4636 | #undef FLD | |
7a292a7a | 4637 | return idesc; |
c906108c SS |
4638 | } |
4639 | ||
96baa820 | 4640 | extract_sfmt_stq_indirect_index_disp: |
c906108c | 4641 | { |
7a292a7a | 4642 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4643 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4644 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
4645 | UINT f_optdisp; | |
4646 | UINT f_srcdst; | |
4647 | UINT f_abase; | |
4648 | UINT f_scale; | |
4649 | UINT f_index; | |
4650 | /* Contents of trailing part of insn. */ | |
4651 | UINT word_1; | |
c906108c | 4652 | |
96baa820 JM |
4653 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
4654 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
4655 | f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); | |
4656 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4657 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
4658 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4659 | |
4660 | /* Record the fields for the semantic handler. */ | |
4661 | FLD (f_srcdst) = f_srcdst; | |
4662 | FLD (f_optdisp) = f_optdisp; | |
4663 | FLD (f_scale) = f_scale; | |
4664 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4665 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4666 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
96baa820 | 4667 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); |
c906108c SS |
4668 | |
4669 | #if WITH_PROFILE_MODEL_P | |
4670 | /* Record the fields for profiling. */ | |
4671 | if (PROFILE_MODEL_P (current_cpu)) | |
4672 | { | |
4673 | FLD (in_abase) = f_abase; | |
104c1213 JM |
4674 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); |
4675 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
4676 | FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4677 | FLD (in_index) = f_index; |
4678 | FLD (in_st_src) = f_srcdst; | |
4679 | } | |
4680 | #endif | |
4681 | #undef FLD | |
7a292a7a | 4682 | return idesc; |
c906108c SS |
4683 | } |
4684 | ||
96baa820 | 4685 | extract_sfmt_cmpobe_reg: |
c906108c | 4686 | { |
7a292a7a | 4687 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4688 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4689 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
4690 | UINT f_br_src1; | |
4691 | UINT f_br_src2; | |
4692 | SI f_br_disp; | |
c906108c | 4693 | |
96baa820 JM |
4694 | f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4695 | f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4696 | f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); | |
c906108c SS |
4697 | |
4698 | /* Record the fields for the semantic handler. */ | |
4699 | FLD (i_br_disp) = f_br_disp; | |
4700 | FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; | |
4701 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
96baa820 | 4702 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobe_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); |
c906108c SS |
4703 | |
4704 | #if WITH_PROFILE_MODEL_P | |
4705 | /* Record the fields for profiling. */ | |
4706 | if (PROFILE_MODEL_P (current_cpu)) | |
4707 | { | |
4708 | FLD (in_br_src1) = f_br_src1; | |
4709 | FLD (in_br_src2) = f_br_src2; | |
4710 | } | |
4711 | #endif | |
4712 | #undef FLD | |
7a292a7a | 4713 | return idesc; |
c906108c SS |
4714 | } |
4715 | ||
96baa820 | 4716 | extract_sfmt_cmpobe_lit: |
c906108c | 4717 | { |
7a292a7a | 4718 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4719 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4720 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
4721 | UINT f_br_src1; | |
4722 | UINT f_br_src2; | |
4723 | SI f_br_disp; | |
c906108c | 4724 | |
96baa820 JM |
4725 | f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4726 | f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4727 | f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); | |
c906108c SS |
4728 | |
4729 | /* Record the fields for the semantic handler. */ | |
4730 | FLD (f_br_src1) = f_br_src1; | |
4731 | FLD (i_br_disp) = f_br_disp; | |
4732 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
96baa820 | 4733 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobe_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); |
c906108c SS |
4734 | |
4735 | #if WITH_PROFILE_MODEL_P | |
4736 | /* Record the fields for profiling. */ | |
4737 | if (PROFILE_MODEL_P (current_cpu)) | |
4738 | { | |
4739 | FLD (in_br_src2) = f_br_src2; | |
4740 | } | |
4741 | #endif | |
4742 | #undef FLD | |
7a292a7a | 4743 | return idesc; |
c906108c SS |
4744 | } |
4745 | ||
96baa820 | 4746 | extract_sfmt_cmpobl_reg: |
c906108c | 4747 | { |
7a292a7a | 4748 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4749 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4750 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
4751 | UINT f_br_src1; | |
4752 | UINT f_br_src2; | |
4753 | SI f_br_disp; | |
c906108c | 4754 | |
96baa820 JM |
4755 | f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4756 | f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4757 | f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); | |
c906108c SS |
4758 | |
4759 | /* Record the fields for the semantic handler. */ | |
4760 | FLD (i_br_disp) = f_br_disp; | |
4761 | FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; | |
4762 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
96baa820 | 4763 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobl_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); |
c906108c SS |
4764 | |
4765 | #if WITH_PROFILE_MODEL_P | |
4766 | /* Record the fields for profiling. */ | |
4767 | if (PROFILE_MODEL_P (current_cpu)) | |
4768 | { | |
4769 | FLD (in_br_src1) = f_br_src1; | |
4770 | FLD (in_br_src2) = f_br_src2; | |
4771 | } | |
4772 | #endif | |
4773 | #undef FLD | |
7a292a7a | 4774 | return idesc; |
c906108c SS |
4775 | } |
4776 | ||
96baa820 | 4777 | extract_sfmt_cmpobl_lit: |
c906108c | 4778 | { |
7a292a7a | 4779 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4780 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4781 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
4782 | UINT f_br_src1; | |
4783 | UINT f_br_src2; | |
4784 | SI f_br_disp; | |
c906108c | 4785 | |
96baa820 JM |
4786 | f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4787 | f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4788 | f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); | |
c906108c SS |
4789 | |
4790 | /* Record the fields for the semantic handler. */ | |
4791 | FLD (f_br_src1) = f_br_src1; | |
4792 | FLD (i_br_disp) = f_br_disp; | |
4793 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
96baa820 | 4794 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobl_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); |
c906108c SS |
4795 | |
4796 | #if WITH_PROFILE_MODEL_P | |
4797 | /* Record the fields for profiling. */ | |
4798 | if (PROFILE_MODEL_P (current_cpu)) | |
4799 | { | |
4800 | FLD (in_br_src2) = f_br_src2; | |
4801 | } | |
4802 | #endif | |
4803 | #undef FLD | |
7a292a7a | 4804 | return idesc; |
c906108c SS |
4805 | } |
4806 | ||
96baa820 | 4807 | extract_sfmt_bbc_reg: |
c906108c | 4808 | { |
7a292a7a | 4809 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4810 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4811 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
4812 | UINT f_br_src1; | |
4813 | UINT f_br_src2; | |
4814 | SI f_br_disp; | |
c906108c | 4815 | |
96baa820 JM |
4816 | f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4817 | f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4818 | f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); | |
c906108c SS |
4819 | |
4820 | /* Record the fields for the semantic handler. */ | |
4821 | FLD (i_br_disp) = f_br_disp; | |
4822 | FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; | |
4823 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
96baa820 | 4824 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbc_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); |
c906108c SS |
4825 | |
4826 | #if WITH_PROFILE_MODEL_P | |
4827 | /* Record the fields for profiling. */ | |
4828 | if (PROFILE_MODEL_P (current_cpu)) | |
4829 | { | |
4830 | FLD (in_br_src1) = f_br_src1; | |
4831 | FLD (in_br_src2) = f_br_src2; | |
4832 | } | |
4833 | #endif | |
4834 | #undef FLD | |
7a292a7a | 4835 | return idesc; |
c906108c SS |
4836 | } |
4837 | ||
96baa820 | 4838 | extract_sfmt_bbc_lit: |
c906108c | 4839 | { |
7a292a7a | 4840 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4841 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4842 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
4843 | UINT f_br_src1; | |
4844 | UINT f_br_src2; | |
4845 | SI f_br_disp; | |
c906108c | 4846 | |
96baa820 JM |
4847 | f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
4848 | f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
4849 | f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); | |
c906108c SS |
4850 | |
4851 | /* Record the fields for the semantic handler. */ | |
4852 | FLD (f_br_src1) = f_br_src1; | |
4853 | FLD (i_br_disp) = f_br_disp; | |
4854 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
96baa820 | 4855 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbc_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); |
c906108c SS |
4856 | |
4857 | #if WITH_PROFILE_MODEL_P | |
4858 | /* Record the fields for profiling. */ | |
4859 | if (PROFILE_MODEL_P (current_cpu)) | |
4860 | { | |
4861 | FLD (in_br_src2) = f_br_src2; | |
4862 | } | |
4863 | #endif | |
4864 | #undef FLD | |
7a292a7a | 4865 | return idesc; |
c906108c SS |
4866 | } |
4867 | ||
96baa820 | 4868 | extract_sfmt_cmpi: |
c906108c | 4869 | { |
7a292a7a | 4870 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4871 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4872 | #define FLD(f) abuf->fields.sfmt_emul.f |
4873 | UINT f_src2; | |
4874 | UINT f_src1; | |
c906108c | 4875 | |
96baa820 JM |
4876 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
4877 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4878 | |
4879 | /* Record the fields for the semantic handler. */ | |
4880 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
4881 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
96baa820 | 4882 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); |
c906108c SS |
4883 | |
4884 | #if WITH_PROFILE_MODEL_P | |
4885 | /* Record the fields for profiling. */ | |
4886 | if (PROFILE_MODEL_P (current_cpu)) | |
4887 | { | |
4888 | FLD (in_src1) = f_src1; | |
4889 | FLD (in_src2) = f_src2; | |
4890 | } | |
4891 | #endif | |
4892 | #undef FLD | |
7a292a7a | 4893 | return idesc; |
c906108c SS |
4894 | } |
4895 | ||
96baa820 | 4896 | extract_sfmt_cmpi1: |
c906108c | 4897 | { |
7a292a7a | 4898 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4899 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4900 | #define FLD(f) abuf->fields.sfmt_emul1.f |
4901 | UINT f_src2; | |
4902 | UINT f_src1; | |
c906108c | 4903 | |
96baa820 JM |
4904 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
4905 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4906 | |
4907 | /* Record the fields for the semantic handler. */ | |
4908 | FLD (f_src1) = f_src1; | |
4909 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
96baa820 | 4910 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); |
c906108c SS |
4911 | |
4912 | #if WITH_PROFILE_MODEL_P | |
4913 | /* Record the fields for profiling. */ | |
4914 | if (PROFILE_MODEL_P (current_cpu)) | |
4915 | { | |
4916 | FLD (in_src2) = f_src2; | |
4917 | } | |
4918 | #endif | |
4919 | #undef FLD | |
7a292a7a | 4920 | return idesc; |
c906108c SS |
4921 | } |
4922 | ||
96baa820 | 4923 | extract_sfmt_cmpi2: |
c906108c | 4924 | { |
7a292a7a | 4925 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4926 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4927 | #define FLD(f) abuf->fields.sfmt_emul2.f |
4928 | UINT f_src2; | |
4929 | UINT f_src1; | |
c906108c | 4930 | |
96baa820 JM |
4931 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
4932 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4933 | |
4934 | /* Record the fields for the semantic handler. */ | |
4935 | FLD (f_src2) = f_src2; | |
4936 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
96baa820 | 4937 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0)); |
c906108c SS |
4938 | |
4939 | #if WITH_PROFILE_MODEL_P | |
4940 | /* Record the fields for profiling. */ | |
4941 | if (PROFILE_MODEL_P (current_cpu)) | |
4942 | { | |
4943 | FLD (in_src1) = f_src1; | |
4944 | } | |
4945 | #endif | |
4946 | #undef FLD | |
7a292a7a | 4947 | return idesc; |
c906108c SS |
4948 | } |
4949 | ||
96baa820 | 4950 | extract_sfmt_cmpi3: |
c906108c | 4951 | { |
7a292a7a | 4952 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4953 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4954 | #define FLD(f) abuf->fields.sfmt_emul3.f |
4955 | UINT f_src2; | |
4956 | UINT f_src1; | |
c906108c | 4957 | |
96baa820 JM |
4958 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
4959 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4960 | |
4961 | /* Record the fields for the semantic handler. */ | |
4962 | FLD (f_src1) = f_src1; | |
4963 | FLD (f_src2) = f_src2; | |
96baa820 | 4964 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0)); |
c906108c SS |
4965 | |
4966 | #if WITH_PROFILE_MODEL_P | |
4967 | /* Record the fields for profiling. */ | |
4968 | if (PROFILE_MODEL_P (current_cpu)) | |
4969 | { | |
4970 | } | |
4971 | #endif | |
4972 | #undef FLD | |
7a292a7a | 4973 | return idesc; |
c906108c SS |
4974 | } |
4975 | ||
96baa820 | 4976 | extract_sfmt_cmpo: |
c906108c | 4977 | { |
7a292a7a | 4978 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 4979 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
4980 | #define FLD(f) abuf->fields.sfmt_emul.f |
4981 | UINT f_src2; | |
4982 | UINT f_src1; | |
c906108c | 4983 | |
96baa820 JM |
4984 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
4985 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
4986 | |
4987 | /* Record the fields for the semantic handler. */ | |
4988 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
4989 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
96baa820 | 4990 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); |
c906108c SS |
4991 | |
4992 | #if WITH_PROFILE_MODEL_P | |
4993 | /* Record the fields for profiling. */ | |
4994 | if (PROFILE_MODEL_P (current_cpu)) | |
4995 | { | |
4996 | FLD (in_src1) = f_src1; | |
4997 | FLD (in_src2) = f_src2; | |
4998 | } | |
4999 | #endif | |
5000 | #undef FLD | |
7a292a7a | 5001 | return idesc; |
c906108c SS |
5002 | } |
5003 | ||
96baa820 | 5004 | extract_sfmt_cmpo1: |
c906108c | 5005 | { |
7a292a7a | 5006 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5007 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5008 | #define FLD(f) abuf->fields.sfmt_emul1.f |
5009 | UINT f_src2; | |
5010 | UINT f_src1; | |
c906108c | 5011 | |
96baa820 JM |
5012 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
5013 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
5014 | |
5015 | /* Record the fields for the semantic handler. */ | |
5016 | FLD (f_src1) = f_src1; | |
5017 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
96baa820 | 5018 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); |
c906108c SS |
5019 | |
5020 | #if WITH_PROFILE_MODEL_P | |
5021 | /* Record the fields for profiling. */ | |
5022 | if (PROFILE_MODEL_P (current_cpu)) | |
5023 | { | |
5024 | FLD (in_src2) = f_src2; | |
5025 | } | |
5026 | #endif | |
5027 | #undef FLD | |
7a292a7a | 5028 | return idesc; |
c906108c SS |
5029 | } |
5030 | ||
96baa820 | 5031 | extract_sfmt_cmpo2: |
c906108c | 5032 | { |
7a292a7a | 5033 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5034 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5035 | #define FLD(f) abuf->fields.sfmt_emul2.f |
5036 | UINT f_src2; | |
5037 | UINT f_src1; | |
c906108c | 5038 | |
96baa820 JM |
5039 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
5040 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
5041 | |
5042 | /* Record the fields for the semantic handler. */ | |
5043 | FLD (f_src2) = f_src2; | |
5044 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
96baa820 | 5045 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0)); |
c906108c SS |
5046 | |
5047 | #if WITH_PROFILE_MODEL_P | |
5048 | /* Record the fields for profiling. */ | |
5049 | if (PROFILE_MODEL_P (current_cpu)) | |
5050 | { | |
5051 | FLD (in_src1) = f_src1; | |
5052 | } | |
5053 | #endif | |
5054 | #undef FLD | |
7a292a7a | 5055 | return idesc; |
c906108c SS |
5056 | } |
5057 | ||
96baa820 | 5058 | extract_sfmt_cmpo3: |
c906108c | 5059 | { |
7a292a7a | 5060 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5061 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5062 | #define FLD(f) abuf->fields.sfmt_emul3.f |
5063 | UINT f_src2; | |
5064 | UINT f_src1; | |
c906108c | 5065 | |
96baa820 JM |
5066 | f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
5067 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
5068 | |
5069 | /* Record the fields for the semantic handler. */ | |
5070 | FLD (f_src1) = f_src1; | |
5071 | FLD (f_src2) = f_src2; | |
96baa820 | 5072 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0)); |
c906108c SS |
5073 | |
5074 | #if WITH_PROFILE_MODEL_P | |
5075 | /* Record the fields for profiling. */ | |
5076 | if (PROFILE_MODEL_P (current_cpu)) | |
5077 | { | |
5078 | } | |
5079 | #endif | |
5080 | #undef FLD | |
7a292a7a | 5081 | return idesc; |
c906108c SS |
5082 | } |
5083 | ||
96baa820 | 5084 | extract_sfmt_testno_reg: |
c906108c | 5085 | { |
7a292a7a | 5086 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5087 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5088 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
5089 | UINT f_br_src1; | |
c906108c | 5090 | |
96baa820 | 5091 | f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); |
c906108c SS |
5092 | |
5093 | /* Record the fields for the semantic handler. */ | |
5094 | FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; | |
96baa820 | 5095 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_testno_reg", "br_src1 0x%x", 'x', f_br_src1, (char *) 0)); |
c906108c SS |
5096 | |
5097 | #if WITH_PROFILE_MODEL_P | |
5098 | /* Record the fields for profiling. */ | |
5099 | if (PROFILE_MODEL_P (current_cpu)) | |
5100 | { | |
5101 | FLD (out_br_src1) = f_br_src1; | |
5102 | } | |
5103 | #endif | |
5104 | #undef FLD | |
7a292a7a | 5105 | return idesc; |
c906108c SS |
5106 | } |
5107 | ||
96baa820 | 5108 | extract_sfmt_bno: |
c906108c | 5109 | { |
7a292a7a | 5110 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5111 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5112 | #define FLD(f) abuf->fields.sfmt_bno.f |
5113 | SI f_ctrl_disp; | |
c906108c | 5114 | |
96baa820 | 5115 | f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); |
c906108c SS |
5116 | |
5117 | /* Record the fields for the semantic handler. */ | |
5118 | FLD (i_ctrl_disp) = f_ctrl_disp; | |
96baa820 | 5119 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bno", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0)); |
c906108c SS |
5120 | |
5121 | #if WITH_PROFILE_MODEL_P | |
5122 | /* Record the fields for profiling. */ | |
5123 | if (PROFILE_MODEL_P (current_cpu)) | |
5124 | { | |
5125 | } | |
5126 | #endif | |
5127 | #undef FLD | |
7a292a7a | 5128 | return idesc; |
c906108c SS |
5129 | } |
5130 | ||
96baa820 | 5131 | extract_sfmt_b: |
c906108c | 5132 | { |
7a292a7a | 5133 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5134 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5135 | #define FLD(f) abuf->fields.sfmt_bno.f |
5136 | SI f_ctrl_disp; | |
c906108c | 5137 | |
96baa820 | 5138 | f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); |
c906108c SS |
5139 | |
5140 | /* Record the fields for the semantic handler. */ | |
5141 | FLD (i_ctrl_disp) = f_ctrl_disp; | |
96baa820 | 5142 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_b", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0)); |
c906108c SS |
5143 | |
5144 | #if WITH_PROFILE_MODEL_P | |
5145 | /* Record the fields for profiling. */ | |
5146 | if (PROFILE_MODEL_P (current_cpu)) | |
5147 | { | |
5148 | } | |
5149 | #endif | |
5150 | #undef FLD | |
7a292a7a | 5151 | return idesc; |
c906108c SS |
5152 | } |
5153 | ||
96baa820 | 5154 | extract_sfmt_bx_indirect_offset: |
c906108c | 5155 | { |
7a292a7a | 5156 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5157 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5158 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
5159 | UINT f_abase; | |
5160 | UINT f_offset; | |
c906108c | 5161 | |
96baa820 JM |
5162 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
5163 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
5164 | |
5165 | /* Record the fields for the semantic handler. */ | |
5166 | FLD (f_offset) = f_offset; | |
5167 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 | 5168 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0)); |
c906108c SS |
5169 | |
5170 | #if WITH_PROFILE_MODEL_P | |
5171 | /* Record the fields for profiling. */ | |
5172 | if (PROFILE_MODEL_P (current_cpu)) | |
5173 | { | |
5174 | FLD (in_abase) = f_abase; | |
5175 | } | |
5176 | #endif | |
5177 | #undef FLD | |
7a292a7a | 5178 | return idesc; |
c906108c SS |
5179 | } |
5180 | ||
96baa820 | 5181 | extract_sfmt_bx_indirect: |
c906108c | 5182 | { |
7a292a7a | 5183 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5184 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5185 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
5186 | UINT f_abase; | |
c906108c | 5187 | |
96baa820 | 5188 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
c906108c SS |
5189 | |
5190 | /* Record the fields for the semantic handler. */ | |
5191 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 | 5192 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0)); |
c906108c SS |
5193 | |
5194 | #if WITH_PROFILE_MODEL_P | |
5195 | /* Record the fields for profiling. */ | |
5196 | if (PROFILE_MODEL_P (current_cpu)) | |
5197 | { | |
5198 | FLD (in_abase) = f_abase; | |
5199 | } | |
5200 | #endif | |
5201 | #undef FLD | |
7a292a7a | 5202 | return idesc; |
c906108c SS |
5203 | } |
5204 | ||
96baa820 | 5205 | extract_sfmt_bx_indirect_index: |
c906108c | 5206 | { |
7a292a7a | 5207 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5208 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5209 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
5210 | UINT f_abase; | |
5211 | UINT f_scale; | |
5212 | UINT f_index; | |
c906108c | 5213 | |
96baa820 JM |
5214 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
5215 | f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); | |
5216 | f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); | |
c906108c SS |
5217 | |
5218 | /* Record the fields for the semantic handler. */ | |
5219 | FLD (f_scale) = f_scale; | |
5220 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5221 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
96baa820 | 5222 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, (char *) 0)); |
c906108c SS |
5223 | |
5224 | #if WITH_PROFILE_MODEL_P | |
5225 | /* Record the fields for profiling. */ | |
5226 | if (PROFILE_MODEL_P (current_cpu)) | |
5227 | { | |
5228 | FLD (in_abase) = f_abase; | |
5229 | FLD (in_index) = f_index; | |
5230 | } | |
5231 | #endif | |
5232 | #undef FLD | |
7a292a7a | 5233 | return idesc; |
c906108c SS |
5234 | } |
5235 | ||
96baa820 | 5236 | extract_sfmt_bx_disp: |
c906108c | 5237 | { |
7a292a7a | 5238 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5239 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5240 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
5241 | UINT f_optdisp; | |
5242 | /* Contents of trailing part of insn. */ | |
5243 | UINT word_1; | |
c906108c | 5244 | |
96baa820 JM |
5245 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
5246 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
c906108c SS |
5247 | |
5248 | /* Record the fields for the semantic handler. */ | |
5249 | FLD (f_optdisp) = f_optdisp; | |
96baa820 | 5250 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0)); |
c906108c SS |
5251 | |
5252 | #if WITH_PROFILE_MODEL_P | |
5253 | /* Record the fields for profiling. */ | |
5254 | if (PROFILE_MODEL_P (current_cpu)) | |
5255 | { | |
5256 | } | |
5257 | #endif | |
5258 | #undef FLD | |
7a292a7a | 5259 | return idesc; |
c906108c SS |
5260 | } |
5261 | ||
96baa820 | 5262 | extract_sfmt_bx_indirect_disp: |
c906108c | 5263 | { |
7a292a7a | 5264 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5265 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5266 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
5267 | UINT f_optdisp; | |
5268 | UINT f_abase; | |
5269 | /* Contents of trailing part of insn. */ | |
5270 | UINT word_1; | |
c906108c | 5271 | |
96baa820 JM |
5272 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
5273 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
5274 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); | |
c906108c SS |
5275 | |
5276 | /* Record the fields for the semantic handler. */ | |
5277 | FLD (f_optdisp) = f_optdisp; | |
5278 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 | 5279 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, (char *) 0)); |
c906108c SS |
5280 | |
5281 | #if WITH_PROFILE_MODEL_P | |
5282 | /* Record the fields for profiling. */ | |
5283 | if (PROFILE_MODEL_P (current_cpu)) | |
5284 | { | |
5285 | FLD (in_abase) = f_abase; | |
5286 | } | |
5287 | #endif | |
5288 | #undef FLD | |
7a292a7a | 5289 | return idesc; |
c906108c SS |
5290 | } |
5291 | ||
96baa820 | 5292 | extract_sfmt_callx_disp: |
c906108c | 5293 | { |
7a292a7a | 5294 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5295 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5296 | #define FLD(f) abuf->fields.sfmt_callx_disp.f |
5297 | UINT f_optdisp; | |
5298 | /* Contents of trailing part of insn. */ | |
5299 | UINT word_1; | |
c906108c | 5300 | |
96baa820 JM |
5301 | word_1 = GETIMEMUSI (current_cpu, pc + 4); |
5302 | f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); | |
c906108c SS |
5303 | |
5304 | /* Record the fields for the semantic handler. */ | |
5305 | FLD (f_optdisp) = f_optdisp; | |
96baa820 | 5306 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0)); |
c906108c SS |
5307 | |
5308 | #if WITH_PROFILE_MODEL_P | |
5309 | /* Record the fields for profiling. */ | |
5310 | if (PROFILE_MODEL_P (current_cpu)) | |
5311 | { | |
5312 | FLD (in_h_gr_0) = 0; | |
5313 | FLD (in_h_gr_1) = 1; | |
5314 | FLD (in_h_gr_10) = 10; | |
5315 | FLD (in_h_gr_11) = 11; | |
5316 | FLD (in_h_gr_12) = 12; | |
5317 | FLD (in_h_gr_13) = 13; | |
5318 | FLD (in_h_gr_14) = 14; | |
5319 | FLD (in_h_gr_15) = 15; | |
5320 | FLD (in_h_gr_2) = 2; | |
5321 | FLD (in_h_gr_3) = 3; | |
5322 | FLD (in_h_gr_31) = 31; | |
5323 | FLD (in_h_gr_4) = 4; | |
5324 | FLD (in_h_gr_5) = 5; | |
5325 | FLD (in_h_gr_6) = 6; | |
5326 | FLD (in_h_gr_7) = 7; | |
5327 | FLD (in_h_gr_8) = 8; | |
5328 | FLD (in_h_gr_9) = 9; | |
5329 | FLD (out_h_gr_0) = 0; | |
5330 | FLD (out_h_gr_1) = 1; | |
5331 | FLD (out_h_gr_10) = 10; | |
5332 | FLD (out_h_gr_11) = 11; | |
5333 | FLD (out_h_gr_12) = 12; | |
5334 | FLD (out_h_gr_13) = 13; | |
5335 | FLD (out_h_gr_14) = 14; | |
5336 | FLD (out_h_gr_15) = 15; | |
5337 | FLD (out_h_gr_2) = 2; | |
5338 | FLD (out_h_gr_3) = 3; | |
5339 | FLD (out_h_gr_31) = 31; | |
5340 | FLD (out_h_gr_4) = 4; | |
5341 | FLD (out_h_gr_5) = 5; | |
5342 | FLD (out_h_gr_6) = 6; | |
5343 | FLD (out_h_gr_7) = 7; | |
5344 | FLD (out_h_gr_8) = 8; | |
5345 | FLD (out_h_gr_9) = 9; | |
5346 | } | |
5347 | #endif | |
5348 | #undef FLD | |
7a292a7a | 5349 | return idesc; |
c906108c SS |
5350 | } |
5351 | ||
96baa820 | 5352 | extract_sfmt_callx_indirect: |
c906108c | 5353 | { |
7a292a7a | 5354 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5355 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5356 | #define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f |
5357 | UINT f_abase; | |
c906108c | 5358 | |
96baa820 | 5359 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
c906108c SS |
5360 | |
5361 | /* Record the fields for the semantic handler. */ | |
5362 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 | 5363 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0)); |
c906108c SS |
5364 | |
5365 | #if WITH_PROFILE_MODEL_P | |
5366 | /* Record the fields for profiling. */ | |
5367 | if (PROFILE_MODEL_P (current_cpu)) | |
5368 | { | |
5369 | FLD (in_abase) = f_abase; | |
5370 | FLD (in_h_gr_0) = 0; | |
5371 | FLD (in_h_gr_1) = 1; | |
5372 | FLD (in_h_gr_10) = 10; | |
5373 | FLD (in_h_gr_11) = 11; | |
5374 | FLD (in_h_gr_12) = 12; | |
5375 | FLD (in_h_gr_13) = 13; | |
5376 | FLD (in_h_gr_14) = 14; | |
5377 | FLD (in_h_gr_15) = 15; | |
5378 | FLD (in_h_gr_2) = 2; | |
5379 | FLD (in_h_gr_3) = 3; | |
5380 | FLD (in_h_gr_31) = 31; | |
5381 | FLD (in_h_gr_4) = 4; | |
5382 | FLD (in_h_gr_5) = 5; | |
5383 | FLD (in_h_gr_6) = 6; | |
5384 | FLD (in_h_gr_7) = 7; | |
5385 | FLD (in_h_gr_8) = 8; | |
5386 | FLD (in_h_gr_9) = 9; | |
5387 | FLD (out_h_gr_0) = 0; | |
5388 | FLD (out_h_gr_1) = 1; | |
5389 | FLD (out_h_gr_10) = 10; | |
5390 | FLD (out_h_gr_11) = 11; | |
5391 | FLD (out_h_gr_12) = 12; | |
5392 | FLD (out_h_gr_13) = 13; | |
5393 | FLD (out_h_gr_14) = 14; | |
5394 | FLD (out_h_gr_15) = 15; | |
5395 | FLD (out_h_gr_2) = 2; | |
5396 | FLD (out_h_gr_3) = 3; | |
5397 | FLD (out_h_gr_31) = 31; | |
5398 | FLD (out_h_gr_4) = 4; | |
5399 | FLD (out_h_gr_5) = 5; | |
5400 | FLD (out_h_gr_6) = 6; | |
5401 | FLD (out_h_gr_7) = 7; | |
5402 | FLD (out_h_gr_8) = 8; | |
5403 | FLD (out_h_gr_9) = 9; | |
5404 | } | |
5405 | #endif | |
5406 | #undef FLD | |
7a292a7a | 5407 | return idesc; |
c906108c SS |
5408 | } |
5409 | ||
96baa820 | 5410 | extract_sfmt_callx_indirect_offset: |
c906108c | 5411 | { |
7a292a7a | 5412 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5413 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5414 | #define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f |
5415 | UINT f_abase; | |
5416 | UINT f_offset; | |
c906108c | 5417 | |
96baa820 JM |
5418 | f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); |
5419 | f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); | |
c906108c SS |
5420 | |
5421 | /* Record the fields for the semantic handler. */ | |
5422 | FLD (f_offset) = f_offset; | |
5423 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
96baa820 | 5424 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0)); |
c906108c SS |
5425 | |
5426 | #if WITH_PROFILE_MODEL_P | |
5427 | /* Record the fields for profiling. */ | |
5428 | if (PROFILE_MODEL_P (current_cpu)) | |
5429 | { | |
5430 | FLD (in_abase) = f_abase; | |
5431 | FLD (in_h_gr_0) = 0; | |
5432 | FLD (in_h_gr_1) = 1; | |
5433 | FLD (in_h_gr_10) = 10; | |
5434 | FLD (in_h_gr_11) = 11; | |
5435 | FLD (in_h_gr_12) = 12; | |
5436 | FLD (in_h_gr_13) = 13; | |
5437 | FLD (in_h_gr_14) = 14; | |
5438 | FLD (in_h_gr_15) = 15; | |
5439 | FLD (in_h_gr_2) = 2; | |
5440 | FLD (in_h_gr_3) = 3; | |
5441 | FLD (in_h_gr_31) = 31; | |
5442 | FLD (in_h_gr_4) = 4; | |
5443 | FLD (in_h_gr_5) = 5; | |
5444 | FLD (in_h_gr_6) = 6; | |
5445 | FLD (in_h_gr_7) = 7; | |
5446 | FLD (in_h_gr_8) = 8; | |
5447 | FLD (in_h_gr_9) = 9; | |
5448 | FLD (out_h_gr_0) = 0; | |
5449 | FLD (out_h_gr_1) = 1; | |
5450 | FLD (out_h_gr_10) = 10; | |
5451 | FLD (out_h_gr_11) = 11; | |
5452 | FLD (out_h_gr_12) = 12; | |
5453 | FLD (out_h_gr_13) = 13; | |
5454 | FLD (out_h_gr_14) = 14; | |
5455 | FLD (out_h_gr_15) = 15; | |
5456 | FLD (out_h_gr_2) = 2; | |
5457 | FLD (out_h_gr_3) = 3; | |
5458 | FLD (out_h_gr_31) = 31; | |
5459 | FLD (out_h_gr_4) = 4; | |
5460 | FLD (out_h_gr_5) = 5; | |
5461 | FLD (out_h_gr_6) = 6; | |
5462 | FLD (out_h_gr_7) = 7; | |
5463 | FLD (out_h_gr_8) = 8; | |
5464 | FLD (out_h_gr_9) = 9; | |
5465 | } | |
5466 | #endif | |
5467 | #undef FLD | |
7a292a7a | 5468 | return idesc; |
c906108c SS |
5469 | } |
5470 | ||
96baa820 | 5471 | extract_sfmt_ret: |
c906108c | 5472 | { |
7a292a7a | 5473 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5474 | CGEN_INSN_INT insn = base_insn; |
96baa820 | 5475 | #define FLD(f) abuf->fields.sfmt_callx_disp.f |
c906108c | 5476 | |
c906108c SS |
5477 | |
5478 | /* Record the fields for the semantic handler. */ | |
96baa820 | 5479 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0)); |
c906108c SS |
5480 | |
5481 | #if WITH_PROFILE_MODEL_P | |
5482 | /* Record the fields for profiling. */ | |
5483 | if (PROFILE_MODEL_P (current_cpu)) | |
5484 | { | |
5485 | FLD (in_h_gr_0) = 0; | |
5486 | FLD (in_h_gr_2) = 2; | |
5487 | FLD (in_h_gr_31) = 31; | |
5488 | FLD (out_h_gr_0) = 0; | |
5489 | FLD (out_h_gr_1) = 1; | |
5490 | FLD (out_h_gr_10) = 10; | |
5491 | FLD (out_h_gr_11) = 11; | |
5492 | FLD (out_h_gr_12) = 12; | |
5493 | FLD (out_h_gr_13) = 13; | |
5494 | FLD (out_h_gr_14) = 14; | |
5495 | FLD (out_h_gr_15) = 15; | |
5496 | FLD (out_h_gr_2) = 2; | |
5497 | FLD (out_h_gr_3) = 3; | |
5498 | FLD (out_h_gr_31) = 31; | |
5499 | FLD (out_h_gr_4) = 4; | |
5500 | FLD (out_h_gr_5) = 5; | |
5501 | FLD (out_h_gr_6) = 6; | |
5502 | FLD (out_h_gr_7) = 7; | |
5503 | FLD (out_h_gr_8) = 8; | |
5504 | FLD (out_h_gr_9) = 9; | |
5505 | } | |
5506 | #endif | |
5507 | #undef FLD | |
7a292a7a | 5508 | return idesc; |
c906108c SS |
5509 | } |
5510 | ||
96baa820 | 5511 | extract_sfmt_calls: |
c906108c | 5512 | { |
7a292a7a | 5513 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5514 | CGEN_INSN_INT insn = base_insn; |
96baa820 JM |
5515 | #define FLD(f) abuf->fields.sfmt_emul2.f |
5516 | UINT f_src1; | |
c906108c | 5517 | |
96baa820 | 5518 | f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); |
c906108c SS |
5519 | |
5520 | /* Record the fields for the semantic handler. */ | |
5521 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
96baa820 | 5522 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_calls", "src1 0x%x", 'x', f_src1, (char *) 0)); |
c906108c SS |
5523 | |
5524 | #if WITH_PROFILE_MODEL_P | |
5525 | /* Record the fields for profiling. */ | |
5526 | if (PROFILE_MODEL_P (current_cpu)) | |
5527 | { | |
5528 | FLD (in_src1) = f_src1; | |
5529 | } | |
5530 | #endif | |
5531 | #undef FLD | |
7a292a7a | 5532 | return idesc; |
c906108c SS |
5533 | } |
5534 | ||
96baa820 | 5535 | extract_sfmt_fmark: |
c906108c | 5536 | { |
7a292a7a | 5537 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5538 | CGEN_INSN_INT insn = base_insn; |
96baa820 | 5539 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 5540 | |
c906108c SS |
5541 | |
5542 | /* Record the fields for the semantic handler. */ | |
96baa820 | 5543 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmark", (char *) 0)); |
c906108c SS |
5544 | |
5545 | #if WITH_PROFILE_MODEL_P | |
5546 | /* Record the fields for profiling. */ | |
5547 | if (PROFILE_MODEL_P (current_cpu)) | |
5548 | { | |
5549 | } | |
5550 | #endif | |
5551 | #undef FLD | |
7a292a7a | 5552 | return idesc; |
c906108c SS |
5553 | } |
5554 | ||
96baa820 | 5555 | extract_sfmt_flushreg: |
c906108c | 5556 | { |
7a292a7a | 5557 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c | 5558 | CGEN_INSN_INT insn = base_insn; |
96baa820 | 5559 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 5560 | |
c906108c SS |
5561 | |
5562 | /* Record the fields for the semantic handler. */ | |
96baa820 | 5563 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_flushreg", (char *) 0)); |
c906108c SS |
5564 | |
5565 | #undef FLD | |
7a292a7a | 5566 | return idesc; |
c906108c SS |
5567 | } |
5568 | ||
c906108c | 5569 | } |