]> Git Repo - J-u-boot.git/commit
riscv: implement IPI platform functions using SBI
authorLukas Auer <[email protected]>
Sun, 17 Mar 2019 18:28:34 +0000 (19:28 +0100)
committerAndes <[email protected]>
Mon, 8 Apr 2019 01:44:26 +0000 (09:44 +0800)
commitf152febb2a97696f7c7e6df46bf585cfc962a835
tree50daf485b2c0e168be7b1b59cb150f58b40b89d1
parent34a0626fc344f51cd768efecdd52628b677fb9a8
riscv: implement IPI platform functions using SBI

The supervisor binary interface (SBI) provides the necessary functions
to implement the platform IPI functions riscv_send_ipi() and
riscv_clear_ipi(). Use it to implement them.

This adds support for inter-processor interrupts (IPIs) on RISC-V CPUs
running in supervisor mode. Support for machine mode is already
available for CPUs that include the SiFive CLINT.

Signed-off-by: Lukas Auer <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Tested-by: Bin Meng <[email protected]>
arch/riscv/Kconfig
arch/riscv/lib/Makefile
arch/riscv/lib/sbi_ipi.c [new file with mode: 0644]
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