Git Repo - J-u-boot.git/commit

]> Git Repo - J-u-boot.git/commit

author	Rick Chen <[email protected]>
	Wed, 28 Aug 2019 10:46:06 +0000 (18:46 +0800)
committer	Andes <[email protected]>
	Tue, 3 Sep 2019 01:31:03 +0000 (09:31 +0800)
commit	4fa4267d82d13eb45cc4202e4439de862e8cad0e
tree	ec0822a0d677e1e2fc8c2d4491894373d5857d33	tree \| snapshot
parent	abd858e5754c0f1e71aa86abde049d9ee81fda3e	commit \| diff

dm: cache: add v5l2 cache controller driver

Add a v5l2 cache controller driver that is usually found on
Andes RISC-V ae350 platform. It will parse the cache settings
from the dtb.

In this version tag and data ram control timing can be adjusted
by the requirement from the dtb.

Signed-off-by: Rick Chen <[email protected]>
Cc: KC Lin <[email protected]>
Reviewed-by: Bin Meng <[email protected]>

drivers/cache/Kconfig		diff \| blob \| blame \| history
drivers/cache/Makefile		diff \| blob \| blame \| history
drivers/cache/cache-v5l2.c	[new file with mode: 0644]	blob

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