]> Git Repo - J-u-boot.git/commit
riscv: Remove unnecessary instruction
authorSean Anderson <[email protected]>
Mon, 27 Jan 2020 21:39:44 +0000 (16:39 -0500)
committerAndes <[email protected]>
Mon, 10 Feb 2020 06:51:52 +0000 (14:51 +0800)
commit404339759ef5e0bcd4fa7768d1148b1ace2d2bb6
tree66a614ed7e18e95440a779b3ad253db0f6504e83
parent33a6259d72ba4d7a3e3f97e9cfadc34e6e4f52d3
riscv: Remove unnecessary instruction

The add instruction on risc-v can have any three sources and targets, so there
is no need for an intermediate mov.

Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
arch/riscv/cpu/start.S
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