ARM: DRA7: DDR: Enable SR in Power Management Control

ARM: DRA7: DDR: Enable SR in Power Management Control

If EMIF is idle for certain amount of DDR cycles, EMIF will put the
DDR in self refresh mode to save power if EMIF_PWR_MGMT_CTRL register
is programmed. And also before entering suspend-resume ddr needs to
be put in self-refresh. Linux kernel does not program this register
before entering suspend and relies on u-boot setting.
So configuring it in u-boot.

Signed-off-by: Nishanth Menon <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Tested-by: Tom Rini <[email protected]>
Reviewed-by: Tom Rini <[email protected]>