ARM: dts: stih410-b2260: Sync DT with kernel v5.2

[J-u-boot.git] / arch / arm / dts / stih410-clock.dtsi

diff --git a/arch/arm/dts/stih410-clock.dtsi b/arch/arm/dts/stih410-clock.dtsi
index 8598effd6c0164b7f91d7b6dbbedc9d046c4f9ba..81a8c25d7ba54c2522f08ee4750d735f3bf285af 100644 (file)
--- a/arch/arm/dts/stih410-clock.dtsi
+++ b/arch/arm/dts/stih410-clock.dtsi
@@ -1,12 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0-only
 /*
  * Copyright (C) 2014 STMicroelectronics R&D Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
  */
 #include <dt-bindings/clock/stih410-clks.h>
 / {
+       /*
+        * Fixed 30MHz oscillator inputs to SoC
+        */
+       clk_sysin: clk-sysin {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+               clock-frequency = <30000000>;
+               clock-output-names = "CLK_SYSIN";
+       };
+
+       clk_tmdsout_hdmi: clk-tmdsout-hdmi {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+               clock-frequency = <0>;
+       };
+
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
@@ -14,27 +27,6 @@
 
                compatible = "st,stih410-clk", "simple-bus";
 
-               /*
-                * Fixed 30MHz oscillator inputs to SoC
-                */
-               clk_sysin: clk-sysin {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <30000000>;
-                       clock-output-names = "CLK_SYSIN";
-               };
-
-               /*
-                * ARM Peripheral clock for timers
-                */
-               arm_periph_clk: clk-m-a9-periphs {
-                       #clock-cells = <0>;
-                       compatible = "fixed-factor-clock";
-                       clocks = <&clk_m_a9>;
-                       clock-div = <2>;
-                       clock-mult = <1>;
-               };
-
                /*
                 * A9 PLL.
                 */
@@ -64,35 +56,19 @@
                                 <&clockgen_a9_pll 0>,
                                 <&clk_s_c0_flexgen 13>,
                                 <&clk_m_a9_ext2f_div2>;
+                       /*
+                        * ARM Peripheral clock for timers
+                        */
+                       arm_periph_clk: clk-m-a9-periphs {
+                               #clock-cells = <0>;
+                               compatible = "fixed-factor-clock";
+                               clocks = <&clk_m_a9>;
+                               clock-div = <2>;
+                               clock-mult = <1>;
+                       };
                };
 
-               /*
-                * ARM Peripheral clock for timers
-                */
-               clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
-                       #clock-cells = <0>;
-                       compatible = "fixed-factor-clock";
-
-                       clocks = <&clk_s_c0_flexgen 13>;
-
-                       clock-output-names = "clk-m-a9-ext2f-div2";
-
-                       clock-div = <2>;
-                       clock-mult = <1>;
-               };
-
-               /*
-                * Bootloader initialized system infrastructure clock for
-                * serial devices.
-                */
-               clk_ext2f_a9: clockgen-c0@13 {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <200000000>;
-                       clock-output-names = "clk-s-icn-reg-0";
-               };
-
-               clockgen-a@090ff000 {
+               clockgen-a@90ff000 {
                        compatible = "st,clkgen-c32";
                        reg = <0x90ff000 0x1000>;
 
@@ -134,7 +110,7 @@
                        clock-critical = <0>; /* clk-s-c0-fs0-ch0 */
                };
 
-               clk_s_c0: clockgen-c@09103000 {
+               clk_s_c0: clockgen-c@9103000 {
                        compatible = "st,clkgen-c32";
                        reg = <0x9103000 0x1000>;
 
@@ -208,11 +184,27 @@
                                                     "clk-clust-hades",
                                                     "clk-hwpe-hades",
                                                     "clk-fc-hades";
-                               clock-critical = <CLK_ICN_CPU>,
+                               clock-critical = <CLK_PROC_STFE>,
+                                                <CLK_ICN_CPU>,
                                                 <CLK_TX_ICN_DMU>,
                                                 <CLK_EXT2F_A9>,
                                                 <CLK_ICN_LMI>,
                                                 <CLK_ICN_SBC>;
+
+                               /*
+                                * ARM Peripheral clock for timers
+                                */
+                               clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
+                                       #clock-cells = <0>;
+                                       compatible = "fixed-factor-clock";
+
+                                       clocks = <&clk_s_c0_flexgen 13>;
+
+                                       clock-output-names = "clk-m-a9-ext2f-div2";
+
+                                       clock-div = <2>;
+                                       clock-mult = <1>;
+                               };
                        };
                };
 
@@ -229,7 +221,7 @@
                                             "clk-s-d0-fs0-ch3";
                };
 
-               clockgen-d0@09104000 {
+               clockgen-d0@9104000 {
                        compatible = "st,clkgen-c32";
                        reg = <0x9104000 0x1000>;
 
@@ -265,13 +257,7 @@
                                             "clk-s-d2-fs0-ch3";
                };
 
-               clk_tmdsout_hdmi: clk-tmdsout-hdmi {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <0>;
-               };
-
-               clockgen-d2@x9106000 {
+               clockgen-d2@9106000 {
                        compatible = "st,clkgen-c32";
                        reg = <0x9106000 0x1000>;