2 * ML2.h: ML2 specific config options
4 * Copyright 2002 Mind NV
10 * Derived from : other configuration header files in this tree
12 * This software may be used and distributed according to the terms of
13 * the GNU General Public License (GPL) version 2, incorporated herein by
14 * reference. Drivers based on or derived from this code fall under the GPL
15 * and must retain the authorship, copyright and this license notice. This
16 * file is not a complete program and may only be used when the entire
17 * program is licensed under the GPL.
25 * High Level Configuration Options
29 #define CONFIG_405 1 /* This is a PPC405 CPU */
30 #define CONFIG_4xx 1 /* ...member of PPC4xx family */
31 #define CONFIG_ML2 1 /* ...on a ML2 board */
33 #define CONFIG_SYS_TEXT_BASE 0x18000000
35 #define CONFIG_ENV_IS_IN_FLASH 1
37 #ifdef CONFIG_ENV_IS_IN_NVRAM
38 #undef CONFIG_ENV_IS_IN_FLASH
40 #ifdef CONFIG_ENV_IS_IN_FLASH
41 #undef CONFIG_ENV_IS_IN_NVRAM
45 #define CONFIG_BAUDRATE 9600
46 #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
49 #define CONFIG_BOOTCOMMAND "bootm" /* autoboot command */
51 #define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */
54 #define CONFIG_PREBOOT "fsload 0x00100000 /boot/image"
57 #define CONFIG_BOOTARGS "root=/dev/nfs " \
58 "ip=192.168.2.176:192.168.2.190:192.168.2.79:255.255.255.0 " \
59 "nfsroot=192.168.2.190:/home/stefan/cpci405/target_ftest4"
61 #define CONFIG_BOOTARGS "root=/dev/mtdblock2 " \
62 "console=ttyS0 console=tty"
66 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
67 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
73 #define CONFIG_BOOTP_BOOTFILESIZE
74 #define CONFIG_BOOTP_BOOTPATH
75 #define CONFIG_BOOTP_GATEWAY
76 #define CONFIG_BOOTP_HOSTNAME
80 * Command line configuration.
82 #include <config_cmd_default.h>
84 #define CONFIG_CMD_IRQ
85 #define CONFIG_CMD_KGDB
86 #define CONFIG_CMD_BEDBUG
87 #define CONFIG_CMD_ELF
88 #define CONFIG_CMD_JFFS2
96 #undef CONFIG_WATCHDOG /* watchdog disabled */
98 #define CONFIG_SYS_CLK_FREQ 50000000
100 #define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
103 * Miscellaneous configurable options
105 #define CONFIG_SYS_LONGHELP /* undef to save memory */
106 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
107 #if defined(CONFIG_CMD_KGDB)
108 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
110 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
112 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
113 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
114 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
116 #define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
117 #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
120 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
121 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
122 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
123 * The Linux BASE_BAUD define should match this configuration.
124 * baseBaud = cpuClock/(uartDivisor*16)
125 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
126 * set Linux BASE_BAUD to 403200.
128 #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
129 #undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
131 #define CONFIG_SYS_BASE_BAUD (3125000*16)
132 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_BASE_BAUD
133 #define CONFIG_SYS_DUART_CHAN 0
134 #define CONFIG_SYS_NS16550_COM1 0xa0001003
135 #define CONFIG_SYS_NS16550_COM2 0xa0011003
136 #define CONFIG_SYS_NS16550_REG_SIZE -4
137 #define CONFIG_SYS_NS16550 1
138 #define CONFIG_SYS_INIT_CHAN1 1
139 #define CONFIG_SYS_INIT_CHAN2 1
141 /* The following table includes the supported baudrates */
142 #define CONFIG_SYS_BAUDRATE_TABLE \
143 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
145 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
146 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
148 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
151 /*-----------------------------------------------------------------------
152 * Start addresses for the final memory configuration
153 * (Set up by the startup code)
154 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
156 #define CONFIG_SYS_SDRAM_BASE 0x00000000
157 #define CONFIG_SYS_FLASH_BASE 0x18000000
158 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
159 #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
160 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
163 * For booting Linux, the board info and command line data
164 * have to be in the first 8 MB of memory, since this is
165 * the maximum mapped by the Linux kernel during initialization.
167 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
168 /*-----------------------------------------------------------------------
171 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
172 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
174 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
175 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
177 /* BEG ENVIRONNEMENT FLASH */
178 #ifdef CONFIG_ENV_IS_IN_FLASH
179 #define CONFIG_ENV_OFFSET 0x00050000 /* Offset of Environment Sector */
180 #define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
181 #define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
183 /* END ENVIRONNEMENT FLASH */
184 /*-----------------------------------------------------------------------
187 #define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
188 #define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */
190 #ifdef CONFIG_ENV_IS_IN_NVRAM
191 #define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
192 #define CONFIG_ENV_ADDR \
193 (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
197 * Init Memory Controller:
199 * BR0/1 and OR0/1 (FLASH)
202 #define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
203 #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
206 /* Configuration Port location */
207 #define CONFIG_PORT_ADDR 0xF0000500
209 /*-----------------------------------------------------------------------
210 * Definitions for initial stack pointer and data area (in DPRAM)
213 #define CONFIG_SYS_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */
214 #define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
215 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
216 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
217 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
219 /*-----------------------------------------------------------------------
220 * Definitions for Serial Presence Detect EEPROM address
221 * (to get SDRAM settings)
223 #define SPD_EEPROM_ADDRESS 0x50
226 * Internal Definitions
230 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
231 #define BOOTFLAG_WARM 0x02 /* Software reboot */
233 #if defined(CONFIG_CMD_KGDB)
234 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
235 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
242 /* No command line, one static partition, whole device */
243 #undef CONFIG_CMD_MTDPARTS
244 #define CONFIG_JFFS2_DEV "nor0"
245 #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
246 #define CONFIG_JFFS2_PART_OFFSET 0x00080000
248 /* mtdparts command line support */
249 /* Note: fake mtd_id used, no linux mtd map file */
251 #define CONFIG_CMD_MTDPARTS
252 #define MTDIDS_DEFAULT "nor0=ml2-0"
253 #define MTDPARTS_DEFAULT "mtdparts=ml2-0:-@512k(jffs2)"
256 #endif /* __CONFIG_H */