1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 bool "Enable support for CRC32 instruction"
17 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
18 This is faster than software crc32 calculation. This instruction may
19 not be present on all ARMv8.0, but is always present on ARMv8.1 and
22 config POSITION_INDEPENDENT
23 bool "Generate position-independent pre-relocation code"
24 depends on ARM64 || CPU_V7A
26 U-Boot expects to be linked to a specific hard-coded address, and to
27 be loaded to and run from that address. This option lifts that
28 restriction, thus allowing the code to be loaded to and executed from
29 almost any 4K aligned address. This logic relies on the relocation
30 information that is embedded in the binary to support U-Boot
31 relocating itself to the top-of-RAM later during execution.
33 config INIT_SP_RELATIVE
34 bool "Specify the early stack pointer relative to the .bss section"
36 default n if ARCH_QEMU
37 default y if POSITION_INDEPENDENT
39 U-Boot typically uses a hard-coded value for the stack pointer
40 before relocation. Enable this option to instead calculate the
41 initial SP at run-time. This is useful to avoid hard-coding addresses
42 into U-Boot, so that it can be loaded and executed at arbitrary
43 addresses and thus avoid using arbitrary addresses at runtime.
45 If this option is enabled, the early stack pointer is set to
46 &_bss_start with a offset value added. The offset is specified by
47 SYS_INIT_SP_BSS_OFFSET.
49 config SYS_INIT_SP_BSS_OFFSET
50 int "Early stack offset from the .bss base address"
52 depends on INIT_SP_RELATIVE
55 This option's value is the offset added to &_bss_start in order to
56 calculate the stack pointer. This offset should be large enough so
57 that the early malloc region, global data (gd), and early stack usage
58 do not overlap any appended DTB.
60 config LINUX_KERNEL_IMAGE_HEADER
64 Place a Linux kernel image header at the start of the U-Boot binary.
65 The format of the header is described in the Linux kernel source at
66 Documentation/arm64/booting.txt. This feature is useful since the
67 image header reports the amount of memory (BSS and similar) that
68 U-Boot needs to use, but which isn't part of the binary.
70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
71 depends on LINUX_KERNEL_IMAGE_HEADER
74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
75 TEXT_OFFSET value written to the Linux kernel image header.
87 ARM GICV3 Interrupt translation service (ITS).
88 Basic support for programming locality specific peripheral
89 interrupts (LPI) configuration tables and enable LPI tables.
90 LPI configuration table can be used by u-boot or Linux.
91 ARM GICV3 has limitation, once the LPI table is enabled, LPI
92 configuration table can not be re-programmed, unless GICV3 reset.
98 config DMA_ADDR_T_64BIT
108 config GPIO_EXTRA_HEADER
111 # Used for compatibility with asm files copied from the kernel
112 config ARM_ASM_UNIFIED
116 # Used for compatibility with asm files copied from the kernel
120 config SYS_ICACHE_OFF
121 bool "Do not enable icache"
123 Do not enable instruction cache in U-Boot.
125 config SPL_SYS_ICACHE_OFF
126 bool "Do not enable icache in SPL"
128 default SYS_ICACHE_OFF
130 Do not enable instruction cache in SPL.
132 config SYS_DCACHE_OFF
133 bool "Do not enable dcache"
135 Do not enable data cache in U-Boot.
137 config SPL_SYS_DCACHE_OFF
138 bool "Do not enable dcache in SPL"
140 default SYS_DCACHE_OFF
142 Do not enable data cache in SPL.
144 config SYS_ARM_CACHE_CP15
145 bool "CP15 based cache enabling support"
147 Select this if your processor suports enabling caches by using
151 bool "MMU-based Paged Memory Management Support"
152 select SYS_ARM_CACHE_CP15
154 Select if you want MMU-based virtualised addressing space
155 support via paged memory management.
158 bool 'Use the ARM v7 PMSA Compliant MPU'
160 Some ARM systems without an MMU have instead a Memory Protection
161 Unit (MPU) that defines the type and permissions for regions of
163 If your CPU has an MPU then you should choose 'y' here unless you
164 know that you do not want to use the MPU.
166 # If set, the workarounds for these ARM errata are applied early during U-Boot
167 # startup. Note that in general these options force the workarounds to be
168 # applied; no CPU-type/version detection exists, unlike the similar options in
169 # the Linux kernel. Do not set these options unless they apply! Also note that
170 # the following can be machine-specific errata. These do have ability to
171 # provide rudimentary version and machine-specific checks, but expect no
173 # CONFIG_ARM_ERRATA_430973
174 # CONFIG_ARM_ERRATA_454179
175 # CONFIG_ARM_ERRATA_621766
176 # CONFIG_ARM_ERRATA_798870
177 # CONFIG_ARM_ERRATA_801819
178 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
179 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
181 config ARM_ERRATA_430973
184 config ARM_ERRATA_454179
187 config ARM_ERRATA_621766
190 config ARM_ERRATA_716044
193 config ARM_ERRATA_725233
196 config ARM_ERRATA_742230
199 config ARM_ERRATA_743622
202 config ARM_ERRATA_751472
205 config ARM_ERRATA_761320
208 config ARM_ERRATA_773022
211 config ARM_ERRATA_774769
214 config ARM_ERRATA_794072
217 config ARM_ERRATA_798870
220 config ARM_ERRATA_801819
223 config ARM_ERRATA_826974
226 config ARM_ERRATA_828024
229 config ARM_ERRATA_829520
232 config ARM_ERRATA_833069
235 config ARM_ERRATA_833471
238 config ARM_ERRATA_845369
241 config ARM_ERRATA_852421
244 config ARM_ERRATA_852423
247 config ARM_ERRATA_855873
250 config ARM_CORTEX_A8_CVE_2017_5715
253 config ARM_CORTEX_A15_CVE_2017_5715
258 select SYS_CACHE_SHIFT_5
263 select SYS_CACHE_SHIFT_5
268 select SYS_CACHE_SHIFT_5
273 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_5
284 select SYS_CACHE_SHIFT_5
291 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
299 select SYS_THUMB_BUILD
305 select SYS_ARM_CACHE_CP15
307 select SYS_CACHE_SHIFT_6
311 select SYS_CACHE_SHIFT_5
316 select SYS_CACHE_SHIFT_5
320 default "arm720t" if CPU_ARM720T
321 default "arm920t" if CPU_ARM920T
322 default "arm926ejs" if CPU_ARM926EJS
323 default "arm946es" if CPU_ARM946ES
324 default "arm1136" if CPU_ARM1136
325 default "arm1176" if CPU_ARM1176
326 default "armv7" if CPU_V7A
327 default "armv7" if CPU_V7R
328 default "armv7m" if CPU_V7M
329 default "pxa" if CPU_PXA
330 default "sa1100" if CPU_SA1100
331 default "armv8" if ARM64
335 default 4 if CPU_ARM720T
336 default 4 if CPU_ARM920T
337 default 5 if CPU_ARM926EJS
338 default 5 if CPU_ARM946ES
339 default 6 if CPU_ARM1136
340 default 6 if CPU_ARM1176
345 default 4 if CPU_SA1100
349 prompt "Select the ARM data write cache policy"
350 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
352 default SYS_ARM_CACHE_WRITEBACK
354 config SYS_ARM_CACHE_WRITEBACK
355 bool "Write-back (WB)"
357 A write updates the cache only and marks the cache line as dirty.
358 External memory is updated only when the line is evicted or explicitly
361 config SYS_ARM_CACHE_WRITETHROUGH
362 bool "Write-through (WT)"
364 A write updates both the cache and the external memory system.
365 This does not mark the cache line as dirty.
367 config SYS_ARM_CACHE_WRITEALLOC
368 bool "Write allocation (WA)"
370 A cache line is allocated on a write miss. This means that executing a
371 store instruction on the processor might cause a burst read to occur.
372 There is a linefill to obtain the data for the cache line, before the
377 bool "Enable ARCH_CPU_INIT"
379 Some architectures require a call to arch_cpu_init().
380 Say Y here to enable it
382 config SYS_ARCH_TIMER
383 bool "ARM Generic Timer support"
384 depends on CPU_V7A || ARM64
387 The ARM Generic Timer (aka arch-timer) provides an architected
388 interface to a timer source on an SoC.
389 It is mandatory for ARMv8 implementation and widely available
393 bool "Support for ARM SMC Calling Convention (SMCCC)"
394 depends on CPU_V7A || ARM64
397 Say Y here if you want to enable ARM SMC Calling Convention.
398 This should be enabled if U-Boot needs to communicate with system
399 firmware (for example, PSCI) according to SMCCC.
402 bool "support boot from semihosting"
404 In emulated environments, semihosting is a way for
405 the hosted environment to call out to the emulator to
406 retrieve files from the host machine.
408 config SYS_THUMB_BUILD
409 bool "Build U-Boot using the Thumb instruction set"
412 Use this flag to build U-Boot using the Thumb instruction set for
413 ARM architectures. Thumb instruction set provides better code
414 density. For ARM architectures that support Thumb2 this flag will
415 result in Thumb2 code generated by GCC.
417 config SPL_SYS_THUMB_BUILD
418 bool "Build SPL using the Thumb instruction set"
419 default y if SYS_THUMB_BUILD
420 depends on !ARM64 && SPL
422 Use this flag to build SPL using the Thumb instruction set for
423 ARM architectures. Thumb instruction set provides better code
424 density. For ARM architectures that support Thumb2 this flag will
425 result in Thumb2 code generated by GCC.
427 config TPL_SYS_THUMB_BUILD
428 bool "Build TPL using the Thumb instruction set"
429 default y if SYS_THUMB_BUILD
430 depends on TPL && !ARM64
432 Use this flag to build TPL using the Thumb instruction set for
433 ARM architectures. Thumb instruction set provides better code
434 density. For ARM architectures that support Thumb2 this flag will
435 result in Thumb2 code generated by GCC.
438 config SYS_L2CACHE_OFF
441 If SoC does not support L2CACHE or one does not want to enable
442 L2CACHE, choose this option.
444 config ENABLE_ARM_SOC_BOOT0_HOOK
445 bool "prepare BOOT0 header"
447 If the SoC's BOOT0 requires a header area filled with (magic)
448 values, then choose this option, and create a file included as
449 <asm/arch/boot0.h> which contains the required assembler code.
451 config ARM_CORTEX_CPU_IS_UP
454 config USE_ARCH_MEMCPY
455 bool "Use an assembly optimized implementation of memcpy"
457 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
459 Enable the generation of an optimized version of memcpy.
460 Such an implementation may be faster under some conditions
461 but may increase the binary size.
463 config SPL_USE_ARCH_MEMCPY
464 bool "Use an assembly optimized implementation of memcpy for SPL"
465 default y if USE_ARCH_MEMCPY
468 Enable the generation of an optimized version of memcpy.
469 Such an implementation may be faster under some conditions
470 but may increase the binary size.
472 config TPL_USE_ARCH_MEMCPY
473 bool "Use an assembly optimized implementation of memcpy for TPL"
474 default y if USE_ARCH_MEMCPY
477 Enable the generation of an optimized version of memcpy.
478 Such an implementation may be faster under some conditions
479 but may increase the binary size.
481 config USE_ARCH_MEMMOVE
482 bool "Use an assembly optimized implementation of memmove" if !ARM64
483 default USE_ARCH_MEMCPY if ARM64
486 Enable the generation of an optimized version of memmove.
487 Such an implementation may be faster under some conditions
488 but may increase the binary size.
490 config SPL_USE_ARCH_MEMMOVE
491 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
492 default SPL_USE_ARCH_MEMCPY if ARM64
493 depends on SPL && ARM64
495 Enable the generation of an optimized version of memmove.
496 Such an implementation may be faster under some conditions
497 but may increase the binary size.
499 config TPL_USE_ARCH_MEMMOVE
500 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
501 default TPL_USE_ARCH_MEMCPY if ARM64
502 depends on TPL && ARM64
504 Enable the generation of an optimized version of memmove.
505 Such an implementation may be faster under some conditions
506 but may increase the binary size.
508 config USE_ARCH_MEMSET
509 bool "Use an assembly optimized implementation of memset"
511 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
513 Enable the generation of an optimized version of memset.
514 Such an implementation may be faster under some conditions
515 but may increase the binary size.
517 config SPL_USE_ARCH_MEMSET
518 bool "Use an assembly optimized implementation of memset for SPL"
519 default y if USE_ARCH_MEMSET
522 Enable the generation of an optimized version of memset.
523 Such an implementation may be faster under some conditions
524 but may increase the binary size.
526 config TPL_USE_ARCH_MEMSET
527 bool "Use an assembly optimized implementation of memset for TPL"
528 default y if USE_ARCH_MEMSET
531 Enable the generation of an optimized version of memset.
532 Such an implementation may be faster under some conditions
533 but may increase the binary size.
535 config ARM64_SUPPORT_AARCH32
536 bool "ARM64 system support AArch32 execution state"
538 default y if !TARGET_THUNDERX_88XX
540 This ARM64 system supports AArch32 execution state.
543 prompt "Target select"
548 select GPIO_EXTRA_HEADER
549 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
550 select SPL_SEPARATE_BSS if SPL
555 select GPIO_EXTRA_HEADER
556 select SPL_DM_SPI if SPL
559 Support for TI's DaVinci platform.
562 bool "Marvell Kirkwood"
563 select ARCH_MISC_INIT
564 select BOARD_EARLY_INIT_F
566 select GPIO_EXTRA_HEADER
569 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
575 select GPIO_EXTRA_HEADER
576 select SPL_DM_SPI if SPL
577 select SPL_DM_SPI_FLASH if SPL
586 select GPIO_EXTRA_HEADER
588 config TARGET_STV0991
589 bool "Support stv0991"
595 select GPIO_EXTRA_HEADER
602 bool "Broadcom BCM283X family"
606 select GPIO_EXTRA_HEADER
609 select SERIAL_SEARCH_ALL
614 bool "Broadcom BCM63158 family"
620 bool "Broadcom BCM68360 family"
626 bool "Broadcom BCM6858 family"
632 bool "Broadcom BCM7XXX family"
635 select GPIO_EXTRA_HEADER
638 imply OF_HAS_PRIOR_STAGE
640 This enables support for Broadcom ARM-based set-top box
641 chipsets, including the 7445 family of chips.
643 config TARGET_VEXPRESS_CA9X4
644 bool "Support vexpress_ca9x4"
648 config TARGET_BCMCYGNUS
649 bool "Support bcmcygnus"
651 select GPIO_EXTRA_HEADER
653 imply BCM_SF2_ETH_GMAC
661 bool "Support Broadcom Northstar2"
663 select GPIO_EXTRA_HEADER
665 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
666 ARMv8 Cortex-A57 processors targeting a broad range of networking
670 bool "Support Broadcom NS3"
672 select BOARD_LATE_INIT
674 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
675 ARMv8 Cortex-A72 processors targeting a broad range of networking
679 bool "Samsung EXYNOS"
689 select GPIO_EXTRA_HEADER
690 imply SYS_THUMB_BUILD
695 bool "Samsung S5PC1XX"
701 select GPIO_EXTRA_HEADER
705 bool "Calxeda Highbank"
716 imply OF_HAS_PRIOR_STAGE
718 config ARCH_INTEGRATOR
719 bool "ARM Ltd. Integrator family"
722 select GPIO_EXTRA_HEADER
727 bool "Qualcomm IPQ40xx SoCs"
733 select GPIO_EXTRA_HEADER
746 select GPIO_EXTRA_HEADER
748 select SYS_ARCH_TIMER
749 select SYS_THUMB_BUILD
755 bool "Texas Instruments' K3 Architecture"
760 config ARCH_OMAP2PLUS
763 select GPIO_EXTRA_HEADER
764 select SPL_BOARD_INIT if SPL
765 select SPL_STACK_R if SPL
767 imply TI_SYSC if DM && OF_CONTROL
772 select GPIO_EXTRA_HEADER
773 imply DISTRO_DEFAULTS
776 Support for the Meson SoC family developed by Amlogic Inc.,
777 targeted at media players and tablet computers. We currently
778 support the S905 (GXBaby) 64-bit SoC.
783 select GPIO_EXTRA_HEADER
786 select SPL_LIBCOMMON_SUPPORT if SPL
787 select SPL_LIBGENERIC_SUPPORT if SPL
788 select SPL_OF_CONTROL if SPL
791 Support for the MediaTek SoCs family developed by MediaTek Inc.
792 Please refer to doc/README.mediatek for more information.
795 bool "NXP LPC32xx platform"
800 select GPIO_EXTRA_HEADER
806 bool "NXP i.MX8 platform"
809 select GPIO_EXTRA_HEADER
812 select ENABLE_ARM_SOC_BOOT0_HOOK
815 bool "NXP i.MX8M platform"
817 select GPIO_EXTRA_HEADER
819 select SYS_FSL_HAS_SEC if IMX_HAB
820 select SYS_FSL_SEC_COMPAT_4
821 select SYS_FSL_SEC_LE
828 bool "NXP i.MX8ULP platform"
834 select GPIO_EXTRA_HEADER
838 bool "NXP i.MXRT platform"
842 select GPIO_EXTRA_HEADER
848 bool "NXP i.MX23 family"
850 select GPIO_EXTRA_HEADER
856 bool "NXP i.MX28 family"
858 select GPIO_EXTRA_HEADER
864 bool "NXP i.MX31 family"
866 select GPIO_EXTRA_HEADER
872 select GPIO_EXTRA_HEADER
874 select SYS_FSL_HAS_SEC if IMX_HAB
875 select SYS_FSL_SEC_COMPAT_4
876 select SYS_FSL_SEC_LE
877 select ROM_UNIFIED_SECTIONS
879 imply SYS_THUMB_BUILD
883 select ARCH_MISC_INIT
885 select GPIO_EXTRA_HEADER
887 select SYS_FSL_HAS_SEC if IMX_HAB
888 select SYS_FSL_SEC_COMPAT_4
889 select SYS_FSL_SEC_LE
890 imply BOARD_EARLY_INIT_F
892 imply SYS_THUMB_BUILD
897 select GPIO_EXTRA_HEADER
899 select SYS_FSL_HAS_SEC
900 select SYS_FSL_SEC_COMPAT_4
901 select SYS_FSL_SEC_LE
903 imply SYS_THUMB_BUILD
907 default "arch/arm/mach-omap2/u-boot-spl.lds"
912 select BOARD_EARLY_INIT_F
914 select GPIO_EXTRA_HEADER
919 bool "Nexell S5P4418/S5P6818 SoC"
920 select ENABLE_ARM_SOC_BOOT0_HOOK
922 select GPIO_EXTRA_HEADER
937 select LINUX_KERNEL_IMAGE_HEADER
940 select POSITION_INDEPENDENT
944 imply DISTRO_DEFAULTS
945 imply OF_HAS_PRIOR_STAGE
948 bool "Actions Semi OWL SoCs"
952 select GPIO_EXTRA_HEADER
957 select SYS_RELOC_GD_ENV_ADDR
961 bool "QEMU Virtual Platform"
970 imply OF_HAS_PRIOR_STAGE
973 bool "Renesas ARM SoCs"
976 select GPIO_EXTRA_HEADER
977 imply BOARD_EARLY_INIT_F
980 imply SYS_THUMB_BUILD
981 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
983 config ARCH_SNAPDRAGON
984 bool "Qualcomm Snapdragon SoCs"
989 select GPIO_EXTRA_HEADER
998 bool "Altera SOCFPGA family"
999 select ARCH_EARLY_INIT_R
1000 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1001 select ARM64 if TARGET_SOCFPGA_SOC64
1002 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1006 select GPIO_EXTRA_HEADER
1007 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1009 select SPL_DM_RESET if DM_RESET
1010 select SPL_DM_SERIAL
1011 select SPL_LIBCOMMON_SUPPORT
1012 select SPL_LIBGENERIC_SUPPORT
1013 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1014 select SPL_OF_CONTROL
1015 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1021 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1023 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1024 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1034 imply SPL_DM_SPI_FLASH
1035 imply SPL_LIBDISK_SUPPORT
1037 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1038 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1039 imply SPL_SPI_FLASH_SUPPORT
1044 bool "Support sunxi (Allwinner) SoCs"
1047 select CMD_MMC if MMC
1048 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1053 select DM_I2C if I2C
1055 select DM_MMC if MMC
1056 select DM_SCSI if SCSI
1058 select GPIO_EXTRA_HEADER
1059 select OF_BOARD_SETUP
1062 select SPECIFY_CONSOLE_INDEX
1063 select SPL_SEPARATE_BSS if SPL
1064 select SPL_STACK_R if SPL
1065 select SPL_SYS_MALLOC_SIMPLE if SPL
1066 select SPL_SYS_THUMB_BUILD if !ARM64
1069 select SYS_THUMB_BUILD if !ARM64
1070 select USB if DISTRO_DEFAULTS
1071 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1072 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1073 select SPL_USE_TINY_PRINTF
1075 select SYS_RELOC_GD_ENV_ADDR
1076 imply BOARD_LATE_INIT
1079 imply CMD_UBI if MTD_RAW_NAND
1080 imply DISTRO_DEFAULTS
1083 imply OF_LIBFDT_OVERLAY
1084 imply PRE_CONSOLE_BUFFER
1086 imply SPL_LIBCOMMON_SUPPORT
1087 imply SPL_LIBGENERIC_SUPPORT
1088 imply SPL_MMC if MMC
1092 imply SYSRESET_WATCHDOG
1093 imply SYSRESET_WATCHDOG_AUTO
1098 bool "ST-Ericsson U8500 Series"
1102 select DM_MMC if MMC
1104 select DM_USB_GADGET if DM_USB
1108 imply AB8500_USB_PHY
1109 imply ARM_PL180_MMCI
1114 imply NOMADIK_MTU_TIMER
1119 imply SYS_THUMB_BUILD
1120 imply SYSRESET_SYSCON
1123 bool "Support Xilinx Versal Platform"
1127 select DM_ETH if NET
1128 select DM_MMC if MMC
1131 select GPIO_EXTRA_HEADER
1134 imply BOARD_LATE_INIT
1135 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1138 bool "Freescale Vybrid"
1140 select GPIO_EXTRA_HEADER
1142 select SYS_FSL_ERRATUM_ESDHC111
1147 bool "Xilinx Zynq based platform"
1152 select DM_ETH if NET
1153 select DM_MMC if MMC
1157 select GPIO_EXTRA_HEADER
1160 select SPL_BOARD_INIT if SPL
1161 select SPL_CLK if SPL
1162 select SPL_DM if SPL
1163 select SPL_DM_SPI if SPL
1164 select SPL_DM_SPI_FLASH if SPL
1165 select SPL_OF_CONTROL if SPL
1166 select SPL_SEPARATE_BSS if SPL
1168 imply ARCH_EARLY_INIT_R
1169 imply BOARD_LATE_INIT
1173 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1176 config ARCH_ZYNQMP_R5
1177 bool "Xilinx ZynqMP R5 based platform"
1181 select DM_ETH if NET
1182 select DM_MMC if MMC
1184 select GPIO_EXTRA_HEADER
1190 bool "Xilinx ZynqMP based platform"
1194 select DM_ETH if NET
1196 select DM_MMC if MMC
1198 select DM_SPI if SPI
1199 select DM_SPI_FLASH if DM_SPI
1202 select GPIO_EXTRA_HEADER
1204 select SPL_BOARD_INIT if SPL
1205 select SPL_CLK if SPL
1206 select SPL_DM if SPL
1207 select SPL_DM_SPI if SPI && SPL_DM
1208 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1209 select SPL_DM_MAILBOX if SPL
1210 select SPL_FIRMWARE if SPL
1211 select SPL_SEPARATE_BSS if SPL
1215 imply BOARD_LATE_INIT
1217 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1224 select GPIO_EXTRA_HEADER
1225 imply DISTRO_DEFAULTS
1228 config TARGET_VEXPRESS64_AEMV8A
1229 bool "Support vexpress_aemv8a"
1231 select GPIO_EXTRA_HEADER
1234 config TARGET_VEXPRESS64_BASE_FVP
1235 bool "Support Versatile Express ARMv8a FVP BASE model"
1237 select GPIO_EXTRA_HEADER
1241 config TARGET_VEXPRESS64_JUNO
1242 bool "Support Versatile Express Juno Development Platform"
1244 select GPIO_EXTRA_HEADER
1255 imply OF_HAS_PRIOR_STAGE
1257 config TARGET_TOTAL_COMPUTE
1258 bool "Support Total Compute Platform"
1266 config TARGET_LS2080A_EMU
1267 bool "Support ls2080a_emu"
1270 select ARMV8_MULTIENTRY
1271 select FSL_DDR_SYNC_REFRESH
1272 select GPIO_EXTRA_HEADER
1274 Support for Freescale LS2080A_EMU platform.
1275 The LS2080A Development System (EMULATOR) is a pre-silicon
1276 development platform that supports the QorIQ LS2080A
1277 Layerscape Architecture processor.
1279 config TARGET_LS1088AQDS
1280 bool "Support ls1088aqds"
1283 select ARMV8_MULTIENTRY
1284 select ARCH_SUPPORT_TFABOOT
1285 select BOARD_LATE_INIT
1286 select GPIO_EXTRA_HEADER
1288 select FSL_DDR_INTERACTIVE if !SD_BOOT
1290 Support for NXP LS1088AQDS platform.
1291 The LS1088A Development System (QDS) is a high-performance
1292 development platform that supports the QorIQ LS1088A
1293 Layerscape Architecture processor.
1295 config TARGET_LS2080AQDS
1296 bool "Support ls2080aqds"
1299 select ARMV8_MULTIENTRY
1300 select ARCH_SUPPORT_TFABOOT
1301 select BOARD_LATE_INIT
1302 select GPIO_EXTRA_HEADER
1307 select FSL_DDR_INTERACTIVE if !SPL
1309 Support for Freescale LS2080AQDS platform.
1310 The LS2080A Development System (QDS) is a high-performance
1311 development platform that supports the QorIQ LS2080A
1312 Layerscape Architecture processor.
1314 config TARGET_LS2080ARDB
1315 bool "Support ls2080ardb"
1318 select ARMV8_MULTIENTRY
1319 select ARCH_SUPPORT_TFABOOT
1320 select BOARD_LATE_INIT
1323 select FSL_DDR_INTERACTIVE if !SPL
1324 select GPIO_EXTRA_HEADER
1328 Support for Freescale LS2080ARDB platform.
1329 The LS2080A Reference design board (RDB) is a high-performance
1330 development platform that supports the QorIQ LS2080A
1331 Layerscape Architecture processor.
1333 config TARGET_LS2081ARDB
1334 bool "Support ls2081ardb"
1337 select ARMV8_MULTIENTRY
1338 select BOARD_LATE_INIT
1339 select GPIO_EXTRA_HEADER
1342 Support for Freescale LS2081ARDB platform.
1343 The LS2081A Reference design board (RDB) is a high-performance
1344 development platform that supports the QorIQ LS2081A/LS2041A
1345 Layerscape Architecture processor.
1347 config TARGET_LX2160ARDB
1348 bool "Support lx2160ardb"
1351 select ARMV8_MULTIENTRY
1352 select ARCH_SUPPORT_TFABOOT
1353 select BOARD_LATE_INIT
1354 select GPIO_EXTRA_HEADER
1356 Support for NXP LX2160ARDB platform.
1357 The lx2160ardb (LX2160A Reference design board (RDB)
1358 is a high-performance development platform that supports the
1359 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1361 config TARGET_LX2160AQDS
1362 bool "Support lx2160aqds"
1365 select ARMV8_MULTIENTRY
1366 select ARCH_SUPPORT_TFABOOT
1367 select BOARD_LATE_INIT
1368 select GPIO_EXTRA_HEADER
1370 Support for NXP LX2160AQDS platform.
1371 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1372 is a high-performance development platform that supports the
1373 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1375 config TARGET_LX2162AQDS
1376 bool "Support lx2162aqds"
1378 select ARCH_MISC_INIT
1380 select ARMV8_MULTIENTRY
1381 select ARCH_SUPPORT_TFABOOT
1382 select BOARD_LATE_INIT
1383 select GPIO_EXTRA_HEADER
1385 Support for NXP LX2162AQDS platform.
1386 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1389 bool "Support HiKey 96boards Consumer Edition Platform"
1394 select GPIO_EXTRA_HEADER
1397 select SPECIFY_CONSOLE_INDEX
1400 Support for HiKey 96boards platform. It features a HI6220
1401 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1403 config TARGET_HIKEY960
1404 bool "Support HiKey960 96boards Consumer Edition Platform"
1408 select GPIO_EXTRA_HEADER
1413 Support for HiKey960 96boards platform. It features a HI3660
1414 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1416 config TARGET_POPLAR
1417 bool "Support Poplar 96boards Enterprise Edition Platform"
1421 select GPIO_EXTRA_HEADER
1426 Support for Poplar 96boards EE platform. It features a HI3798cv200
1427 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1428 making it capable of running any commercial set-top solution based on
1431 config TARGET_LS1012AQDS
1432 bool "Support ls1012aqds"
1435 select ARCH_SUPPORT_TFABOOT
1436 select BOARD_LATE_INIT
1437 select GPIO_EXTRA_HEADER
1439 Support for Freescale LS1012AQDS platform.
1440 The LS1012A Development System (QDS) is a high-performance
1441 development platform that supports the QorIQ LS1012A
1442 Layerscape Architecture processor.
1444 config TARGET_LS1012ARDB
1445 bool "Support ls1012ardb"
1448 select ARCH_SUPPORT_TFABOOT
1449 select BOARD_LATE_INIT
1450 select GPIO_EXTRA_HEADER
1454 Support for Freescale LS1012ARDB platform.
1455 The LS1012A Reference design board (RDB) is a high-performance
1456 development platform that supports the QorIQ LS1012A
1457 Layerscape Architecture processor.
1459 config TARGET_LS1012A2G5RDB
1460 bool "Support ls1012a2g5rdb"
1463 select ARCH_SUPPORT_TFABOOT
1464 select BOARD_LATE_INIT
1465 select GPIO_EXTRA_HEADER
1468 Support for Freescale LS1012A2G5RDB platform.
1469 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1470 development platform that supports the QorIQ LS1012A
1471 Layerscape Architecture processor.
1473 config TARGET_LS1012AFRWY
1474 bool "Support ls1012afrwy"
1477 select ARCH_SUPPORT_TFABOOT
1478 select BOARD_LATE_INIT
1479 select GPIO_EXTRA_HEADER
1483 Support for Freescale LS1012AFRWY platform.
1484 The LS1012A FRWY board (FRWY) is a high-performance
1485 development platform that supports the QorIQ LS1012A
1486 Layerscape Architecture processor.
1488 config TARGET_LS1012AFRDM
1489 bool "Support ls1012afrdm"
1492 select ARCH_SUPPORT_TFABOOT
1493 select GPIO_EXTRA_HEADER
1495 Support for Freescale LS1012AFRDM platform.
1496 The LS1012A Freedom board (FRDM) is a high-performance
1497 development platform that supports the QorIQ LS1012A
1498 Layerscape Architecture processor.
1500 config TARGET_LS1028AQDS
1501 bool "Support ls1028aqds"
1504 select ARMV8_MULTIENTRY
1505 select ARCH_SUPPORT_TFABOOT
1506 select BOARD_LATE_INIT
1507 select GPIO_EXTRA_HEADER
1509 Support for Freescale LS1028AQDS platform
1510 The LS1028A Development System (QDS) is a high-performance
1511 development platform that supports the QorIQ LS1028A
1512 Layerscape Architecture processor.
1514 config TARGET_LS1028ARDB
1515 bool "Support ls1028ardb"
1518 select ARMV8_MULTIENTRY
1519 select ARCH_SUPPORT_TFABOOT
1520 select BOARD_LATE_INIT
1521 select GPIO_EXTRA_HEADER
1523 Support for Freescale LS1028ARDB platform
1524 The LS1028A Development System (RDB) is a high-performance
1525 development platform that supports the QorIQ LS1028A
1526 Layerscape Architecture processor.
1528 config TARGET_LS1088ARDB
1529 bool "Support ls1088ardb"
1532 select ARMV8_MULTIENTRY
1533 select ARCH_SUPPORT_TFABOOT
1534 select BOARD_LATE_INIT
1536 select FSL_DDR_INTERACTIVE if !SD_BOOT
1537 select GPIO_EXTRA_HEADER
1539 Support for NXP LS1088ARDB platform.
1540 The LS1088A Reference design board (RDB) is a high-performance
1541 development platform that supports the QorIQ LS1088A
1542 Layerscape Architecture processor.
1544 config TARGET_LS1021AQDS
1545 bool "Support ls1021aqds"
1547 select ARCH_SUPPORT_PSCI
1548 select BOARD_EARLY_INIT_F
1549 select BOARD_LATE_INIT
1551 select CPU_V7_HAS_NONSEC
1552 select CPU_V7_HAS_VIRT
1553 select LS1_DEEP_SLEEP
1556 select FSL_DDR_INTERACTIVE
1557 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1558 select GPIO_EXTRA_HEADER
1559 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1562 config TARGET_LS1021ATWR
1563 bool "Support ls1021atwr"
1565 select ARCH_SUPPORT_PSCI
1566 select BOARD_EARLY_INIT_F
1567 select BOARD_LATE_INIT
1569 select CPU_V7_HAS_NONSEC
1570 select CPU_V7_HAS_VIRT
1571 select LS1_DEEP_SLEEP
1573 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1574 select GPIO_EXTRA_HEADER
1577 config TARGET_PG_WCOM_SELI8
1578 bool "Support Hitachi-Powergrids SELI8 service unit card"
1580 select ARCH_SUPPORT_PSCI
1581 select BOARD_EARLY_INIT_F
1582 select BOARD_LATE_INIT
1584 select CPU_V7_HAS_NONSEC
1585 select CPU_V7_HAS_VIRT
1587 select FSL_DDR_INTERACTIVE
1588 select GPIO_EXTRA_HEADER
1592 Support for Hitachi-Powergrids SELI8 service unit card.
1593 SELI8 is a QorIQ LS1021a based service unit card used
1594 in XMC20 and FOX615 product families.
1596 config TARGET_PG_WCOM_EXPU1
1597 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1599 select ARCH_SUPPORT_PSCI
1600 select BOARD_EARLY_INIT_F
1601 select BOARD_LATE_INIT
1603 select CPU_V7_HAS_NONSEC
1604 select CPU_V7_HAS_VIRT
1606 select FSL_DDR_INTERACTIVE
1610 Support for Hitachi-Powergrids EXPU1 service unit card.
1611 EXPU1 is a QorIQ LS1021a based service unit card used
1612 in XMC20 and FOX615 product families.
1614 config TARGET_LS1021ATSN
1615 bool "Support ls1021atsn"
1617 select ARCH_SUPPORT_PSCI
1618 select BOARD_EARLY_INIT_F
1619 select BOARD_LATE_INIT
1621 select CPU_V7_HAS_NONSEC
1622 select CPU_V7_HAS_VIRT
1623 select LS1_DEEP_SLEEP
1625 select GPIO_EXTRA_HEADER
1628 config TARGET_LS1021AIOT
1629 bool "Support ls1021aiot"
1631 select ARCH_SUPPORT_PSCI
1632 select BOARD_LATE_INIT
1634 select CPU_V7_HAS_NONSEC
1635 select CPU_V7_HAS_VIRT
1637 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1638 select GPIO_EXTRA_HEADER
1641 Support for Freescale LS1021AIOT platform.
1642 The LS1021A Freescale board (IOT) is a high-performance
1643 development platform that supports the QorIQ LS1021A
1644 Layerscape Architecture processor.
1646 config TARGET_LS1043AQDS
1647 bool "Support ls1043aqds"
1650 select ARMV8_MULTIENTRY
1651 select ARCH_SUPPORT_TFABOOT
1652 select BOARD_EARLY_INIT_F
1653 select BOARD_LATE_INIT
1655 select FSL_DDR_INTERACTIVE if !SPL
1656 select FSL_DSPI if !SPL_NO_DSPI
1657 select DM_SPI_FLASH if FSL_DSPI
1658 select GPIO_EXTRA_HEADER
1662 Support for Freescale LS1043AQDS platform.
1664 config TARGET_LS1043ARDB
1665 bool "Support ls1043ardb"
1668 select ARMV8_MULTIENTRY
1669 select ARCH_SUPPORT_TFABOOT
1670 select BOARD_EARLY_INIT_F
1671 select BOARD_LATE_INIT
1673 select FSL_DSPI if !SPL_NO_DSPI
1674 select DM_SPI_FLASH if FSL_DSPI
1675 select GPIO_EXTRA_HEADER
1677 Support for Freescale LS1043ARDB platform.
1679 config TARGET_LS1046AQDS
1680 bool "Support ls1046aqds"
1683 select ARMV8_MULTIENTRY
1684 select ARCH_SUPPORT_TFABOOT
1685 select BOARD_EARLY_INIT_F
1686 select BOARD_LATE_INIT
1687 select DM_SPI_FLASH if DM_SPI
1689 select FSL_DDR_BIST if !SPL
1690 select FSL_DDR_INTERACTIVE if !SPL
1691 select FSL_DDR_INTERACTIVE if !SPL
1692 select GPIO_EXTRA_HEADER
1695 Support for Freescale LS1046AQDS platform.
1696 The LS1046A Development System (QDS) is a high-performance
1697 development platform that supports the QorIQ LS1046A
1698 Layerscape Architecture processor.
1700 config TARGET_LS1046ARDB
1701 bool "Support ls1046ardb"
1704 select ARMV8_MULTIENTRY
1705 select ARCH_SUPPORT_TFABOOT
1706 select BOARD_EARLY_INIT_F
1707 select BOARD_LATE_INIT
1708 select DM_SPI_FLASH if DM_SPI
1709 select POWER_MC34VR500
1712 select FSL_DDR_INTERACTIVE if !SPL
1713 select GPIO_EXTRA_HEADER
1716 Support for Freescale LS1046ARDB platform.
1717 The LS1046A Reference Design Board (RDB) is a high-performance
1718 development platform that supports the QorIQ LS1046A
1719 Layerscape Architecture processor.
1721 config TARGET_LS1046AFRWY
1722 bool "Support ls1046afrwy"
1725 select ARMV8_MULTIENTRY
1726 select ARCH_SUPPORT_TFABOOT
1727 select BOARD_EARLY_INIT_F
1728 select BOARD_LATE_INIT
1729 select DM_SPI_FLASH if DM_SPI
1730 select GPIO_EXTRA_HEADER
1733 Support for Freescale LS1046AFRWY platform.
1734 The LS1046A Freeway Board (FRWY) is a high-performance
1735 development platform that supports the QorIQ LS1046A
1736 Layerscape Architecture processor.
1742 select ARMV8_MULTIENTRY
1758 select GPIO_EXTRA_HEADER
1759 select SPL_DM if SPL
1760 select SPL_DM_SPI if SPL
1761 select SPL_DM_SPI_FLASH if SPL
1762 select SPL_DM_I2C if SPL
1763 select SPL_DM_MMC if SPL
1764 select SPL_DM_SERIAL if SPL
1766 Support for Kontron SMARC-sAL28 board.
1768 config TARGET_COLIBRI_PXA270
1769 bool "Support colibri_pxa270"
1771 select GPIO_EXTRA_HEADER
1773 config ARCH_UNIPHIER
1774 bool "Socionext UniPhier SoCs"
1775 select BOARD_LATE_INIT
1784 select OF_BOARD_SETUP
1788 select SPL_BOARD_INIT if SPL
1789 select SPL_DM if SPL
1790 select SPL_LIBCOMMON_SUPPORT if SPL
1791 select SPL_LIBGENERIC_SUPPORT if SPL
1792 select SPL_OF_CONTROL if SPL
1793 select SPL_PINCTRL if SPL
1796 imply DISTRO_DEFAULTS
1799 Support for UniPhier SoC family developed by Socionext Inc.
1800 (formerly, System LSI Business Division of Panasonic Corporation)
1802 config ARCH_SYNQUACER
1803 bool "Socionext SynQuacer SoCs"
1809 select SYSRESET_PSCI
1812 Support for SynQuacer SoC family developed by Socionext Inc.
1813 This SoC is used on 96boards EE DeveloperBox.
1816 bool "Support STMicroelectronics STM32 MCU with cortex M"
1823 bool "Support STMicrolectronics SoCs"
1832 Support for STMicroelectronics STiH407/10 SoC family.
1833 This SoC is used on Linaro 96Board STiH410-B2260
1836 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1837 select ARCH_MISC_INIT
1838 select ARCH_SUPPORT_TFABOOT
1839 select BOARD_LATE_INIT
1848 select OF_SYSTEM_SETUP
1854 select SYS_THUMB_BUILD
1858 imply OF_LIBFDT_OVERLAY
1859 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1862 Support for STM32MP SoC family developed by STMicroelectronics,
1863 MPUs based on ARM cortex A core
1864 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1865 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1867 SPL is the unsecure FSBL for the basic boot chain.
1869 config ARCH_ROCKCHIP
1870 bool "Support Rockchip SoCs"
1872 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1882 select ENABLE_ARM_SOC_BOOT0_HOOK
1885 select SPL_DM if SPL
1886 select SPL_DM_SPI if SPL
1887 select SPL_DM_SPI_FLASH if SPL
1889 select SYS_THUMB_BUILD if !ARM64
1892 imply DEBUG_UART_BOARD_INIT
1893 imply DISTRO_DEFAULTS
1895 imply SARADC_ROCKCHIP
1897 imply SPL_SYS_MALLOC_SIMPLE
1900 imply USB_FUNCTION_FASTBOOT
1902 config ARCH_OCTEONTX
1903 bool "Support OcteonTX SoCs"
1906 select GPIO_EXTRA_HEADER
1910 select BOARD_LATE_INIT
1911 select SYS_CACHE_SHIFT_7
1912 imply OF_HAS_PRIOR_STAGE
1914 config ARCH_OCTEONTX2
1915 bool "Support OcteonTX2 SoCs"
1918 select GPIO_EXTRA_HEADER
1922 select BOARD_LATE_INIT
1923 select SYS_CACHE_SHIFT_7
1924 imply OF_HAS_PRIOR_STAGE
1926 config TARGET_THUNDERX_88XX
1927 bool "Support ThunderX 88xx"
1929 select GPIO_EXTRA_HEADER
1932 select SYS_CACHE_SHIFT_7
1935 bool "Support Aspeed SoCs"
1940 config TARGET_DURIAN
1941 bool "Support Phytium Durian Platform"
1943 select GPIO_EXTRA_HEADER
1945 Support for durian platform.
1946 It has 2GB Sdram, uart and pcie.
1948 config TARGET_PRESIDIO_ASIC
1949 bool "Support Cortina Presidio ASIC Platform"
1953 config TARGET_XENGUEST_ARM64
1954 bool "Xen guest ARM64"
1958 select LINUX_KERNEL_IMAGE_HEADER
1961 imply OF_HAS_PRIOR_STAGE
1965 config SUPPORT_PASSING_ATAGS
1966 bool "Support pre-devicetree ATAG-based booting"
1968 imply SETUP_MEMORY_TAGS
1970 Support for booting older Linux kernels, using ATAGs rather than
1971 passing a devicetree. This is option is rarely used, and the
1972 semantics are defined at
1973 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
1975 config SETUP_MEMORY_TAGS
1976 bool "Pass memory size information via ATAG"
1977 depends on SUPPORT_PASSING_ATAGS
1980 bool "Pass Linux kernel cmdline via ATAG"
1981 depends on SUPPORT_PASSING_ATAGS
1984 bool "Pass initrd starting point and size via ATAG"
1985 depends on SUPPORT_PASSING_ATAGS
1988 bool "Pass system revision via ATAG"
1989 depends on SUPPORT_PASSING_ATAGS
1992 bool "Pass system serial number via ATAG"
1993 depends on SUPPORT_PASSING_ATAGS
1995 config STATIC_MACH_TYPE
1996 bool "Statically define the Machine ID number"
1998 When booting via ATAGs, enable this option if we know the correct
1999 machine ID number to use at compile time. Some systems will be
2000 passed the number dynamically by whatever loads U-Boot.
2003 int "Machine ID number"
2004 depends on STATIC_MACH_TYPE
2006 When booting via ATAGs, the machine type must be passed as a number.
2007 For the full list see https://www.arm.linux.org.uk/developer/machines
2009 config ARCH_SUPPORT_TFABOOT
2013 bool "Support for booting from TF-A"
2014 depends on ARCH_SUPPORT_TFABOOT
2016 Some platforms support the setup of secure registers (for instance
2017 for CPU errata handling) or provide secure services like PSCI.
2018 Those services could also be provided by other firmware parts
2019 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2020 does not need to (and cannot) execute this code.
2021 Enabling this option will make a U-Boot binary that is relying
2022 on other firmware layers to provide secure functionality.
2024 config TI_SECURE_DEVICE
2025 bool "HS Device Type Support"
2026 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2028 If a high secure (HS) device type is being used, this config
2029 must be set. This option impacts various aspects of the
2030 build system (to create signed boot images that can be
2031 authenticated) and the code. See the doc/README.ti-secure
2032 file for further details.
2034 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2035 config ISW_ENTRY_ADDR
2036 hex "Address in memory or XIP address of bootloader entry point"
2037 default 0x402F4000 if AM43XX
2038 default 0x402F0400 if AM33XX
2039 default 0x40301350 if OMAP54XX
2041 After any reset, the boot ROM searches the boot media for a valid
2042 boot image. For non-XIP devices, the ROM then copies the image into
2043 internal memory. For all boot modes, after the ROM processes the
2044 boot image it eventually computes the entry point address depending
2045 on the device type (secure/non-secure), boot media (xip/non-xip) and
2049 source "arch/arm/mach-apple/Kconfig"
2051 source "arch/arm/mach-aspeed/Kconfig"
2053 source "arch/arm/mach-at91/Kconfig"
2055 source "arch/arm/mach-bcm283x/Kconfig"
2057 source "arch/arm/mach-bcmstb/Kconfig"
2059 source "arch/arm/mach-davinci/Kconfig"
2061 source "arch/arm/mach-exynos/Kconfig"
2063 source "arch/arm/mach-highbank/Kconfig"
2065 source "arch/arm/mach-integrator/Kconfig"
2067 source "arch/arm/mach-ipq40xx/Kconfig"
2069 source "arch/arm/mach-k3/Kconfig"
2071 source "arch/arm/mach-keystone/Kconfig"
2073 source "arch/arm/mach-kirkwood/Kconfig"
2075 source "arch/arm/mach-lpc32xx/Kconfig"
2077 source "arch/arm/mach-mvebu/Kconfig"
2079 source "arch/arm/mach-octeontx/Kconfig"
2081 source "arch/arm/mach-octeontx2/Kconfig"
2083 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2085 source "arch/arm/mach-imx/mx3/Kconfig"
2087 source "arch/arm/mach-imx/mx5/Kconfig"
2089 source "arch/arm/mach-imx/mx6/Kconfig"
2091 source "arch/arm/mach-imx/mx7/Kconfig"
2093 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2095 source "arch/arm/mach-imx/imx8/Kconfig"
2097 source "arch/arm/mach-imx/imx8m/Kconfig"
2099 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2101 source "arch/arm/mach-imx/imxrt/Kconfig"
2103 source "arch/arm/mach-imx/mxs/Kconfig"
2105 source "arch/arm/mach-omap2/Kconfig"
2107 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2109 source "arch/arm/mach-orion5x/Kconfig"
2111 source "arch/arm/mach-owl/Kconfig"
2113 source "arch/arm/mach-rmobile/Kconfig"
2115 source "arch/arm/mach-meson/Kconfig"
2117 source "arch/arm/mach-mediatek/Kconfig"
2119 source "arch/arm/mach-qemu/Kconfig"
2121 source "arch/arm/mach-rockchip/Kconfig"
2123 source "arch/arm/mach-s5pc1xx/Kconfig"
2125 source "arch/arm/mach-snapdragon/Kconfig"
2127 source "arch/arm/mach-socfpga/Kconfig"
2129 source "arch/arm/mach-sti/Kconfig"
2131 source "arch/arm/mach-stm32/Kconfig"
2133 source "arch/arm/mach-stm32mp/Kconfig"
2135 source "arch/arm/mach-sunxi/Kconfig"
2137 source "arch/arm/mach-tegra/Kconfig"
2139 source "arch/arm/mach-u8500/Kconfig"
2141 source "arch/arm/mach-uniphier/Kconfig"
2143 source "arch/arm/cpu/armv7/vf610/Kconfig"
2145 source "arch/arm/mach-zynq/Kconfig"
2147 source "arch/arm/mach-zynqmp/Kconfig"
2149 source "arch/arm/mach-versal/Kconfig"
2151 source "arch/arm/mach-zynqmp-r5/Kconfig"
2153 source "arch/arm/cpu/armv7/Kconfig"
2155 source "arch/arm/cpu/armv8/Kconfig"
2157 source "arch/arm/mach-imx/Kconfig"
2159 source "arch/arm/mach-nexell/Kconfig"
2161 source "board/armltd/total_compute/Kconfig"
2163 source "board/bosch/shc/Kconfig"
2164 source "board/bosch/guardian/Kconfig"
2165 source "board/Marvell/octeontx/Kconfig"
2166 source "board/Marvell/octeontx2/Kconfig"
2167 source "board/armltd/vexpress/Kconfig"
2168 source "board/armltd/vexpress64/Kconfig"
2169 source "board/cortina/presidio-asic/Kconfig"
2170 source "board/broadcom/bcm963158/Kconfig"
2171 source "board/broadcom/bcm968360bg/Kconfig"
2172 source "board/broadcom/bcm968580xref/Kconfig"
2173 source "board/broadcom/bcmns3/Kconfig"
2174 source "board/cavium/thunderx/Kconfig"
2175 source "board/eets/pdu001/Kconfig"
2176 source "board/emulation/qemu-arm/Kconfig"
2177 source "board/freescale/ls2080aqds/Kconfig"
2178 source "board/freescale/ls2080ardb/Kconfig"
2179 source "board/freescale/ls1088a/Kconfig"
2180 source "board/freescale/ls1028a/Kconfig"
2181 source "board/freescale/ls1021aqds/Kconfig"
2182 source "board/freescale/ls1043aqds/Kconfig"
2183 source "board/freescale/ls1021atwr/Kconfig"
2184 source "board/freescale/ls1021atsn/Kconfig"
2185 source "board/freescale/ls1021aiot/Kconfig"
2186 source "board/freescale/ls1046aqds/Kconfig"
2187 source "board/freescale/ls1043ardb/Kconfig"
2188 source "board/freescale/ls1046ardb/Kconfig"
2189 source "board/freescale/ls1046afrwy/Kconfig"
2190 source "board/freescale/ls1012aqds/Kconfig"
2191 source "board/freescale/ls1012ardb/Kconfig"
2192 source "board/freescale/ls1012afrdm/Kconfig"
2193 source "board/freescale/lx2160a/Kconfig"
2194 source "board/grinn/chiliboard/Kconfig"
2195 source "board/hisilicon/hikey/Kconfig"
2196 source "board/hisilicon/hikey960/Kconfig"
2197 source "board/hisilicon/poplar/Kconfig"
2198 source "board/isee/igep003x/Kconfig"
2199 source "board/kontron/sl28/Kconfig"
2200 source "board/myir/mys_6ulx/Kconfig"
2201 source "board/seeed/npi_imx6ull/Kconfig"
2202 source "board/socionext/developerbox/Kconfig"
2203 source "board/st/stv0991/Kconfig"
2204 source "board/tcl/sl50/Kconfig"
2205 source "board/toradex/colibri_pxa270/Kconfig"
2206 source "board/variscite/dart_6ul/Kconfig"
2207 source "board/vscom/baltos/Kconfig"
2208 source "board/phytium/durian/Kconfig"
2209 source "board/xen/xenguest_arm64/Kconfig"
2210 source "board/keymile/Kconfig"
2212 source "arch/arm/Kconfig.debug"
2217 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2218 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2219 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64