1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2014 Eukréa Electromatique
6 * Configuration settings for the Embest RIoTboard
8 * based on mx6*sabre*.h which are :
9 * Copyright (C) 2012 Freescale Semiconductor, Inc.
12 #ifndef __RIOTBOARD_CONFIG_H
13 #define __RIOTBOARD_CONFIG_H
15 #define CONFIG_MXC_UART_BASE UART2_BASE
16 #define CONSOLE_DEV "ttymxc1"
18 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
20 /* Size of malloc() pool */
21 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
24 #define CONFIG_SYS_I2C_LEGACY
25 #define CONFIG_SYS_I2C_MXC
26 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
27 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
28 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
29 #define CONFIG_SYS_I2C_SPEED 100000
32 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
33 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
34 #define CONFIG_MXC_USB_FLAGS 0
37 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
39 #define CONFIG_ARP_TIMEOUT 200UL
41 /* Physical Memory Map */
42 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
44 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
45 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
46 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
48 #define CONFIG_SYS_INIT_SP_OFFSET \
49 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
50 #define CONFIG_SYS_INIT_SP_ADDR \
51 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
53 /* Environment organization */
55 #if defined(CONFIG_ENV_IS_IN_MMC)
57 #define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
58 #define CONFIG_SYS_FSL_USDHC_NUM 3
59 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
61 #define CONFIG_FDTFILE "imx6q-marsboard.dtb"
62 #define CONFIG_SYS_FSL_USDHC_NUM 2
66 #define CONFIG_VIDEO_LOGO
67 #define CONFIG_VIDEO_BMP_LOGO
68 #define CONFIG_IMX_HDMI
69 #define CONFIG_IMX_VIDEO_SKIP
71 #include "mx6_common.h"
76 #define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
77 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
78 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6dl-riotboard.dtb"
80 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* offset 69KB */
81 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */
82 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */
86 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
87 * 1M script, 1M pxe and the ramdisk at the end */
88 #define MEM_LAYOUT_ENV_SETTINGS \
89 "bootm_size=0x10000000\0" \
90 "kernel_addr_r=0x12000000\0" \
91 "fdt_addr_r=0x13000000\0" \
92 "scriptaddr=0x13100000\0" \
93 "pxefile_addr_r=0x13200000\0" \
94 "ramdisk_addr_r=0x13300000\0"
96 #define BOOT_TARGET_DEVICES(func) \
104 #include <config_distro_bootcmd.h>
106 #define CONSOLE_STDIN_SETTINGS \
109 #define CONSOLE_STDOUT_SETTINGS \
113 #define CONSOLE_ENV_SETTINGS \
114 CONSOLE_STDIN_SETTINGS \
115 CONSOLE_STDOUT_SETTINGS
117 #define CONFIG_EXTRA_ENV_SETTINGS \
118 CONSOLE_ENV_SETTINGS \
119 MEM_LAYOUT_ENV_SETTINGS \
120 "fdtfile=" CONFIG_FDTFILE "\0" \
121 "finduuid=part uuid mmc 0:1 uuid\0" \
124 #endif /* __RIOTBOARD_CONFIG_H */