2 * Copyright 2008-2011 Freescale Semiconductor, Inc.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <linux/compiler.h>
28 #include <asm/fsl_law.h>
31 DECLARE_GLOBAL_DATA_PTR;
33 #define FSL_HW_NUM_LAWS CONFIG_SYS_FSL_NUM_LAWS
35 #ifdef CONFIG_FSL_CORENET
36 #define LAW_BASE (CONFIG_SYS_FSL_CORENET_CCM_ADDR)
37 #define LAWAR_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawar)
38 #define LAWBARH_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarh)
39 #define LAWBARL_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarl)
40 #define LAWBAR_SHIFT 0
42 #define LAW_BASE (CONFIG_SYS_IMMR + 0xc08)
43 #define LAWAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x + 2)
44 #define LAWBAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x)
45 #define LAWBAR_SHIFT 12
49 static inline phys_addr_t get_law_base_addr(int idx)
51 #ifdef CONFIG_FSL_CORENET
53 ((u64)in_be32(LAWBARH_ADDR(idx)) << 32) |
54 in_be32(LAWBARL_ADDR(idx));
56 return (phys_addr_t)in_be32(LAWBAR_ADDR(idx)) << LAWBAR_SHIFT;
60 static inline void set_law_base_addr(int idx, phys_addr_t addr)
62 #ifdef CONFIG_FSL_CORENET
63 out_be32(LAWBARL_ADDR(idx), addr & 0xffffffff);
64 out_be32(LAWBARH_ADDR(idx), (u64)addr >> 32);
66 out_be32(LAWBAR_ADDR(idx), addr >> LAWBAR_SHIFT);
70 void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
72 gd->used_laws |= (1 << idx);
74 out_be32(LAWAR_ADDR(idx), 0);
75 set_law_base_addr(idx, addr);
76 out_be32(LAWAR_ADDR(idx), LAW_EN | ((u32)id << 20) | (u32)sz);
78 /* Read back so that we sync the writes */
79 in_be32(LAWAR_ADDR(idx));
82 void disable_law(u8 idx)
84 gd->used_laws &= ~(1 << idx);
86 out_be32(LAWAR_ADDR(idx), 0);
87 set_law_base_addr(idx, 0);
89 /* Read back so that we sync the writes */
90 in_be32(LAWAR_ADDR(idx));
95 #ifndef CONFIG_NAND_SPL
96 static int get_law_entry(u8 i, struct law_entry *e)
100 lawar = in_be32(LAWAR_ADDR(i));
102 if (!(lawar & LAW_EN))
105 e->addr = get_law_base_addr(i);
106 e->size = lawar & 0x3f;
107 e->trgt_id = (lawar >> 20) & 0xff;
113 int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
115 u32 idx = ffz(gd->used_laws);
117 if (idx >= FSL_HW_NUM_LAWS)
120 set_law(idx, addr, sz, id);
125 #ifndef CONFIG_NAND_SPL
126 int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
130 /* we have no LAWs free */
131 if (gd->used_laws == -1)
134 /* grab the last free law */
135 idx = __ilog2(~(gd->used_laws));
137 if (idx >= FSL_HW_NUM_LAWS)
140 set_law(idx, addr, sz, id);
145 struct law_entry find_law(phys_addr_t addr)
147 struct law_entry entry;
155 for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
158 if (!get_law_entry(i, &entry))
161 upper = entry.addr + (2ull << entry.size);
162 if ((addr >= entry.addr) && (addr < upper)) {
171 void print_laws(void)
176 printf("\nLocal Access Window Configuration\n");
177 for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
178 lawar = in_be32(LAWAR_ADDR(i));
179 #ifdef CONFIG_FSL_CORENET
180 printf("LAWBARH%02d: 0x%08x LAWBARL%02d: 0x%08x",
181 i, in_be32(LAWBARH_ADDR(i)),
182 i, in_be32(LAWBARL_ADDR(i)));
184 printf("LAWBAR%02d: 0x%08x", i, in_be32(LAWBAR_ADDR(i)));
186 printf(" LAWAR%02d: 0x%08x\n", i, lawar);
187 printf("\t(EN: %d TGT: 0x%02x SIZE: ",
188 (lawar & LAW_EN) ? 1 : 0, (lawar >> 20) & 0xff);
189 print_size(lawar_size(lawar), ")\n");
195 /* use up to 2 LAWs for DDR, used the last available LAWs */
196 int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
198 u64 start_align, law_sz;
202 start_align = 1ull << (LAW_SIZE_32G + 1);
204 start_align = 1ull << (ffs64(start) - 1);
205 law_sz = min(start_align, sz);
206 law_sz_enc = __ilog2_u64(law_sz) - 1;
208 if (set_last_law(start, law_sz_enc, id) < 0)
211 /* recalculate size based on what was actually covered by the law */
212 law_sz = 1ull << __ilog2_u64(law_sz);
214 /* do we still have anything to map */
219 start_align = 1ull << (ffs64(start) - 1);
220 law_sz = min(start_align, sz);
221 law_sz_enc = __ilog2_u64(law_sz) - 1;
223 if (set_last_law(start, law_sz_enc, id) < 0)
229 /* do we still have anything to map */
242 #if FSL_HW_NUM_LAWS < 32
243 gd->used_laws = ~((1 << FSL_HW_NUM_LAWS) - 1);
244 #elif FSL_HW_NUM_LAWS == 32
247 #error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes
251 * Any LAWs that were set up before we booted assume they are meant to
252 * be around and mark them used.
254 for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
255 u32 lawar = in_be32(LAWAR_ADDR(i));
258 gd->used_laws |= (1 << i);
261 #if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
263 * in NAND boot we've already parsed the law_table and setup those LAWs
264 * so don't do it again.
269 for (i = 0; i < num_law_entries; i++) {
270 if (law_table[i].index == -1)
271 set_next_law(law_table[i].addr, law_table[i].size,
272 law_table[i].trgt_id);
274 set_law(law_table[i].index, law_table[i].addr,
275 law_table[i].size, law_table[i].trgt_id);