1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2019 Toradex
9 #include <asm/global_data.h>
11 #include <asm/arch/clock.h>
12 #include <asm/arch/imx8-pins.h>
13 #include <asm/arch/iomux.h>
14 #include <firmware/imx/sci/sci.h>
15 #include <asm/arch/snvs_security_sc.h>
16 #include <asm/arch/sys_proto.h>
21 #include <linux/libfdt.h>
23 #include "../common/tdx-cfg-block.h"
25 DECLARE_GLOBAL_DATA_PTR;
27 #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
28 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
29 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
30 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
32 static iomux_cfg_t uart3_pads[] = {
33 SC_P_FLEXCAN2_RX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
34 SC_P_FLEXCAN2_TX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
35 /* Transceiver FORCEOFF# signal, mux to use pull-up */
36 SC_P_QSPI0B_DQS | MUX_MODE_ALT(4) | MUX_PAD_CTRL(UART_PAD_CTRL),
39 static void setup_iomux_uart(void)
41 imx8_iomux_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
44 static int is_imx8dx(void)
47 int sc_err = sc_misc_otp_fuse_read(-1, 6, &val);
50 /* DX has two A35 cores disabled */
51 return (val & 0xf) != 0x0;
56 void board_mem_get_layout(u64 *phys_sdram_1_start,
57 u64 *phys_sdram_1_size,
58 u64 *phys_sdram_2_start,
59 u64 *phys_sdram_2_size)
61 *phys_sdram_1_start = PHYS_SDRAM_1;
63 /* Our DX based SKUs only have 1 GB RAM */
64 *phys_sdram_1_size = SZ_1G;
66 *phys_sdram_1_size = PHYS_SDRAM_1_SIZE;
67 *phys_sdram_2_start = PHYS_SDRAM_2;
68 *phys_sdram_2_size = PHYS_SDRAM_2_SIZE;
71 int board_early_init_f(void)
73 sc_pm_clock_rate_t rate;
77 * This works around that having only UART3 up the baudrate is 1.2M
78 * instead of 115.2k. Set UART0 clock root to 80 MHz
81 err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate);
85 /* Set UART3 clock root to 80 MHz and enable it */
87 err = sc_pm_setup_uart(SC_R_UART_3, rate);
96 #if IS_ENABLED(CONFIG_DM_GPIO)
97 static void board_gpio_init(void)
102 static inline void board_gpio_init(void) {}
105 #if IS_ENABLED(CONFIG_FEC_MXC)
108 int board_phy_config(struct phy_device *phydev)
110 if (phydev->drv->config)
111 phydev->drv->config(phydev);
117 static void select_dt_from_module_version(void)
120 * The dtb filename is constructed from ${soc}-colibri-${fdt_board}.dtb.
121 * Set soc depending on the used SoC.
124 env_set("soc", "imx8dx");
126 env_set("soc", "imx8qxp");
133 if (IS_ENABLED(CONFIG_IMX_SNVS_SEC_SC_AUTO)) {
134 int ret = snvs_security_sc_init();
144 * Board specific reset that is system reset.
151 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
152 int ft_board_setup(void *blob, struct bd_info *bd)
154 return ft_common_board_setup(blob, bd);
158 int board_mmc_get_env_dev(int devno)
163 int board_late_init(void)
165 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
166 /* TODO move to common */
167 env_set("board_name", "Colibri iMX8QXP");
168 env_set("board_rev", "v1.0");
173 select_dt_from_module_version();