4 #include <linux/stringify.h>
5 #define BOOTFLASH_START 0xF0000000
10 #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
11 #define CONFIG_SYS_SDRAM_BASE2 (CONFIG_SYS_SDRAM_BASE + 0x10000000) /* +256M */
13 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
14 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
16 #define CFG_83XX_DDR_USES_CS0
19 * Manually set up DDR parameters
21 #define CONFIG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */
26 #define CONFIG_SYS_FLASH_BASE 0xF0000000
28 /* Reserve 768 kB for Mon */
31 * Initial RAM Base Address Setup
33 #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
34 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
36 * Init Local Bus Memory Controller:
38 * Bank Bus Machine PortSz Size Device
39 * ---- --- ------- ------ ----- ------
40 * 0 Local GPCM 16 bit 256MB FLASH
41 * 1 Local GPCM 8 bit 128MB GPIO/PIGGY
46 * FLASH on the Local Bus
48 #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
50 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
53 #define CONFIG_SYS_NUM_I2C_BUSES 4
54 #define CONFIG_SYS_I2C_MAX_HOPS 1
55 #define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
56 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
57 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
58 {1, {I2C_NULL_HOP} } }
60 #if defined(CONFIG_CMD_NAND)
61 #define CONFIG_NAND_KMETER1
62 #define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE
66 * For booting Linux, the board info and command line data
67 * have to be in the first 8 MB of memory, since this is
68 * the maximum mapped by the Linux kernel during initialization.
70 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
77 * Environment Configuration
79 #ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */
80 #define CONFIG_KM_DEF_ENV "km-common=empty\0"
83 #ifndef CONFIG_KM_DEF_ARCH
84 #define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0"
87 #define CONFIG_EXTRA_ENV_SETTINGS \
91 "prot off " __stringify(CONFIG_ENV_ADDR) " +0x40000 && " \
92 "era " __stringify(CONFIG_ENV_ADDR) " +0x40000\0" \
97 * QE UEC ethernet configuration
99 #define CONFIG_UEC_ETH