[J-u-boot.git] / include / configs / shmin.h

/*
 * Configuation settings for shmin (T-SH7706LAN, T-SH7706LSR)
 *
 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __SHMIN_H
#define __SHMIN_H

#define CONFIG_CPU_SH7706	1
/* T-SH7706LAN */
#define CONFIG_SHMIN		1
/* T-SH7706LSR*/
/* #define CONFIG_T_SH7706LSR	1 */

/*
 * This board has original boot loader. If you write u-boot to 0x0,
 * you should set undef.
 */
#undef  CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_DISPLAY_BOARDINFO

/* system */
#define SHMIN_SDRAM_BASE		(0x8C000000)
#define SHMIN_FLASH_BASE_1		(0xA0000000)

#define CONFIG_SYS_TEXT_BASE	0x8DFB0000
#define CONFIG_SYS_LONGHELP		/* undef to save memory	*/
#define CONFIG_SYS_CBSIZE	256	/* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE	256	/* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS	16	/* max args accepted for monitor commands */
/* Buffer size for Boot Arguments passed to kernel */
#define CONFIG_SYS_BARGSIZE	512
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600,14400,19200,38400,57600,115200 }

/* SCIF */
#define CONFIG_CONS_SCIF0	1

/* memory */
#define CONFIG_SYS_SDRAM_BASE		SHMIN_SDRAM_BASE
#define CONFIG_SYS_SDRAM_SIZE		(32 * 1024 * 1024)
#define CONFIG_SYS_MEMTEST_START	SHMIN_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - (256 * 1024))

#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 1 * 1024 * 1024)
#define CONFIG_SYS_MONITOR_BASE		(SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE)
#define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
#define CONFIG_SYS_MALLOC_LEN		(256 * 1024)
#define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)

/* FLASH */
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#undef  CONFIG_SYS_FLASH_QUIET_TEST
#define CONFIG_SYS_FLASH_EMPTY_INFO	/* print 'E' for empty sector on flinfo */
#define CONFIG_SYS_FLASH_BASE		SHMIN_FLASH_BASE_1
#define CONFIG_SYS_MAX_FLASH_SECT 11
#define CONFIG_SYS_MAX_FLASH_BANKS	1

#define CONFIG_FLASH_CFI_LEGACY
#define CONFIG_SYS_ATMEL_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_ATMEL_TOTALSECT	CONFIG_SYS_MAX_FLASH_SECT
#define CONFIG_SYS_ATMEL_REGION		4
#define CONFIG_SYS_ATMEL_SECT		{1, 2, 1, 7}
#define CONFIG_SYS_ATMEL_SECTSZ		{0x4000, 0x2000, 0x8000, 0x10000}

#define CONFIG_ENV_SECT_SIZE	(64 * 1024)
#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE

#ifdef CONFIG_T_SH7706LSR
#define CONFIG_ENV_ADDR		(SHMIN_FLASH_BASE_1 + 70000)
#else
#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
#endif

#define CONFIG_SYS_FLASH_ERASE_TOUT	120000
#define CONFIG_SYS_FLASH_WRITE_TOUT	500

/* Board Clock */
#ifdef CONFIG_T_SH7706LSR
#define CONFIG_SYS_CLK_FREQ 40000000
#else
#define CONFIG_SYS_CLK_FREQ 33333333
#endif /* CONFIG_T_SH7706LSR */
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV	4

/* Network device */
#define CONFIG_DRIVER_NE2000
#define CONFIG_DRIVER_NE2000_BASE   (0xb0000300)

#endif	/* __SHMIN_H */
Commit	Line	Data
6b7c0f5e	1	/*
a972089a	2	* Configuation settings for shmin (T-SH7706LAN, T-SH7706LSR)
6b7c0f5e	3	*
a972089a	4	* Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6b7c0f5e	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
6b7c0f5e NI	7	*/
	8
	9	#ifndef __SHMIN_H
	10	#define __SHMIN_H
	11
6b7c0f5e	12	#define CONFIG_CPU_SH7706 1
a972089a	13	/* T-SH7706LAN */
6b7c0f5e	14	#define CONFIG_SHMIN 1
a972089a NI	15	/* T-SH7706LSR*/
a972089a NI	16	/* #define CONFIG_T_SH7706LSR 1 */
6b7c0f5e	17
d1a24f06	18	/*
6b7c0f5e NI	19	* This board has original boot loader. If you write u-boot to 0x0,
	20	* you should set undef.
	21	*/
6b7c0f5e	22	#undef CONFIG_SHOW_BOOT_PROGRESS
18a40e84	23	#define CONFIG_DISPLAY_BOARDINFO
6b7c0f5e NI	24
	25	/* system */
	26	#define SHMIN_SDRAM_BASE (0x8C000000)
	27	#define SHMIN_FLASH_BASE_1 (0xA0000000)
	28
a8d954ba	29	#define CONFIG_SYS_TEXT_BASE 0x8DFB0000
6b7c0f5e	30	#define CONFIG_SYS_LONGHELP /* undef to save memory */
6b7c0f5e NI	31	#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
	32	#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
	33	#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
	34	/* Buffer size for Boot Arguments passed to kernel */
	35	#define CONFIG_SYS_BARGSIZE 512
	36	/* List of legal baudrate settings for this board */
a972089a	37	#define CONFIG_SYS_BAUDRATE_TABLE { 9600,14400,19200,38400,57600,115200 }
6b7c0f5e NI	38
6b7c0f5e NI	39	/* SCIF */
6b7c0f5e NI	40	#define CONFIG_CONS_SCIF0 1
	41
	42	/* memory */
	43	#define CONFIG_SYS_SDRAM_BASE SHMIN_SDRAM_BASE
	44	#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024)
	45	#define CONFIG_SYS_MEMTEST_START SHMIN_SDRAM_BASE
	46	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - (256 * 1024))
	47
	48	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1 * 1024 * 1024)
	49	#define CONFIG_SYS_MONITOR_BASE (SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE)
	50	#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
	51	#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
6b7c0f5e NI	52	#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
	53
	54	/* FLASH */
	55	#define CONFIG_SYS_FLASH_CFI
	56	#define CONFIG_FLASH_CFI_DRIVER
	57	#undef CONFIG_SYS_FLASH_QUIET_TEST
	58	#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
	59	#define CONFIG_SYS_FLASH_BASE SHMIN_FLASH_BASE_1
	60	#define CONFIG_SYS_MAX_FLASH_SECT 11
	61	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	62
	63	#define CONFIG_FLASH_CFI_LEGACY
	64	#define CONFIG_SYS_ATMEL_BASE CONFIG_SYS_FLASH_BASE
	65	#define CONFIG_SYS_ATMEL_TOTALSECT CONFIG_SYS_MAX_FLASH_SECT
	66	#define CONFIG_SYS_ATMEL_REGION 4
	67	#define CONFIG_SYS_ATMEL_SECT {1, 2, 1, 7}
	68	#define CONFIG_SYS_ATMEL_SECTSZ {0x4000, 0x2000, 0x8000, 0x10000}
	69
6b7c0f5e NI	70	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
6b7c0f5e NI	71	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
a972089a NI	72
	73	#ifdef CONFIG_T_SH7706LSR
	74	#define CONFIG_ENV_ADDR (SHMIN_FLASH_BASE_1 + 70000)
	75	#else
6b7c0f5e	76	#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
a972089a NI	77	#endif
a972089a NI	78
6b7c0f5e NI	79	#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
	80	#define CONFIG_SYS_FLASH_WRITE_TOUT 500
	81
	82	/* Board Clock */
a972089a NI	83	#ifdef CONFIG_T_SH7706LSR
	84	#define CONFIG_SYS_CLK_FREQ 40000000
	85	#else
6b7c0f5e	86	#define CONFIG_SYS_CLK_FREQ 33333333
a972089a	87	#endif /* CONFIG_T_SH7706LSR */
684a501e NI	88	#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
684a501e NI	89	#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
6b7c0f5e	90	#define CONFIG_SYS_TMU_CLK_DIV 4
6b7c0f5e NI	91
	92	/* Network device */
	93	#define CONFIG_DRIVER_NE2000
	94	#define CONFIG_DRIVER_NE2000_BASE (0xb0000300)
	95
	96	#endif /* __SHMIN_H */