Commit | Line | Data |
---|---|---|
5a42fd02 PR |
1 | CONFIG_ARM=y |
2 | CONFIG_SKIP_LOWLEVEL_INIT=y | |
3 | CONFIG_COUNTER_FREQUENCY=24000000 | |
4 | CONFIG_ARCH_ROCKCHIP=y | |
5a42fd02 | 5 | CONFIG_NR_DRAM_BANKS=1 |
cd55e8ca | 6 | CONFIG_SF_DEFAULT_SPEED=10000000 |
5a42fd02 PR |
7 | CONFIG_ENV_SIZE=0x8000 |
8 | CONFIG_ENV_OFFSET=0x3F8000 | |
f48b8d7c | 9 | CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-pinephone-pro" |
fcb5117d | 10 | CONFIG_DM_RESET=y |
5a42fd02 | 11 | CONFIG_ROCKCHIP_RK3399=y |
263f81d3 | 12 | CONFIG_ROCKCHIP_SPI_IMAGE=y |
5a42fd02 | 13 | CONFIG_TARGET_PINEPHONE_PRO_RK3399=y |
d8927020 TR |
14 | CONFIG_SYS_LOAD_ADDR=0x800800 |
15 | CONFIG_SF_DEFAULT_BUS=1 | |
5a42fd02 PR |
16 | CONFIG_DEBUG_UART_BASE=0xFF1A0000 |
17 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
18 | CONFIG_SPL_SPI_FLASH_SUPPORT=y | |
19 | CONFIG_SPL_SPI=y | |
5a42fd02 | 20 | CONFIG_DEBUG_UART=y |
5a42fd02 PR |
21 | CONFIG_BOOTDELAY=3 |
22 | CONFIG_USE_PREBOOT=y | |
23 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinephone-pro.dtb" | |
24 | CONFIG_DISPLAY_BOARDINFO_LATE=y | |
263f81d3 | 25 | CONFIG_SPL_MAX_SIZE=0x40000 |
5a42fd02 | 26 | CONFIG_SPL_PAD_TO=0x7f8000 |
5a42fd02 | 27 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
5a42fd02 | 28 | CONFIG_SPL_SPI_LOAD=y |
263f81d3 | 29 | CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000 |
e6fa0dcc | 30 | CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y |
5a42fd02 PR |
31 | CONFIG_TPL=y |
32 | CONFIG_CMD_BOOTZ=y | |
33 | CONFIG_CMD_GPIO=y | |
34 | CONFIG_CMD_GPT=y | |
35 | CONFIG_CMD_I2C=y | |
36 | CONFIG_CMD_MMC=y | |
5a42fd02 PR |
37 | CONFIG_CMD_USB=y |
38 | # CONFIG_CMD_SETEXPR is not set | |
39 | CONFIG_CMD_TIME=y | |
40 | CONFIG_CMD_PMIC=y | |
41 | CONFIG_CMD_REGULATOR=y | |
42 | CONFIG_SPL_OF_CONTROL=y | |
100f489f | 43 | CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
5a42fd02 PR |
44 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
45 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
5a42fd02 PR |
46 | CONFIG_ROCKCHIP_GPIO=y |
47 | CONFIG_SYS_I2C_ROCKCHIP=y | |
5a42fd02 PR |
48 | CONFIG_LED=y |
49 | CONFIG_LED_GPIO=y | |
5566f3a2 | 50 | CONFIG_ROCKCHIP_IODOMAIN=y |
5a42fd02 PR |
51 | CONFIG_MMC_DW=y |
52 | CONFIG_MMC_DW_ROCKCHIP=y | |
53 | CONFIG_MMC_SDHCI=y | |
54 | CONFIG_MMC_SDHCI_SDMA=y | |
55 | CONFIG_MMC_SDHCI_ROCKCHIP=y | |
cd55e8ca | 56 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y |
5a42fd02 | 57 | CONFIG_SPI_FLASH_GIGADEVICE=y |
cd55e8ca | 58 | CONFIG_SPI_FLASH_SILICONKAISER=y |
5a42fd02 PR |
59 | CONFIG_SPI_FLASH_WINBOND=y |
60 | CONFIG_PHY_ROCKCHIP_INNO_USB2=y | |
61 | CONFIG_PHY_ROCKCHIP_TYPEC=y | |
62 | CONFIG_DM_PMIC_FAN53555=y | |
5a42fd02 | 63 | CONFIG_PMIC_RK8XX=y |
5a42fd02 PR |
64 | CONFIG_REGULATOR_RK8XX=y |
65 | CONFIG_PWM_ROCKCHIP=y | |
70ca9f62 | 66 | CONFIG_RAM_ROCKCHIP_LPDDR4=y |
5a42fd02 PR |
67 | CONFIG_BAUDRATE=1500000 |
68 | CONFIG_DEBUG_UART_SHIFT=2 | |
cd55e8ca | 69 | CONFIG_SYS_NS16550_MEM32=y |
5a42fd02 PR |
70 | CONFIG_ROCKCHIP_SPI=y |
71 | CONFIG_SYSRESET=y | |
72 | CONFIG_USB=y | |
73 | CONFIG_USB_XHCI_HCD=y | |
5a42fd02 PR |
74 | CONFIG_USB_EHCI_HCD=y |
75 | CONFIG_USB_EHCI_GENERIC=y | |
76 | CONFIG_USB_OHCI_HCD=y | |
77 | CONFIG_USB_OHCI_GENERIC=y | |
78 | CONFIG_USB_DWC3=y | |
79 | CONFIG_USB_DWC3_GENERIC=y | |
80 | CONFIG_USB_KEYBOARD=y | |
81 | CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y | |
82 | CONFIG_USB_HOST_ETHER=y | |
83 | CONFIG_USB_ETHER_ASIX=y | |
84 | CONFIG_USB_ETHER_RTL8152=y | |
5a42fd02 | 85 | CONFIG_VIDEO=y |
fcb5117d | 86 | CONFIG_DISPLAY=y |
5a42fd02 PR |
87 | CONFIG_VIDEO_ROCKCHIP=y |
88 | CONFIG_DISPLAY_ROCKCHIP_EDP=y | |
5a42fd02 | 89 | CONFIG_ERRNO_STR=y |