projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| a877880c | 1 | /* |
| ba8e76bd TT |
2 | * Copyright 2007-2011 Freescale Semiconductor, Inc. |
| 3 | * Authors: York Sun <yorksun@freescale.com> | |
| 4 | * Timur Tabi <timur@freescale.com> | |
| a877880c YS |
5 | * |
| 6 | * FSL DIU Framebuffer driver | |
| 7 | * | |
| 1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
| a877880c YS |
9 | */ |
| 10 | ||
| 11 | #include <common.h> | |
| 12 | #include <command.h> | |
| 13 | #include <asm/io.h> | |
| 9e70d137 | 14 | #include <fsl_diu_fb.h> |
| ba8e76bd TT |
15 | #include "../common/pixis.h" |
| 16 | ||
| 17 | #define PX_BRDCFG0_DLINK 0x10 | |
| 18 | #define PX_BRDCFG0_DVISEL 0x08 | |
| 070ba561 | 19 | |
| 3b80c5f5 YS |
20 | void diu_set_pixel_clock(unsigned int pixclock) |
| 21 | { | |
| 6d0f6bcf | 22 | volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
| 3b80c5f5 YS |
23 | volatile ccsr_gur_t *gur = &immap->im_gur; |
| 24 | volatile unsigned int *guts_clkdvdr = &gur->clkdvdr; | |
| 25 | unsigned long speed_ccb, temp, pixval; | |
| 26 | ||
| 27 | speed_ccb = get_bus_freq(0); | |
| 28 | temp = 1000000000/pixclock; | |
| 29 | temp *= 1000; | |
| 30 | pixval = speed_ccb / temp; | |
| 31 | debug("DIU pixval = %lu\n", pixval); | |
| 32 | ||
| 33 | /* Modify PXCLK in GUTS CLKDVDR */ | |
| 34 | debug("DIU: Current value of CLKDVDR = 0x%08x\n", *guts_clkdvdr); | |
| 35 | temp = *guts_clkdvdr & 0x2000FFFF; | |
| 36 | *guts_clkdvdr = temp; /* turn off clock */ | |
| 37 | *guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16); | |
| 38 | debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr); | |
| 39 | } | |
| a877880c | 40 | |
| ba8e76bd | 41 | int platform_diu_init(unsigned int xres, unsigned int yres, const char *port) |
| a877880c | 42 | { |
| ba8e76bd TT |
43 | const char *name; |
| 44 | int gamma_fix = 0; | |
| 45 | u32 pixel_format = 0x88883316; | |
| 46 | u8 temp; | |
| a877880c | 47 | |
| ba8e76bd | 48 | temp = in_8(&pixis->brdcfg0); |
| a877880c | 49 | |
| ba8e76bd TT |
50 | if (strncmp(port, "dlvds", 5) == 0) { |
| 51 | /* Dual link LVDS */ | |
| a877880c | 52 | gamma_fix = 1; |
| ba8e76bd TT |
53 | temp &= ~(PX_BRDCFG0_DLINK | PX_BRDCFG0_DVISEL); |
| 54 | name = "Dual-Link LVDS"; | |
| 55 | } else if (strncmp(port, "lvds", 4) == 0) { | |
| 56 | /* Single link LVDS */ | |
| 57 | temp = (temp & ~PX_BRDCFG0_DVISEL) | PX_BRDCFG0_DLINK; | |
| 58 | name = "Single-Link LVDS"; | |
| 59 | } else { | |
| 60 | /* DVI */ | |
| 61 | if (in_8(&pixis->ver) == 1) /* Board version */ | |
| 62 | pixel_format = 0x88882317; | |
| 63 | temp |= PX_BRDCFG0_DVISEL; | |
| 64 | name = "DVI"; | |
| a877880c YS |
65 | } |
| 66 | ||
| ba8e76bd TT |
67 | printf("DIU: Switching to %s monitor @ %ux%u\n", name, xres, yres); |
| 68 | out_8(&pixis->brdcfg0, temp); | |
| 69 | ||
| 3b4a2263 | 70 | return fsl_diu_init(xres, yres, pixel_format, gamma_fix); |
| 070ba561 | 71 | } |