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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
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2 | /* |
3 | * (C) Copyright 2010 | |
4 | * Marvell Semiconductor <www.marvell.com> | |
5 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> | |
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6 | */ |
7 | ||
8 | /* | |
9 | * This file contains Marvell Board Specific common defincations. | |
10 | * This file should be included in board config header file. | |
11 | * | |
12 | * It supports common definations for Kirkwood platform | |
13 | * TBD: support for Orion5X platforms | |
14 | */ | |
15 | ||
16 | #ifndef _MV_COMMON_H | |
17 | #define _MV_COMMON_H | |
18 | ||
19 | /* | |
20 | * High Level Configuration Options (easy to change) | |
21 | */ | |
54e999a3 | 22 | |
8e14ed85 PW |
23 | /* |
24 | * Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h | |
25 | */ | |
8e14ed85 | 26 | |
0b20ed76 | 27 | /* additions for new ARM relocation support */ |
8e14ed85 | 28 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
0b20ed76 | 29 | |
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30 | /* |
31 | * NS16550 Configuration | |
32 | */ | |
54e999a3 | 33 | #define CONFIG_SYS_NS16550_SERIAL |
54e999a3 | 34 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK |
1d51ea19 SR |
35 | #if !defined(CONFIG_DM_SERIAL) |
36 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
8e14ed85 | 37 | #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE |
1d51ea19 | 38 | #endif |
54e999a3 | 39 | |
54e999a3 | 40 | /* auto boot */ |
b81d0ea7 | 41 | #define CONFIG_PREBOOT |
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42 | |
43 | /* | |
44 | * For booting Linux, the board info and command line data | |
45 | * have to be in the first 8 MB of memory, since this is | |
46 | * the maximum mapped by the Linux kernel during initialization. | |
47 | */ | |
48 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
49 | #define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ | |
50 | #define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ | |
51 | ||
54e999a3 | 52 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ |
54e999a3 | 53 | |
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54 | /* |
55 | * Size of malloc() pool | |
56 | */ | |
bfbfab94 | 57 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 * 4) /* 4MiB for malloc() */ |
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58 | |
59 | /* | |
60 | * Other required minimal configurations | |
61 | */ | |
54e999a3 | 62 | #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ |
54e999a3 | 63 | #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ |
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64 | #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ |
65 | #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ | |
54e999a3 | 66 | #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
5a9749ee | 67 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
54e999a3 | 68 | |
2f795ac7 SG |
69 | /* ====> Include platform Common Definitions */ |
70 | #include <asm/arch/config.h> | |
71 | ||
2f795ac7 | 72 | /* ====> Include driver Common Definitions */ |
54e999a3 | 73 | /* |
cf946c6d | 74 | * Common NAND configuration |
54e999a3 | 75 | */ |
cf946c6d LW |
76 | #ifdef CONFIG_CMD_NAND |
77 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
cf946c6d LW |
78 | #endif |
79 | ||
54e999a3 | 80 | #endif /* _MV_COMMON_H */ |