mmc: initialize an err variable
[J-u-boot.git] / drivers / fpga / fpga.c
CommitLineData
83d290c5 1// SPDX-License-Identifier: GPL-2.0+
e2211743
WD
2/*
3 * (C) Copyright 2002
4 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
e2211743
WD
5 */
6
f6555d90 7/* Generic FPGA support */
e2211743 8#include <common.h> /* core U-Boot definitions */
691d719d 9#include <init.h>
f7ae49fc 10#include <log.h>
e2211743
WD
11#include <xilinx.h> /* xilinx specific definitions */
12#include <altera.h> /* altera specific definitions */
3b8ac464 13#include <lattice.h>
336d4615 14#include <dm/device_compat.h>
e2211743 15
e2211743
WD
16/* Local definitions */
17#ifndef CONFIG_MAX_FPGA_DEVICES
18#define CONFIG_MAX_FPGA_DEVICES 5
19#endif
20
e2211743 21/* Local static data */
e2211743
WD
22static int next_desc = FPGA_INVALID_DEVICE;
23static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];
24
f6555d90
MS
25/*
26 * fpga_no_sup
e2211743
WD
27 * 'no support' message function
28 */
f6555d90 29static void fpga_no_sup(char *fn, char *msg)
e2211743 30{
f6555d90
MS
31 if (fn && msg)
32 printf("%s: No support for %s.\n", fn, msg);
33 else if (msg)
34 printf("No support for %s.\n", msg);
35 else
62a3b7dd 36 printf("No FPGA support!\n");
e2211743
WD
37}
38
39
40/* fpga_get_desc
41 * map a device number to a descriptor
42 */
ebd322de 43const fpga_desc *const fpga_get_desc(int devnum)
e2211743 44{
f6555d90 45 fpga_desc *desc = (fpga_desc *)NULL;
e2211743 46
f6555d90 47 if ((devnum >= 0) && (devnum < next_desc)) {
e2211743 48 desc = &desc_table[devnum];
f6555d90
MS
49 debug("%s: found fpga descriptor #%d @ 0x%p\n",
50 __func__, devnum, desc);
e2211743
WD
51 }
52
53 return desc;
54}
55
f6555d90
MS
56/*
57 * fpga_validate
e2211743
WD
58 * generic parameter checking code
59 */
6631db47
MS
60const fpga_desc *const fpga_validate(int devnum, const void *buf,
61 size_t bsize, char *fn)
e2211743 62{
f6555d90 63 const fpga_desc *desc = fpga_get_desc(devnum);
e2211743 64
f6555d90
MS
65 if (!desc)
66 printf("%s: Invalid device number %d\n", fn, devnum);
e2211743 67
f6555d90
MS
68 if (!buf) {
69 printf("%s: Null buffer.\n", fn);
e2211743
WD
70 return (fpga_desc * const)NULL;
71 }
e2211743
WD
72 return desc;
73}
74
f6555d90
MS
75/*
76 * fpga_dev_info
e2211743
WD
77 * generic multiplexing code
78 */
f6555d90 79static int fpga_dev_info(int devnum)
e2211743 80{
f6555d90
MS
81 int ret_val = FPGA_FAIL; /* assume failure */
82 const fpga_desc * const desc = fpga_get_desc(devnum);
e2211743 83
f6555d90
MS
84 if (desc) {
85 debug("%s: Device Descriptor @ 0x%p\n",
86 __func__, desc->devdesc);
e2211743 87
f6555d90 88 switch (desc->devtype) {
e2211743 89 case fpga_xilinx:
0133502e 90#if defined(CONFIG_FPGA_XILINX)
f6555d90
MS
91 printf("Xilinx Device\nDescriptor @ 0x%p\n", desc);
92 ret_val = xilinx_info(desc->devdesc);
e2211743 93#else
f6555d90 94 fpga_no_sup((char *)__func__, "Xilinx devices");
e2211743
WD
95#endif
96 break;
97 case fpga_altera:
0133502e 98#if defined(CONFIG_FPGA_ALTERA)
f6555d90
MS
99 printf("Altera Device\nDescriptor @ 0x%p\n", desc);
100 ret_val = altera_info(desc->devdesc);
e2211743 101#else
f6555d90 102 fpga_no_sup((char *)__func__, "Altera devices");
e2211743
WD
103#endif
104 break;
3b8ac464 105 case fpga_lattice:
439f6f7e 106#if defined(CONFIG_FPGA_LATTICE)
3b8ac464
SB
107 printf("Lattice Device\nDescriptor @ 0x%p\n", desc);
108 ret_val = lattice_info(desc->devdesc);
439f6f7e 109#else
f6555d90 110 fpga_no_sup((char *)__func__, "Lattice devices");
439f6f7e 111#endif
3b8ac464 112 break;
e2211743 113 default:
f6555d90
MS
114 printf("%s: Invalid or unsupported device type %d\n",
115 __func__, desc->devtype);
e2211743
WD
116 }
117 } else {
f6555d90 118 printf("%s: Invalid device number %d\n", __func__, devnum);
e2211743
WD
119 }
120
121 return ret_val;
122}
123
f6555d90 124/*
905bca6c 125 * fpga_init is usually called from misc_init_r() and MUST be called
e2211743
WD
126 * before any of the other fpga functions are used.
127 */
6385b281 128void fpga_init(void)
e2211743 129{
e2211743 130 next_desc = 0;
f6555d90 131 memset(desc_table, 0, sizeof(desc_table));
e2211743 132
ee976c1b 133 debug("%s\n", __func__);
e2211743
WD
134}
135
f6555d90
MS
136/*
137 * fpga_count
e2211743
WD
138 * Basic interface function to get the current number of devices available.
139 */
f6555d90 140int fpga_count(void)
e2211743
WD
141{
142 return next_desc;
143}
144
f6555d90
MS
145/*
146 * fpga_add
6385b281 147 * Add the device descriptor to the device table.
e2211743 148 */
f6555d90 149int fpga_add(fpga_type devtype, void *desc)
e2211743
WD
150{
151 int devnum = FPGA_INVALID_DEVICE;
152
cda1e3fb
MS
153 if (!desc) {
154 printf("%s: NULL device descriptor\n", __func__);
155 return devnum;
156 }
157
f6555d90
MS
158 if (next_desc < 0) {
159 printf("%s: FPGA support not initialized!\n", __func__);
160 } else if ((devtype > fpga_min_type) && (devtype < fpga_undefined)) {
cda1e3fb
MS
161 if (next_desc < CONFIG_MAX_FPGA_DEVICES) {
162 devnum = next_desc;
163 desc_table[next_desc].devtype = devtype;
164 desc_table[next_desc++].devdesc = desc;
e2211743 165 } else {
cda1e3fb
MS
166 printf("%s: Exceeded Max FPGA device count\n",
167 __func__);
e2211743
WD
168 }
169 } else {
f6555d90 170 printf("%s: Unsupported FPGA type %d\n", __func__, devtype);
e2211743
WD
171 }
172
173 return devnum;
174}
175
8b93a92f
GS
176/*
177 * Return 1 if the fpga data is partial.
178 * This is only required for fpga drivers that support bitstream_type.
179 */
180int __weak fpga_is_partial_data(int devnum, size_t img_len)
181{
182 return 0;
183}
184
52c20644
MS
185/*
186 * Convert bitstream data and load into the fpga
187 */
7a78bd26
MS
188int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
189 bitstream_type bstype)
52c20644
MS
190{
191 printf("Bitstream support not implemented for this FPGA device\n");
192 return FPGA_FAIL;
193}
194
1a897668
SDPP
195#if defined(CONFIG_CMD_FPGA_LOADFS)
196int fpga_fsload(int devnum, const void *buf, size_t size,
197 fpga_fs_info *fpga_fsinfo)
198{
199 int ret_val = FPGA_FAIL; /* assume failure */
200 const fpga_desc *desc = fpga_validate(devnum, buf, size,
201 (char *)__func__);
202
203 if (desc) {
204 switch (desc->devtype) {
205 case fpga_xilinx:
206#if defined(CONFIG_FPGA_XILINX)
207 ret_val = xilinx_loadfs(desc->devdesc, buf, size,
208 fpga_fsinfo);
209#else
210 fpga_no_sup((char *)__func__, "Xilinx devices");
211#endif
212 break;
213 default:
214 printf("%s: Invalid or unsupported device type %d\n",
215 __func__, desc->devtype);
216 }
217 }
218
219 return ret_val;
220}
221#endif
222
cedd48e2
SDPP
223#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
224int fpga_loads(int devnum, const void *buf, size_t size,
225 struct fpga_secure_info *fpga_sec_info)
226{
227 int ret_val = FPGA_FAIL;
228
229 const fpga_desc *desc = fpga_validate(devnum, buf, size,
230 (char *)__func__);
231
232 if (desc) {
233 switch (desc->devtype) {
234 case fpga_xilinx:
235#if defined(CONFIG_FPGA_XILINX)
236 ret_val = xilinx_loads(desc->devdesc, buf, size,
237 fpga_sec_info);
238#else
239 fpga_no_sup((char *)__func__, "Xilinx devices");
240#endif
241 break;
242 default:
243 printf("%s: Invalid or unsupported device type %d\n",
244 __func__, desc->devtype);
245 }
246 }
247
248 return ret_val;
249}
250#endif
251
e2211743 252/*
f6555d90 253 * Generic multiplexing code
e2211743 254 */
7a78bd26 255int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype)
e2211743
WD
256{
257 int ret_val = FPGA_FAIL; /* assume failure */
f6555d90
MS
258 const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
259 (char *)__func__);
e2211743 260
f6555d90
MS
261 if (desc) {
262 switch (desc->devtype) {
e2211743 263 case fpga_xilinx:
0133502e 264#if defined(CONFIG_FPGA_XILINX)
7a78bd26
MS
265 ret_val = xilinx_load(desc->devdesc, buf, bsize,
266 bstype);
e2211743 267#else
f6555d90 268 fpga_no_sup((char *)__func__, "Xilinx devices");
e2211743
WD
269#endif
270 break;
271 case fpga_altera:
0133502e 272#if defined(CONFIG_FPGA_ALTERA)
f6555d90 273 ret_val = altera_load(desc->devdesc, buf, bsize);
e2211743 274#else
f6555d90 275 fpga_no_sup((char *)__func__, "Altera devices");
e2211743
WD
276#endif
277 break;
3b8ac464 278 case fpga_lattice:
439f6f7e 279#if defined(CONFIG_FPGA_LATTICE)
3b8ac464 280 ret_val = lattice_load(desc->devdesc, buf, bsize);
439f6f7e 281#else
f6555d90 282 fpga_no_sup((char *)__func__, "Lattice devices");
439f6f7e 283#endif
3b8ac464 284 break;
e2211743 285 default:
f6555d90
MS
286 printf("%s: Invalid or unsupported device type %d\n",
287 __func__, desc->devtype);
e2211743
WD
288 }
289 }
290
291 return ret_val;
292}
293
f6555d90
MS
294/*
295 * fpga_dump
e2211743
WD
296 * generic multiplexing code
297 */
e6a857da 298int fpga_dump(int devnum, const void *buf, size_t bsize)
e2211743
WD
299{
300 int ret_val = FPGA_FAIL; /* assume failure */
f6555d90
MS
301 const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
302 (char *)__func__);
e2211743 303
f6555d90
MS
304 if (desc) {
305 switch (desc->devtype) {
e2211743 306 case fpga_xilinx:
0133502e 307#if defined(CONFIG_FPGA_XILINX)
f6555d90 308 ret_val = xilinx_dump(desc->devdesc, buf, bsize);
e2211743 309#else
f6555d90 310 fpga_no_sup((char *)__func__, "Xilinx devices");
e2211743
WD
311#endif
312 break;
313 case fpga_altera:
0133502e 314#if defined(CONFIG_FPGA_ALTERA)
f6555d90 315 ret_val = altera_dump(desc->devdesc, buf, bsize);
e2211743 316#else
f6555d90 317 fpga_no_sup((char *)__func__, "Altera devices");
e2211743
WD
318#endif
319 break;
3b8ac464 320 case fpga_lattice:
439f6f7e 321#if defined(CONFIG_FPGA_LATTICE)
3b8ac464 322 ret_val = lattice_dump(desc->devdesc, buf, bsize);
439f6f7e 323#else
f6555d90 324 fpga_no_sup((char *)__func__, "Lattice devices");
439f6f7e 325#endif
3b8ac464 326 break;
e2211743 327 default:
f6555d90
MS
328 printf("%s: Invalid or unsupported device type %d\n",
329 __func__, desc->devtype);
e2211743
WD
330 }
331 }
332
333 return ret_val;
334}
335
f6555d90
MS
336/*
337 * fpga_info
e2211743
WD
338 * front end to fpga_dev_info. If devnum is invalid, report on all
339 * available devices.
340 */
f6555d90 341int fpga_info(int devnum)
e2211743 342{
f6555d90
MS
343 if (devnum == FPGA_INVALID_DEVICE) {
344 if (next_desc > 0) {
e2211743
WD
345 int dev;
346
f6555d90
MS
347 for (dev = 0; dev < next_desc; dev++)
348 fpga_dev_info(dev);
349
e2211743
WD
350 return FPGA_SUCCESS;
351 } else {
f6555d90 352 printf("%s: No FPGA devices available.\n", __func__);
e2211743
WD
353 return FPGA_FAIL;
354 }
355 }
e2211743 356
f6555d90
MS
357 return fpga_dev_info(devnum);
358}
This page took 0.56061 seconds and 4 git commands to generate.