Commit | Line | Data |
---|---|---|
0eff3bf1 YW |
1 | CONFIG_RISCV=y |
2 | CONFIG_SYS_MALLOC_LEN=0x800000 | |
3 | CONFIG_SYS_MALLOC_F_LEN=0x10000 | |
4 | CONFIG_SPL_GPIO=y | |
5 | CONFIG_NR_DRAM_BANKS=1 | |
6 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y | |
7 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000000 | |
c960c0fd | 8 | CONFIG_SF_DEFAULT_SPEED=100000000 |
7d79bed0 SQ |
9 | CONFIG_ENV_SIZE=0x10000 |
10 | CONFIG_ENV_OFFSET=0xf0000 | |
0eff3bf1 | 11 | CONFIG_SPL_DM_SPI=y |
9b7060bd | 12 | CONFIG_DEFAULT_DEVICE_TREE="jh7110-starfive-visionfive-2" |
0eff3bf1 | 13 | CONFIG_SPL_TEXT_BASE=0x8000000 |
c960c0fd | 14 | CONFIG_OF_LIBFDT_OVERLAY=y |
0eff3bf1 YW |
15 | CONFIG_DM_RESET=y |
16 | CONFIG_SPL_MMC=y | |
99f3a43d | 17 | CONFIG_SPL_DRIVERS_MISC=y |
0eff3bf1 YW |
18 | CONFIG_SPL_STACK=0x8180000 |
19 | CONFIG_SPL=y | |
20 | CONFIG_SPL_SPI_FLASH_SUPPORT=y | |
21 | CONFIG_SPL_SPI=y | |
22 | CONFIG_SYS_LOAD_ADDR=0x82000000 | |
cb2750e1 MH |
23 | CONFIG_SYS_PCI_64BIT=y |
24 | CONFIG_PCI=y | |
0eff3bf1 YW |
25 | CONFIG_TARGET_STARFIVE_VISIONFIVE2=y |
26 | CONFIG_SPL_OPENSBI_LOAD_ADDR=0x40000000 | |
27 | CONFIG_ARCH_RV64I=y | |
28 | CONFIG_CMODEL_MEDANY=y | |
29 | CONFIG_RISCV_SMODE=y | |
99f3a43d | 30 | # CONFIG_OF_BOARD_FIXUP is not set |
ba6d575e | 31 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
0eff3bf1 | 32 | CONFIG_FIT=y |
42fb448a | 33 | CONFIG_SYS_BOOTM_LEN=0x4000000 |
c960c0fd | 34 | CONFIG_DISTRO_DEFAULTS=y |
e96e537e | 35 | CONFIG_BOOTSTAGE=y |
0eff3bf1 YW |
36 | CONFIG_QSPI_BOOT=y |
37 | CONFIG_SD_BOOT=y | |
ec6f06bd | 38 | CONFIG_OF_BOARD_SETUP=y |
0eff3bf1 YW |
39 | CONFIG_USE_BOOTARGS=y |
40 | CONFIG_BOOTARGS="console=ttyS0,115200 debug rootwait earlycon=sbi" | |
41 | CONFIG_USE_PREBOOT=y | |
dccf4a84 | 42 | CONFIG_PREBOOT="nvme scan; usb start; setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};" |
9b7060bd | 43 | CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb" |
42fb448a TR |
44 | CONFIG_SYS_CBSIZE=256 |
45 | CONFIG_SYS_PBSIZE=276 | |
0eff3bf1 YW |
46 | CONFIG_DISPLAY_CPUINFO=y |
47 | CONFIG_DISPLAY_BOARDINFO=y | |
99f3a43d YW |
48 | CONFIG_ID_EEPROM=y |
49 | CONFIG_SYS_EEPROM_BUS_NUM=5 | |
ba6d575e | 50 | CONFIG_PCI_INIT_R=y |
0eff3bf1 YW |
51 | CONFIG_SPL_MAX_SIZE=0x40000 |
52 | CONFIG_SPL_PAD_TO=0x0 | |
53 | CONFIG_SPL_BSS_START_ADDR=0x8040000 | |
54 | CONFIG_SPL_BSS_MAX_SIZE=0x10000 | |
55 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set | |
82e26e0d SG |
56 | CONFIG_SPL_SYS_MALLOC=y |
57 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y | |
58 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80000000 | |
59 | CONFIG_SPL_SYS_MALLOC_SIZE=0x400000 | |
0eff3bf1 YW |
60 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y |
61 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2 | |
99f3a43d | 62 | CONFIG_SPL_I2C=y |
0eff3bf1 YW |
63 | CONFIG_SPL_DM_SPI_FLASH=y |
64 | CONFIG_SPL_DM_RESET=y | |
65 | CONFIG_SPL_SPI_LOAD=y | |
ba6d575e | 66 | CONFIG_SYS_PROMPT="StarFive # " |
99f3a43d YW |
67 | CONFIG_CMD_EEPROM=y |
68 | CONFIG_SYS_EEPROM_SIZE=512 | |
69 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 | |
70 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 | |
0eff3bf1 | 71 | CONFIG_CMD_MEMINFO=y |
99f3a43d | 72 | CONFIG_CMD_I2C=y |
cb2750e1 | 73 | CONFIG_CMD_PCI=y |
06656213 | 74 | CONFIG_CMD_USB=y |
21ea9a9d | 75 | CONFIG_CMD_WDT=y |
0eff3bf1 | 76 | CONFIG_CMD_TFTPPUT=y |
e96e537e | 77 | CONFIG_CMD_BOOTSTAGE=y |
99f3a43d | 78 | CONFIG_OF_BOARD=y |
ba6d575e | 79 | CONFIG_ENV_OVERWRITE=y |
ba6d575e TR |
80 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
81 | CONFIG_ENV_SECT_SIZE_AUTO=y | |
0eff3bf1 | 82 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
99f3a43d | 83 | CONFIG_SPL_DM_SEQ_ALIAS=y |
ed430fe5 YW |
84 | CONFIG_REGMAP=y |
85 | CONFIG_SYSCON=y | |
0eff3bf1 YW |
86 | CONFIG_SPL_CLK_COMPOSITE_CCF=y |
87 | CONFIG_CLK_COMPOSITE_CCF=y | |
88 | CONFIG_SPL_CLK_JH7110=y | |
99f3a43d YW |
89 | CONFIG_DM_I2C=y |
90 | CONFIG_SYS_I2C_DW=y | |
91 | CONFIG_MISC=y | |
92 | CONFIG_I2C_EEPROM=y | |
93 | CONFIG_SPL_I2C_EEPROM=y | |
94 | CONFIG_SYS_I2C_EEPROM_ADDR=0X50 | |
0eff3bf1 YW |
95 | CONFIG_MMC_HS400_SUPPORT=y |
96 | CONFIG_SPL_MMC_HS400_SUPPORT=y | |
97 | CONFIG_MMC_DW=y | |
98 | CONFIG_MMC_DW_SNPS=y | |
0eff3bf1 YW |
99 | CONFIG_SPI_FLASH_EON=y |
100 | CONFIG_SPI_FLASH_GIGADEVICE=y | |
101 | CONFIG_SPI_FLASH_ISSI=y | |
102 | CONFIG_SPI_FLASH_MACRONIX=y | |
ed430fe5 YW |
103 | CONFIG_PHY_MOTORCOMM=y |
104 | CONFIG_DM_MDIO=y | |
105 | CONFIG_DM_ETH_PHY=y | |
106 | CONFIG_DWC_ETH_QOS=y | |
107 | CONFIG_DWC_ETH_QOS_STARFIVE=y | |
108 | CONFIG_RGMII=y | |
109 | CONFIG_RMII=y | |
493c03f8 | 110 | CONFIG_RTL8169=y |
cb2750e1 MH |
111 | CONFIG_NVME_PCI=y |
112 | CONFIG_DM_PCI_COMPAT=y | |
113 | CONFIG_PCI_REGION_MULTI_ENTRY=y | |
114 | CONFIG_PCIE_STARFIVE_JH7110=y | |
0eff3bf1 YW |
115 | CONFIG_PINCTRL=y |
116 | CONFIG_PINCONF=y | |
117 | CONFIG_SPL_PINCTRL=y | |
118 | CONFIG_SPL_PINCONF=y | |
119 | CONFIG_SPL_PINCTRL_STARFIVE=y | |
120 | CONFIG_SPL_PINCTRL_STARFIVE_JH7110=y | |
121 | CONFIG_PINCTRL_STARFIVE=y | |
122 | # CONFIG_RAM_SIFIVE is not set | |
9d22d4a7 CP |
123 | CONFIG_DM_RNG=y |
124 | CONFIG_RNG_JH7110=y | |
0eff3bf1 YW |
125 | CONFIG_SYS_NS16550=y |
126 | CONFIG_CADENCE_QSPI=y | |
0d14f04d | 127 | CONFIG_SYSRESET=y |
0eff3bf1 | 128 | CONFIG_TIMER_EARLY=y |
06656213 MC |
129 | CONFIG_USB=y |
130 | CONFIG_USB_XHCI_HCD=y | |
131 | CONFIG_USB_XHCI_PCI=y | |
dccf4a84 SQ |
132 | CONFIG_USB_EHCI_HCD=y |
133 | CONFIG_USB_EHCI_PCI=y | |
134 | CONFIG_USB_OHCI_HCD=y | |
135 | CONFIG_USB_OHCI_PCI=y | |
06656213 | 136 | CONFIG_USB_KEYBOARD=y |
21ea9a9d CP |
137 | # CONFIG_WATCHDOG is not set |
138 | # CONFIG_WATCHDOG_AUTOSTART is not set | |
139 | CONFIG_WDT=y | |
140 | CONFIG_WDT_STARFIVE=y |