From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Fri, 2 Dec 2022 23:35:21 +0000 (-0800)
Subject: Merge tag 'drm-fixes-2022-12-02' of git://anongit.freedesktop.org/drm/drm
X-Git-Url: https://repo.jachan.dev/J-linux.git/commitdiff_plain/c290db013742e98fe5b64073bc2dd8c8a2ac9e4c?hp=-c

Merge tag 'drm-fixes-2022-12-02' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "Things do seem to have finally settled down, just four i915 and one
  amdgpu this week. Probably won't have much for next week if you do
  push rc8 out.

  i915:
   - Fix dram info readout
   - Remove non-existent pipes from bigjoiner pipe mask
   - Fix negative value passed as remaining time
   - Never return 0 if not all requests retired

  amdgpu:
   - VCN fix for vangogh"

* tag 'drm-fixes-2022-12-02' of git://anongit.freedesktop.org/drm/drm:
  drm/amdgpu: enable Vangogh VCN indirect sram mode
  drm/i915: Never return 0 if not all requests retired
  drm/i915: Fix negative value passed as remaining time
  drm/i915: Remove non-existent pipes from bigjoiner pipe mask
  drm/i915/mtl: Fix dram info readout
---

c290db013742e98fe5b64073bc2dd8c8a2ac9e4c
diff --combined drivers/gpu/drm/i915/gt/intel_gt.c
index 5c931b6696c3,9f0388b3dcf2..7caa3412a244
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@@ -625,8 -625,13 +625,13 @@@ int intel_gt_wait_for_idle(struct intel
  			return -EINTR;
  	}
  
- 	return timeout ? timeout : intel_uc_wait_for_idle(&gt->uc,
- 							  remaining_timeout);
+ 	if (timeout)
+ 		return timeout;
+ 
+ 	if (remaining_timeout < 0)
+ 		remaining_timeout = 0;
+ 
+ 	return intel_uc_wait_for_idle(&gt->uc, remaining_timeout);
  }
  
  int intel_gt_init(struct intel_gt *gt)
@@@ -1017,11 -1022,6 +1022,11 @@@ static void mmio_invalidate_full(struc
  		if (!i915_mmio_reg_offset(rb.reg))
  			continue;
  
 +		if (GRAPHICS_VER(i915) == 12 && (engine->class == VIDEO_DECODE_CLASS ||
 +		    engine->class == VIDEO_ENHANCEMENT_CLASS ||
 +		    engine->class == COMPUTE_CLASS))
 +			rb.bit = _MASKED_BIT_ENABLE(rb.bit);
 +
  		intel_uncore_write_fw(uncore, rb.reg, rb.bit);
  		awake |= engine->mask;
  	}