From: Arnd Bergmann <arnd@arndb.de>
Date: Tue, 9 Jul 2024 08:50:42 +0000 (+0200)
Subject: Merge tag 'riscv-sophgo-dt-for-v6.11' of https://github.com/sophgo/linux into soc/dt
X-Git-Url: https://repo.jachan.dev/J-linux.git/commitdiff_plain/95ab7b209bd94ef5beea9419b8e8464788b28e75

Merge tag 'riscv-sophgo-dt-for-v6.11' of https://github.com/sophgo/linux into soc/dt

RISC-V Devicetrees for v6.11

Sopgho:
Add clock support for SG2042.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* tag 'riscv-sophgo-dt-for-v6.11' of https://github.com/sophgo/linux:
  riscv: dts: add clock generator for Sophgo SG2042 SoC

Link: https://lore.kernel.org/r/PN1P287MB281861EA2B1706B430D2FA3EFEDB2@PN1P287MB2818.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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95ab7b209bd94ef5beea9419b8e8464788b28e75