Merge tag 'spi-nor/for-5.19' into mtd/next

[J-linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_ras.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
index 1c708122d4922979fcb511b852857c70cea3cf6c..9314fde81e68fbfd775a1c321ca69d77ec24b905 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
@@ -26,11 +26,11 @@
 
 #include <linux/debugfs.h>
 #include <linux/list.h>
-#include "amdgpu.h"
-#include "amdgpu_psp.h"
 #include "ta_ras_if.h"
 #include "amdgpu_ras_eeprom.h"
 
+struct amdgpu_iv_entry;
+
 #define AMDGPU_RAS_FLAG_INIT_BY_VBIOS          (0x1 << 0)
 
 enum amdgpu_ras_block {
@@ -374,6 +374,9 @@ struct amdgpu_ras {
 
        /* record umc error info queried from smu */
        struct umc_ecc_info umc_ecc;
+
+       /* Indicates smu whether need update bad channel info */
+       bool update_channel_flag;
 };
 
 struct ras_fs_data {
@@ -484,6 +487,27 @@ struct ras_debug_if {
        };
        int op;
 };
+
+struct amdgpu_ras_block_object {
+       struct ras_common_if  ras_comm;
+
+       int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj,
+                               enum amdgpu_ras_block block, uint32_t sub_block_index);
+       int (*ras_late_init)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
+       void (*ras_fini)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
+       ras_ih_cb ras_cb;
+       const struct amdgpu_ras_block_hw_ops *hw_ops;
+};
+
+struct amdgpu_ras_block_hw_ops {
+       int  (*ras_error_inject)(struct amdgpu_device *adev, void *inject_if);
+       void (*query_ras_error_count)(struct amdgpu_device *adev, void *ras_error_status);
+       void (*query_ras_error_status)(struct amdgpu_device *adev);
+       void (*query_ras_error_address)(struct amdgpu_device *adev, void *ras_error_status);
+       void (*reset_ras_error_count)(struct amdgpu_device *adev);
+       void (*reset_ras_error_status)(struct amdgpu_device *adev);
+};
+
 /* work flow
  * vbios
  * 1: ras feature enable (enabled by default)
@@ -498,19 +522,6 @@ struct ras_debug_if {
  * 8: feature disable
  */
 
-#define amdgpu_ras_get_context(adev)           ((adev)->psp.ras_context.ras)
-#define amdgpu_ras_set_context(adev, ras_con)  ((adev)->psp.ras_context.ras = (ras_con))
-
-/* check if ras is supported on block, say, sdma, gfx */
-static inline int amdgpu_ras_is_supported(struct amdgpu_device *adev,
-               unsigned int block)
-{
-       struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
-
-       if (block >= AMDGPU_RAS_BLOCK_COUNT)
-               return 0;
-       return ras && (adev->ras_enabled & (1 << block));
-}
 
 int amdgpu_ras_recovery_init(struct amdgpu_device *adev);
 
@@ -527,15 +538,6 @@ int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,
 
 int amdgpu_ras_save_bad_pages(struct amdgpu_device *adev);
 
-static inline int amdgpu_ras_reset_gpu(struct amdgpu_device *adev)
-{
-       struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
-
-       if (atomic_cmpxchg(&ras->in_recovery, 0, 1) == 0)
-               schedule_work(&ras->recovery_work);
-       return 0;
-}
-
 static inline enum ta_ras_block
 amdgpu_ras_block_to_ta(enum amdgpu_ras_block block) {
        switch (block) {
@@ -596,15 +598,15 @@ amdgpu_ras_error_to_ta(enum amdgpu_ras_error_type error) {
 
 /* called in ip_init and ip_fini */
 int amdgpu_ras_init(struct amdgpu_device *adev);
+int amdgpu_ras_late_init(struct amdgpu_device *adev);
 int amdgpu_ras_fini(struct amdgpu_device *adev);
 int amdgpu_ras_pre_fini(struct amdgpu_device *adev);
-int amdgpu_ras_late_init(struct amdgpu_device *adev,
-                        struct ras_common_if *ras_block,
-                        struct ras_fs_if *fs_info,
-                        struct ras_ih_if *ih_info);
-void amdgpu_ras_late_fini(struct amdgpu_device *adev,
-                         struct ras_common_if *ras_block,
-                         struct ras_ih_if *ih_info);
+
+int amdgpu_ras_block_late_init(struct amdgpu_device *adev,
+                       struct ras_common_if *ras_block);
+
+void amdgpu_ras_block_late_fini(struct amdgpu_device *adev,
+                         struct ras_common_if *ras_block);
 
 int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
                struct ras_common_if *head, bool enable);
@@ -613,7 +615,7 @@ int amdgpu_ras_feature_enable_on_boot(struct amdgpu_device *adev,
                struct ras_common_if *head, bool enable);
 
 int amdgpu_ras_sysfs_create(struct amdgpu_device *adev,
-               struct ras_fs_if *head);
+               struct ras_common_if *head);
 
 int amdgpu_ras_sysfs_remove(struct amdgpu_device *adev,
                struct ras_common_if *head);
@@ -630,10 +632,10 @@ int amdgpu_ras_error_inject(struct amdgpu_device *adev,
                struct ras_inject_if *info);
 
 int amdgpu_ras_interrupt_add_handler(struct amdgpu_device *adev,
-               struct ras_ih_if *info);
+               struct ras_common_if *head);
 
 int amdgpu_ras_interrupt_remove_handler(struct amdgpu_device *adev,
-               struct ras_ih_if *info);
+               struct ras_common_if *head);
 
 int amdgpu_ras_interrupt_dispatch(struct amdgpu_device *adev,
                struct ras_dispatch_if *info);
@@ -667,4 +669,14 @@ const char *get_ras_block_str(struct ras_common_if *ras_block);
 
 bool amdgpu_ras_is_poison_mode_supported(struct amdgpu_device *adev);
 
+int amdgpu_ras_is_supported(struct amdgpu_device *adev, unsigned int block);
+
+int amdgpu_ras_reset_gpu(struct amdgpu_device *adev);
+
+struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev);
+
+int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras *ras_con);
+
+int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
+                               struct amdgpu_ras_block_object *ras_block_obj);
 #endif