Merge branch 'spi-5.3' into spi-5.4

[J-linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_debugfs.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 20ce158490db258a487d37e616bdc1046c51bbf3..6d54decef7f8156d0a20883151dab0af1c90d6de 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -106,10 +106,10 @@ static int  amdgpu_debugfs_process_reg_op(bool read, struct file *f,
        ssize_t result = 0;
        int r;
        bool pm_pg_lock, use_bank, use_ring;
-       unsigned instance_bank, sh_bank, se_bank, me, pipe, queue;
+       unsigned instance_bank, sh_bank, se_bank, me, pipe, queue, vmid;
 
        pm_pg_lock = use_bank = use_ring = false;
-       instance_bank = sh_bank = se_bank = me = pipe = queue = 0;
+       instance_bank = sh_bank = se_bank = me = pipe = queue = vmid = 0;
 
        if (size & 0x3 || *pos & 0x3 ||
                        ((*pos & (1ULL << 62)) && (*pos & (1ULL << 61))))
@@ -135,6 +135,7 @@ static int  amdgpu_debugfs_process_reg_op(bool read, struct file *f,
                me = (*pos & GENMASK_ULL(33, 24)) >> 24;
                pipe = (*pos & GENMASK_ULL(43, 34)) >> 34;
                queue = (*pos & GENMASK_ULL(53, 44)) >> 44;
+               vmid = (*pos & GENMASK_ULL(58, 54)) >> 54;
 
                use_ring = 1;
        } else {
@@ -152,7 +153,7 @@ static int  amdgpu_debugfs_process_reg_op(bool read, struct file *f,
                                        sh_bank, instance_bank);
        } else if (use_ring) {
                mutex_lock(&adev->srbm_mutex);
-               amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue);
+               amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue, vmid);
        }
 
        if (pm_pg_lock)
@@ -185,7 +186,7 @@ end:
                amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
                mutex_unlock(&adev->grbm_idx_mutex);
        } else if (use_ring) {
-               amdgpu_gfx_select_me_pipe_q(adev, 0, 0, 0);
+               amdgpu_gfx_select_me_pipe_q(adev, 0, 0, 0, 0);
                mutex_unlock(&adev->srbm_mutex);
        }