Merge tag 'hardening-v6.7-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees...

[J-linux.git] / drivers / gpu / drm / amd / pm / amdgpu_pm.c

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 517b9fb4624c4586406fb5c883f5c6b775bf2c9f..ca2ece24e1e07bf97fc4a66e3baf25f0ea5acd13 100644 (file)
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -989,12 +989,13 @@ static ssize_t amdgpu_get_pp_features(struct device *dev,
  * Reading back the files will show you the available power levels within
  * the power state and the clock information for those levels. If deep sleep is
  * applied to a clock, the level will be denoted by a special level 'S:'
- * E.g.,
- *     S: 19Mhz *
- *     0: 615Mhz
- *     1: 800Mhz
- *     2: 888Mhz
- *     3: 1000Mhz
+ * E.g., ::
+ *
+ *  S: 19Mhz *
+ *  0: 615Mhz
+ *  1: 800Mhz
+ *  2: 888Mhz
+ *  3: 1000Mhz
  *
  *
  * To manually adjust these states, first select manual using
@@ -2197,6 +2198,22 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
        } else if (DEVICE_ATTR_IS(xgmi_plpd_policy)) {
                if (amdgpu_dpm_get_xgmi_plpd_mode(adev, NULL) == XGMI_PLPD_NONE)
                        *states = ATTR_STATE_UNSUPPORTED;
+       } else if (DEVICE_ATTR_IS(pp_dpm_mclk_od)) {
+               if (amdgpu_dpm_get_mclk_od(adev) == -EOPNOTSUPP)
+                       *states = ATTR_STATE_UNSUPPORTED;
+       } else if (DEVICE_ATTR_IS(pp_dpm_sclk_od)) {
+               if (amdgpu_dpm_get_sclk_od(adev) == -EOPNOTSUPP)
+                       *states = ATTR_STATE_UNSUPPORTED;
+       } else if (DEVICE_ATTR_IS(apu_thermal_cap)) {
+               u32 limit;
+
+               if (amdgpu_dpm_get_apu_thermal_limit(adev, &limit) ==
+                   -EOPNOTSUPP)
+                       *states = ATTR_STATE_UNSUPPORTED;
+       } else if (DEVICE_ATTR_IS(pp_dpm_pcie)) {
+               if (gc_ver == IP_VERSION(9, 4, 2) ||
+                   gc_ver == IP_VERSION(9, 4, 3))
+                       *states = ATTR_STATE_UNSUPPORTED;
        }
 
        switch (gc_ver) {
@@ -3288,10 +3305,6 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
        uint32_t gc_ver = amdgpu_ip_version(adev, GC_HWIP, 0);
        uint32_t tmp;
 
-       /* under multi-vf mode, the hwmon attributes are all not supported */
-       if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
-               return 0;
-
        /* under pp one vf mode manage of hwmon attributes is not supported */
        if (amdgpu_sriov_is_pp_one_vf(adev))
                effective_mode &= ~S_IWUSR;
@@ -4162,6 +4175,7 @@ err_out:
 
 int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
 {
+       enum amdgpu_sriov_vf_mode mode;
        uint32_t mask = 0;
        int ret;
 
@@ -4173,17 +4187,21 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
        if (adev->pm.dpm_enabled == 0)
                return 0;
 
-       adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev,
-                                                                  DRIVER_NAME, adev,
-                                                                  hwmon_groups);
-       if (IS_ERR(adev->pm.int_hwmon_dev)) {
-               ret = PTR_ERR(adev->pm.int_hwmon_dev);
-               dev_err(adev->dev,
-                       "Unable to register hwmon device: %d\n", ret);
-               return ret;
+       mode = amdgpu_virt_get_sriov_vf_mode(adev);
+
+       /* under multi-vf mode, the hwmon attributes are all not supported */
+       if (mode != SRIOV_VF_MODE_MULTI_VF) {
+               adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev,
+                                                                                                               DRIVER_NAME, adev,
+                                                                                                               hwmon_groups);
+               if (IS_ERR(adev->pm.int_hwmon_dev)) {
+                       ret = PTR_ERR(adev->pm.int_hwmon_dev);
+                       dev_err(adev->dev, "Unable to register hwmon device: %d\n", ret);
+                       return ret;
+               }
        }
 
-       switch (amdgpu_virt_get_sriov_vf_mode(adev)) {
+       switch (mode) {
        case SRIOV_VF_MODE_ONE_VF:
                mask = ATTR_FLAG_ONEVF;
                break;