Merge tag 'msm-next-5.19-fixes' of https://gitlab.freedesktop.org/abhinavk/msm into...

[J-linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_vcn.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index a0ee828a4a97804cb7e4863fca2ef9ae339560b2..aa7acfabf360b0440e3a841b2b6f35ac60d3d53f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -53,6 +53,8 @@
 #define FIRMWARE_BEIGE_GOBY    "amdgpu/beige_goby_vcn.bin"
 #define FIRMWARE_YELLOW_CARP   "amdgpu/yellow_carp_vcn.bin"
 #define FIRMWARE_VCN_3_1_2     "amdgpu/vcn_3_1_2.bin"
+#define FIRMWARE_VCN4_0_0      "amdgpu/vcn_4_0_0.bin"
+#define FIRMWARE_VCN4_0_4      "amdgpu/vcn_4_0_4.bin"
 
 MODULE_FIRMWARE(FIRMWARE_RAVEN);
 MODULE_FIRMWARE(FIRMWARE_PICASSO);
@@ -71,6 +73,8 @@ MODULE_FIRMWARE(FIRMWARE_DIMGREY_CAVEFISH);
 MODULE_FIRMWARE(FIRMWARE_BEIGE_GOBY);
 MODULE_FIRMWARE(FIRMWARE_YELLOW_CARP);
 MODULE_FIRMWARE(FIRMWARE_VCN_3_1_2);
+MODULE_FIRMWARE(FIRMWARE_VCN4_0_0);
+MODULE_FIRMWARE(FIRMWARE_VCN4_0_4);
 
 static void amdgpu_vcn_idle_work_handler(struct work_struct *work);
 
@@ -175,6 +179,18 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
                    (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
                        adev->vcn.indirect_sram = true;
                break;
+       case IP_VERSION(4, 0, 0):
+               fw_name = FIRMWARE_VCN4_0_0;
+               if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
+                       (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
+                       adev->vcn.indirect_sram = true;
+               break;
+       case IP_VERSION(4, 0, 4):
+               fw_name = FIRMWARE_VCN4_0_4;
+               if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
+                       (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
+                       adev->vcn.indirect_sram = true;
+               break;
        default:
                return -EINVAL;
        }
@@ -228,8 +244,15 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
        bo_size = AMDGPU_VCN_STACK_SIZE + AMDGPU_VCN_CONTEXT_SIZE;
        if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP)
                bo_size += AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(hdr->ucode_size_bytes) + 8);
-       fw_shared_size = AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_fw_shared));
-       log_offset = offsetof(struct amdgpu_fw_shared, fw_log);
+
+       if (adev->ip_versions[UVD_HWIP][0] >= IP_VERSION(4, 0, 0)){
+               fw_shared_size = AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared));
+               log_offset = offsetof(struct amdgpu_vcn4_fw_shared, fw_log);
+       } else {
+               fw_shared_size = AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_fw_shared));
+               log_offset = offsetof(struct amdgpu_fw_shared, fw_log);
+       }
+
        bo_size += fw_shared_size;
 
        if (amdgpu_vcnfw_log)
@@ -1103,3 +1126,21 @@ void amdgpu_vcn_fwlog_init(struct amdgpu_vcn_inst *vcn)
        log_buf->wrapped = 0;
 #endif
 }
+
+int amdgpu_vcn_process_poison_irq(struct amdgpu_device *adev,
+                               struct amdgpu_irq_src *source,
+                               struct amdgpu_iv_entry *entry)
+{
+       struct ras_common_if *ras_if = adev->vcn.ras_if;
+       struct ras_dispatch_if ih_data = {
+               .entry = entry,
+       };
+
+       if (!ras_if)
+               return 0;
+
+       ih_data.head = *ras_if;
+       amdgpu_ras_interrupt_dispatch(adev, &ih_data);
+
+       return 0;
+}