Merge tag 'amd-drm-next-6.8-2023-12-08' of https://gitlab.freedesktop.org/agd5f/linux...

[J-linux.git] / drivers / gpu / drm / amd / display / amdgpu_dm / amdgpu_dm_helpers.c

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index eb6121ad92fd2bf6ee31706569e930ce8c319531..eaf8d9f482446d5ea9728ec17657189e25917ae8 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -64,6 +64,12 @@ static void apply_edid_quirks(struct edid *edid, struct dc_edid_caps *edid_caps)
                DRM_DEBUG_DRIVER("Disabling FAMS on monitor with panel id %X\n", panel_id);
                edid_caps->panel_patch.disable_fams = true;
                break;
+       /* Workaround for some monitors that do not clear DPCD 0x317 if FreeSync is unsupported */
+       case drm_edid_encode_panel_id('A', 'U', 'O', 0xA7AB):
+       case drm_edid_encode_panel_id('A', 'U', 'O', 0xE69B):
+               DRM_DEBUG_DRIVER("Clearing DPCD 0x317 on monitor with panel id %X\n", panel_id);
+               edid_caps->panel_patch.remove_sink_ext_caps = true;
+               break;
        default:
                return;
        }
@@ -334,15 +340,14 @@ enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger(
        return ACT_SUCCESS;
 }
 
-bool dm_helpers_dp_mst_send_payload_allocation(
+void dm_helpers_dp_mst_send_payload_allocation(
                struct dc_context *ctx,
-               const struct dc_stream_state *stream,
-               bool enable)
+               const struct dc_stream_state *stream)
 {
        struct amdgpu_dm_connector *aconnector;
        struct drm_dp_mst_topology_state *mst_state;
        struct drm_dp_mst_topology_mgr *mst_mgr;
-       struct drm_dp_mst_atomic_payload *new_payload, old_payload;
+       struct drm_dp_mst_atomic_payload *new_payload;
        enum mst_progress_status set_flag = MST_ALLOCATE_NEW_PAYLOAD;
        enum mst_progress_status clr_flag = MST_CLEAR_ALLOCATED_PAYLOAD;
        int ret = 0;
@@ -350,25 +355,13 @@ bool dm_helpers_dp_mst_send_payload_allocation(
        aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
 
        if (!aconnector || !aconnector->mst_root)
-               return false;
+               return;
 
        mst_mgr = &aconnector->mst_root->mst_mgr;
        mst_state = to_drm_dp_mst_topology_state(mst_mgr->base.state);
-
        new_payload = drm_atomic_get_mst_payload_state(mst_state, aconnector->mst_output_port);
 
-       if (!enable) {
-               set_flag = MST_CLEAR_ALLOCATED_PAYLOAD;
-               clr_flag = MST_ALLOCATE_NEW_PAYLOAD;
-       }
-
-       if (enable) {
-               ret = drm_dp_add_payload_part2(mst_mgr, mst_state->base.state, new_payload);
-       } else {
-               dm_helpers_construct_old_payload(mst_mgr, mst_state,
-                                                new_payload, &old_payload);
-               drm_dp_remove_payload_part2(mst_mgr, mst_state, &old_payload, new_payload);
-       }
+       ret = drm_dp_add_payload_part2(mst_mgr, mst_state->base.state, new_payload);
 
        if (ret) {
                amdgpu_dm_set_mst_status(&aconnector->mst_status,
@@ -379,10 +372,36 @@ bool dm_helpers_dp_mst_send_payload_allocation(
                amdgpu_dm_set_mst_status(&aconnector->mst_status,
                        clr_flag, false);
        }
-
-       return true;
 }
 
+void dm_helpers_dp_mst_update_mst_mgr_for_deallocation(
+               struct dc_context *ctx,
+               const struct dc_stream_state *stream)
+{
+       struct amdgpu_dm_connector *aconnector;
+       struct drm_dp_mst_topology_state *mst_state;
+       struct drm_dp_mst_topology_mgr *mst_mgr;
+       struct drm_dp_mst_atomic_payload *new_payload, old_payload;
+       enum mst_progress_status set_flag = MST_CLEAR_ALLOCATED_PAYLOAD;
+       enum mst_progress_status clr_flag = MST_ALLOCATE_NEW_PAYLOAD;
+
+       aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
+
+       if (!aconnector || !aconnector->mst_root)
+               return;
+
+       mst_mgr = &aconnector->mst_root->mst_mgr;
+       mst_state = to_drm_dp_mst_topology_state(mst_mgr->base.state);
+       new_payload = drm_atomic_get_mst_payload_state(mst_state, aconnector->mst_output_port);
+       dm_helpers_construct_old_payload(mst_mgr, mst_state,
+                                        new_payload, &old_payload);
+
+       drm_dp_remove_payload_part2(mst_mgr, mst_state, &old_payload, new_payload);
+
+       amdgpu_dm_set_mst_status(&aconnector->mst_status, set_flag, true);
+       amdgpu_dm_set_mst_status(&aconnector->mst_status, clr_flag, false);
+ }
+
 void dm_dtn_log_begin(struct dc_context *ctx,
        struct dc_log_buffer_ctx *log_ctx)
 {