Merge patch series "Prepare for upstreaming Pixel 6 and 7 UFS support"

[J-linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_vm.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index c05cff979004c36d5e55076894f17a107688db52..dc379dc22c77b3e462fd70e4b6a1c5b516be7bc5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -484,25 +484,20 @@ bool amdgpu_vm_need_pipeline_sync(struct amdgpu_ring *ring,
        struct amdgpu_device *adev = ring->adev;
        unsigned vmhub = ring->funcs->vmhub;
        struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub];
        struct amdgpu_device *adev = ring->adev;
        unsigned vmhub = ring->funcs->vmhub;
        struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub];

-       struct amdgpu_vmid *id;
-       bool gds_switch_needed;
-       bool vm_flush_needed = job->vm_needs_flush || ring->has_compute_vm_bug;

 
        if (job->vmid == 0)
                return false;
 
        if (job->vmid == 0)
                return false;

-       id = &id_mgr->ids[job->vmid];
-       gds_switch_needed = ring->funcs->emit_gds_switch && (
-               id->gds_base != job->gds_base ||
-               id->gds_size != job->gds_size ||
-               id->gws_base != job->gws_base ||
-               id->gws_size != job->gws_size ||
-               id->oa_base != job->oa_base ||
-               id->oa_size != job->oa_size);
-
-       if (amdgpu_vmid_had_gpu_reset(adev, id))
+
+       if (job->vm_needs_flush || ring->has_compute_vm_bug)
+               return true;
+
+       if (ring->funcs->emit_gds_switch && job->gds_switch_needed)
+               return true;
+
+       if (amdgpu_vmid_had_gpu_reset(adev, &id_mgr->ids[job->vmid]))

                return true;
 
                return true;
 

-       return vm_flush_needed || gds_switch_needed;
+       return false;

 }
 
 /**
 }
 
 /**


@@ -524,27 +519,20 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
        unsigned vmhub = ring->funcs->vmhub;
        struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub];
        struct amdgpu_vmid *id = &id_mgr->ids[job->vmid];
        unsigned vmhub = ring->funcs->vmhub;
        struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub];
        struct amdgpu_vmid *id = &id_mgr->ids[job->vmid];

-       bool gds_switch_needed = ring->funcs->emit_gds_switch && (
-               id->gds_base != job->gds_base ||
-               id->gds_size != job->gds_size ||
-               id->gws_base != job->gws_base ||
-               id->gws_size != job->gws_size ||
-               id->oa_base != job->oa_base ||
-               id->oa_size != job->oa_size);
+       bool spm_update_needed = job->spm_update_needed;
+       bool gds_switch_needed = ring->funcs->emit_gds_switch &&
+               job->gds_switch_needed;

        bool vm_flush_needed = job->vm_needs_flush;
        struct dma_fence *fence = NULL;
        bool pasid_mapping_needed = false;
        unsigned patch_offset = 0;
        bool vm_flush_needed = job->vm_needs_flush;
        struct dma_fence *fence = NULL;
        bool pasid_mapping_needed = false;
        unsigned patch_offset = 0;

-       bool update_spm_vmid_needed = (job->vm && (job->vm->reserved_vmid[vmhub] != NULL));

        int r;
 
        int r;
 

-       if (update_spm_vmid_needed && adev->gfx.rlc.funcs->update_spm_vmid)
-               adev->gfx.rlc.funcs->update_spm_vmid(adev, job->vmid);
-

        if (amdgpu_vmid_had_gpu_reset(adev, id)) {
                gds_switch_needed = true;
                vm_flush_needed = true;
                pasid_mapping_needed = true;
        if (amdgpu_vmid_had_gpu_reset(adev, id)) {
                gds_switch_needed = true;
                vm_flush_needed = true;
                pasid_mapping_needed = true;

+               spm_update_needed = true;

        }
 
        mutex_lock(&id_mgr->lock);
        }
 
        mutex_lock(&id_mgr->lock);


@@ -577,6 +565,17 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
        if (pasid_mapping_needed)
                amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid);
 
        if (pasid_mapping_needed)
                amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid);
 

+       if (spm_update_needed && adev->gfx.rlc.funcs->update_spm_vmid)
+               adev->gfx.rlc.funcs->update_spm_vmid(adev, job->vmid);
+
+       if (!ring->is_mes_queue && ring->funcs->emit_gds_switch &&
+           gds_switch_needed) {
+               amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base,
+                                           job->gds_size, job->gws_base,
+                                           job->gws_size, job->oa_base,
+                                           job->oa_size);
+       }
+

        if (vm_flush_needed || pasid_mapping_needed) {
                r = amdgpu_fence_emit(ring, &fence, NULL, 0);
                if (r)
        if (vm_flush_needed || pasid_mapping_needed) {
                r = amdgpu_fence_emit(ring, &fence, NULL, 0);
                if (r)


@@ -601,20 +600,6 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
        }
        dma_fence_put(fence);
 
        }
        dma_fence_put(fence);
 

-       if (!ring->is_mes_queue && ring->funcs->emit_gds_switch &&
-           gds_switch_needed) {
-               id->gds_base = job->gds_base;
-               id->gds_size = job->gds_size;
-               id->gws_base = job->gws_base;
-               id->gws_size = job->gws_size;
-               id->oa_base = job->oa_base;
-               id->oa_size = job->oa_size;
-               amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base,
-                                           job->gds_size, job->gws_base,
-                                           job->gws_size, job->oa_base,
-                                           job->oa_size);
-       }
-

        if (ring->funcs->patch_cond_exec)
                amdgpu_ring_patch_cond_exec(ring, patch_offset);
 
        if (ring->funcs->patch_cond_exec)
                amdgpu_ring_patch_cond_exec(ring, patch_offset);
 


@@ -2383,7 +2368,6 @@ int amdgpu_vm_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
        union drm_amdgpu_vm *args = data;
        struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_fpriv *fpriv = filp->driver_priv;
        union drm_amdgpu_vm *args = data;
        struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_fpriv *fpriv = filp->driver_priv;

-       long timeout = msecs_to_jiffies(2000);

        int r;
 
        switch (args->in.op) {
        int r;
 
        switch (args->in.op) {


@@ -2395,21 +2379,6 @@ int amdgpu_vm_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
                        return r;
                break;
        case AMDGPU_VM_OP_UNRESERVE_VMID:
                        return r;
                break;
        case AMDGPU_VM_OP_UNRESERVE_VMID:

-               if (amdgpu_sriov_runtime(adev))
-                       timeout = 8 * timeout;
-
-               /* Wait vm idle to make sure the vmid set in SPM_VMID is
-                * not referenced anymore.
-                */
-               r = amdgpu_bo_reserve(fpriv->vm.root.bo, true);
-               if (r)
-                       return r;
-
-               r = amdgpu_vm_wait_idle(&fpriv->vm, timeout);
-               if (r < 0)
-                       return r;
-
-               amdgpu_bo_unreserve(fpriv->vm.root.bo);

                amdgpu_vmid_free_reserved(adev, &fpriv->vm, AMDGPU_GFXHUB_0);
                break;
        default:
                amdgpu_vmid_free_reserved(adev, &fpriv->vm, AMDGPU_GFXHUB_0);
                break;
        default: