Merge tag 'mlx5-updates-2023-12-20' of git://git.kernel.org/pub/scm/linux/kernel...

[J-linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_ucode.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 8beefc045e1451fe2697fa83840d686289fb2514..b14127429f3036e060afde459d8627734afd5a60 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -642,6 +642,8 @@ const char *amdgpu_ucode_name(enum AMDGPU_UCODE_ID ucode_id)
                return "SMC";
        case AMDGPU_UCODE_ID_PPTABLE:
                return "PPTABLE";
                return "SMC";
        case AMDGPU_UCODE_ID_PPTABLE:
                return "PPTABLE";

+       case AMDGPU_UCODE_ID_P2S_TABLE:
+               return "P2STABLE";

        case AMDGPU_UCODE_ID_UVD:
                return "UVD";
        case AMDGPU_UCODE_ID_UVD1:
        case AMDGPU_UCODE_ID_UVD:
                return "UVD";
        case AMDGPU_UCODE_ID_UVD1:


@@ -664,20 +666,42 @@ const char *amdgpu_ucode_name(enum AMDGPU_UCODE_ID ucode_id)
                return "DMCUB";
        case AMDGPU_UCODE_ID_CAP:
                return "CAP";
                return "DMCUB";
        case AMDGPU_UCODE_ID_CAP:
                return "CAP";

+       case AMDGPU_UCODE_ID_VPE_CTX:
+               return "VPE_CTX";
+       case AMDGPU_UCODE_ID_VPE_CTL:
+               return "VPE_CTL";
+       case AMDGPU_UCODE_ID_VPE:
+               return "VPE";
+       case AMDGPU_UCODE_ID_UMSCH_MM_UCODE:
+               return "UMSCH_MM_UCODE";
+       case AMDGPU_UCODE_ID_UMSCH_MM_DATA:
+               return "UMSCH_MM_DATA";
+       case AMDGPU_UCODE_ID_UMSCH_MM_CMD_BUFFER:
+               return "UMSCH_MM_CMD_BUFFER";

        default:
                return "UNKNOWN UCODE";
        }
 }
 
        default:
                return "UNKNOWN UCODE";
        }
 }
 

+static inline int amdgpu_ucode_is_valid(uint32_t fw_version)
+{
+       if (!fw_version)
+               return -EINVAL;
+
+       return 0;
+}
+

 #define FW_VERSION_ATTR(name, mode, field)                             \
 static ssize_t show_##name(struct device *dev,                         \
 #define FW_VERSION_ATTR(name, mode, field)                             \
 static ssize_t show_##name(struct device *dev,                         \

-                         struct device_attribute *attr,                \
-                         char *buf)                                    \
+                          struct device_attribute *attr, char *buf)    \

 {                                                                      \
        struct drm_device *ddev = dev_get_drvdata(dev);                 \
        struct amdgpu_device *adev = drm_to_adev(ddev);                 \
                                                                        \
 {                                                                      \
        struct drm_device *ddev = dev_get_drvdata(dev);                 \
        struct amdgpu_device *adev = drm_to_adev(ddev);                 \
                                                                        \

-       return sysfs_emit(buf, "0x%08x\n", adev->field);        \
+       if (!buf)                                                       \
+               return amdgpu_ucode_is_valid(adev->field);              \
+                                                                       \
+       return sysfs_emit(buf, "0x%08x\n", adev->field);                \

 }                                                                      \
 static DEVICE_ATTR(name, mode, show_##name, NULL)
 
 }                                                                      \
 static DEVICE_ATTR(name, mode, show_##name, NULL)
 


@@ -722,9 +746,24 @@ static struct attribute *fw_attrs[] = {
        NULL
 };
 
        NULL
 };
 

+#define to_dev_attr(x) container_of(x, struct device_attribute, attr)
+
+static umode_t amdgpu_ucode_sys_visible(struct kobject *kobj,
+                                       struct attribute *attr, int idx)
+{
+       struct device_attribute *dev_attr = to_dev_attr(attr);
+       struct device *dev = kobj_to_dev(kobj);
+
+       if (dev_attr->show(dev, dev_attr, NULL) == -EINVAL)
+               return 0;
+
+       return attr->mode;
+}
+

 static const struct attribute_group fw_attr_group = {
        .name = "fw_version",
 static const struct attribute_group fw_attr_group = {
        .name = "fw_version",

-       .attrs = fw_attrs
+       .attrs = fw_attrs,
+       .is_visible = amdgpu_ucode_sys_visible

 };
 
 int amdgpu_ucode_sysfs_init(struct amdgpu_device *adev)
 };
 
 int amdgpu_ucode_sysfs_init(struct amdgpu_device *adev)


@@ -749,6 +788,8 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
        const struct mes_firmware_header_v1_0 *mes_hdr = NULL;
        const struct sdma_firmware_header_v2_0 *sdma_hdr = NULL;
        const struct imu_firmware_header_v1_0 *imu_hdr = NULL;
        const struct mes_firmware_header_v1_0 *mes_hdr = NULL;
        const struct sdma_firmware_header_v2_0 *sdma_hdr = NULL;
        const struct imu_firmware_header_v1_0 *imu_hdr = NULL;

+       const struct vpe_firmware_header_v1_0 *vpe_hdr = NULL;
+       const struct umsch_mm_firmware_header_v1_0 *umsch_mm_hdr = NULL;

        u8 *ucode_addr;
 
        if (!ucode->fw)
        u8 *ucode_addr;
 
        if (!ucode->fw)


@@ -768,6 +809,8 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
        mes_hdr = (const struct mes_firmware_header_v1_0 *)ucode->fw->data;
        sdma_hdr = (const struct sdma_firmware_header_v2_0 *)ucode->fw->data;
        imu_hdr = (const struct imu_firmware_header_v1_0 *)ucode->fw->data;
        mes_hdr = (const struct mes_firmware_header_v1_0 *)ucode->fw->data;
        sdma_hdr = (const struct sdma_firmware_header_v2_0 *)ucode->fw->data;
        imu_hdr = (const struct imu_firmware_header_v1_0 *)ucode->fw->data;

+       vpe_hdr = (const struct vpe_firmware_header_v1_0 *)ucode->fw->data;
+       umsch_mm_hdr = (const struct umsch_mm_firmware_header_v1_0 *)ucode->fw->data;

 
        if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
                switch (ucode->ucode_id) {
 
        if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
                switch (ucode->ucode_id) {


@@ -884,6 +927,10 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
                        ucode->ucode_size = ucode->fw->size;
                        ucode_addr = (u8 *)ucode->fw->data;
                        break;
                        ucode->ucode_size = ucode->fw->size;
                        ucode_addr = (u8 *)ucode->fw->data;
                        break;

+               case AMDGPU_UCODE_ID_P2S_TABLE:
+                       ucode->ucode_size = ucode->fw->size;
+                       ucode_addr = (u8 *)ucode->fw->data;
+                       break;

                case AMDGPU_UCODE_ID_IMU_I:
                        ucode->ucode_size = le32_to_cpu(imu_hdr->imu_iram_ucode_size_bytes);
                        ucode_addr = (u8 *)ucode->fw->data +
                case AMDGPU_UCODE_ID_IMU_I:
                        ucode->ucode_size = le32_to_cpu(imu_hdr->imu_iram_ucode_size_bytes);
                        ucode_addr = (u8 *)ucode->fw->data +


@@ -950,6 +997,26 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
                        ucode_addr = (u8 *)ucode->fw->data +
                                le32_to_cpu(cpv2_hdr->data_offset_bytes);
                        break;
                        ucode_addr = (u8 *)ucode->fw->data +
                                le32_to_cpu(cpv2_hdr->data_offset_bytes);
                        break;

+               case AMDGPU_UCODE_ID_VPE_CTX:
+                       ucode->ucode_size = le32_to_cpu(vpe_hdr->ctx_ucode_size_bytes);
+                       ucode_addr = (u8 *)ucode->fw->data +
+                               le32_to_cpu(vpe_hdr->header.ucode_array_offset_bytes);
+                       break;
+               case AMDGPU_UCODE_ID_VPE_CTL:
+                       ucode->ucode_size = le32_to_cpu(vpe_hdr->ctl_ucode_size_bytes);
+                       ucode_addr = (u8 *)ucode->fw->data +
+                               le32_to_cpu(vpe_hdr->ctl_ucode_offset);
+                       break;
+               case AMDGPU_UCODE_ID_UMSCH_MM_UCODE:
+                       ucode->ucode_size = le32_to_cpu(umsch_mm_hdr->umsch_mm_ucode_size_bytes);
+                       ucode_addr = (u8 *)ucode->fw->data +
+                               le32_to_cpu(umsch_mm_hdr->header.ucode_array_offset_bytes);
+                       break;
+               case AMDGPU_UCODE_ID_UMSCH_MM_DATA:
+                       ucode->ucode_size = le32_to_cpu(umsch_mm_hdr->umsch_mm_ucode_data_size_bytes);
+                       ucode_addr = (u8 *)ucode->fw->data +
+                               le32_to_cpu(umsch_mm_hdr->umsch_mm_ucode_data_offset_bytes);
+                       break;

                default:
                        ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes);
                        ucode_addr = (u8 *)ucode->fw->data +
                default:
                        ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes);
                        ucode_addr = (u8 *)ucode->fw->data +


@@ -1061,7 +1128,7 @@ int amdgpu_ucode_init_bo(struct amdgpu_device *adev)
 static const char *amdgpu_ucode_legacy_naming(struct amdgpu_device *adev, int block_type)
 {
        if (block_type == MP0_HWIP) {
 static const char *amdgpu_ucode_legacy_naming(struct amdgpu_device *adev, int block_type)
 {
        if (block_type == MP0_HWIP) {

-               switch (adev->ip_versions[MP0_HWIP][0]) {
+               switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {

                case IP_VERSION(9, 0, 0):
                        switch (adev->asic_type) {
                        case CHIP_VEGA10:
                case IP_VERSION(9, 0, 0):
                        switch (adev->asic_type) {
                        case CHIP_VEGA10:


@@ -1112,7 +1179,7 @@ static const char *amdgpu_ucode_legacy_naming(struct amdgpu_device *adev, int bl
                        return "yellow_carp";
                }
        } else if (block_type == MP1_HWIP) {
                        return "yellow_carp";
                }
        } else if (block_type == MP1_HWIP) {

-               switch (adev->ip_versions[MP1_HWIP][0]) {
+               switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {

                case IP_VERSION(9, 0, 0):
                case IP_VERSION(10, 0, 0):
                case IP_VERSION(10, 0, 1):
                case IP_VERSION(9, 0, 0):
                case IP_VERSION(10, 0, 0):
                case IP_VERSION(10, 0, 1):


@@ -1138,7 +1205,7 @@ static const char *amdgpu_ucode_legacy_naming(struct amdgpu_device *adev, int bl
                        return "aldebaran_smc";
                }
        } else if (block_type == SDMA0_HWIP) {
                        return "aldebaran_smc";
                }
        } else if (block_type == SDMA0_HWIP) {

-               switch (adev->ip_versions[SDMA0_HWIP][0]) {
+               switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

                case IP_VERSION(4, 0, 0):
                        return "vega10_sdma";
                case IP_VERSION(4, 0, 1):
                case IP_VERSION(4, 0, 0):
                        return "vega10_sdma";
                case IP_VERSION(4, 0, 1):


@@ -1182,7 +1249,7 @@ static const char *amdgpu_ucode_legacy_naming(struct amdgpu_device *adev, int bl
                        return "vangogh_sdma";
                }
        } else if (block_type == UVD_HWIP) {
                        return "vangogh_sdma";
                }
        } else if (block_type == UVD_HWIP) {

-               switch (adev->ip_versions[UVD_HWIP][0]) {
+               switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) {

                case IP_VERSION(1, 0, 0):
                case IP_VERSION(1, 0, 1):
                        if (adev->apu_flags & AMD_APU_IS_RAVEN2)
                case IP_VERSION(1, 0, 0):
                case IP_VERSION(1, 0, 1):
                        if (adev->apu_flags & AMD_APU_IS_RAVEN2)


@@ -1207,7 +1274,8 @@ static const char *amdgpu_ucode_legacy_naming(struct amdgpu_device *adev, int bl
                case IP_VERSION(3, 0, 0):
                case IP_VERSION(3, 0, 64):
                case IP_VERSION(3, 0, 192):
                case IP_VERSION(3, 0, 0):
                case IP_VERSION(3, 0, 64):
                case IP_VERSION(3, 0, 192):

-                       if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 0))
+                       if (amdgpu_ip_version(adev, GC_HWIP, 0) ==
+                           IP_VERSION(10, 3, 0))

                                return "sienna_cichlid_vcn";
                        return "navy_flounder_vcn";
                case IP_VERSION(3, 0, 2):
                                return "sienna_cichlid_vcn";
                        return "navy_flounder_vcn";
                case IP_VERSION(3, 0, 2):


@@ -1220,7 +1288,7 @@ static const char *amdgpu_ucode_legacy_naming(struct amdgpu_device *adev, int bl
                        return "yellow_carp_vcn";
                }
        } else if (block_type == GC_HWIP) {
                        return "yellow_carp_vcn";
                }
        } else if (block_type == GC_HWIP) {

-               switch (adev->ip_versions[GC_HWIP][0]) {
+               switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {

                case IP_VERSION(9, 0, 1):
                        return "vega10";
                case IP_VERSION(9, 2, 1):
                case IP_VERSION(9, 0, 1):
                        return "vega10";
                case IP_VERSION(9, 2, 1):


@@ -1273,7 +1341,7 @@ void amdgpu_ucode_ip_version_decode(struct amdgpu_device *adev, int block_type,
        int maj, min, rev;
        char *ip_name;
        const char *legacy;
        int maj, min, rev;
        char *ip_name;
        const char *legacy;

-       uint32_t version = adev->ip_versions[block_type][0];
+       uint32_t version = amdgpu_ip_version(adev, block_type, 0);

 
        legacy = amdgpu_ucode_legacy_naming(adev, block_type);
        if (legacy) {
 
        legacy = amdgpu_ucode_legacy_naming(adev, block_type);
        if (legacy) {


@@ -1297,6 +1365,9 @@ void amdgpu_ucode_ip_version_decode(struct amdgpu_device *adev, int block_type,
        case UVD_HWIP:
                ip_name = "vcn";
                break;
        case UVD_HWIP:
                ip_name = "vcn";
                break;

+       case VPE_HWIP:
+               ip_name = "vpe";
+               break;

        default:
                BUG();
        }
        default:
                BUG();
        }