]> Git Repo - J-linux.git/blobdiff - drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
Merge tag 'spi-nor/for-5.19' into mtd/next
[J-linux.git] / drivers / gpu / drm / amd / amdgpu / vce_v4_0.c
index fec902b800c28b79e7e7057f1ab0187c2738dba1..d1fc4e0b8265d01d7ae91ba106dca5b06a88ae45 100644 (file)
@@ -463,6 +463,8 @@ static int vce_v4_0_sw_init(void *handle)
        }
 
        for (i = 0; i < adev->vce.num_rings; i++) {
+               enum amdgpu_ring_priority_level hw_prio = amdgpu_vce_get_ring_prio(i);
+
                ring = &adev->vce.ring[i];
                sprintf(ring->name, "vce%d", i);
                if (amdgpu_sriov_vf(adev)) {
@@ -478,7 +480,7 @@ static int vce_v4_0_sw_init(void *handle)
                                ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring2_3 * 2 + 1;
                }
                r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0,
-                                    AMDGPU_RING_PRIO_DEFAULT, NULL);
+                                    hw_prio, NULL);
                if (r)
                        return r;
        }
@@ -542,29 +544,8 @@ static int vce_v4_0_hw_fini(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       /*
-        * Proper cleanups before halting the HW engine:
-        *   - cancel the delayed idle work
-        *   - enable powergating
-        *   - enable clockgating
-        *   - disable dpm
-        *
-        * TODO: to align with the VCN implementation, move the
-        * jobs for clockgating/powergating/dpm setting to
-        * ->set_powergating_state().
-        */
        cancel_delayed_work_sync(&adev->vce.idle_work);
 
-       if (adev->pm.dpm_enabled) {
-               amdgpu_dpm_enable_vce(adev, false);
-       } else {
-               amdgpu_asic_set_vce_clocks(adev, 0, 0);
-               amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
-                                                      AMD_PG_STATE_GATE);
-               amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
-                                                      AMD_CG_STATE_GATE);
-       }
-
        if (!amdgpu_sriov_vf(adev)) {
                /* vce_v4_0_wait_for_idle(handle); */
                vce_v4_0_stop(adev);
@@ -584,7 +565,7 @@ static int vce_v4_0_suspend(void *handle)
        if (adev->vce.vcpu_bo == NULL)
                return 0;
 
-       if (drm_dev_enter(&adev->ddev, &idx)) {
+       if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
                        unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo);
                        void *ptr = adev->vce.cpu_addr;
@@ -594,6 +575,29 @@ static int vce_v4_0_suspend(void *handle)
                drm_dev_exit(idx);
        }
 
+       /*
+        * Proper cleanups before halting the HW engine:
+        *   - cancel the delayed idle work
+        *   - enable powergating
+        *   - enable clockgating
+        *   - disable dpm
+        *
+        * TODO: to align with the VCN implementation, move the
+        * jobs for clockgating/powergating/dpm setting to
+        * ->set_powergating_state().
+        */
+       cancel_delayed_work_sync(&adev->vce.idle_work);
+
+       if (adev->pm.dpm_enabled) {
+               amdgpu_dpm_enable_vce(adev, false);
+       } else {
+               amdgpu_asic_set_vce_clocks(adev, 0, 0);
+               amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                      AMD_PG_STATE_GATE);
+               amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                      AMD_CG_STATE_GATE);
+       }
+
        r = vce_v4_0_hw_fini(adev);
        if (r)
                return r;
@@ -611,7 +615,7 @@ static int vce_v4_0_resume(void *handle)
 
        if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
 
-               if (drm_dev_enter(&adev->ddev, &idx)) {
+               if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                        unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo);
                        void *ptr = adev->vce.cpu_addr;
 
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