Merge tag 'riscv-for-linus-4.20-mw2' of git://git.kernel.org/pub/scm/linux/kernel...

[J-linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_object.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 9c3e29a04eb18868c8f87f9094ac216ddcff3d24..7d3312d0da1174dcc62e75d782fcb55c5f1cbd39 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -32,6 +32,7 @@
 #include "amdgpu.h"
 
 #define AMDGPU_BO_INVALID_OFFSET       LONG_MAX
+#define AMDGPU_BO_MAX_PLACEMENTS       3
 
 struct amdgpu_bo_param {
        unsigned long                   size;
@@ -77,7 +78,7 @@ struct amdgpu_bo {
        /* Protected by tbo.reserved */
        u32                             preferred_domains;
        u32                             allowed_domains;
-       struct ttm_place                placements[AMDGPU_GEM_DOMAIN_MAX + 1];
+       struct ttm_place                placements[AMDGPU_BO_MAX_PLACEMENTS];
        struct ttm_placement            placement;
        struct ttm_buffer_object        tbo;
        struct ttm_bo_kmap_obj          kmap;
@@ -88,8 +89,8 @@ struct amdgpu_bo {
        void                            *metadata;
        u32                             metadata_size;
        unsigned                        prime_shared_count;
-       /* list of all virtual address to which this bo is associated to */
-       struct list_head                va;
+       /* per VM structure for page tables and with virtual addresses */
+       struct amdgpu_vm_bo_base        *vm_bo;
        /* Constant after initialization */
        struct drm_gem_object           gem_base;
        struct amdgpu_bo                *parent;
@@ -192,19 +193,6 @@ static inline u64 amdgpu_bo_mmap_offset(struct amdgpu_bo *bo)
        return drm_vma_node_offset_addr(&bo->tbo.vma_node);
 }
 
-/**
- * amdgpu_bo_gpu_accessible - return whether the bo is currently in memory that
- * is accessible to the GPU.
- */
-static inline bool amdgpu_bo_gpu_accessible(struct amdgpu_bo *bo)
-{
-       switch (bo->tbo.mem.mem_type) {
-       case TTM_PL_TT: return amdgpu_gtt_mgr_has_gart_addr(&bo->tbo.mem);
-       case TTM_PL_VRAM: return true;
-       default: return false;
-       }
-}
-
 /**
  * amdgpu_bo_in_cpu_visible_vram - check if BO is (partly) in visible VRAM
  */
@@ -234,6 +222,9 @@ static inline bool amdgpu_bo_explicit_sync(struct amdgpu_bo *bo)
        return bo->flags & AMDGPU_GEM_CREATE_EXPLICIT_SYNC;
 }
 
+bool amdgpu_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);
+void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain);
+
 int amdgpu_bo_create(struct amdgpu_device *adev,
                     struct amdgpu_bo_param *bp,
                     struct amdgpu_bo **bo_ptr);
@@ -282,12 +273,8 @@ int amdgpu_bo_backup_to_shadow(struct amdgpu_device *adev,
                               struct reservation_object *resv,
                               struct dma_fence **fence, bool direct);
 int amdgpu_bo_validate(struct amdgpu_bo *bo);
-int amdgpu_bo_restore_from_shadow(struct amdgpu_device *adev,
-                                 struct amdgpu_ring *ring,
-                                 struct amdgpu_bo *bo,
-                                 struct reservation_object *resv,
-                                 struct dma_fence **fence,
-                                 bool direct);
+int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
+                            struct dma_fence **fence);
 uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,
                                            uint32_t domain);