drm/amdgpu: add RAS is_rma flag

[J-linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_ras.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
index cb5a0f31d201d5fce623123a1489eb060b4b3bab..e70c45712ddb4a0b26cb59ae2489cbbd01f8cba2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
@@ -46,13 +46,11 @@ struct amdgpu_iv_entry;
 #define AMDGPU_RAS_GPU_ERR_HBM_BIST_TEST(x)            AMDGPU_GET_REG_FIELD(x, 7, 7)
 #define AMDGPU_RAS_GPU_ERR_SOCKET_ID(x)                        AMDGPU_GET_REG_FIELD(x, 10, 8)
 #define AMDGPU_RAS_GPU_ERR_AID_ID(x)                   AMDGPU_GET_REG_FIELD(x, 12, 11)
-#define AMDGPU_RAS_GPU_ERR_HBM_ID(x)                   AMDGPU_GET_REG_FIELD(x, 13, 13)
-#define AMDGPU_RAS_GPU_ERR_BOOT_STATUS(x)              AMDGPU_GET_REG_FIELD(x, 31, 31)
+#define AMDGPU_RAS_GPU_ERR_HBM_ID(x)                   AMDGPU_GET_REG_FIELD(x, 14, 13)
 
-#define AMDGPU_RAS_BOOT_STATUS_POLLING_LIMIT   1000
+#define AMDGPU_RAS_BOOT_STATUS_POLLING_LIMIT   100
 #define AMDGPU_RAS_BOOT_STEADY_STATUS          0xBA
 #define AMDGPU_RAS_BOOT_STATUS_MASK            0xFF
-#define AMDGPU_RAS_BOOT_SUCEESS                        0x80000000
 
 #define AMDGPU_RAS_FLAG_INIT_BY_VBIOS          (0x1 << 0)
 /* position of instance value in sub_block_index of
@@ -64,16 +62,14 @@ struct amdgpu_iv_entry;
 #define AMDGPU_RAS_FEATURES_SOCKETID_SHIFT 29
 #define AMDGPU_RAS_FEATURES_SOCKETID_MASK 0xe0000000
 
+/* Reserve 8 physical dram row for possible retirement.
+ * In worst cases, it will lose 8 * 2MB memory in vram domain */
+#define AMDGPU_RAS_RESERVED_VRAM_SIZE  (16ULL << 20)
 /* The high three bits indicates socketid */
 #define AMDGPU_RAS_GET_FEATURES(val)  ((val) & ~AMDGPU_RAS_FEATURES_SOCKETID_MASK)
 
-#define RAS_EVENT_LOG(_adev, _id, _fmt, ...)                           \
-do {                                                                   \
-       if (amdgpu_ras_event_id_is_valid((_adev), (_id)))                       \
-           dev_info((_adev)->dev, "{%llu}" _fmt, (_id), ##__VA_ARGS__);        \
-       else                                                            \
-           dev_info((_adev)->dev, _fmt, ##__VA_ARGS__);                        \
-} while (0)
+#define RAS_EVENT_LOG(adev, id, fmt, ...)      \
+       amdgpu_ras_event_log_print((adev), (id), (fmt), ##__VA_ARGS__);
 
 enum amdgpu_ras_block {
        AMDGPU_RAS_BLOCK__UMC = 0,
@@ -526,6 +522,7 @@ struct amdgpu_ras {
        bool update_channel_flag;
        /* Record status of smu mca debug mode */
        bool is_aca_debug_mode;
+       bool is_rma;
 
        /* Record special requirements of gpu reset caller */
        uint32_t  gpu_reset_flags;
@@ -546,6 +543,7 @@ struct amdgpu_ras {
        struct ras_event_manager __event_mgr;
        struct ras_event_manager *event_mgr;
 
+       uint64_t reserved_pages_in_bytes;
 };
 
 struct ras_fs_data {
@@ -579,6 +577,7 @@ struct ras_err_data {
        unsigned long de_count;
        unsigned long err_addr_cnt;
        struct eeprom_table_record *err_addr;
+       unsigned long err_addr_len;
        u32 err_list_count;
        struct list_head err_node_list;
 };
@@ -955,4 +954,8 @@ int amdgpu_ras_put_poison_req(struct amdgpu_device *adev,
                enum amdgpu_ras_block block, uint16_t pasid,
                pasid_notify pasid_fn, void *data, uint32_t reset);
 
+__printf(3, 4)
+void amdgpu_ras_event_log_print(struct amdgpu_device *adev, u64 event_id,
+                               const char *fmt, ...);
+
 #endif